Capacitor and manufacturing method of capacitor

Abstract

To provide a capacitor capable of increasing a generated capacitance of the capacitor, and a fabrication method of the capacitor.SOLUTION: A capacitor 1 includes: a base material 2 having a first main surface 3 and a second main surface 4; a first embedded electrode 12 having a tapered side wall 17 having a width decreasing from the first main surface 3 toward the second main surface 4 in a cross-sectional view, and embedded in a first through hole 10; a second embedded electrode 22 having a tapered side wall 27 having a width decreasing from the second main surface 4 toward the first main surface 3 in a cross-sectional view, and embedded in a second through hole 20; a first external electrode 35 covering the first main surface 3 and electrically connected to the first embedded electrode 12; and a second external electrode 38 covering the second main surface 4 and electrically connected to the second embedded electrode 22. The side wall 17 of the first embedded electrode 12 and the side wall 27 of the second embedded electrode 22 face each other to sandwich a part of the base material 2 in a first direction X.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to capacitors and methods for manufacturing capacitors. [Background technology]

[0002] Patent document 1 discloses a capacitor with through electrodes comprising a substrate having a plurality of through holes, through electrodes filled in the through holes, an insulating cover film formed on a first main surface of the substrate, a capacitor structure formed on the insulating cover film, a protective insulating film covering the capacitor structure, and a plurality of connection pads electrically connected to the capacitor structure and to corresponding through electrodes. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2009 / 110288 Summary of the Invention [Problem to be solved by the invention]

[0004] One embodiment of the present disclosure provides a capacitor and a method for manufacturing the capacitor that can increase the generated capacitance. [Means for solving the problem]

[0005] An embodiment of the present disclosure provides a capacitor including a substrate having a first main surface and a second main surface opposite thereto, a first through hole penetrating the substrate in a thickness direction, a second through hole formed at a distance from the first through hole and penetrating the substrate in a thickness direction, a first embedded electrode having a first side wall tapered in cross section from the first main surface to the second main surface and embedded in the first through hole, a second embedded electrode having a second side wall tapered in cross section from the second main surface to the first main surface and embedded in the second through hole, a first external electrode covering one of the first main surface and the second main surface and electrically connected to the first embedded electrode, and a second external electrode covering the other of the first main surface and the second main surface and electrically connected to the second embedded electrode. The first side wall and the second side wall face each other with a part of the substrate sandwiched therebetween.

[0006] One embodiment of the present disclosure provides a method for manufacturing a capacitor, including: a first step of forming, in a substrate having a first main surface on one side and a second main surface on the other side, a first through hole having a tapered first inner surface that decreases in width from the first main surface to the second main surface in a cross-sectional view and penetrating the substrate in a thickness direction, and one of a second through hole having a tapered second inner surface that decreases in width from the second main surface to the first main surface in a cross-sectional view and penetrating the substrate in a thickness direction; after the first step, a second step of forming the other of the first through hole and the second through hole in the substrate; a third step of filling the inside of the first through hole with a base conductive film to form a first embedded electrode, and filling the inside of the second through hole with a base conductive film to form a second embedded electrode; and a fourth step of forming a first external electrode electrically connected to the first embedded electrode so as to cover the first main surface, and forming a second external electrode electrically connected to the second embedded electrode so as to cover the second main surface. Effect of the Invention

[0007] According to an embodiment of the present disclosure, it is possible to increase the capacitance generated by a capacitor. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic plan view of a capacitor according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a schematic bottom view of the capacitor according to the first embodiment of the present disclosure. [Diagram 3] FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 4 is an enlarged view of a portion surrounded by a dashed line IV in FIG. [Diagram 5] FIG. 5 is an enlarged view of a portion surrounded by a dashed line V in FIG. [Figure 6A] FIG. 6A is a cross-sectional view showing a part of a manufacturing process of the capacitor according to the first embodiment of the present disclosure, and corresponds to FIG. [Figure 6B] FIG. 6B is a cross-sectional view showing a step subsequent to that of FIG. 6A. [Figure 6C] FIG. 6C is a cross-sectional view showing a step subsequent to that of FIG. 6B. [Figure 6D] FIG. 6D is a cross-sectional view showing the next step after FIG. 6C. [Figure 6E] FIG. 6E is a cross-sectional view showing the next step of FIG. 6D. [Figure 6F] FIG. 6F is a cross-sectional view showing the step following that of FIG. 6E. [Figure 6G] FIG. 6G is a cross-sectional view showing the step following FIG. 6F. [Figure 6H] FIG. 6H is a cross-sectional view showing the step following that of FIG. 6G. [Figure 6I] FIG. 6I is a cross-sectional view showing the step following that of FIG. 6H. [Figure 6J] FIG. 6J is a cross-sectional view showing the step following that of FIG. 6I. [Figure 6K] FIG. 6K is a cross-sectional view showing the step following that of FIG. 6J. [Figure 6L] FIG. 6L is a cross-sectional view showing the step following that of FIG. 6K. [Figure 6M] FIG. 6M is a cross-sectional view showing the next step after FIG. 6L. [Figure 6N] FIG. 6N is a cross-sectional view showing the next step after FIG. 6M. [Figure 7] FIG. 7 is a schematic cross-sectional view of a capacitor according to a reference embodiment, and corresponds to FIG. [Figure 8] FIG. 8 is a schematic plan view of a capacitor according to the second embodiment of the present disclosure. [Figure 9] FIG. 9 is a schematic bottom view of a capacitor according to the second embodiment of the present disclosure. [Figure 10] FIG. 10 is a schematic cross-sectional view taken along the line XX in FIG. [Figure 11] FIG. 11 is a schematic cross-sectional view taken along line XI-XI in FIG. [Figure 12] FIG. 12 is a schematic cross-sectional view taken along line XII-XII in FIG. [Figure 13] FIG. 13 is an enlarged view of a portion surrounded by a dashed line XIII in FIG. [Figure 14] FIG. 14 is an enlarged view of a portion surrounded by a dashed line XIV in FIG. [Figure 15] FIG. 15 is an enlarged view of a portion surrounded by a dashed line XV in FIG. [Figure 16] FIG. 16 is an enlarged view of the portion surrounded by the dashed line XVI in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Fig. 1 is a schematic plan view of a capacitor 1 according to a first embodiment of the present disclosure, and Fig. 2 is a schematic bottom view of the capacitor 1.

[0010] The capacitor 1 includes a rectangular parallelepiped substrate 2. The substrate 2 has a first main surface 3 on one side, a second main surface 4 on the other side, and side surfaces 5A, 5B, 5C, and 5D connecting the first main surface 3 and the second main surface 4. The capacitor 1 is also called a discrete capacitor.

[0011] The first main surface 3 and the second main surface 4 are formed in a quadrangular shape in a plan view seen from their normal direction Z (hereinafter simply referred to as "plan view"). The side surface 5A and the side surface 5C extend along the first direction X and face a second direction Y intersecting the first direction X. The side surface 5B and the side surface 5D extend along the second direction Y and face the first direction X. Specifically, the second direction Y is orthogonal (intersecting) to the first direction X (perpendicular).

[0012] In the example of FIG. 1 and FIG. 2, the substrate 2 is square in plan view. In this embodiment, the length L of one side of the substrate 2 is, for example, 1 mm or more and 10 mm or less, and, for example, 2 mm in this embodiment. The thickness T (see FIG. 3) of the capacitor 1 is, for example, 50 μm or more and 1 mm or less, and, for example, 500 μm in this embodiment. By setting the size of the substrate 2 to such a size, the capacitor 1 can be configured as a so-called chip component. Therefore, the capacitor 1 can be applied to various applications. The planar shape of the substrate 2 may be rectangular. The planar shape of the substrate 2 is not limited to a square shape, and may be, for example, a circular shape.

[0013] The capacitor 1 further includes a plurality of through electrodes 8, 9. The plurality of through electrodes 8, 9 are electrodes that penetrate the base material 2 in the thickness direction (normal direction Z) and are formed at intervals from each other. The plurality of through electrodes 8, 9 are arranged at intervals in the first direction X in a plan view and are each formed in a band shape extending in the second direction Y. In other words, the plurality of through electrodes 8, 9 are arranged in stripes extending in the second direction Y.

[0014] The multiple through electrodes 8, 9 include a first through electrode 8 and a second through electrode 9. In the example of FIG. 1 and FIG. 2, the number of through electrodes 8, 9 is three. The multiple through electrodes 8, 9 include one first through electrode 8 and two second through electrodes 9. In the example of FIG. 1 and FIG. 2, one first through electrode 8 is sandwiched between two second through electrodes 9 in the first direction X. In FIG. 1 and FIG. 2, in order to easily distinguish the first through electrode 8 from the second through electrode 9, the first through electrode 8 and the second through electrode 9 are shown using different hatching.

[0015] Figure 3 is a schematic cross-sectional view taken along line III-III of Figure 1. Figure 4 is an enlarged view of the portion surrounded by the dashed line IV in Figure 3. Figure 5 is an enlarged view of the portion surrounded by the dashed line V in Figure 3.

[0016] Referring to Figure 3, the base material 2 includes a first insulating film 6. The first insulating film 6 includes silicon oxide (SiO2). In the example of Figure 3, the entire area of the base material 2 is formed by the first insulating film 6. In this embodiment, the base material 2 is silicon oxide (SiO2) formed by thermal oxidation of a silicon substrate. The first insulating film 6 may be referred to as an insulating portion.

[0017] The first through electrode 8 includes a first through hole 10, a first conductive film 11, and a first embedded electrode 12.

[0018] Referring to Figure 3, the first through hole 10 penetrates the base material 2 in the thickness direction (normal direction Z). The first through hole 10 is strip-shaped and extends along the second direction Y. The first through hole 10 includes two inner surfaces (first inner surfaces) 13 facing each other in the first direction X. The two inner surfaces 13 are formed in a tapered shape whose width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the first direction X. The two inner surfaces 13 are connected in the first direction X by two connection surfaces at both ends in the second direction Y. The inner surface 13 is inclined at a predetermined inclination angle with respect to the first main surface 3 and the second main surface 4 in the first direction X. This predetermined inclination angle is the same as the inclination angle θ1 (see Figure 4) described later.

[0019] Referring to Figure 4, the first through hole 10 has a first width W1 at the open end 10a on the first main surface 3. The first width W1 is the width in the first direction X. The first width W1 may be 10 μm or more and 500 μm or less. The first through hole 10 has a second width W2 at the open end 10b on the second main surface 4. The second width W2 is the width in the first direction X. The second width W2 is narrower than the first width W1 (W2 < W1). The second width W2 may be 0.5 μm or more and 200 μm or less.

[0020] 3 and 4, the first conductive film 11 covers the entire inner surface (including the two inner surfaces 13) of the first through hole 10. The first conductive film 11 is, for example, Cu. The first conductive film 11 may be Ni, NiCr, Co, or the like. The film thickness t1 (see FIG. 4) of the first conductive film 11 may be 0.1 μm or more and 0.5 μm or less. The film thickness t1 of the first conductive film 11 is uniform in the thickness direction (normal direction Z) of the base material 2.

[0021] 3 and 4, the first buried electrode 12 is buried inside the first through hole 10 with the first conductive film 11 sandwiched therebetween. The first buried electrode 12 is formed using a conductor. The first buried electrode 12 is, for example, Cu. The first buried electrode 12 may be Ni or the like.

[0022] 4, the first embedded electrode 12 includes a top wall 15, a bottom wall 16, and a pair of side walls (first side walls) 17. The pair of side walls 17 are symmetrical with respect to the first direction X. The first embedded electrode 12 is formed so that the top wall 15 side (i.e., the first main surface 3 side) is wide and the bottom wall 16 side (i.e., the second main surface 4 side) is narrow.

[0023] 3 and 4, the pair of side walls 17 have a tapered shape in which the width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the first direction X. The pair of side walls 17 are formed by flat surfaces. The side walls 17 face the inner surface 13 of the first through hole 10. The side walls 17 are parallel to the facing inner surface 13. The side walls 17 are inclined at a predetermined inclination angle θ1 (see FIG. 4) with respect to the first main surface 3 and the second main surface 4 in the first direction X. The inclination angle θ1 of the side walls 17 is uniform with respect to the second direction Y. The inclination angle θ1 is equal to or greater than 65° and equal to or less than 85°.

[0024] Referring to FIG. 4, the top wall 15 is parallel to the first main surface 3 and the second main surface 4. The top wall 15 includes a first end surface 12a (first end portion) on the first main surface 3 side of the first embedded electrode 12. The first end surface 12a is a flat surface. In the example of FIG. 4, the third width W3 of the first end surface 12a is larger than the opposing interval F (see FIG. 3) between the side wall 17 and the side wall 27 of the second embedded electrode 22 to be described later (W3 > F). The third width W3 is the width in the first direction X. The opposing interval F is the interval in the first direction X.

[0025] Referring to FIG. 4, the bottom wall 16 is parallel to the first main surface 3 and the second main surface 4. The bottom wall 16 includes a second end surface 12b (second end portion) on the second main surface 4 side of the first embedded electrode 12. The second end surface 12b is a flat surface. The fourth width W4 of the second end surface 12b is smaller than the opposing interval F (see FIG. 3) between the side wall 17 and the side wall 27 (W4 < F). The fourth width W4 is the width in the first direction X. The fourth width W4 may be the same as or larger than the opposing interval F (W4 ≧ F).

[0026] The second through electrode 9 includes a second through hole 20, a second conductive film 21, and a second embedded electrode 22.

[0027] Referring to FIG. 3, the second through hole 20 penetrates the base material 2 in the thickness direction (normal direction Z). The second through hole 20 is in a strip shape extending along the second direction Y. The second through hole 20 includes two inner surfaces (second inner surfaces) 23 facing each other in the first direction X. The two inner surfaces 23 are formed in a tapered shape whose width decreases from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the first direction X. The two inner surfaces 23 are connected in the first direction X by two connection surfaces at both ends in the second direction Y. The inner surface 23 is inclined at a predetermined inclination angle with respect to the first main surface 3 and the second main surface 4 in the first direction X. This predetermined inclination angle is the same as the inclination angle θ2 (see FIG. 5) to be described later.

[0028] Referring to FIG. 5, the second through hole 20 has a fifth width W5 at the opening end 20a in the first main surface 3. The fifth width W5 is a width in the first direction X. The fifth width W5 may be 0.5 μm or more and 200 μm or less. The second through hole 20 has a sixth width W6 at the opening end 20b in the second main surface 4. The sixth width W6 is a width in the first direction X. The sixth width W6 is wider than the fifth width W5 (W6>W5). The sixth width W6 may be 10 μm or more and 500 μm or less. The fifth width W5 may be the same as the second width W2. The sixth width W6 may be the same as the first width W1.

[0029] 3 and 5, second conductive film 21 covers the entire inner surface (including two inner surfaces 23) of second through hole 20. Second conductive film 21 is, for example, Cu. Second conductive film 21 may be Ni, NiCr, Co, or the like. Film thickness t2 of second conductive film 21 may be 0.1 μm or more and 0.5 μm or less. Film thickness t2 of second conductive film 21 is uniform in the thickness direction (normal direction Z) of substrate 2.

[0030] 3 and 5, the second embedded electrode 22 is embedded in the second through hole 20 with the second conductive film 21 sandwiched therebetween. The second embedded electrode 22 is formed using a conductor. The second embedded electrode 22 is, for example, Cu. The second embedded electrode 22 may be Ni or the like.

[0031] 5, the second embedded electrode 22 includes a top wall 25, a bottom wall 26, and a pair of side walls (second side walls) 27. The pair of side walls 27 are symmetrical with respect to the first direction X. The second embedded electrode 22 is formed so that the bottom wall 26 side (i.e., the second principal surface 4 side) is wide and the top wall 25 side (i.e., the first principal surface 3 side) is narrow.

[0032] Referring to FIGS. 3 and 5, a pair of side walls 27 are in a tapered shape that becomes narrower from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the first direction X. The pair of side walls 27 are formed by flat surfaces. The side walls 27 face the inner surface 23 of the second through hole 20. The side walls 27 are parallel to the opposing inner surface 23. The side walls 27 are inclined with respect to the first main surface 3 and the second main surface 4 at a predetermined inclination angle θ2 (see FIG. 5) in the first direction X. The inclination angle θ2 of the side walls 27 is uniform with respect to the second direction Y. The inclination angle θ2 is 65° or more and 85° or less.

[0033] Referring to FIG. 5, the top wall 25 is parallel to the first main surface 3 and the second main surface 4. The top wall 25 includes a first end face 22a on the first main surface 3 side of the second embedded electrode 22. The first end face 22a is a flat surface. The seventh width W7 of the second end face 22b is smaller than the opposing interval F (see FIG. 3) between the side wall 17 and the side wall 27 (W7 < F). The seventh width W7 is the width in the first direction X. The seventh width W7 may be the same as the fourth width W4. The seventh width W7 may be the same as or larger than the opposing interval F (W7 ≧ F).

[0034] Referring to FIG. 5, the bottom wall 26 is parallel to the first main surface 3 and the second main surface 4. The bottom wall 26 includes a second end face 22b on the second main surface 4 side of the second embedded electrode 22. The second end face 22b is a flat surface. The eighth width W8 of the second end face 22b is larger than the opposing interval F (see FIG. 3) between the side wall 17 and the side wall 27 (W8 > F). The eighth width W8 is the width in the first direction X. The eighth width W8 may be the same as the third width W3.

[0035] Referring to FIGS. 3 to 5, in this embodiment, the inclination angle θ2 (see FIG. 5) of the side walls 27 is the same as the inclination angle θ1 (see FIG. 4) of the side walls 17. Therefore, the side walls 27 of the second embedded electrode 22 are inclined with respect to the first main surface 3 and the second main surface 4 at the same inclination angle as the side walls 17 of the first embedded electrode 12. That is, the side walls 17 and the side walls 27 facing each other in the first direction X are parallel. Therefore, the interval F between the side walls 17 of the first embedded electrode 12 and the side walls 27 of the second embedded electrode 22 is uniform in the thickness direction (normal direction Z) of the base material 2.

[0036] The thickness of the first through electrode 8 and the second through electrode 9 (the length in the thickness direction (normal direction Z) of the substrate 2) is thickness T0 (see FIG. 3), and the length of the first through electrode 8 and the second through electrode 9 in the second direction Y is length a (see FIG. 1). In this case, the facing area between the sidewall of the first through electrode 8 and the wall portion 2a of the substrate 2 is T0·a / sinθ1. Moreover, the facing area between the sidewall of the second through electrode 9 and the wall portion 2a of the substrate 2 is T0·a / sinθ2.

[0037] 3 and 4, a first surface electrode 31 is formed on the first main surface 3 of the base material 2 to cover a first end face 8a of the first through electrode 8 on the first main surface 3 side. The first surface electrode 31 has a planar shape of a band extending along the second direction Y. The first surface electrode 31 includes, for example, Ti, Cu, Ni, Ag, Au, etc.

[0038] 4, specifically, the first surface electrode 31 contacts the first end face 12a of the first buried electrode 12 and the end face of the first conductive film 11 on the first main surface 3 side. In the example of FIG. 4, the first surface electrode 31 covers the entire area of ​​the first end face 12a of the first buried electrode 12 and the end face of the first conductive film 11 on the first main surface 3 side in the first direction X. That is, the first surface electrode 31 covers the entire area of ​​the first end face 8a of the first through electrode 8 in the first direction X. The ninth width W9 of the first surface electrode 31 is larger than the first width W1 and the third width W3. The ninth width W9 is the width in the first direction X.

[0039] 3 and 5, a second surface electrode 32 is formed on the second main surface 4 of the base material 2 to cover the second end surface 9b of the second through electrode 9 on the second main surface 4 side. The second surface electrode 32 has a planar shape of a band extending along the second direction Y. The second surface electrode 32 includes, for example, Ti, Cu, Ni, Ag, Au, etc.

[0040] 5, specifically, the second surface electrode 32 contacts the second end face 22b of the second embedded electrode 22 and the end face of the second conductive film 21 on the second main surface 4 side. In the example of FIG. 5, the second surface electrode 32 covers the entire area of ​​the second end face 22b of the second embedded electrode 22 and the end face of the second conductive film 21 on the second main surface 4 side in the first direction X. In other words, the second surface electrode 32 covers the entire area of ​​the second end face 9b of the second through electrode 9 in the first direction X. The tenth width W 10 is greater than the sixth width W6 and the eighth width W8. 10 is the width in the first direction X.

[0041] 3, a second insulating film 33 is formed on the first main surface 3 of the base material 2 so as to cover the first end surface 9a of the second through electrode 9. A first contact hole 34 exposing the first surface electrode 31 is formed in the second insulating film 33. The second insulating film 33 is, for example, silicon oxide (SiO2). The second insulating film 33 may be SiN or SiON. The second insulating film 33 insulates the second through electrode 9 from a first external electrode 35 described next.

[0042] Referring to FIG. 3, a first external electrode 35 is formed on the second insulating film 33. The first external electrode 35 is formed so as to cover the first end face 9a of the second through electrode 9 and the first surface electrode 31, and to cover the exposed surface of the second insulating film 33 except for the peripheral surface portion and the outer side surface of the second insulating film 33. In this embodiment, the first external electrode 35 is formed on almost the entire area of ​​the first main surface 3 of the base material 2 except for the peripheral edge in a plan view. The first external electrode 35 enters the inside of the first contact hole 34 of the second insulating film 33 and contacts the first surface electrode 31 inside the first contact hole 34. The first external electrode 35 is electrically connected to the first through electrode 8 via the first surface electrode 31. In this embodiment, the first external electrode 35 is Cu. The first external electrode 35 may be Al, Pt, Au, Ag, Ni, or the like.

[0043] 3, a third insulating film 36 is formed on the second main surface 4 of the base material 2 so as to cover the second end surface 8b of the first through electrode 8. A second contact hole 37 exposing the second surface electrode 32 is formed in the third insulating film 36. The third insulating film 36 is, for example, silicon oxide (SiO2). The third insulating film 36 may also be SiN or SiON. The third insulating film 36 insulates the first through electrode 8 from a second external electrode 38, which will be described next.

[0044] Referring to FIG. 3, a second external electrode 38 is formed on the third insulating film 36. The second external electrode 38 is formed so as to cover the second end face 8b of the first through electrode 8 and the second surface electrode 32, and to cover the exposed surface of the third insulating film 36 except for the peripheral edge and the outer side surface of the third insulating film 36. In this embodiment, the second external electrode 38 is formed on almost the entire second main surface 4 of the base material 2 in a plan view, except for the peripheral edge. The second external electrode 38 penetrates into the second contact hole 37 of the third insulating film 36 and contacts the second surface electrode 32 inside the second contact hole 37. The second external electrode 38 is electrically connected to the second through electrode 9 via the second surface electrode 32. In this embodiment, the second external electrode 38 is Cu. The first external electrode 35 may be Al, Pt, Au, Ag, Ni, or the like.

[0045] 3, in the adjacent first through electrode 8 and second through electrode 9, the inner surface 13 of the first through hole 10 of the first through electrode 8 and the inner surface 23 of the second through hole 20 of the second through electrode 9 face each other in the first direction X. The first insulating film 6 on the wall portion 2a sandwiched between these facing inner surfaces 13, 23 constitutes a capacitance portion 7. The capacitance portion 7 may be referred to as a capacitance film. The capacitance of the capacitance portion 7 depends on the facing area between the sidewall of the first through electrode 8 and the wall portion 2a of the substrate 2 and the facing area between the sidewall of the second through electrode 9 and the wall portion 2a of the substrate 2.

[0046] A pair of a first through electrode 8 and a second through electrode 9 facing each other in the first direction X and a capacitance portion 7 therebetween constitute one capacitor element. The first through electrode 8 is electrically connected to a first external electrode 35, and the second through electrode 9 is electrically connected to a second external electrode 38. This makes it possible to obtain a capacitor 1 in which all the capacitor elements are connected in parallel. Therefore, the capacitor 1 can be made smaller and have a larger capacity.

[0047] 6A to 6N are cross-sectional views illustrating a manufacturing process of the capacitor 1 according to the first embodiment of the present disclosure, and correspond to FIG.

[0048] 6A, to manufacture the capacitor 1, a silicon substrate (substrate) 100 is prepared, which serves as a base for the base material 2. The silicon substrate 100 includes a first main surface 101, a second main surface 102 opposite to the first main surface 101, and four side surfaces 103 connecting the first main surface 101 and the second main surface 102.

[0049] Next, referring to FIG. 6B, the silicon substrate 100 is selectively removed by dry etching through the first mask 104. As a result, one or more (one in the example of FIG. 6B) strip-shaped first through holes 10 penetrating the first main surface 101 and the second main surface 102 are formed in the silicon substrate 100 (first step). The first through holes 10 include two inner surfaces 13 facing each other in the first direction X. The two inner surfaces 13 are formed in a tapered shape whose width decreases from the first main surface 3 to the second main surface 4 in a cross-sectional view along the first direction X. By adjusting at least one of the etching temperature and the etching gas flow rate in the dry etching method, the first through holes 10 are formed in a tapered shape whose width decreases from the first main surface 101 to the second main surface 102. The first through holes 10 may be formed by electrochemical etching, laser processing, or the like.

[0050] Next, referring to FIG. 6C, the silicon substrate 100 is selectively removed by dry etching through the second mask 105. As a result, one or more (two in the example of FIG. 6C) strip-shaped second through holes 20 penetrating the first main surface 101 and the second main surface 102 are formed in the silicon substrate 100 (second step). The second through holes 20 include two inner surfaces 23 facing each other in the first direction X. The two inner surfaces 23 are formed in a tapered shape whose width decreases from the second main surface 4 to the first main surface 3 in a cross-sectional view along the first direction X. By adjusting at least one of the etching temperature and the etching gas flow rate in the dry etching method, the second through holes 20 are formed in a tapered shape whose width decreases from the second main surface 102 to the first main surface 101. The second through holes 20 may be formed by electrochemical etching, laser processing, or the like.

[0051] The order of forming the first through hole 10 and the second through hole 20 may be reversed from the order shown in Figures 6B and 6C. That is, the first through hole 10 may be formed after the second through hole 20 is formed.

[0052] Next, referring to FIG. 6D, the silicon substrate 100 is oxidized by a thermal oxidation method. Specifically, an oxide film grows from the first main surface 101, the second main surface 102, the four side surfaces 103, the inner surfaces (including the two inner surfaces 13) of the first through holes 10, and the inner surfaces (including the two inner surfaces 23) of the second through holes 20 of the silicon substrate 100. As a result, a first insulating film 6 made of silicon oxide (SiO2) is formed over almost the entire area of ​​the silicon substrate 100. As a result, the base material 2 is formed. The first main surface 101 of the silicon substrate 100 is made into the first main surface 3 of the base material 2. The second main surface 102 of the silicon substrate 100 is made into the second main surface 4 of the base material 2. The four side surfaces 103 of the silicon substrate 100 are made into the side surfaces 5A, 5B, 5C, and 5D of the base material 2 (also see FIG. 1).

[0053] 6E, a seed layer 107 serving as a base for the first conductive film 11 (see FIG. 3) and the second conductive film 21 (see FIG. 3) is formed on the first main surface 3, the second main surface 4, the inner surface 13 of the first through hole 10, and the inner surface 23 of the second through hole 20. The seed layer 107 is, for example, a Cu layer, a Ni layer, or the like. The seed layer 107 is formed by, for example, atomic layer deposition (ALD), a CVD method, a plating method, or the like.

[0054] Next, referring to FIG. 6F, a base conductive film 108 that serves as a base for the first embedded electrode 12 (see FIG. 3) and the second embedded electrode 22 (see FIG. 3) is formed on the seed layer 107. The base conductive film 108 is, for example, a Cu layer, a Ni layer, or the like. The base conductive film 108 is formed, for example, by a plating method. The inside of the first through hole 10 and the inside of the second through hole 20 are filled with the base conductive film 108 (third step). The formation of the base conductive film 108 is continued until the inside of the first through hole 10 and the inside of the second through hole 20 are completely filled with the base conductive film 108. The base conductive film 108 may be formed by a CVD method.

[0055] Next, referring to FIG. 6G, the seed layer 107 and the base conductive film 108 on the first main surface 3 and the second main surface 4 are removed. This process is continued until the first main surface 3 and the second main surface 4 are exposed by a polishing method. The polishing method may be a CMP method. This results in a configuration in which the first buried electrode 12 is buried inside the first through hole 10. A configuration in which the second buried electrode 22 is buried inside the second through hole 20 is obtained.

[0056] Next, referring to FIG. 6H, a base conductive film 109 that becomes a base of the first surface electrode 31 is formed on the first main surface 3 of the substrate 2. The base conductive film 109 is, for example, a Ti film. Next, a third mask 110 is laminated on the base conductive film 109. The third mask 110 exposes the region (first end face 8a) on the first main surface 3 where the first surface electrode 31 is to be formed, and covers the other regions. Next, the base conductive film 109 is selectively removed by an etching method via the third mask 110. As a result, the first surface electrode 31 is formed. The etching method may be a wet etching method. After the first surface electrode 31 is formed, the third mask 110 is removed.

[0057] The first surface electrode 31 is formed on the first end face 12a (first end face 8a) on the wider side of the first buried electrode 12. Therefore, the first surface electrode 31 in contact with the first buried electrode 12 can be favorably formed (patterning is easy).

[0058] Next, referring to FIG. 6I, a base conductive film 111 that serves as a base for the second surface electrode 32 is formed on the second main surface 4 of the substrate 2. The base conductive film 111 is, for example, a Ti film. Next, a fourth mask 112 is laminated on the base conductive film 111. The fourth mask 112 exposes the areas on the second main surface 4 where the second surface electrode 32 is to be formed, and covers the other areas. Next, the base conductive film 111 is selectively removed by an etching method via the fourth mask 112. As a result, the second surface electrode 32 is formed. The etching method may be a wet etching method. After the second surface electrode 32 is formed, the fourth mask 112 is removed.

[0059] The second surface electrode 32 is formed on the second end face 22b (second end face 9b) on the wider side of the second buried electrode 22. Therefore, the second surface electrode 32 in contact with the second buried electrode 22 can be favorably formed (patterning is easy).

[0060] 6J, a second insulating film 33 is formed on the first main surface 3 of the base material 2 by, for example, a sputtering method so as to cover the first main surface 3, the first surface electrode 31, and the first end face 9a of the second through electrode 9 on the first main surface 3 side. The second insulating film 33 may be formed by a CVD method. The second insulating film 33 is, for example, silicon oxide (SiO2).

[0061] 6K, a third insulating film 36 is formed on the second main surface 4 of the base material 2 by, for example, a sputtering method so as to cover the second main surface 4, the second surface electrode 32, and the first end surface 8a of the first through electrode 8 on the first main surface 3 side. The third insulating film 36 may be formed by a CVD method. The third insulating film 36 is, for example, silicon oxide (SiO2).

[0062] The order of forming the second insulating film 33 and the third insulating film 36 may be reversed from the order shown in Figures 6J and 6K. That is, the second insulating film 33 may be formed after the third insulating film 36 is formed.

[0063] Next, referring to FIG. 6L, a fifth mask 113 is laminated on the second insulating film 33. The fifth mask 113 exposes regions of the second insulating film 33 where the first contact holes 34 are to be formed, and covers the other regions. Next, the second insulating film 33 is selectively removed by an etching method via the fifth mask 113. As a result, the first contact holes 34 are formed. The etching method may be a wet etching method. After the first contact holes 34 are formed, the fifth mask 113 is removed.

[0064] 6M, a sixth mask 114 is laminated on the third insulating film 36. The sixth mask 114 exposes regions of the third insulating film 36 where the second contact holes 37 are to be formed, and covers the other regions.

[0065] Next, the third insulating film 36 is selectively removed by etching via the sixth mask 114. This forms the second contact holes 37. The etching method may be a wet etching method. After the second contact holes 37 are formed, the sixth mask 114 is removed.

[0066] Next, referring to Fig. 6N, a first external electrode 35 covering the first main surface 3 of the base material 2 is formed, for example, by plating (fourth step). The first external electrode 35 is formed so as to cover the exposed surface (excluding the outer side) of the second insulating film 33 and the first surface electrode 31. Also, a second external electrode 38 covering the second main surface 4 of the base material 2 is formed, for example, by plating (fourth step). The second external electrode 38 is formed so as to cover the exposed surface (excluding the outer side) of the third insulating film 36 and the second surface electrode 32. Through steps including those described above, the capacitor 1 shown in Figs. 1 to 3 is obtained.

[0067] As a result of the above, a capacitor 1 can be easily manufactured, which includes a first embedded electrode 12 having a tapered sidewall 17 whose width decreases from the first main surface 3 to the second main surface 4, and a second embedded electrode 22 having a tapered sidewall 27 whose width decreases from the second main surface 4 to the first main surface 3.

[0068] 7 is a schematic cross-sectional view of a capacitor 151 according to the reference embodiment, and corresponds to FIG. 3. The capacitor 151 according to the reference embodiment differs from the capacitor 1 according to the first embodiment shown in FIG. 3 in that a first through electrode 158 perpendicular to the first main surface 3 and the second main surface 4 is used instead of the first through electrode 8, and a second through electrode 159 perpendicular to the first main surface 3 and the second main surface 4 is used instead of the second through electrode 9. In the capacitor 151, a sidewall 167 of a first embedded electrode 169 of the first through electrode 158 is perpendicular to the first main surface 3 and the second main surface 4. Also, a sidewall 177 of a second embedded electrode 172 of the second through electrode 159 is perpendicular to the first main surface 3 and the second main surface 4.

[0069] The thickness (length in the thickness direction (normal direction Z) of the base material 2) of the first through electrode 158 and the second through electrode 159 is set to thickness T0 (see FIG. 7) like the first through electrode 8 and the second through electrode 9. The length (length in the second direction Y) of the first through electrode 158 and the second through electrode 159 is set to length a (see FIG. 1) like the first through electrode 8 and the second through electrode 9. At this time, in the capacitor 151, the facing area between the sidewall of the first through electrode 158 and the wall portion 2a of the base material 2 and the facing area between the sidewall of the second through electrode 159 and the wall portion 2a of the base material 2 are both T0·a.

[0070] In contrast, according to the first embodiment, as described above, the sidewall 17 of the first embedded electrode 12 has a tapered shape in which the width decreases from the first principal surface 3 toward the second principal surface 4 in a cross-sectional view along the first direction X. Moreover, the sidewall 27 of the second embedded electrode 22 has a tapered shape in which the width decreases from the second principal surface 4 toward the first principal surface 3 in a cross-sectional view along the second direction Y. Moreover, the sidewall 17 of the first embedded electrode 12 and the sidewall 27 of the second embedded electrode 22 face each other with the wall portion 2a (capacitive portion 7) of the substrate 2 interposed therebetween.

[0071] According to the first embodiment, as described above, the facing area between the sidewall of the first through electrode 8 and the wall 2a of the substrate 2 is T0·a / sinθ1. Also, the facing area between the sidewall of the second through electrode 9 and the wall 2a of the substrate 2 is T0·a / sinθ2.

[0072] Therefore, the facing area between the sidewall of the first through electrode 8 and the wall 2a of the substrate 2 and the facing area between the sidewall of the second through electrode 9 and the wall 2a of the substrate 2 are larger than the facing area between the sidewall of the first through electrode 8 and the wall 2a of the substrate 2 and the facing area between the sidewall of the second through electrode 9 and the wall 2a of the substrate 2 in the capacitor 151 according to the reference embodiment. In other words, since the sidewall 17 and the sidewall 27 have a tapered shape in a cross-sectional view along the first direction X, the facing area between the first embedded electrode 12 and the second embedded electrode 22 can be increased compared to the capacitor 151. This allows the capacitance of the capacitor 1 to be increased.

[0073] In this embodiment, the sidewall 27 of the second embedded electrode 22 is inclined with respect to the first principal surface 3 and the second principal surface 4 at the same inclination angle as the sidewall 17 of the first embedded electrode 12. Therefore, the sidewall 17 and the sidewall 27 facing each other in the first direction X are parallel to each other. Therefore, the distance F between the sidewall 17 of the first embedded electrode 12 and the sidewall 27 of the second embedded electrode 22 is uniform in the thickness direction (normal direction Z) of the substrate 2.

[0074] If the gap F varies in the thickness direction of the base material 2, there is a risk that the gap F will be narrow in some areas. In this case, there is a risk that the withstand voltage will decrease in these narrow areas. As a result, there is a risk that a local decrease in the withstand voltage will occur in the capacitor.

[0075] In contrast, in this embodiment, the sidewall 17 and the sidewall 27 facing each other in the first direction X are parallel to each other. Therefore, the distance F between the sidewall 17 of the first embedded electrode 12 and the sidewall 27 of the second embedded electrode 22 is uniform in the thickness direction (normal direction Z) of the base material 2. This makes it possible to more effectively suppress a local decrease in breakdown voltage.

[0076] Therefore, according to this embodiment, the capacitance of the capacitor 1 can be increased while suppressing a local decrease in the withstand voltage.

[0077] In this embodiment, the first end face 12a, which is the end face on the wider side of the first embedded electrode 12, is covered by the first external electrode 35. In addition, the second end face 22b, which is the end face on the wider side of the second embedded electrode 22, is covered by the second external electrode 38. Therefore, the first embedded electrode 12 and the first external electrode 35 can be electrically connected with a simple configuration. In addition, the second embedded electrode 22 and the second external electrode 38 can be electrically connected with a simple configuration.

[0078] In this embodiment, a first surface electrode 31 is formed on a first end face 12a, which is an end face on the wider side of the first embedded electrode 12. A second surface electrode 32 is formed on a second end face 22b, which is an end face on the wider side of the second embedded electrode 22. This makes it possible to minimize the electrical resistance between the first embedded electrode 12 and the first surface electrode 31. Also, it is possible to minimize the electrical resistance between the second embedded electrode 22 and the second surface electrode 32.

[0079] Additionally, the inclination angles θ1, θ2 of the sidewalls 17, 27 relative to the first and second main surfaces 3, 4 are 65° or more. If the inclination angles θ1, θ2 of the sidewalls 17, 27 relative to the first and second main surfaces 3, 4 are less than 65°, the capacitor 1 may become large in size in the first direction X. If the inclination angles θ1, θ2 of the sidewalls 17, 27 relative to the first and second main surfaces 3, 4 exceed 85°, the capacitance of the capacitor 1 cannot be sufficiently increased by tapering the sidewalls 17, 27.

[0080] Fig. 8 is a schematic plan view of a capacitor 201 according to the second embodiment of the present disclosure, and Fig. 9 is a schematic bottom view of the capacitor 201.

[0081] Capacitor 201 in accordance with the second embodiment differs from capacitor 1 in accordance with the first embodiment in that a plurality of through electrodes 208, 209 are formed in a matrix in plan view.

[0082] The capacitor 201 includes a plurality of through electrodes 208, 209. The plurality of through electrodes 208, 209 are formed at intervals in a first direction X and a second direction Y in a plan view. The plurality of through electrodes 208, 209 are arranged in a matrix shape along the first direction X and the second direction Y. The through electrodes 208, 209 are arranged at equal intervals in the first direction X and the second direction Y.

[0083] The plurality of through electrodes 208, 209 includes a first through electrode 208 and a second through electrode 209. In the example of FIG. 8 and FIG. 9, the number of the through electrodes 208, 209 is nine. The plurality of through electrodes 208, 209 includes four first through electrodes 208 and five second through electrodes 209. The plurality of first through electrodes 208 and the plurality of second through electrodes 209 are alternately arranged in the first direction X and the second direction Y in a plan view. The first through electrode 208 is formed by a conductor embedded in a plurality of first through holes 210 that penetrate the base material 2 in the thickness direction (normal direction Z). The second through electrode 209 is formed by a conductor embedded in a plurality of second through holes 220 that penetrate the base material 2 in the thickness direction (normal direction Z). 8 and 9, in order to easily distinguish the first through electrode 8 from the second through electrode 9, the first through electrode 208 and the second through electrode 209 are shown using different hatching.

[0084] Fig. 10 is a schematic cross-sectional view taken along line XX in Fig. 8. Fig. 11 is a schematic cross-sectional view taken along line XI-XI in Fig. 8. Fig. 12 is a schematic cross-sectional view taken along line XII-XII in Fig. 8. Fig. 13 is an enlarged view of a portion surrounded by dashed line XIII in Fig. 10. Fig. 14 is an enlarged view of a portion surrounded by dashed line XIV in Fig. 10. Fig. 15 is an enlarged view of a portion surrounded by dashed line XV in Fig. 12. Fig. 16 is an enlarged view of a portion surrounded by dashed line XVI in Fig. 12.

[0085] The first through electrode 208 includes a first through hole 210 , a first conductive film 211 and a first embedded electrode 212 .

[0086] 10 to 12, the first through hole 210 penetrates the base material 2 in the thickness direction (normal direction Z). The first through hole 210 has a quadrangular pyramid shape. In this embodiment, the planar shape and bottom shape of the first through hole 210 are square. The first through hole 210 includes two inner surfaces 213A (see FIGS. 10 and 11) facing each other in the first direction X, and two inner surfaces 213B (second inner surfaces; see FIG. 12) facing each other in the second direction Y. The inner surfaces 213A and 213B are connected in the lateral direction.

[0087] 10 and 11, the two inner surfaces 213A are formed in a tapered shape in which the width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the first direction X. The two inner surfaces 213B are inclined at a predetermined inclination angle with respect to the first main surface 3 and the second main surface 4 in the first direction X. This predetermined inclination angle is the same as an inclination angle θ3 (see FIG. 13) described later.

[0088] 12, the two inner surfaces 213B are formed in a tapered shape in which the width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the second direction Y. The two inner surfaces 213B are inclined at a predetermined inclination angle with respect to the first main surface 3 and the second main surface 4 in the second direction Y. This predetermined inclination angle is the same as an inclination angle θ4 (see FIG. 15) described later.

[0089] 13 and 15, the first through hole 210 has an eleventh width W 11 The 11th width W 11 is the width in the first direction X and the second direction. 11 The first through hole 210 may have a twelfth width W 12 The 12th width W 12 is the width in the first direction X and the second direction Y. The twelfth width W 12 is the 11th width W 11 Narrower than (W 12 <W 11 ). 12th width W 12 may be 0.5 μm or more and 200 μm or less.

[0090] 10 to 13 and 15, first conductive film 211 covers the entire inner surface (two inner surfaces 213A and two inner surfaces 213B) of first through hole 210. First conductive film 211 is, for example, Cu. First conductive film 211 may be Ni, NiCr, Co, or the like. Film thickness t3 (see FIGS. 13 and 15) of first conductive film 211 is uniform in the thickness direction (normal direction Z) of base material 2. Film thickness t3 of first conductive film 211 may be the same as film thickness t1 (see FIG. 4) of first conductive film 11.

[0091] 10 to 13 and 15, the first embedded electrode 212 is embedded inside the first through hole 210 with the first conductive film 211 sandwiched therebetween. The first embedded electrode 212 is formed using a conductor. The first embedded electrode 212 is, for example, Cu. The first embedded electrode 212 may be Ni or the like.

[0092] 13 and 15, the first embedded electrode 212 includes a top wall 215, a bottom wall 216, a pair of side walls 217A (see FIG. 13), and a pair of side walls 217B (third side walls; see FIG. 15). The pair of side walls 217A face each other in a first direction X. The pair of side walls 217A are symmetrical with respect to the first direction X. The pair of side walls 217B face each other in a second direction Y. The pair of side walls 217B are symmetrical with respect to the second direction Y. The first embedded electrode 212 is formed so that the top wall 215 side (i.e., the first main surface 3 side) is wide and the bottom wall 216 side (i.e., the second main surface 4 side) is narrow.

[0093] 10, 11 and 13, the pair of side walls 217A have a tapered shape in which the width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the first direction X. The pair of side walls 217A are formed by flat surfaces. The side walls 217A face the inner surface 213A of the first through hole 210. The side walls 217A are parallel to the facing inner surface 213A. The side walls 217A are inclined at a predetermined inclination angle θ3 (see FIG. 13) with respect to the first main surface 3 and the second main surface 4 in the first direction X. The inclination angle θ3 of the side walls 217A is uniform with respect to the second direction Y. The inclination angle θ3 is equal to or greater than 65° and equal to or less than 85°.

[0094] 12 and 15, the pair of side walls 217B has a tapered shape in which the width decreases from the first main surface 3 toward the second main surface 4 in a cross-sectional view along the second direction Y. The pair of side walls 217B are formed by flat surfaces. The side walls 217B face the inner surface 213B of the first through hole 210. The side walls 217B are parallel to the facing inner surface 213B. The side walls 217B are inclined at a predetermined inclination angle θ4 (see FIG. 15) with respect to the first main surface 3 and the second main surface 4 in the second direction Y. The inclination angle θ4 of the side walls 217B is uniform with respect to the first direction X. The inclination angle θ4 is equal to or greater than 65° and equal to or less than 85°.

[0095] 13 and 15, the top wall 215 is parallel to the first main surface 3 and the second main surface 4. The top wall 215 includes a first end surface (first end) 212a of the first embedded electrode 212 on the first main surface 3 side. The first end surface 212a is a flat surface. In the example of FIG. 13, the thirteenth width W 13 is larger than the opposing distance F1 (see FIG. 10 and the like) between the side wall 217A and a side wall (second side wall) 227A of a second embedded electrode 222 described later. 13 >F1). 13th width W 13 is the width in the first direction X. The opposing distance F1 (see FIG. 10, etc.) is the distance in the first direction X. In the example of FIG. 15, the 14th width W 14 is larger than the opposing distance F2 (see FIG. 12) between the side wall 217B and a side wall (fourth side wall) 227B of the second embedded electrode 222 described later (W 14 >F2). 14th width W 14 is the width in the second direction Y. The opposing distance F2 (see FIG. 12) is the distance in the second direction Y.

[0096] 13 and 15, the bottom wall 216 is parallel to the first main surface 3 and the second main surface 4. The bottom wall 216 includes a second end surface (second end) 212b of the first embedded electrode 212 on the second main surface 4 side. The second end surface 212b is a flat surface. In the example of FIG. 13, the fifteenth width W 15 is smaller than the opposing distance F1 (see Figure 10, etc.) (W15 <F1). The 15th width W 15 is the width in the first direction X. The 15th width W 15 may be the same as or larger than the facing interval F1 (W 15 ≧F1). In the example of FIG. 15, the 16th width W of the second end face 212b 16 is smaller than the facing interval F2 (see FIG. 12) (W 16 <F2). The 16th width W 16 is the width in the second direction Y. The 16th width W 16 may be the same as or larger than the facing interval F2 (W 16 ≧F2).

[0097] The second through electrode 209 includes a second through hole 220, a second conductive film 221, and a second embedded electrode 222.

[0098] Referring to FIGS. 10 to 12, the second through hole 220 penetrates the base material 2 in the thickness direction (normal direction Z). The second through hole 220 has a frustum of a square pyramid shape. In this embodiment, the planar shape and the bottom shape of the second through hole 220 are square. The second through hole 220 includes two inner surfaces 223A (second inner surfaces; see FIGS. 10 and 11) facing each other in the first direction X and two inner surfaces 223B (see FIG. 12) facing each other in the second direction Y. The inner surface 223A and the inner surface 223B are connected in the lateral direction.

[0099] Referring to FIGS. 10 and 11, the two inner surfaces 223A are formed in a tapered shape in which the width becomes smaller from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the first direction X. The two inner surfaces 223B are inclined with respect to the first main surface 3 and the second main surface 4 at a predetermined inclination angle with respect to the first direction X. This predetermined inclination angle is the same as the inclination angle θ5 (see FIG. 14) described later.

[0100] 12, the two inner surfaces 223B are formed in a tapered shape in which the width decreases from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the second direction Y. The two inner surfaces 223B are inclined at a predetermined inclination angle with respect to the first main surface 3 and the second main surface 4 in the second direction Y. This predetermined inclination angle is the same as an inclination angle θ6 (see FIG. 16) described later.

[0101] 14 and 16, second through hole 220 has a 17th width W 17 It has the 17th width W 17 is the width in the first direction X and the second direction. 17 The second through hole 220 may have an 18th width W 18 It has the 18th width W 18 is the width in the first direction X and the second direction Y. 18 is the 17th width W 17 Wider than (W 18 >W 17 ). 18th width W 18 may be 10 μm or more and 500 μm or less.

[0102] 14 and 16, the second conductive film 221 covers the entire inner surface (two inner surfaces 223A and two inner surfaces 223B) of the second through hole 220. The second conductive film 221 is, for example, Cu. The second conductive film 221 may be Ni, NiCr, Co, or the like. The film thickness t4 (see FIGS. 14 and 16) of the second conductive film 221 is uniform in the thickness direction (normal direction Z) of the base material 2. The film thickness t4 of the second conductive film 221 may be the same as the film thickness t2 (see FIG. 5) of the second conductive film 21.

[0103] 14 and 16, the second embedded electrode 222 is embedded in the second through hole 220 with the second conductive film 221 sandwiched therebetween. The second embedded electrode 222 is formed using a conductor. The second embedded electrode 222 is, for example, Cu. The second embedded electrode 222 may be Ni or the like.

[0104] 14 and 16, the second embedded electrode 222 includes a top wall 225, a bottom wall 226, a pair of side walls 227A (second side walls; see FIG. 14), and a pair of side walls 227B (see FIG. 16). The pair of side walls 227A face each other in a first direction X. The pair of side walls 227A are symmetrical with respect to the first direction X. The pair of side walls 227B face each other in a second direction Y. The pair of side walls 227B are symmetrical with respect to the second direction Y. The second embedded electrode 222 is formed so that the top wall 225 side (i.e., the first main surface 3 side) is narrow and the bottom wall 226 side (i.e., the second main surface 4 side) is wide.

[0105] 10, 11 and 14, the pair of side walls 227A has a tapered shape in which the width decreases from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the first direction X. The pair of side walls 227A are formed by flat surfaces. The side walls 227A face the inner surface 223A of the second through hole 220. The side walls 227A are parallel to the facing inner surface 223A. The side walls 227A are inclined at a predetermined inclination angle θ5 (see FIG. 14) with respect to the first main surface 3 and the second main surface 4 in the first direction X. The inclination angle θ5 of the side walls 227A is uniform with respect to the second direction Y. The inclination angle θ5 is equal to or greater than 65° and equal to or less than 85°.

[0106] 12 and 16, the pair of side walls 227B has a tapered shape in which the width decreases from the second main surface 4 toward the first main surface 3 in a cross-sectional view along the second direction Y. The pair of side walls 227B are formed by flat surfaces. The side walls 227B face the inner surface 223B of the second through hole 220. The side walls 227B are parallel to the facing inner surface 223B. The side walls 227B are inclined at a predetermined inclination angle θ6 (see FIG. 16) with respect to the first main surface 3 and the second main surface 4 in the second direction Y. The inclination angle θ6 of the side walls 227B is uniform with respect to the first direction X. The inclination angle θ6 is equal to or greater than 65° and equal to or less than 85°.

[0107] Referring to FIGS. 14 and 16, the top wall 225 is parallel to the first main surface 3 and the second main surface 4. The top wall 225 includes a first end surface 222a on the first main surface 3 side of the second embedded electrode 222. The first end surface 222a is a flat surface. In the example of FIG. 14, the 19th width W 19 is smaller than the facing interval F1 (see FIGS. 10 etc.) (W 19 <F1). The 19th width W 19 is the width in the first direction X. The 19th width W 19 may be the same as the 15th width W 15 . The 19th width W 19 may be the same as or larger than the facing interval F1 (W 19 ≧F1). In the example of FIG. 16, the 20th width W 20 of the first end surface 222a is smaller than the facing interval F2 (see FIG. 12) (W 20 <F2). The 20th width W 20 is the width in the second direction Y. The 20th width W 20 may be the same as the 16th width W 16 . The 20th width W 20 may be the same as or larger than the facing interval F2 (W 20 ≧F2).

[0108] Referring to FIGS. 14 and 16, the bottom wall 226 is parallel to the first main surface 3 and the second main surface 4. The bottom wall 226 includes a second end surface 222b on the second main surface 4 side of the second embedded electrode 222. The second end surface 222b is a flat surface. In the example of FIG. 14, the 21st width W 21 of the second end surface 222b is larger than the facing interval F1 (see FIGS. 10 etc.) (W 21 >F1). The 21st width W 21 is the width in the first direction X. The 21st width W 21 may be the same as the 13th width W 13 . In the example of FIG. 16, the 22nd width W 22 of the second end surface 222b is larger than the facing interval F2 (see FIG. 12) (W 22 >F2). The 22nd width W 22 is the width in the second direction Y. The 22nd width W 22 may be the same as the 14th width W 14 .

[0109] In this embodiment, the inclination angle θ5 of the sidewall 227A (see FIG. 14) is the same as the inclination angle θ3 of the sidewall 217A (see FIG. 13). Therefore, the sidewall 227A of the second embedded electrode 222 is inclined with respect to the first principal surface 3 and the second principal surface 4 at the same inclination angle as the sidewall 217A of the first embedded electrode 212.

[0110] In this embodiment, the inclination angle θ6 (see FIG. 16) of the sidewall 227B is the same as the inclination angle θ4 (see FIG. 15) of the sidewall 217B. Therefore, the sidewall 227B of the second embedded electrode 222 is inclined with respect to the first principal surface 3 and the second principal surface 4 at the same inclination angle as the sidewall 217B of the first embedded electrode 212.

[0111] The inclination angle θ4 of the side wall 217B (see FIG. 15) may be the same as the inclination angle θ3 of the side wall 217A (see FIG. 13). The inclination angle θ6 of the side wall 227B (see FIG. 16) may be the same as the inclination angle θ5 of the side wall 227A (see FIG. 14).

[0112] 8 to 10, a first surface electrode 231 is formed on the first main surface 3 of the base material 2, covering a first end face 208a of the first through-electrode 208 on the first main surface 3 side. The planar shape of the first surface electrode 231 is, for example, a square shape. The first surface electrode 231 includes, for example, Ti, Cu, Ni, Ag, Au, or the like.

[0113] 13 and 15, specifically, the first surface electrode 231 contacts the first end face 212a of the first embedded electrode 212 and the end face of the first conductive film 11 on the first main surface 3 side. In the example of FIGS. 13 and 15, the first surface electrode 231 covers the entire area of ​​the first end face 212a of the first embedded electrode 212 and the end face of the first conductive film 211 on the first main surface 3 side in the first direction X and the second direction Y. That is, the first surface electrode 231 covers the entire area of ​​the first end face 208a of the first through electrode 208 in the first direction X and the second direction Y. The 23rd width W 23 is the 11th width W 11 and 13th width W 13Larger than 23rd width W 23 is the width in the first direction X. The 24th width W 24 is the 11th width W 11 and 14th width W 14 Larger than 24th width W 24 is the width in the second direction Y.

[0114] 8 to 10, a second surface electrode 232 is formed on the second main surface 4 of the base material 2 to cover a second end face 209b of the second through electrode 209 on the second main surface 4 side. The planar shape of the second surface electrode 232 is, for example, a square shape. The second surface electrode 232 includes, for example, Ti, Cu, Ni, Ag, Au, etc.

[0115] 14 and 16, specifically, the second surface electrode 232 contacts the second end face 222b of the second embedded electrode 222 and the end face of the second conductive film 221 on the second main surface 4 side. In the example of FIGS. 14 and 16, the second surface electrode 232 covers the entire area of ​​the second end face 222b of the second embedded electrode 222 and the end face of the second conductive film 221 on the second main surface 4 side in the first direction X and the second direction Y. That is, the second surface electrode 232 covers the entire area of ​​the second end face 209b of the second through electrode 209 in the first direction X and the second direction Y. The 25th width W 25 is the 18th width W 18 and the 21st width W 21 Larger than 25th width W 25 is the width in the first direction X. The 26th width W 26 is the 18th width W 18 and the 22nd width W 22 Larger than 26th width W 26 is the width in the second direction Y. The planar shape of the first surface electrode 231 and the second surface electrode 232 may be a shape other than a square, such as a rectangular shape or a circular shape.

[0116] 10 to 12, a second insulating film 33 is formed on the first main surface 3 of the base material 2 so as to cover the first end surface 209a of the second through electrode 209. A first contact hole 234 exposing the first surface electrode 231 is formed in the second insulating film 33. In the example of FIGS. 10 to 12, the planar shape of the first contact hole 234 is a square shape slightly smaller than the planar shape of the first surface electrode 231. The planar shape of the first contact hole 234 may be a square shape approximately equal to the planar shape of the second through electrode 209. The second insulating film 33 insulates the second through electrode 209 from the first external electrode 35. The first external electrode 35 is formed on the second insulating film 33. The first external electrode 35 enters the inside of the first contact hole 234 of the second insulating film 33 and contacts the first surface electrode 231 inside the first contact hole 234. The first external electrode 35 is electrically connected to the first through electrode 208 via the first surface electrode 231 .

[0117] 10 to 12, a third insulating film 36 is formed on the second main surface 4 of the base material 2 so as to cover the second end surface 208b of the first through electrode 208. A second contact hole 237 is formed in the third insulating film 36 to expose the second surface electrode 232. In the example of FIGS. 10 to 12, the planar shape of the second contact hole 237 is a square shape slightly smaller than the planar shape of the first surface electrode 231. The planar shape of the second contact hole 237 may be a square shape approximately equal to the planar shape of the second through electrode 209. The first through electrode 208 and the second external electrode 38 are insulated by the third insulating film 36. The second external electrode 38 is formed on the third insulating film 36. The second external electrode 38 enters the inside of the second contact hole 237 of the third insulating film 36 and contacts the second surface electrode 232 inside the second contact hole 237. The second external electrode 38 is electrically connected to the second through electrode 209 via the second surface electrode 232 .

[0118] 10 and 11, in the first through electrode 208 and the second through electrode 209 adjacent to each other in the first direction X, the inner surface (first inner surface) 213A of the first through hole 210 of the first through electrode 208 and the inner surface (second inner surface) 223A of the second through hole 220 of the second through electrode 209 face each other in the first direction X. The first insulating film 6 on the wall portion 2a sandwiched between the inner surfaces 213A and 223A facing each other constitutes a capacitance portion 207A. The capacitance portion 207A may be referred to as a capacitance film. A pair of the first through electrode 208 and the second through electrode 209 facing each other in the first direction X and the capacitance portion 207A therebetween constitute one capacitor element.

[0119] 12, in the first through electrode 208 and the second through electrode 209 adjacent to each other in the second direction Y, the inner surface 213B of the first through hole 210 of the first through electrode 208 and the inner surface 223B of the second through hole 220 of the second through electrode 209 face each other in the second direction Y. The first insulating film 6 on the wall portion 2a sandwiched between the inner surfaces 213B and 223B facing each other constitutes a capacitance portion 207B. The capacitance portion 207B may be referred to as a capacitance film. A pair of the first through electrode 208 and the second through electrode 209 facing each other in the second direction Y and the capacitance portion 207B therebetween constitute one capacitor element.

[0120] Then, first through electrode 208 is electrically connected to first external electrode 35, and second through electrode 209 is electrically connected to second external electrode 38. Therefore, it is possible to obtain capacitor 201 in which all capacitor elements are connected in parallel. This allows capacitor 201 to be made smaller and have a larger capacity.

[0121] Capacitor 201 according to the second embodiment of the present disclosure is manufactured using a manufacturing method similar to that of capacitor 1 according to the first embodiment (the manufacturing method shown in FIGS. 6A to 6N).

[0122] Capacitor 201 according to the second embodiment of the present disclosure provides the same advantageous effects as those described in relation to the first embodiment.

[0123] The present disclosure may be embodied in still other forms.

[0124] In the first embodiment, the three through electrodes 8, 9 may include two first through electrodes 8 and one second through electrode 9. That is, one second through electrode 9 may be sandwiched between two first through electrodes 8 in the first direction X.

[0125] In the first embodiment, the total number of the through electrodes 8 and 9 may be four or more.

[0126] In the second embodiment, the planar shape of the through electrodes 208, 209 may be circular. In this case, the cross-sectional shapes of the first through hole 210 and the second through hole 220 are circular. The planar shape of the through electrodes 208, 209 may be regular hexagonal. In this case, the cross-sectional shapes of the first through hole 210 and the second through hole 220 are regular hexagonal.

[0127] Furthermore, in the second embodiment, a total of nine through electrodes 208, 209 are arranged in three rows and three columns, but the number of rows and columns can be changed as desired.

[0128] The following characteristics can be extracted from the description of this specification and the drawings.

[0129] [Appendix 1-1] A substrate (2) having a first main surface (3) and a second main surface (4) opposite thereto; A first through hole (10, 210) penetrating the base material (2) in a thickness direction (Z); a second through hole (20, 220) formed at a distance from the first through hole (10, 210), the second through hole (20, 220) penetrating the base material (2) in a thickness direction (Z); a first embedded electrode (12, 212) having a tapered first side wall (17, 217A) whose width decreases from the first main surface (3) toward the second main surface (4) in a cross-sectional view and embedded in the first through hole (10, 210); a second embedded electrode (22, 222) having a tapered second side wall (27, 227A) whose width decreases from the first main surface (3) toward the second main surface (4) in a cross-sectional view and embedded in the second through hole (20, 220); a first external electrode (35) covering one of the first principal surface (3) and the second principal surface (4) and electrically connected to the first embedded electrode (12, 212); a second external electrode (38) covering the other of the first main surface (3) and the second main surface (4) and electrically connected to the second embedded electrode (22, 222); A capacitor (1, 201), wherein the first side wall (17, 217A) and the second side wall (27, 227A) face each other with a part of the base material (2) interposed therebetween.

[0130] According to this configuration, the first side wall (17, 217A) of the first embedded electrode (12, 212) has a tapered shape whose width decreases from the first main surface (3) toward the second main surface (4) in a cross-sectional view. The second side wall (27, 227A) of the second embedded electrode (22, 222) has a tapered shape whose width decreases from the second main surface (4) toward the first main surface (3) in a cross-sectional view. The first side wall (17, 217A) and the second side wall (27, 227A) face each other with the wall portion of the substrate (2) interposed therebetween.

[0131] Since the first side wall (17, 217A) and the second side wall (27, 227A) have a tapered shape in a cross-sectional view, the capacitance of the capacitor (1, 201) can be increased compared to when the first side wall (17, 217A) and the second side wall (27, 227A) are perpendicular to the first main surface (3).

[0132] In addition, a first side wall (17, 217A) having a tapered shape whose width decreases from the first main surface (3) to the second main surface (4) in a cross-sectional view faces a second side wall (27, 227A) having a tapered shape whose width decreases from the second main surface (4) to the first main surface (3) in a cross-sectional view. Therefore, it is possible to keep a constant distance (inter-electrode distance) between the first side wall (17, 217A) of the first embedded electrode (12, 212) and the second side wall of the second embedded electrode (22, 222). This makes it possible to suppress a local decrease in breakdown voltage.

[0133] As a result, a capacitor (1, 201) can be provided that can increase the capacitance while suppressing a local decrease in breakdown voltage.

[0134] [Appendix 1-2] The capacitor (1,201) according to claim 1-1, wherein the first side wall (17,217A) and the second side wall (27,227A) facing each other are parallel.

[0135] [Appendix 1-3] The width (W3, W4) of the first embedded electrode (12, 212) at the first end (12a, 212a) on the first main surface (3) side 13 ) is greater than the distance (F, F1) between the first side wall (17, 217A) and the second side wall (27, 227A).

[0136] [Appendix 1-4] the first external electrode (35) covers the first main surface (3); The capacitor (1, 201) according to any one of Appendices 1-1 to 1-3, wherein the second external electrode (38) covers the second main surface (4).

[0137] [Appendix 1-5] a first surface electrode (31, 231) formed on the first main surface (3) and connected to the first embedded electrode (12, 212); a second surface electrode (22, 222) formed on the second main surface (4) and connected to the second embedded electrode (22, 222); the first embedded electrode (12, 212) is electrically connected to the first external electrode (35) via the first surface electrode (31, 231); The capacitor (1,201) according to appendix 1-4, wherein the second embedded electrode (22,222) is electrically connected to the second external electrode (38) via the second surface electrode (22,222).

[0138] [Appendix 1-6] The capacitor (1, 201) according to any one of Appendix 1-1 to Appendix 1-5, wherein an inclination angle (θ1, θ3) of the first side wall (17, 217A) and the second side wall (27, 227A) relative to the first main surface (3) is not less than 65° and not more than 85°.

[0139] [Appendix 1-7] The capacitor (1) according to any one of Supplementary Notes 1-1 to 1-6, wherein the first embedded electrodes (12) and the second embedded electrodes (22) are alternately arranged in a first direction (X).

[0140] [Appendix 1-8] A capacitor (1) according to appendix 1-7, wherein the first embedded electrode (12) and the second embedded electrode (22) are formed in a stripe shape along a second direction intersecting the first direction (X) in a plan view.

[0141] [Appendix 1-9] the first side wall (217A) has a tapered shape in which the width decreases from the first main surface (3) toward the second main surface (4) in a cross-sectional view along a first direction (X); the second side wall (227A) has a tapered shape in which the width decreases from the second main surface (4) toward the first main surface (3) in a cross-sectional view along the first direction (X), the first embedded electrode (212) further includes a third side wall (217B) having a tapered shape whose width decreases from the first main surface (3) toward the second main surface (4) in a cross-sectional view along a second direction (Y) intersecting the first direction (X), the second embedded electrode (222) further has a fourth side wall (227B) having a tapered shape whose width decreases from the second main surface (4) toward the first main surface (3) in a cross-sectional view along the second direction (Y), A capacitor (201) according to any one of Appendix 1-1 to Appendix 1-6, wherein the third side wall (217B) and the fourth side wall (227B) face each other across a portion of the base material (2) in the second direction (Y).

[0142] [Appendix 1-10] The capacitor (201) according to claim 1-9, wherein the first embedded electrodes (212) and the second embedded electrodes (222) are alternately arranged in the first direction (X) and the second direction (Y).

[0143] [Appendix 1-11] A capacitor (201) according to claim 1-10, wherein the first embedded electrode (212) and the second embedded electrode (222) are formed in a matrix along the first direction (X) and the second direction (Y) in a planar view.

[0144] [Appendix 1-12] The capacitor (1, 201) according to any one of Appendices 1-1 to 1-11, wherein the base material (2) includes an insulating portion (6) made of silicon oxide.

[0145] [Appendix 1-13] a first step of forming, in a substrate (100) having a first main surface (101) on one side and a second main surface (102) on the other side, a first through hole (10, 210) having a tapered first inner surface (13, 213A, 213B) whose width decreases from the first main surface (101) to the second main surface (102) in a cross-sectional view and penetrating the substrate (100) in a thickness direction (Z), and one of second through holes (20, 220) having a tapered second inner surface (23, 223A, 223B) whose width decreases from the second main surface (102) to the first main surface (101) in a cross-sectional view and penetrating the substrate (100) in a thickness direction (Z); a second step of forming the other of the first through hole (10, 210) and the second through hole (20, 220) in the substrate (100) after the first step; a third step of filling the inside of the first through hole (10, 210) with a base conductive film (108) to form a first embedded electrode (112), and filling the inside of the second through hole (20, 220) with the base conductive film (108) to form a second embedded electrode (22, 222); a fourth step of forming a first external electrode (35) electrically connected to the first embedded electrode (12, 212) so as to cover the first main surface (101), and forming a second external electrode (38) electrically connected to the second embedded electrode (22, 222) so as to cover the second main surface (102).

[0146] According to this method, a capacitor (1, 201) can be manufactured that includes a first embedded electrode (12, 212) having a tapered first sidewall (17, 217A) whose width decreases from the first main surface (101) to the second main surface (102), and a second embedded electrode (22, 222) having a tapered second sidewall (27, 227A) whose width decreases from the second main surface (102) to the first main surface (101). [Explanation of symbols]

[0147] 1: Capacitor 2: Base material 2a: Wall 3: First main surface 4: Second main surface 5A: Side 5B: Side 5C: Side 5D: Side 6: First insulating film (insulating portion) 7: Capacity part 8 :1st through electrode 8a: 1st end surface 8b: Second end surface 9: 2nd through electrode 9a: First end surface 9b: Second end surface 10: First through hole 10a: Open end 10b: Open end 11: First conductive film 12: First buried electrode 12a: First end surface (first end) 12b: Second end surface (second end) 13: Inner surface (first inner surface) 15: Ceiling wall 16: Bottom wall 17: Side wall (first side wall) 20: Second through hole 20a: Open end 20b: Open end 21: Second conductive film 22: Second buried electrode 22a: First end surface 22b: Second end surface 23: Inner surface (second inner surface) 25: Ceiling wall 26: Bottom wall 27: Side wall (second side wall) 31: 1st surface electrode 32: 2nd surface electrode 33: Second insulating film 34: First contact hole 35: 1st external electrode 36: Third insulating film 37: Second contact hole 38: 2nd external electrode 100: Silicon substrate (substrate) 101: First main surface 102: Second main surface 103: Side 104: First Mask 105: 2nd Mask 107: Seed layer 108: Base conductive film 109: Base conductive film 110: 3rd Mask 111: Base conductive film 112: 4th Mask 113: 5th Mask 114: 6th Mask 151: Capacitor 158: 1st through electrode 159: 2nd through electrode 167: Side wall 169: First buried electrode 172: Second buried electrode 177: Side wall 201: Capacitor 207A: Capacity section 207B: Capacity section 208: 1st through electrode 208a: First end surface 209: 2nd through electrode 209b: Second end surface 210: First through hole 210a: Open end 210b: Open end 211: First conductive film 212: First buried electrode 212a: First end surface (first end) 212b: Second end face (second end) 213A: Inner surface (first inner surface) 213B: Inner surface (first inner surface) 215: Ceiling wall 216: Bottom wall 217A: Side wall (1st side wall) 217B: Side wall (3rd side wall) 220: Second through hole 220a: Open end 220b: Open end 221: Second conductive film 222: Second buried electrode 222a: First end surface 222b: Second end surface 223A: Inner surface (second inner surface) 223B: Inner surface (second inner surface) 225: Ceiling wall 226: Bottom wall 227A: Side wall (second side wall) 227B: Side wall (4th side wall) 231: 1st surface electrode 232: 2nd surface electrode 234: First contact hole 237: 2nd contact hole F: Distance between opposing sides F1: Distance between opposing sides F2: Distance between opposing sides T: Thickness T0: Thickness W1: 1st width W2: Second width W3: 3rd width W4: 4th width W5: 5th width W6: 6th width W7: 7th width W8: 8th width W9: 9th width W 10 :10th width W 11 :11th width W 12 :12th width W 13 :13th width W 14 :14th width W 15 :15th width W 16 :16th width W 17 :17th width W 18 :18th width W 19 :19th width W 20 :20th width W 21 :21st width W 22 :22nd width W 23 :23rd width W 24 :24th width W 25 :25th width X: 1st direction Y: Second direction Z: Normal direction t1: Film thickness t2: Film thickness t3: Film thickness t4: Film thickness θ1: Tilt angle θ2: Tilt angle θ3: Tilt angle θ4: Tilt angle θ5: Tilt angle θ6: Tilt angle

Claims

1. a substrate having a first major surface and an opposite second major surface; A first through hole penetrating the base material in a thickness direction; a second through hole formed at a distance from the first through hole and penetrating the base material in a thickness direction; a first embedded electrode having a first sidewall tapered in cross section from the first main surface toward the second main surface, the first embedded electrode being embedded in the first through hole; a second embedded electrode having a second sidewall tapered in cross section from the second main surface toward the first main surface, the second embedded electrode being embedded in the second through hole; a first external electrode covering one of the first main surface and the second main surface and electrically connected to the first embedded electrode; a second external electrode covering the other of the first main surface and the second main surface and electrically connected to the second embedded electrode; A capacitor, wherein the first sidewall and the second sidewall face each other with a portion of the substrate interposed therebetween.

2. The capacitor of claim 1 , wherein the first and second opposing sidewalls are parallel.

3. 3. The capacitor according to claim 2, wherein a width of said first buried electrode at a first end portion on said first main surface side is larger than a distance between said first side wall and said second side wall.

4. the first external electrode covers the first main surface; The capacitor according to claim 1 or 2, wherein the second external electrode covers the second main surface.

5. a first surface electrode formed on the first main surface and connected to the first buried electrode; a second surface electrode formed on the second main surface and connected to the second buried electrode; the first embedded electrode is electrically connected to the first external electrode via the first surface electrode; The capacitor according to claim 4 , wherein the second embedded electrode is electrically connected to the second external electrode via the second surface electrode.

6. 3. The capacitor according to claim 1, wherein an inclination angle of the first sidewall and the second sidewall with respect to the first main surface is not less than 65 degrees and not more than 85 degrees.

7. 4. The capacitor according to claim 1, wherein the first embedded electrodes and the second embedded electrodes are arranged alternately in a first direction.

8. The capacitor according to claim 7 , wherein the first embedded electrode and the second embedded electrode are formed in a stripe shape along a second direction intersecting the first direction in a plan view.

9. the first side wall has a tapered shape in which a width decreases from the first main surface toward the second main surface in a cross-sectional view along a first direction, the second side wall has a tapered shape in which a width decreases from the second main surface toward the first main surface in a cross-sectional view along the first direction, the first buried electrode further includes a third sidewall having a tapered shape whose width decreases from the first main surface toward the second main surface in a cross-sectional view along a second direction intersecting the first direction, the second buried electrode further includes a fourth side wall having a tapered shape whose width decreases from the second main surface toward the first main surface in a cross-sectional view along the second direction, 4. The capacitor according to claim 1, wherein the third side wall and the fourth side wall face each other with a part of the base material therebetween.

10. The capacitor of claim 9 , wherein the first buried electrodes and the second buried electrodes are arranged alternately in the first direction and the second direction.

11. The capacitor according to claim 10 , wherein the first embedded electrodes and the second embedded electrodes are formed in a matrix along the first direction and the second direction in a plan view.

12. The capacitor according to any one of claims 1 to 3, wherein the substrate includes an insulating portion made of silicon oxide.

13. a first step of forming, in a substrate having a first main surface on one side and a second main surface on the other side, a first through hole having a first inner surface tapered in width from the first main surface to the second main surface in a cross-sectional view and penetrating the substrate in a thickness direction, and one of a second through hole having a second inner surface tapered in width from the second main surface to the first main surface in a cross-sectional view and penetrating the substrate in a thickness direction; a second step of forming the other of the first through hole and the second through hole in the substrate after the first step; a third step of filling the inside of the first through hole with a base conductive film to form a first embedded electrode, and filling the inside of the second through hole with a base conductive film to form a second embedded electrode; a fourth step of forming a first external electrode electrically connected to the first embedded electrode so as to cover the first main surface, and forming a second external electrode electrically connected to the second embedded electrode so as to cover the second main surface.

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