Liquid ejection chip, liquid ejection wafer, and method for manufacturing liquid ejection chip
By forming recesses on the wall surfaces of flow paths with controlled depths and widths, adhesive flow is managed, addressing yield reduction and interference issues in MEMS liquid ejection chips, thereby improving manufacturing efficiency.
Patent Information
- Application Number
- JP2023096007
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-12
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2043-06-12
AI Technical Summary
The formation of grooves or through holes in MEMS devices for liquid ejection chips leads to adhesive flow into these paths, resulting in adhesive lumps that reduce yield and interfere with chip mounting and functionality.
Forming recesses, or scallops, on the wall surfaces of the flow paths to control adhesive flow, with varying depths and widths to minimize adhesive accumulation and exposure.
This configuration suppresses adhesive accumulation, enhancing yield and preventing interference during chip mounting, thus improving the manufacturing efficiency of liquid ejection chips.
Smart Images

Figure 2024177716000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a liquid ejection chip, a liquid ejection wafer, and a method for manufacturing the liquid ejection chip. [Background technology]
[0002] MEMS (Micro Electro Mechanical Systems) devices are manufactured by bonding together members in which grooves or through holes that serve as flow paths are formed. A liquid ejection chip that ejects liquid onto a recording medium is known as an example of a MEMS device.
[0003] The liquid ejection chip includes an energy generating element that provides energy for ejecting liquid, such as a heater element that heats and boils the liquid, or a piezoelectric element that applies pressure to the liquid by utilizing a change in volume.
[0004] Known flow paths for supplying liquid to energy generating elements include those in which multiple members each having a groove or hole that serves as the flow path are laminated, and those in which a groove or hole that serves as the flow path is formed after lamination. These members are laminated by bonding with an adhesive.
[0005] Furthermore, multiple MEMS devices are formed on a substrate called a wafer, which is then cut to separate it into multiple liquid ejection chips. One method for cutting the substrate is called laser stealth dicing. With this method, a laser beam is focused inside the substrate to alter its internal properties, and an external force is applied to the substrate to create continuous cracks starting from the altered areas, cutting the substrate (hereafter referred to as fracturing).
[0006] Patent Document 1 discloses a technique for forming a groove on a planned cutting line that is inclined with respect to the crystal orientation of a substrate in order to improve cutting accuracy during cutting. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] JP 2017-228605 A Summary of the Invention [Problem to be solved by the invention]
[0008] When forming a groove on the planned cutting line using the technology of Patent Document 1, the adhesive may flow into the groove on the planned cutting line or into the flow path, etc. Then, after the chip is cut, a lump of the adhesive may remain, which may reduce the yield.
[0009] An object of the present disclosure is to provide a liquid ejection chip that suppresses a decrease in yield. [Means for solving the problem]
[0010] A liquid ejection chip according to one embodiment of the present disclosure is a liquid ejection chip in which a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element, and a second flow path substrate having a second flow path connected to the first flow path are bonded together via an adhesive, wherein a recess is formed in a wall surface of the first flow path and a wall surface of the second flow path, and with respect to at least one of the depth and width of the recess, the first flow path substrate is greater than the second flow path substrate. Effect of the Invention
[0011] According to the present disclosure, it is possible to provide a liquid ejection chip in which a decrease in yield is suppressed. [Brief description of the drawings]
[0012] [Figure 1] FIG. 2 is a schematic cross-sectional view of a wafer for a liquid ejection head. [Diagram 2] FIG. [Diagram 3] FIG. 13 is a plan view of the chips arranged after cleavage. [Figure 4] FIG. 2 is an enlarged view showing a portion α in FIG. [Diagram 5] FIG. 2 is an enlarged view showing a portion α in FIG. [Figure 6] FIG. 2 is an enlarged view showing a portion α in FIG. [Figure 7] FIG. 2 is an enlarged view showing a portion α in FIG. [Figure 8] FIG. 2 is an enlarged view showing a portion α in FIG. [Figure 9] 5A to 5C are diagrams illustrating a manufacturing process of the first flow path substrate. [Figure 10] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 11] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 12] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 13] FIG. [Figure 14] FIG. [Figure 15] FIG. 2 is a diagram showing a manufactured wafer for a liquid ejection head. [Figure 16] FIG. 1 is a diagram showing a summary of Example 1. [Figure 17] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 18] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 19] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 20] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 21] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 22] FIG. 1 is a diagram showing a summary of Example 2. [Figure 23] 5A to 5C are diagrams illustrating a manufacturing process of the first flow path substrate. [Figure 24] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Diagram 25] 5A to 5C are diagrams illustrating a manufacturing process of the second flow path substrate. [Figure 26] FIG. 13 is a diagram showing a summary of Example 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0013] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the present disclosure, and not all combinations of features described in the following embodiments are necessarily essential to the solution of the present disclosure. Note that the same reference numbers are used for the same components.
[0014] <<First embodiment>> <Explanation of yield decline> Prior to describing this embodiment, an example of a decrease in yield will be described in more detail below. Fig. 1 is a schematic cross-sectional view of a wafer 100 for a liquid ejection head. Fig. 2 is an enlarged view of a planned cutting line DL. Fig. 3 is a plan view in which chips 115 are arranged after cutting. In this specification, the wafer before cutting is called a wafer for a liquid ejection head (or simply a wafer), and the wafer after cutting is called a liquid ejection chip (or simply a chip).
[0015] As shown in FIG. 1, a first flow path substrate 111 in which a groove 103 is formed on a planned cutting line DL and a second flow path substrate 112 in which a through hole 121 is formed on the planned cutting line are bonded together via an adhesive 110. In this case, the adhesive 110 pushed out by bonding flows into the groove 103 on the planned cutting line DL. The flowing adhesive 110 creeps up the wall surface of the first flow path substrate 111 and gathers due to the capillary force of the corner of the groove 103 as shown in FIG. 2(a). In the case of an adhesive 110 that does not absorb laser, the adhesive 110 cannot be modified by the laser and becomes a lump after being cut into a chip 115. Due to the cohesive force of the adhesive that has become a lump, the adhesive remains attached to the side of the chip as a lump 113 as shown in FIG. 2(b).
[0016] Fig. 3 is a plan view of chip 115. Adhesive lumps 113 attached to the sides of the chip protrude beyond the chip outline in plan view, as shown in Fig. 3(b). As shown in Fig. 3(a), in an inline arrangement head that continuously arranges chips 115 in a straight line, the width of the adhesive protruding from the chip side is W4, and the chip spacing in the inline arrangement head is W3. If W4>W3, adjacent chips 115 and adhesive lumps 113 protruding from the chip side interfere with each other, making it impossible to mount chip 115.
[0017] Furthermore, the lumps 113 attached to the side surfaces of the chips may come off during the process, and the detached adhesive may adhere to the chips, thereby reducing the yield.
[0018] Furthermore, the overflowing adhesive 110 creeps up the wall surface not only of the groove 103 but also of the wall surface of the flow path 102 (also referred to as the first flow path) formed in the first flow path substrate 111 or the through hole 123 (also referred to as the second flow path) formed in the second flow path substrate 112. In the flow path 102, there is a concern that the adhesive creeping up the wall surface will fill and block the fine flow path to the discharge port 10. On the other hand, in the through hole 123, there is a concern that the adhesive 110 creeping down the wall surface will adhere to the surface opposite to the joining surface, thereby reducing the yield.
[0019] In the embodiment described below, a configuration is described for suppressing the adhesive that has flowed into a groove or through hole from creeping onto the wall surface of a substrate that is bonded via an adhesive 110. That is, a liquid ejection chip with a high yield rate and a manufacturing method thereof are described.
[0020] <Configuration> An example of a liquid ejection head wafer and chips in this embodiment will be described below with reference to Fig. 1 again. A liquid ejection head wafer 100 is formed by bonding a first flow path substrate 111 and a second flow path substrate 112 with an adhesive 110.
[0021] Energy generating elements 1 used for ejecting liquid are formed on the first flow path substrate 111 as shown in Fig. 1. Examples of the energy generating elements 1 include heating resistors and piezoelectric elements. Wiring for supplying power to the energy generating elements 1 and pads for connecting electrodes are not shown. Fig. 1 is a schematic diagram, and details such as the number and arrangement of the energy generating elements 1 are omitted.
[0022] 1, a non-through hole 103 is formed in a part of the planned cutting line DL in the first flow path substrate 111. The non-through hole 103 is formed in a surface of the first flow path substrate 111 that does not form a layer of the discharge port 10 (a surface in the -Z direction in the example of FIG. 1).
[0023] Various methods can be applied to form the through holes 123 that supply liquid to the energy generating elements and the through holes 121 that are formed on the planned cutting lines DL in the second flow path substrate 112. For example, a method of penetrating from one side of the substrate to the opposite side by dry etching, a method of forming a non-through hole from one side and thinning the substrate by back grinding or CMP, and the like can be mentioned.
[0024] The through holes and blind holes are formed by the Bosch process, which is a type of reactive ion etching. The Bosch process is a method of forming vertical etched grooves in a substrate by alternately performing coating and etching. A feature of the Bosch process is that the wall surface formed by etching has a characteristic shell-like shape called a scallop, as shown in FIG. 4. The scallop is a recess 200 formed continuously on the wall surface, and is formed continuously around the inner periphery of the opening in the stacking direction in which the first flow path substrate 111 and the second flow path substrate 112 are stacked.
[0025] FIG. 4(a) is an enlarged view showing the α portion in FIG. 1. FIG. 4(b) is an enlarged view showing the IVB portion in FIG. 4. FIG. 4 shows the scallop depth D. More specifically, two types of scallop depths D1 and D2 are shown. D1 and D2 are shown in subscripts in the drawings (hereinafter, the same notation will be used in the present specification). The scallop depth is the depth generated by the formation of the scallop from the wall surface in the state before the scallop is formed. In the example of FIG. 4, it is also the distance in the X direction generated by the formation of the scallop from the wall surface in the state before the scallop is formed. In this embodiment, the bonding surface of the substrate is the first surface, and the surface other than the bonding surface is the second surface. In this case, the scallop depth D1 of the wall surface on the first surface side of the second flow path substrate 112 is set to be smaller than the scallop depth D2 of the wall surface on the second surface side of the second flow path substrate 112. The scallop depth is defined as the average depth of the scallops on the wall surface etched under the same conditions, and the shorter the etching time, the shallower the scallop depth will be, and the longer the etching time, the deeper the scallop depth will be.
[0026] Similarly, FIG. 4 shows a scallop width W. More specifically, two scallop widths W1 and W2 are shown. The scallop width is the width caused by the formation of the scallop. In the example of FIG. 4, it is also the distance in the Z direction caused by the formation of the scallop. In this embodiment, the scallop width W1 of the wall surface on the first surface side of the second flow path substrate 112 is smaller than the scallop width W2 of the wall surface on the second surface side of the second flow path substrate 112. Like the scallop depth, the scallop width is defined as the average width of the scallops on the wall surface etched under the same conditions, and the shorter the etching time, the shorter the scallop width, and the longer the etching time, the longer the scallop width.
[0027] The wall surface on which the scallops are formed is where the adhesive 110 that has overflowed runs when bonding is performed via the adhesive 110. In the section of scallop depth D1 (hereinafter referred to as D1 section), the scallop depth is preferably 0.2 μm or less, more preferably 0.1 μm or less, so that the overflowing adhesive 110 can easily run down. Furthermore, in the section of scallop depth D2 (hereinafter referred to as D2 section), to which the overflowing adhesive 110 runs down, the overflowing adhesive 110 is made less likely to run down, and the adhesive is prevented from being exposed on the second surface. In order to stop the adhesive 110 that has run down from the D1 section, the scallop depth is preferably 0.5 μm or more, more preferably 1.0 μm or more. That is, it is preferable that D2>2D1. Similarly, it is preferable that W2>2W1.
[0028] When comparing a wall surface with a deep scallop depth to a wall surface with a shallow scallop depth, the overflowing adhesive 110 flows preferentially toward the wall surface with a shallow scallop depth. The overflowing adhesive 110 flows laterally through the depressions of the scallops due to capillary force, filling the depressions. If the scallop depth is shallow, less adhesive 110 is needed to fill it, and it flows to the depression of the next scallop. On the other hand, if the scallop depth is deep, more adhesive 110 is needed to fill it than if it is shallow, and the amount that flows is relatively reduced.
[0029] The above has been explained using the scallop depth as an example, but the same applies to the scallop width. When comparing a wall surface with a long scallop width to a wall surface with a short scallop width, the overflowing adhesive 110 flows preferentially to the wall surface with the long scallop width. The overflowing adhesive 110 flows laterally through the depressions of the scallops due to capillary force, filling the depressions. If the scallop width is short, less adhesive 110 is needed to fill them, and the adhesive 110 flows to the depressions of the next scallop. On the other hand, if the scallop width is long, more adhesive 110 is needed to fill them than if the scallop width is short, and the amount that flows is relatively reduced.
[0030] In this embodiment, the D1 section is a section with a scallop width W1, and the D2 section is a section with a scallop width W2. The scallop width is preferably 0.2 μm or less, more preferably 0.1 μm or less, so that the overflowing adhesive 110 can easily flow. Furthermore, in the D2 section to which the adhesive flows, the overflowing adhesive 110 is made difficult to flow, and the adhesive is prevented from being exposed on the second surface. In order to stop the adhesive 110 flowing from the D1 section, the scallop width is preferably 0.5 μm or more, more preferably 1.0 μm or more.
[0031] In the present embodiment, an example has been described in which the scallop depth and width are the same value within the section, but the scallop depth and width may be different values within the section. In addition, in the present embodiment, an example has been described in which both the scallop depth and width are used, but it is sufficient if either one of them has the relationship described in the present embodiment. In the following, in order to simplify the description, the scallop depth will be mainly used as an example, but the scallop width can be described in a similar manner.
[0032] With the above-described configuration, the amount of adhesive flowing down the wall surface of the non-through hole 103 formed in the first flow path substrate 111 is relatively reduced by flowing down the wall surface of the through hole 121 formed in the second flow path substrate 112, particularly the section of the scallop depth D1. As a result, it is possible to suppress the adhesive 110 from accumulating at the bottom (positive Z direction) of the non-through hole 103. In addition, FIG. 4 has been described using the wall surface between the non-through hole 103 of the first flow path substrate 111 and the through hole 121 of the second flow path substrate 112 as an example, but the wall surface between the through hole of the first flow path substrate 111 and the through hole of the second flow path substrate 112 can be configured in a similar manner. The length of the D1 section and the length of the D2 section may be the same or different. The length of each section is appropriately determined in consideration of the amount of adhesive 110 that protrudes and the etching time, etc.
[0033] 4, the scallop depth of the wall surface of the first flow path substrate 111 is of any size, but is configured to be deeper than D1. This is to allow the adhesive 110 to flow and spread to the wall surface of the second flow path substrate 112.
[0034] Figures 5 and 6 are diagrams showing modified examples. Figures 5 and 6 are enlarged views showing the α portion in Figure 1. In the example of Figure 4, the wall surface of the second flow path substrate 112 is described as the target, but as shown in Figures 5 and 6, the wall surface of the first flow path substrate 111, and the wall surfaces of both the first flow path substrate 111 and the second flow path substrate 112 may be the target.
[0035] 5 shows an example in which the scallop depth D1 of the wall surface on the first surface side of first flow path substrate 111 is smaller than the scallop depth D2 of the wall surface on the second surface side of first flow path substrate 111. In the example of FIG. 5, the overflowing adhesive 110 flows down the D1 section of first flow path substrate 111. However, in the section D2 to which it flows further, the overflowing adhesive 110 is made less likely to flow, and it is possible to prevent the adhesive 110 from being exposed to the second surface (or the bottom of non-through hole 103).
[0036] 6 shows an example in which the second flow path substrate 112 described in FIG. 4 and the first flow path substrate 111 described in FIG. 5 are combined. That is, FIG. 6 shows an example in which the scallop depth D1 of the wall surface on the first surface side of the first flow path substrate 111 and the second flow path substrate 112 is smaller than the scallop depth D2 of the wall surface on the second surface side of the first flow path substrate 111 and the second flow path substrate 112. In the example of FIG. 6, the overflowing adhesive 110 also flows down the section D1 of the first flow path substrate 111 and the second flow path substrate 112. However, in the section D2 to which the adhesive 110 flows further, the overflowing adhesive 110 is made less likely to flow down, and it is possible to prevent the adhesive 110 from being exposed to the second surface (or the bottom of the non-through hole 103).
[0037] An example of the adhesive 110 will be described. A material that has high adhesion to the substrate is preferably used as the adhesive 110. In addition, a material that has little air bubbles and is easy to apply is preferable as the adhesive 110, and a low-viscosity material that can easily reduce the thickness of the adhesive 110 is preferable. The adhesive 110 preferably contains any resin selected from the group consisting of epoxy resin, acrylic resin, silicone resin, benzocyclobutene resin, polyamide resin, polyimide resin, and urethane resin. Examples of the curing method of the adhesive 110 include a heat curing method and an ultraviolet delayed curing method. In addition, if any of the substrates has ultraviolet transparency, an ultraviolet curing method can also be used.
[0038] The adhesive 110 can be applied by a method of adhesive transfer using a substrate. Specifically, a transfer substrate is prepared, and the adhesive is applied thinly and uniformly on the transfer substrate by a spin coating method or a slit coating method. Thereafter, the adhesive 110 can be transferred only to the adhesive surface of the first flow path substrate 111 by contacting the adhesive surface of the first flow path substrate 111 with the applied adhesive. The size of the transfer substrate is preferably equal to or larger than the size of the first flow path substrate 111. As the substrate, a film such as silicon or glass, PET or PEN, or PI is preferably used. In addition, the adhesive can be directly formed on the first flow path substrate 111 by screen printing or dispense application. Here, an example of applying the adhesive 110 to the first flow path substrate 111 has been described, but the adhesive 110 may be applied to the second flow path substrate 112.
[0039] The first flow path substrate 111 coated with the adhesive 110 and the second flow path substrate 112 are bonded by heating the substrates to a predetermined temperature in a bonding device and then applying pressure for a predetermined time and pressure. Bonding parameters such as time and pressure are appropriately set depending on the adhesive material. Bonding in a vacuum is preferable to prevent air bubbles from entering the bonded portion.
[0040] If the adhesive 110 is a thermosetting type, it may be heated in a bonding device until it hardens. In addition, the substrate assembly may be removed after bonding and heated in an oven or the like to promote hardening. If the adhesive 110 is an ultraviolet-delay type, the adhesive 110 is irradiated with a specified amount of ultraviolet light before bonding and then bonded. After bonding, it is preferable to further heat the substrate assembly to sufficiently promote hardening. If the adhesive 110 is an ultraviolet-curing type, after bonding the substrates together, a specified amount of ultraviolet light is irradiated onto the adhesive 110 through a substrate having ultraviolet light transparency to harden it. After bonding, it is preferable to further heat the substrate assembly to sufficiently promote hardening.
[0041] 1, a flow path layer 3 and a nozzle layer 2 are formed on the flow path substrate after bonding, completing the liquid ejection head wafer 100. The liquid ejection head wafer 100 is then diced into individual chips by stealth dicing using a laser, thereby obtaining the liquid ejection chips 115.
[0042] As described above, according to this embodiment, it is possible to provide a liquid ejection chip that suppresses a decrease in yield. That is, in this embodiment, by controlling the amount of adhesive 110 that creeps up and down on the flow path wall surface, it is possible to manufacture liquid ejection chips with a high yield.
[0043] <<Second embodiment>> In the first embodiment, an example in which the scallop depth is provided in two stages (D1 and D2) is described. In this embodiment, an example in which the scallop depth is provided in n stages (n is 3 or more) is described. When n is 2, two or more types of scallop depth are provided, which includes the first embodiment. In this embodiment, n is 3 or more. As described in the first embodiment, the scallop depth is used as an example, but the same applies to the scallop width.
[0044] FIG. 7 is an enlarged view showing the α part of FIG. 1 in the present embodiment. FIG. 7 shows an example in which the second flow path substrate 112 is provided with scallop depths in n stages. As described in the modification of the first embodiment, the first flow path substrate 111 may be provided with scallop depths in n stages. In each of both the first flow path substrate 111 and the second flow path substrate 112, scallop depths in n stages may be provided.
[0045] In FIG. 7, in the second flow path substrate 112, when the scallop depth of the wall surface on the first surface side is D1, and the scallop depths are D2, D3, ··· Dn-1, Dn toward the second surface, an example where D1 < D2 < D3 < ··· < Dn-1 < Dn is shown. If the scallop depth is changed abruptly, the balance of the etching conditions may be disrupted and shape abnormalities may occur at the change interface. By changing the scallop depth stepwise in multiple stages as in the present embodiment, a rapid change in the etching conditions can be avoided, and the wall surface can be formed without shape abnormalities. For example, when the etching step times of the scallop depths D1, D2, D3 ··· Dn are E1, E2, E3, ··· En, the above scallop depths can be formed by setting En > ··· > E3 > E2 > E1.
[0046] The length of each section can be any length, but in order to suppress the creeping up of the protruding adhesive 110, the roles of the sections at both ends (D1 and Dn) are important. Since the intermediate sections (D2, D3, ··· Dn-1) are connecting sections required during processing, the length of the intermediate sections may be made shorter than the lengths of the sections at both ends.
[0047] In the case of the first flow path substrate 111 as well, when the scallop depth of the wall surface on the first surface side is D1, and the scallop depths are D2, D3, ···, Dn-1, Dn toward the second surface, it may be set as D1 < D2 < D3 < ··· < Dn-1 < Dn. In the case of both the first flow path substrate 111 and the second flow path substrate 112, it is preferable that Dn > 2D1.
[0048] The scallop width is the same. When the scallop depth of the wall surface on the first surface side is W1, and the scallop widths are W2, W3, ···, Wn-1, Wn toward the second surface, it is sufficient to set W1 < W2 < W3 < ··· < Wn-1 < Wn. Also, it is preferable that Wn > 2W1.
[0049] In addition, as described above, in order to avoid a sudden change in the etching conditions, when the scallop depth of the wall surface on the first surface side is D1, and the scallop depths are D2, D3, ···, Dn-1, Dn toward the second surface. At this time, it is preferable to set D1 < D2 < D3 < ··· < Dn-1 < Dn, but this is not the only case. The scallop depth may be reversed in some sections that are intermediate zones.
[0050] <<Third Embodiment>> In this embodiment, an example in which the scallop depths of the wall surfaces of the first flow path substrate 111 and the second flow path substrate 112 are relatively different will be described. More specifically, an example in which Da > Db will be described, where Da is the scallop depth of the wall surface of the non-through hole 103 of the first flow path substrate 111 and Db is the scallop depth of the wall surface of the through hole 121 of the second flow path substrate 112. As described in the first embodiment, the scallop depth is taken as an example for explanation, but the same applies to the scallop width.
[0051] 8 is an enlarged view showing the α portion of FIG. 1 in this embodiment. As shown in FIG. 8, the scallop depth Da of the wall surface of the non-through hole 103 of the first flow path substrate 111 is deeper than the scallop depth Db of the wall surface of the through hole 121 of the second flow path substrate 112. When comparing a wall surface with a deep scallop depth with a wall surface with a shallow scallop depth, the overflowing adhesive 110 flows preferentially to the wall surface with a shallow scallop depth. The overflowing adhesive 110 flows laterally through the depression of the scallop by capillary force and fills the depression. If the scallop depth is shallow, less adhesive is required to fill it, and it flows to the depression of the next scallop. On the other hand, if the scallop depth is deep, more adhesive is required to fill it than if it is shallow, and the amount of adhesive that flows is relatively reduced. From the above, by making Da>Db, the overflowing adhesive 110 flows more along the wall surface of the through hole 121 than along the wall surface of the non-through hole 103, and it is possible to prevent the adhesive from pooling at the bottom of the non-through hole 103. As an example, Da can be set to be 1.5 times or more and 10 times or less than Db. As described above, the scallop width can be set to the same.
[0052] This embodiment may be combined with the examples described in the first or second embodiment. That is, as long as the relationship of scallop depth Da of the wall surface of the first flow path substrate 111>scallop depth Db of the second flow path substrate 112 is maintained, multiple depth steps may be formed in each substrate. Also, as described in the second embodiment, when configuring multiple scallop depth steps, the steps may be different between the first flow path substrate 111 and the second flow path substrate 112.
[0053] In relation to the second embodiment, n stages of scallop depth may be provided when viewed from the entirety of both the first flow path substrate 111 and the second flow path substrate 112. Even in this case, it is sufficient that the relationship of scallop depth Da of the wall surface of the first flow path substrate 111>scallop depth Db of the second flow path substrate 112 is maintained. For example, the scallop depth at the boundary portion of the first flow path substrate 111 and the second flow path substrate 112 may be reversed. As described later, the first flow path substrate 111 and the second flow path substrate 112 are etched separately. Therefore, when n stages of scallop depth are provided when viewed from the entirety of both the first flow path substrate 111 and the second flow path substrate 112, the scallop depth at the boundary portion of the first flow path substrate 111 and the second flow path substrate 112 may be reversed. When multiple stages of scallop depth are formed, it is sufficient that the average of the scallop depth Da of the wall surface of the first flow path substrate 111>scallop depth Db of the second flow path substrate 112 when viewed as a whole.
[0054] <<Example>> Below, examples of each of the embodiments described in the first to third embodiments will be described. Example 1 corresponds to the first embodiment, Example 2 corresponds to the second embodiment, and Example 3 corresponds to the third embodiment. In the examples, a manufacturing method for a liquid ejection wafer (liquid ejection chip) will be described.
[0055] <Example 1> Example 1 will be described with reference to Figs. 9 to 16. Fig. 9 is a diagram showing the manufacturing process of the first flow path substrate 111. Figs. 10, 11, and 12 are diagrams showing the manufacturing process of the second flow path substrate 112. Figs. 13 and 14 are diagrams showing the bonding process. Fig. 15 is a diagram showing the manufactured liquid ejection head wafer 100. Fig. 16 is a diagram showing a summary of Example 1.
[0056] First, as shown in Fig. 9(a), a first flow path substrate 111 is prepared. The first flow path substrate 111 is formed with energy generating elements 1 made of TaSiN and used to eject droplets, an electric circuit (not shown) for driving the energy generating elements 1, and an electric connection part (not shown) electrically connected to an electric connection substrate. Such a first flow path substrate 111 was prepared. The substrate was made of silicon, and was thinned to a thickness of 625 µm using a grinding device.
[0057] The flow paths 102 and the non-through holes 103 on the planned cutting lines were formed in the first flow path substrate 111 prepared in this manner. Specifically, as shown in Fig. 9(b), an etching mask resist 130 corresponding to the flow paths 102 and the non-through holes 103 on the planned cutting lines was formed on the bonding surface side by using a photolithography technique.
[0058] Next, as shown in Fig. 9(c), the flow path 102 and the blind hole 103 were simultaneously processed using the Bosch process so that the processing depth was 450 µm from the bonding surface of the first flow path substrate 111. The etching rate for silicon at this time was 7 µm / min, and the processing time was 65 minutes. After that, the etching mask resist was peeled off.
[0059] Next, an etching mask resist having openings at locations that will become through-flow paths was formed from the surface on which the energy generating elements 1 were formed, using photolithography technology. After that, etching was performed using the Bosch process to penetrate the blind holes with a depth of 450 μm formed in the first flow path substrate 111, and the etching mask resist was peeled off. In this way, as shown in FIG. 9(d), the flow paths 102 and the blind holes 103 that did not penetrate were formed in the first flow path substrate 111.
[0060] Next, the process of the second flow path substrate 112 will be described. A 725 μm silicon substrate was prepared as the second flow path substrate 112, and an etching mask resist 130 was formed on the surface to be etched by using a photolithography technique. Next, as shown in FIG. 10(a) and (b), a section to become a scallop depth D2 was formed by using a Bosch process. The etching conditions at this time were as follows: C4F8 gas was used in the coating step, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and a coating time of 3.9 seconds. Next, SF6 gas was used in the coating layer etching, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and an etching time of 3.5 seconds. Next, SF6 gas was used in the silicon etching, with a gas flow rate of 700 sccm, a chamber pressure of 12.0 Pa, a coil power of 2000 W, and an etching time of 10 seconds. Under these conditions, processing was performed to a depth of 150 μm. Under these conditions, the scallop depth D2 was 1.2 μm.
[0061] Next, as shown in Figures 11(a) and (b), the section with scallop depth D1 was formed continuously following section D2 using the Bosch process. The etching conditions for this were C4F8 gas for the coating step, with a gas flow rate of 400sccm, chamber pressure of 6.0Pa, coil power of 2200W, and coating time of 1.3 seconds. Next, SF6 gas was used for coating layer etching, with a gas flow rate of 400sccm, chamber pressure of 3.5Pa, coil power of 2200W, and etching time of 3.0 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 400sccm, chamber pressure of 4.0Pa, coil power of 2200W, and etching time of 1.5 seconds. Under these conditions, processing was performed to a depth of 330μm including section D2. The scallop depth D1 under these conditions was 0.15μm.
[0062] Next, as shown in FIGS. 12(a) and (b), the substrate was ground from the non-etched surface to a thickness of 300 μm to form through-holes 121 and 123.
[0063] Next, an adhesive transfer substrate (not shown) was prepared, and a benzocyclobutene solution was spin-coated as an adhesive onto the adhesive transfer substrate to a thickness of 7 μm. A PET film was used as the transfer substrate. After coating, a baking process was performed at 100° C. for 5 minutes to volatilize the solvent. The adhesive formed on the transfer substrate was brought into contact with the bonding surface of the first flow path substrate 111 while applying heat, thereby transferring the adhesive 110 to the first flow path substrate 111, as shown in FIG. 13.
[0064] Next, the first flow path substrate 111 and the second flow path substrate 112 were aligned using a bonding alignment device (not shown) and heated in a vacuum to bond them together. Bonding was performed at a vacuum level of 100 Pa or less and a temperature of 150° C. After bonding was completed and cooled, the first flow path substrate 111 and the second flow path substrate 112 were removed from the bonding alignment device and heat-treated at 250° C. for 1 hour in an oven in a nitrogen atmosphere to harden the adhesive. As shown in FIGS. 14(a) and 14(b), a part of the adhesive 110 softened during bonding or hardening protrudes from the wall surface during bonding. Then, the adhesive 110 protruding during bonding flows down into the D1 section of the opening wall surface of the second flow path substrate 112, and the amount of adhesive flowing down to the wall surface of the non-through hole 103 of the first flow path substrate 111 could be suppressed.
[0065] Next, a negative photosensitive resin was dissolved in a PGMEA solvent and spin-coated on a PET film, and dried at 100°C in an oven to form a dry film. This dry film was transferred to the energy generating element formation surface of the first flow path substrate 111, and the PET film was peeled off to form a photosensitive resin layer 3 as shown in FIG. 15. A pattern that would become a flow path was exposed on the photosensitive resin layer 3, and then PEB (Post Exposure Bake) was performed to create a latent image state. Next, a dry film was similarly laminated, and a pattern that would become a nozzle was exposed. After that, PEB was performed to develop the flow path and the nozzle all at once, forming a nozzle layer 2 as shown in FIG. 15, and a liquid ejection head wafer 100 was completed.
[0066] Next, multiple layers of altered layers were formed in the thickness direction of the silicon substrate of the liquid discharge head wafer 100 by stealth dicing using a laser. Then, stress was applied to the wafer to cause cracks to progress in the altered portions, and the wafer was then broken to obtain liquid discharge chips 115 (FIG. 3).
[0067] In this liquid discharge chip 115, as described above, the adhesive 110 that had softened during bonding or hardening was in a state of flowing down the D1 section of the opening wall surface of the second flow path substrate 112 during bonding. In other words, since the amount of adhesive that flowed down the wall surface of the unpenetrated non-through hole 103 of the first flow path substrate 111 could be suppressed, the adhesive 110 did not accumulate at the opening on the planned cutting line of the first flow path substrate 111, and the occurrence of hardened adhesive protruding from the side surface of the chip could be suppressed.
[0068] Furthermore, when an in-line type liquid ejection head was formed by arranging a plurality of liquid ejection chips manufactured in this manner, an in-line type liquid ejection head with good yield could be obtained without interference between adjacent chips.
[0069] FIG. 16 is a table summarizing the etching conditions in the Bosch process of Example 1.
[0070] <Example 2> In Example 2, differences from Example 1 will be described. Example 2 will be described with reference to Figs. 17 to 22. Figs. 17, 18, 19, 20, and 21 are diagrams showing the manufacturing process of the second flow path substrate 112. Fig. 22 is a diagram showing a summary of Example 2. Example 2 differs from Example 1 in the processing conditions of the second flow path substrate 112.
[0071] A 725 μm silicon substrate was prepared as the second flow path substrate 112, and an etching mask resist 130 was formed on the surface to be etched by using a photolithography technique. Next, as shown in FIG. 17(a) and (b), a section to become a scallop depth D4 was formed by using a Bosch process. The etching conditions at this time were as follows: C4F8 gas was used in the coating step, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and a coating time of 3.9 seconds. Next, SF6 gas was used for the coating layer etching, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and an etching time of 3.5 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 700 sccm, a chamber pressure of 12.0 Pa, a coil power of 2000 W, and an etching time of 10 seconds. Under these conditions, processing was performed to a depth of 100 μm. Under these conditions, the scallop depth D4 became 1.2 μm.
[0072] Next, as shown in Figures 18(a) and (b), a section with a scallop depth D3 was formed continuously following the D4 section using the Bosch process. The etching conditions for this were C4F8 gas for the coating step, with a gas flow rate of 400sccm, chamber pressure of 4.6Pa, coil power of 2400W, and coating time of 3.0 seconds. Next, SF6 gas was used for the coating layer etching, with a gas flow rate of 400sccm, chamber pressure of 3.8Pa, coil power of 2400W, and etching time of 3.3 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 600sccm, chamber pressure of 9.5Pa, coil power of 2070W, and etching time of 7.2 seconds. Under these conditions, processing was performed to a depth of 150μm, including the D4 section. The scallop depth D3 under these conditions was 0.8μm.
[0073] Next, as shown in Figure 19(a) and (b), the section with scallop depth D2 was formed continuously following section D3 using the Bosch process. The etching conditions for this were as follows: C4F8 gas was used for the coating step, with a gas flow rate of 400sccm, chamber pressure of 5.2Pa, coil power of 2300W, and coating time of 2.1 seconds. Next, SF6 gas was used for the coating layer etching, with a gas flow rate of 400sccm, chamber pressure of 3.8Pa, coil power of 2400W, and etching time of 3.3 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 500sccm, chamber pressure of 9.5Pa, coil power of 2140W, and etching time of 4.4 seconds. Under these conditions, processing was performed to a depth of 200μm, including sections D4 and D3. The scallop depth D2 under these conditions was 0.4μm.
[0074] Next, as shown in Figure 20(a) and (b), the section with scallop depth D1 was formed continuously following section D2 using the Bosch process. The etching conditions for this were C4F8 gas for the coating step, with a gas flow rate of 400sccm, chamber pressure of 6.0Pa, coil power of 2200W, and coating time of 1.3 seconds. Next, SF6 gas was used for coating layer etching, with a gas flow rate of 400sccm, chamber pressure of 3.5Pa, coil power of 2200W, and etching time of 3.0 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 400sccm, chamber pressure of 4.0Pa, coil power of 2200W, and etching time of 1.5 seconds. Under these conditions, processing was performed to a depth of 320μm including sections D4, D3, and D2. The scallop depth D1 under these conditions was 0.15μm.
[0075] Next, as shown in FIGS. 21(a) and (b), the substrate was ground from the surface that had not been etched to a thickness of 300 μm, thereby forming through holes 121 and 123.
[0076] According to this embodiment, it was possible to obtain liquid ejection chips with a high yield rate, which were free of roughness on the etched side surfaces, which may become foreign matter due to detachment.
[0077] FIG. 22 is a table summarizing the etching conditions in the Bosch process of Example 2.
[0078] <Example 3> In Example 3, differences from Example 1 will be described. Example 3 will be described with reference to Figs. 23 to 26. Fig. 23 is a diagram showing a manufacturing process for a first flow path substrate 111. Figs. 24 and 25 are diagrams showing a manufacturing process for a second flow path substrate 112. Fig. 26 is a diagram showing a summary of Example 3. Example 3 is an example in which the relationship between the etching conditions for forming the flow paths 102 and the non-through holes 103 on the planned cutting lines of the first flow path substrate 111 in Example 1 and the etching conditions for forming the through grooves of the second flow path substrate 112 is specified.
[0079] As shown in Fig. 23(a) and (b), an etching mask resist 130 corresponding to the flow path 102 and the non-through hole 103 on the planned cutting line was formed on the bonding surface side of the first flow path substrate 111 by using a photolithography technique. Furthermore, a section from the bonding surface to the scallop depth Da was formed by using a Bosch process. The etching conditions at this time were as follows: C4F8 gas was used in the coating step, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and a coating time of 3.9 seconds. Next, SF6 gas was used for the coating layer etching, with a gas flow rate of 400 sccm, a chamber pressure of 4.0 Pa, a coil power of 2500 W, and an etching time of 3.5 seconds. Next, SF6 gas was used for silicon etching, with a gas flow rate of 700 sccm, a chamber pressure of 12.0 Pa, a coil power of 2000 W, and an etching time of 10 seconds. Under these conditions, processing was performed to a depth of 450 μm. Under these conditions, the scallop depth Da was 1.2 μm. Thereafter, the same process as in Example 1 was carried out to form a first flow path substrate having a through hole.
[0080] Next, a 725 μm silicon substrate was prepared as the second flow path substrate 112, and an etching mask resist 130 was formed on the surface to be etched by using photolithography technology. Next, as shown in FIG. 24(a) and (b), a section with a scallop depth Db was formed continuously following the Da section by using the Bosch process. The etching conditions at this time were as follows: C4F8 gas was used for the coating step, gas flow rate 400 sccm, chamber pressure 5.2 Pa, coil power 2300 W, coating time 2.1 seconds. Next, SF6 gas was used for the coating layer etching, gas flow rate 400 sccm, chamber pressure 3.8 Pa, coil power 2400 W, etching time 3.3 seconds. Next, SF6 gas was used for silicon etching, gas flow rate 500 sccm, chamber pressure 9.5 Pa, coil power 2140 W, etching time 4.4 seconds. Under these conditions, processing was performed to a depth of 320 μm. The scallop depth Db under these conditions was 0.4 μm. Thereafter, the same process as in Example 1 was carried out to form a second flow path substrate 112 having a through hole.
[0081] According to this embodiment, when the first flow path substrate 111 and the second flow path substrate 112 are bonded together using the adhesive 110, the adhesive 110 that protrudes from the bonding interface is more likely to creep along the wall surface of the second flow path substrate 112 than along the wall surface of the first flow path substrate 111. As a result, the amount of adhesive that flows along the wall surface of the non-through hole 103 can be suppressed, and liquid discharge chip 115 can be obtained in which the adhesive does not accumulate in the opening on the intended cutting line of the first flow path substrate 111 and the occurrence of hardened adhesive protruding from the side surface of the chip is suppressed.
[0082] FIG. 26 is a table summarizing the etching conditions in the Bosch process of Example 3.
[0083] <<Other embodiments>> In the above embodiment, an example has been described in which the unopened grooves on the planned cutting line are formed in the first flow path substrate 111, but this is not limited thereto. The unopened grooves on the planned cutting line may be formed in the second flow path substrate 112. Even in this case, by applying the configuration of each of the above-mentioned embodiments, it is possible to suppress the overflowing lumps of adhesive from remaining in the unopened grooves on the planned cutting line in the second flow path substrate 112. In this way, it is sufficient that an unopened groove is formed on the planned cutting line of one of the first flow path substrate 111 and the second flow path substrate 112, and a through hole is formed on the planned cutting line of the other substrate.
[0084] The disclosure of this embodiment includes configurations typified by the following recording apparatus example and recording apparatus control method example.
[0085] <Configuration 1> a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the second flow path substrate via an adhesive, A recess is formed in a wall surface of the first flow path and a wall surface of the second flow path, The liquid ejection chip, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and the width of the recess.
[0086] <Configuration 2> The liquid ejection chip described in configuration 1, wherein at least one of the depth and width of the recess of the first flow path substrate is 1.5 times or more and 10 times or less of at least one of the depth and width of the recess of the second flow path substrate.
[0087] <Configuration 3> a recess having at least one of two or more different depths and widths is formed on a wall surface of the second flow path of the second flow path substrate; When a bonding surface of the second flow path substrate to the first flow path substrate is defined as a first surface and a surface opposite to the first surface is defined as a second surface, In the second flow path, at least one of the depth and width of the recess on the first surface side < at least one of the depth and width of the recess on the second surface side, The liquid ejection chip according to Configuration 1 or 2, which is such.
[0088] <Configuration 4> A first flow path substrate having an energy generating element that generates energy for ejecting a liquid and a first flow path that supplies the liquid to the energy generating element, A liquid ejection chip in which a second flow path substrate having a second flow path connected to the first flow path is joined via an adhesive, Recesses having at least one of two or more types of depths and widths are formed on the wall surface of at least one of the first flow path and the second flow path, When the bonding surfaces of the first flow path substrate and the second flow path substrate are respectively the first surface, and the surface opposite to the first surface is the second surface, at least one of the depth and width of the recess on the first surface side < at least one of the depth and width of the recess on the second surface side, A liquid ejection chip, which is such.
[0089] <Configuration 5> Let the depth of the recess on the first surface side in at least one of the first flow path substrate and the second flow path substrate be D1, and the width of the recess be W1, When the depth of the recess from the first surface side to the second surface side is D1, D2, ···, Dn, and the width is W1, W2, ···, Wn, and n is 3 or more, The liquid ejection chip according to Configuration 4, wherein D1 < D2 < ··· < Dn or W1 < W2 < ··· < Wn.
[0090] <Configuration 6> When the depth of the recess on the first surface side is D1 and the width is W1, and the depth of the recess on the second surface side is Dn and the width is Wn, Dn > 2D1 or Wn > 2W1. The liquid ejection chip according to Configuration 4 or 5.
[0091] <Configuration 7> The liquid ejection chip according to any one of configurations 1 to 6, wherein the recess is formed continuously around the inner periphery of the opening in a stacking direction in which the first flow path substrate and the second flow path substrate are stacked.
[0092] <Component 8> The liquid ejection chip according to any one of configurations 1 to 7, wherein the depth of the recess is the average depth of the wall surface etched under the same conditions, and the width of the recess is the average width of the wall surface etched under the same conditions.
[0093] <Component 9> a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive; an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate; A recess is formed in each of a wall surface of the first flow path, a wall surface of the second flow path, the groove, and the through hole, A wafer for a liquid ejection head, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and the width of the recess.
[0094] <Component 10> a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive; an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate; a recess having at least one of two or more different depths and widths is formed in a wall surface of at least one of the first flow path and the second flow path, and in the groove and the through hole; When the bonding surfaces of the first flow path substrate and the second flow path substrate are defined as first surfaces and the surfaces opposite to the first surfaces are defined as second surfaces, at least one of the depth and width of the recess on the first surface side is smaller than at least one of the depth and width of the recess on the second surface side, A wafer for liquid ejection.
[0095] <Component 11> a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive, forming recesses on a wall surface of the first flow path and a wall surface of the second flow path, A method for manufacturing a liquid ejection chip, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and the width of the recess.
[0096] <Component 12> a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive, forming a recess having at least one of two or more different depths and widths in a wall surface of at least one of the first flow path and the second flow path, When the bonding surfaces of the first flow path substrate and the second flow path substrate are defined as first surfaces and the surfaces opposite to the first surfaces are defined as second surfaces, at least one of the depth and width of the recess on the first surface side is smaller than at least one of the depth and width of the recess on the second surface side, The manufacturing method of the liquid ejection chip is as follows.
[0097] <Component 13> 13. The method for manufacturing a liquid ejection chip according to claim 11 or 12, wherein the recess is formed using a Bosch process.
[0098] <Component 14> A method for manufacturing a liquid ejection chip according to configuration 13, wherein, as a condition of the Bosch process, when the times of the etching steps for the depths D1, D2, D3, ... Dn of the recesses are E1, E2, E3, ... En, En>...>E3>E2>E1.
[0099] <Component 15> an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate, The method for manufacturing a liquid ejection chip described in any one of configurations 11 to 14, further comprising a step of forming an altered portion inside the first flow path substrate or inside the first flow path substrate and the second flow path substrate by irradiating laser light along the planned cutting line, and cutting and dividing the substrates by applying stress to the altered portion, thereby manufacturing a plurality of the liquid ejection chips. [Explanation of symbols]
[0100] 1: Energy generating element 2: Nozzle layer 3: Flow path layer 102: Flow path 103: Unpierced hole 110: Adhesive 111:First channel board 112:Second channel board
Claims
1. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the second flow path substrate via an adhesive, A recess is formed in a wall surface of the first flow path and a wall surface of the second flow path, The liquid ejection chip, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and the width of the recess.
2. The liquid ejection chip according to claim 1 , wherein at least one of a depth and a width of the recess of the first flow path substrate is 1.5 times or more and 10 times or less of at least one of a depth and a width of the recess of the second flow path substrate.
3. a recess having at least one of two or more different depths and widths is formed on a wall surface of the second flow path of the second flow path substrate; When a bonding surface of the second flow path substrate to the first flow path substrate is defined as a first surface and a surface opposite to the first surface is defined as a second surface, In the second flow path, at least one of the depth and the width of the recess on the first surface side is smaller than at least one of the depth and the width of the recess on the second surface side, The liquid ejection chip according to claim 1 ,
4. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the second flow path substrate via an adhesive, a recess having at least one of two or more different depths and widths is formed in a wall surface of at least one of the first flow path and the second flow path, When the bonding surfaces of the first flow path substrate and the second flow path substrate are defined as first surfaces and the surfaces opposite to the first surfaces are defined as second surfaces, at least one of the depth and width of the recess on the first surface side is smaller than at least one of the depth and width of the recess on the second surface side, This is a liquid ejection chip.
5. A depth of a recess on the first surface side of at least one of the first flow path substrate and the second flow path substrate is defined as D1, and a width of the recess is defined as W1, When the depths of the recesses from the first surface side to the second surface side are D1, D2, ..., Dn and the widths are W1, W2, ..., Wn, and n is 3 or more, 5. The liquid ejection chip according to claim 4, wherein D1<D2< . . . <Dn or W1<W2< . . . <Wn.
6. 5. The liquid ejection chip according to claim 4, wherein when the depth and width of the recess on the first surface side are D1 and W1, respectively, and the depth and width of the recess on the second surface side are Dn and Wn, respectively, Dn>2D1 and Wn>2W1.
7. The liquid ejection chip according to claim 1 , wherein the recess is formed continuously around an inner periphery of the opening in a stacking direction in which the first flow path substrate and the second flow path substrate are stacked.
8. 7. The liquid ejection chip according to claim 1, wherein the depth of the recess is an average depth of a wall surface etched under the same conditions, and the width of the recess is an average width of a wall surface etched under the same conditions.
9. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive; an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate; A recess is formed in each of a wall surface of the first flow path, a wall surface of the second flow path, the groove, and the through hole, A wafer for a liquid ejection head, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and width of the recess.
10. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive; an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate; a recess having at least one of two or more different depths and widths is formed in a wall surface of at least one of the first flow path and the second flow path, and in the groove and the through hole; When the bonding surfaces of the first flow path substrate and the second flow path substrate are defined as first surfaces and the surfaces opposite to the first surfaces are defined as second surfaces, at least one of the depth and width of the recess on the first surface side is smaller than at least one of the depth and width of the recess on the second surface side, That is, a wafer for liquid ejection.
11. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive, forming recesses on a wall surface of the first flow path and a wall surface of the second flow path, A method for manufacturing a liquid ejection chip, wherein the first flow path substrate is larger than the second flow path substrate with respect to at least one of the depth and the width of the recess.
12. a first flow path substrate having an energy generating element that generates energy for ejecting liquid and a first flow path that supplies liquid to the energy generating element; a second flow path substrate having a second flow path connected to the first flow path and bonded to the first flow path substrate via an adhesive, forming a recess having at least one of two or more different depths and widths in a wall surface of at least one of the first flow path and the second flow path, When the bonding surfaces of the first flow path substrate and the second flow path substrate are defined as first surfaces and the surfaces opposite to the first surfaces are defined as second surfaces, at least one of the depth and width of the recess on the first surface side is smaller than at least one of the depth and width of the recess on the second surface side, The manufacturing method of the liquid ejection chip is as follows.
13. The method for manufacturing a liquid ejection chip according to claim 11 or 12, wherein the recess is formed by using a Bosch process.
14. 14. The method for manufacturing a liquid ejection chip according to claim 13, wherein, as a condition of the Bosch process, when the etching step times for the recess depths D1, D2, D3, . . . , Dn are E1, E2, E3, . . . , En, En> . . . > E3> E2> E1.
15. an unopened groove is formed along a planned cutting line of one of the first flow path substrate and the second flow path substrate, and a through hole is formed along the planned cutting line of the other substrate, 12. The method for manufacturing a liquid ejection chip as described in claim 11, further comprising a step of forming an altered portion inside the first flow path substrate or inside the first flow path substrate and the second flow path substrate by irradiating laser light along the planned cutting line, and manufacturing a plurality of the liquid ejection chips by cutting and dividing the substrates by applying stress to the altered portion.
Citation Information
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