Silicon wafer and method for producing the same

Abstract

To provide a silicon wafer suitable for IGBT applications, exhibiting high resistance and small resistance variations, and capable of preventing the occurrence of slip, and a method for producing the silicon wafer.SOLUTION: In a nitrogen level profile in the thickness direction of a silicon wafer, a high nitrogen level region with the maximum nitrogen level of 2×1015 atom / cm-3 or more and 1×1016 atom / cm-3 or less exists within a range from the outermost surface of the rear side of the silicon wafer to a depth of 20 μm in the thickness direction. The nitrogen level is 1×1014 atom / cm-3 or more and 1×1015 atom / cm-3 or less within a range from the outermost surface of the front side of the silicon wafer to a depth of 20 μm in the thickness direction. The oxygen level of the silicon wafer (ASTM F121, 1979) is 1×1017atom / cm-3 or less.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to a silicon wafer and a manufacturing method thereof. [Background technology]

[0002] In recent years, thyristors, bipolar transistors, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), insulated gate bipolar transistors (IGBTs), and other switching devices for power applications have been actively developed. Among these, IGBTs combine the high speed characteristics of MOSFETs with the low saturation voltage characteristics of bipolar transistors, and are attracting attention for applications that require large capacity, high voltage resistance, and high speed switching, such as power supplies for the drive motors of hybrid and electric vehicles.

[0003] An IGBT is a gate voltage-driven switching device (also called a "vertical IGBT") that has a gate electrode and an emitter electrode formed on the front side of a silicon wafer and a collector electrode formed on the back side, and the switching current flows through the entire silicon wafer between the emitter on the front side and the collector on the back side. Therefore, if crystal defects exist inside the silicon wafer, the device characteristics deteriorate, so it is important that the silicon wafer is free of crystal defects from the front side to the back side of the wafer.

[0004] It is also important that the resistivity of the silicon wafer is high and consistent across the entire wafer. In this regard, if the oxygen concentration of the silicon wafer is high, oxygen atoms act as oxygen donors, causing the resistivity of the silicon wafer to fluctuate. Therefore, it is also important that the oxygen concentration of the silicon wafer is low.

[0005] For this reason, as described in Patent Document 1, it has been proposed to obtain silicon wafers with uniform resistivity by irradiating a silicon ingot with a low interstitial oxygen concentration formed by the Czochralski method with a neutron beam to dope it with phosphorus, slicing the wafers, and then annealing the wafers in an oxidizing atmosphere.

[0006] Furthermore, Patent Document 2 proposes a method for producing a silicon single crystal ingot, in which the amount of n-type dopant evaporated from a silicon melt is controlled when the silicon single crystal ingot is pulled up, thereby producing an n-type high-resistance silicon single crystal ingot with uniform resistivity in the pulling length direction.

[0007] Incidentally, it is known that slip is likely to occur when low-oxygen silicon wafers are used to reduce resistance fluctuation. If slip occurs on the backside of the silicon wafer, it will have a significant impact on device yields due to current leakage and positional deviation in the photolithography process. It is believed that the lower the oxygen concentration of the silicon wafer, the smaller the critical resolved shear stress of the silicon wafer, making it more likely for slip to occur.

[0008] From this perspective, attempts have been made to increase the nitrogen concentration rather than the oxygen concentration of silicon wafers, as described in Patent Document 3, but a nitrogen concentration high enough to suppress the occurrence of slips has not been achieved. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2012-134517 A [Patent Document 2] International Publication No. 2018 / 159108 [Patent Document 3] JP 2017-122033 A Summary of the Invention [Problem to be solved by the invention]

[0010] As described above, various methods have been used to manufacture silicon wafers with high resistivity and little resistance variation suitable for IGBT applications. However, with conventional technologies that use silicon wafers with low oxygen concentrations, it has been difficult to prevent the occurrence of slip while maintaining high resistivity and suppressing resistance variation.

[0011] Therefore, an object of the present invention is to provide a silicon wafer suitable for use in IGBTs, which has high resistance, small resistance fluctuation, and is capable of suppressing the occurrence of slip, and a method for manufacturing the silicon wafer. [Means for solving the problem]

[0012] The present inventors have conducted extensive research to solve the above problems. First, nitrogen atoms in a silicon wafer have the effect of increasing slip resistance. A method for increasing the nitrogen concentration in a silicon wafer is known in which a nitride film is formed on the surface of the silicon wafer by heat treating the silicon wafer in a nitrogen atmosphere, and nitrogen atoms diffuse from the nitride film toward the silicon wafer to form a region with a high nitrogen concentration on the surface of the silicon wafer.

[0013] On the other hand, since a device pattern will be formed on the front surface side of the silicon wafer, it is necessary to remove the nitride film formed by the heat treatment in a nitrogen atmosphere. However, it is the back surface side on which the silicon wafer is supported that is the subject of slip generation during IGBT device manufacturing. Therefore, the inventor came up with the idea of ​​forming a high nitrogen concentration region only on the surface layer of the back surface. Based on this idea, the inventor came up with the idea of ​​performing a heat treatment in a nitrogen atmosphere on a silicon wafer with a low oxygen concentration to once increase the nitrogen concentration only on the front surface and the surface layer of the back surface of the silicon wafer, and then removing only the high nitrogen concentration region on the front surface side to obtain a silicon wafer with a high nitrogen concentration region remaining on the back surface side.

[0014] That is, the gist and configuration of the present invention are as follows.

[0015] <1> In the nitrogen concentration profile in the thickness direction of the silicon wafer, The maximum nitrogen concentration is 2×10 15 atom / cm -3 More than 1×10 16 atom / cm -3 The following high nitrogen concentration region exists in a range from the outermost surface of the back surface of the silicon wafer to 20 μm in the thickness direction, The nitrogen concentration in the range from the outermost surface of the front surface of the silicon wafer to 20 μm in the thickness direction is 1×10 14 atom / cm -3 More than 1×10 15 atom / cm -3 is as follows: The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 17 atom / cm -3 Below is a silicon wafer.

[0016] <2> The high nitrogen concentration region exists in a range from the outermost surface of the back surface of the silicon wafer to 15 μm in the thickness direction. <1> 2. The silicon wafer according to claim 1 .

[0017] <3> The resistivity of the silicon wafer is 30 Ω cm or more and 10,000 Ω cm or less. <1> or <2> 2. The silicon wafer according to claim 1 .

[0018] <4> The silicon wafer is free of dislocation clusters and COPs; <1> ~ <3> 2. The silicon wafer according to claim 1 .

[0019] <5> Oxygen concentration (ASTM F121, 1979) is 1×10 17 atom / cm -3 A high nitrogen concentration layer forming step of forming a high nitrogen concentration layer on each of the front and back surfaces of the unpolished silicon wafer by heat treating the unpolished silicon wafer described below in a nitrogen atmosphere; a high nitrogen concentration layer removing step of removing at least a part of the high nitrogen concentration layer in the surface layer portion of the front surface and the back surface of the unpolished silicon wafer after the high nitrogen concentration layer forming step, The maximum nitrogen concentration in the range of 20 μm in the thickness direction from the outermost surface of the back surface of the silicon wafer after the high nitrogen concentration layer removal process is 2×10 15 atom / cm -3 More than 1×10 16 atom / cm -3 is as follows: The nitrogen concentration in the range from the outermost surface of the front surface of the silicon wafer to 20 μm in the thickness direction after the high nitrogen concentration layer removal process is 1×10 14 atom / cm -3 More than 1×10 15 atom / cm -3 The method for producing a silicon wafer is as follows.

[0020] <6> The maximum nitrogen concentration in the range from the top surface of the back surface of the silicon wafer to 15 μm in the thickness direction after the high nitrogen concentration layer removal process is 2 × 10 15 atom / cm -3 More than 1×10 16 atom / cm -3 Below is the <5> 2. A method for producing a silicon wafer according to claim 1 .

[0021] <7> In the high nitrogen concentration layer forming step, the high nitrogen concentration layer is formed by rapid thermal nitridation treatment. <5> or <6> 2. A method for producing a silicon wafer according to claim 1 .

[0022] <8> The high nitrogen concentration layer removal step includes a double-sided polishing step of simultaneously polishing the front and back surfaces of the unpolished silicon wafer using a double-sided polishing machine. <5> ~ <7> 13. The method for producing a silicon wafer according to claim 12,

[0023] <9> In the high nitrogen concentration layer removing step, The amount of polishing of the front surface is 10 μm or more and 12 μm or less, The amount of polishing of the back surface is 4 μm or more and 8 μm or less. <5> ~ <8> 13. The method for producing a silicon wafer according to claim 12,

[0024] <10> The pre-polished silicon wafer is a silicon wafer manufactured by the FZ method. <5> ~ <9> 13. The method for producing a silicon wafer according to claim 12, Effect of the Invention

[0025] According to the present invention, it is possible to provide a silicon wafer suitable for use in IGBTs, which has high resistance, small resistance fluctuation, and is capable of suppressing the occurrence of slip, and a method for manufacturing the silicon wafer. [Brief description of the drawings]

[0026] [Figure 1] 1 is a graph showing nitrogen concentration profiles in the thickness direction of silicon wafers in preliminary experiments 1 to 6. [Diagram 2] FIG. 13 is a diagram showing an observation diagram of slip length on a silicon wafer surface in preliminary experiment 1 by X-ray topography observation. [Diagram 3] 1 is a graph showing the slip lengths of silicon wafers in preliminary experiments 1 to 6. [Figure 4] 13 is a graph showing calculated values ​​of nitrogen concentration profiles in the thickness direction of silicon wafers in preliminary experiments 4 to 6. [Diagram 5] 1A to 1C are schematic cross-sectional views illustrating a method for manufacturing a silicon wafer according to an embodiment of the present invention. [Figure 6] 1A is a schematic cross-sectional view of a silicon wafer after heat treatment, and FIG. 1B is a schematic diagram showing a nitrogen concentration profile in the thickness direction. [Figure 7] 1A is a schematic cross-sectional view of a silicon wafer after SMP processing, and FIG. 1B is a schematic diagram showing a nitrogen concentration profile in the thickness direction. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Prior to the description of this embodiment, the following preliminary experiment was carried out in order to confirm the relationship between the nitrogen concentration profile in the thickness direction of a silicon wafer and the occurrence of slips.

[0028] <Preliminary experiment> In order to confirm the relationship between the nitrogen concentration profile in silicon wafers and the occurrence of slip, a silicon wafer with a diameter of 200 mm and an oxygen concentration (ASTM F121, 1979) of 1.0×10 16 atoms / cm 3 Silicon wafers were prepared using the following FZ method. Here, the "oxygen concentration of silicon wafer" is a value measured using Fourier transform infrared spectroscopy (FTIR) in accordance with ASTM F121-1979. In order to change the nitrogen concentration in the surface layer of these silicon wafers, preliminary experiment 1 was performed without heat treatment, and preliminary experiments 2 to 6 were performed with different heat treatment conditions. In addition, in order to suppress the outward diffusion of nitrogen in the silicon wafer during temperature reduction in the surface layer of the silicon wafer, heat treatment was performed using rapid thermal nitridation (RTN) processing.

[0029] [Preliminary experiment 1] In preliminary experiment 1, the prepared silicon wafer was used as is, and no heat treatment was performed.

[0030] [Preliminary experiment 2] In preliminary experiment 2, the prepared silicon wafers were heated to 1,050°C in 20 seconds using an RTN furnace for rapid thermal nitridation, heat-treated at that temperature for 30 seconds, and then cooled to room temperature in 13 seconds.

[0031] [Preliminary experiment 3] In preliminary experiment 3, the prepared silicon wafer was heated to 1050°C in 20 seconds using an RTN furnace, heat-treated at that temperature for 120 seconds, and then cooled to room temperature in 13 seconds.

[0032] [Preliminary experiment 4] In preliminary experiment 4, the prepared silicon wafer was heated to 1150°C in 22 seconds using an RTN furnace, heat-treated at that temperature for 30 seconds, and then cooled to room temperature in 15 seconds.

[0033] [Preliminary experiment 5] In preliminary experiment 5, the prepared silicon wafer was heated to 1150° C. in 22 seconds using an RTN furnace, heat-treated at that temperature for 60 seconds, and then cooled to room temperature in 15 seconds.

[0034] [Preliminary experiment 6] In preliminary experiment 6, the prepared silicon wafer was heated to 1250° C. in 24 seconds using an RTN furnace, heat-treated at that temperature for 30 seconds, and then cooled to room temperature in 16 seconds.

[0035] FIG. 1 is a graph showing the results of measuring the nitrogen concentration profile in the thickness direction of the surface layer of each silicon wafer after each heat treatment in preliminary experiments 1 to 6 using secondary ion mass spectrometry (SIMS). The silicon wafer of preliminary experiment 1, which was not heat treated, had a nitrogen concentration of 6×10 14 (atoms / cm 3 ) is present in the bulk. In the 1050°C treatment, the concentration in the surface layer decreased due to outward diffusion. At temperatures above 1150°C, it was found that the higher the temperature, the higher the nitrogen concentration due to inward diffusion.

[0036] Then, to simulate the general heat treatments used in IGBT device manufacturing, two heat treatments were performed in a vertical furnace, at 1150°C and 450°C, on the silicon wafers after each heat treatment in preliminary experiments 1 to 6, and the slip length from the contact scratches with the boat supporting the silicon wafer was examined. Here, the slip length was measured from an X-ray topography image. Figure 2 shows an observation image of the measurement of the slip length of the silicon wafer prepared in preliminary experiment 1, and the slip length can be confirmed from three points on the boat contact area.

[0037] Similar observations were also made for Preliminary Experiments 1 to 6. Figure 3 is a graph comparing the slip lengths observed at three points in the boat contact area, and indicates that the shorter the slip length, the higher the slip resistance.

[0038] From these results, it was found that the slip resistance of silicon wafers can be improved by increasing the nitrogen concentration in the region up to a certain depth near the surface of the silicon wafer. In particular, by performing RTN at 1150°C to 1250°C, the nitrogen concentration in the region up to 15 μm from the outermost surface in the thickness direction of the silicon wafer can be increased to 2×10 15 atom / cm -3 More than 1×10 16 atom / cm -3 It has been found that the slip resistance of the silicon wafer can be sufficiently increased by doing so.

[0039] <Prediction of nitrogen concentration in silicon wafers> In addition, it is expected that the nitrogen concentration profile in the silicon wafer decreases with increasing depth from the surface due to the heat treatment in a nitrogen atmosphere. However, the nitrogen concentration profile that can be measured by SIMS is limited to the range near the surface of the silicon wafer. Therefore, the nitrogen concentration at a deeper position in the thickness direction from the surface of the silicon wafer was predicted by calculating the inward diffusion of nitrogen using a general method. Figure 4 shows the calculated nitrogen concentration profile inside the silicon wafer of preliminary experiments 4 to 6. The profile shown by the broken line near the surface is the actual measured value, and the profile shown by the curve throughout the depth direction is the calculated value derived from the heat treatment conditions of each confirmation experiment. As can be seen from this result, the nitrogen concentration can be roughly predicted throughout the entire thickness direction of the silicon wafer by solving the diffusion calculation. Using this predicted value, the polishing amount required to expose a surface with the desired nitrogen concentration can be estimated. Therefore, for example, the front surface where a high nitrogen concentration region is not required can be ground and polished until the high nitrogen concentration region is eliminated, and the back surface of the silicon wafer where a high nitrogen concentration region is preferably exposed can be ground and polished to the extent that the high nitrogen concentration region is exposed. Therefore, by heat treating a silicon wafer with a low oxygen concentration in a nitrogen atmosphere, the nitrogen concentration of only the surface layer of the front surface and back surface of the silicon wafer is once increased, and then only the high nitrogen concentration region on the front surface side is removed while leaving the high nitrogen concentration region on the back surface side, the resistance of the entire wafer can be high and resistance fluctuations can be suppressed, and further, slip generation on the back surface side of the wafer, which is a concern in the IGBT device manufacturing process, can be suppressed.

[0040] (Silicon wafer manufacturing method) Based on the above preliminary experiment results, the method for manufacturing a silicon wafer according to the present embodiment will be described in detail below with reference to the drawings. In principle, identical components are given the same reference numbers with the last two digits, and duplicated explanations will be omitted. In addition, in Figs. 5 to 7, the thickness of each component is shown exaggerated from the actual thickness ratio in order to simplify the drawings. The method for manufacturing a silicon wafer according to the present invention is carried out in a silicon wafer having an oxygen concentration (ASTM F121, 1979) of 1 x 10 17 atom / cm -3 and a high nitrogen concentration layer removal step of removing at least a part of the high nitrogen concentration layer in the surface layer portion of the front surface and the back surface of the unpolished silicon wafer after the high nitrogen concentration layer formation step, wherein the maximum value of the nitrogen concentration in a range of 20 μm in the thickness direction from the outermost surface of the back surface of the silicon wafer after the high nitrogen concentration layer removal step is 2×10 15 atom / cm -3 More than 1×10 16 atom / cm -3 The nitrogen concentration in the range from the outermost surface of the front surface of the silicon wafer to 20 μm in the thickness direction after the high nitrogen concentration layer removal process is 1×10 14 atom / cm -3 More than 1×10 15 atom / cm -3 The present invention is characterized by the following: Each configuration and each step of the present invention will be described in detail below.

[0041] In the method for manufacturing a silicon wafer according to this embodiment, a heat treatment is applied to the silicon wafer, and finally, a high nitrogen concentration region is formed only on the back surface of the silicon wafer. In one embodiment shown in FIG. 5 as an example, a high nitrogen concentration layer 112 on the front surface side and a high nitrogen concentration layer 113 on the back surface side are formed by heat treatment on each surface layer of the front surface and back surface of the unpolished silicon wafer 110. Then, the front surface of the unpolished silicon wafer 110 is ground by using a grinding device, with the grinding amount set so that the high nitrogen concentration layer is removed and the high nitrogen concentration layer is left on the back surface. Then, double-sided polishing and single-sided polishing are performed to adjust the surface roughness of the front surface outermost surface 110a of the low nitrogen concentration region. Details of each process in the first embodiment will be described in order below. Grinding is a process of grinding the wafer using a hard grindstone for the purpose of removing the nitride film formed on the wafer surface and adjusting the thickness of the wafer. Polishing is a process of polishing the wafer using a soft polishing cloth for the purpose of adjusting the flatness of the wafer.

[0042] <Unpolished silicon wafer> As the unpolished silicon wafer 110 used in the manufacture of silicon wafers according to the present invention, a single crystal silicon wafer cut from a silicon single crystal can be used. The single crystal silicon wafer can be one sliced ​​by a wire saw or the like from a single crystal silicon ingot grown by the Czochralski method (CZ method) or the floating zone melting method (FZ method). From the viewpoint of using it as a low-oxygen silicon wafer, it is preferable to use a silicon wafer manufactured by the FZ method. The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 17 atom / cm -3 is less than or equal to 2 x 10 16 atom / cm -3 It is preferable that the value is less than 1×10 16 atom / cm -3It is more preferable that the thickness is less than or equal to 100 nm. Here, when the silicon wafer is used for a vertical device, if there is a defect in any region in the vertical direction of the device formation region, a leakage current occurs through the defect, which affects the device characteristics. Therefore, from the viewpoint of obtaining better device characteristics, it is preferable that the pre-polished silicon wafer 110 is a silicon wafer that does not contain dislocation clusters and vacancy agglomeration defects (COP: Crystal Originated Particle).

[0043] Here, in this specification, the term "silicon wafer not containing COP" refers to a silicon wafer in which no COP is detected by the observation evaluation described below. That is, first, a silicon wafer cut from a single crystal silicon ingot grown by the CZ method is subjected to SC-1 cleaning (i.e., cleaning with a mixed solution of ammonia water, hydrogen peroxide water, and ultrapure water in a ratio of 1:1:15), and the surface of the silicon wafer after cleaning is observed and evaluated using a surface defect inspection device: Surfscan SP-2 manufactured by KLA-Tencor, to identify light point defects (LPDs) estimated to be surface pits. At this time, the observation mode is set to oblique mode (oblique incidence mode), and the estimation of the surface pits is performed based on the detection size ratio of the wide-narrow channel. The LPDs thus identified are evaluated as to whether they are COPs or not using an atomic force microscope (AFM). A silicon wafer in which no COP is observed by this observation evaluation is defined as a "silicon wafer not containing COPs".

[0044] On the other hand, dislocation clusters are large (approximately 10 μm) defects (dislocation loops) formed as agglomerates of excess interstitial silicon. The presence or absence of dislocation clusters can be easily confirmed at the visual level by performing etching processes such as secco etching or by making them visible through Cu decoration.

[0045] <High nitrogen concentration layer formation process> The high nitrogen concentration layer forming step is a step of heat treating the pre-polished silicon wafer 110 in a nitrogen atmosphere to form a high nitrogen concentration layer in the surface layer of each of the front and back surfaces of the pre-polished silicon wafer 110. Although the heat treatment in this step can be performed using a batch-type heat treatment device (vertical heat treatment device, horizontal heat treatment device) or the like, it is preferable to perform the heat treatment using a rapid temperature increase and decrease heat treatment device (RTA (Rapid Thermal Annealing) furnace) capable of rapid thermal nitriding (RTN) in which the wafer is heated in a nitrogen atmosphere. The furnace may contain an inert gas in addition to nitrogen gas, and the heat treatment temperature is preferably 1100°C or higher, more preferably 1150°C or higher. Moreover, this heat treatment temperature is preferably 1350°C or lower, more preferably 1300°C or lower. The heat treatment time may be set appropriately depending on the furnace to be used, and for example, the heat treatment time in the RTN furnace is preferably 10 seconds or higher, more preferably 30 seconds or higher. Similarly, it is preferably 150 seconds or lower, more preferably 120 seconds or lower. In addition, in order to perform the rapid thermal nitridation treatment, the time required for heating up to the maximum temperature is preferably 24 seconds or less, more preferably 20 seconds or less. Similarly, in order to perform the rapid thermal nitridation treatment, the time required for cooling down from the maximum temperature to room temperature is preferably 16 seconds or less, more preferably 13 seconds or less. In the case of the heat treatment using a batch-type heat treatment device, the heat treatment time is preferably 10 minutes or more and 3 hours or less. In addition, the high nitrogen concentration layers formed on each surface in the high nitrogen concentration layer forming step are preferably formed in each region up to 20 μm in the thickness direction from the outermost surface of the front surface and back surface of the silicon wafer.

[0046] In the high nitrogen concentration layer forming step, as shown in Fig. 6, nitrogen in the furnace diffuses inward into the surface layer portions of the front and back surfaces of the unpolished silicon wafer 110, forming a front surface-side high nitrogen concentration layer 112 and a back surface-side high nitrogen concentration layer 113 in the surface layer portions of each surface. The higher the heat treatment temperature, the higher the nitrogen concentration in the surface layer portions of the unpolished silicon wafer 110, and nitrogen is diffused to the outermost surface of the unpolished silicon wafer 110. By heat treating the unpolished silicon wafer, the nitrogen concentration in the nitrogen concentration profile in the thickness direction of the unpolished silicon wafer 110 increases to 2 x 10 15 atom / cm -3 A high nitrogen concentration layer is formed as described above. Figure 6 shows a schematic diagram of a silicon wafer on which a front surface side high nitrogen concentration layer 112 and a back surface side high nitrogen concentration layer 113 are formed, together with a schematic conceptual diagram of the nitrogen concentration profile in the thickness direction of the silicon wafer on which each high nitrogen concentration layer is formed. As shown in Figure 6, the concentration profile of nitrogen diffused inwardly into the silicon wafer has peaks in the surface layer portions of both the front and back surfaces.

[0047] <High nitrogen concentration layer removal process> In the high nitrogen concentration layer removal step, as shown in FIG. 7, after the high nitrogen concentration layer formation step, at least a part of the high nitrogen concentration layer on the front and back surfaces of the silicon wafer before polishing is removed. In the grinding and polishing of the front surface of the silicon wafer, after double-sided polishing (DSP) is performed on the front and back surfaces of the silicon wafer, the front surface of the silicon wafer is generally polished by single-sided polishing (SMP). By performing double-sided polishing, the nitride film on the front and back surfaces of the silicon wafer is removed, and at the same time, processing distortion is removed, thereby ensuring a predetermined flatness, and by performing single-sided polishing only on the front surface, the front surface of the silicon wafer can be made to have a predetermined surface roughness. However, if double-sided polishing is performed so that the polishing removal amount on the front and back surfaces is the same, the high nitrogen concentration layer remains on the front surface of the silicon wafer used as the device active layer, and the nitrogen atoms of the high nitrogen concentration layer cause fluctuations in the resistivity of the wafer and the appearance of surface defects such as precipitates, and the wafer cannot be used as a product. In this embodiment, in the high nitrogen concentration layer removal step, the wafer after heat treatment is ground on one side at a time in order to remove only the front side high nitrogen concentration layer 112 out of the front side high nitrogen concentration layer 112 and the back side high nitrogen concentration layer 113 formed in the high nitrogen concentration layer formation step, and then a double-sided polishing step is performed to adjust the flatness. In the double-sided polishing step, conditions may be set such that the polishing speed of the front side of the silicon wafer is faster than the polishing amount of the back side of the silicon wafer. For this purpose, for example, the use conditions can be changed between the upper polishing platen and the lower polishing platen. Specifically, the type of polishing pad can be such that a fixed abrasive pad with abrasive grains embedded therein is adopted only for the upper polishing pad, or a combination of a urethane pad and a nonwoven fabric / suede can be appropriately used for the upper and lower polishing plates. In addition, such an object can be achieved by providing a difference in pressure or rotation speed between the upper and lower polishing platens. By performing processing under these conditions, it is possible to remove all of the high nitrogen concentration layer 112 on the front surface side of the silicon wafer, while fine-tuning the degree to which the high nitrogen concentration layer is removed in order to leave the high nitrogen concentration region 114 on the back surface side.In addition, the removal of the high nitrogen concentration layer 112 on the front surface side in the high nitrogen concentration layer removal step may be performed by any method other than polishing, such as etching, and is not limited to polishing.

[0048] Furthermore, by performing rapid thermal nitridation using an RTN furnace as described above, a high nitrogen concentration layer can be localized near the surface of the silicon wafer, so that the amount of polishing of the front and back surfaces of the silicon wafer after the high nitrogen concentration layer forming step can be reduced. The amount of polishing of the front surface of the silicon wafer before polishing in the high nitrogen concentration layer removing step can be 15 μm or less, and preferably 10 μm or more and 12 μm or less. Similarly, the amount of polishing of the back surface of the silicon wafer before polishing in the high nitrogen concentration layer removing step can be 10 μm or less, and preferably 4 μm or more and 8 μm or less.

[0049] The maximum nitrogen concentration in the range of 20 μm in the thickness direction from the top surface of the back surface of the silicon wafer after the high nitrogen concentration layer removal process was 2 × 10 15 atom / cm -3 More than 1×10 16 atom / cm -3 The maximum nitrogen concentration is 3×10 15 atom / cm -3 It is preferable to set the value to 4×10 or more. 15 atom / cm -3 More preferably, it should be 9×10 or more. 15 atom / cm -3 It is preferable to set it to 8×10 or less. 15 atom / cm -3 The range of the nitrogen concentration after the high nitrogen concentration layer removal step is preferably a range of 18 μm in the thickness direction from the outermost surface of the back surface of the silicon wafer, and more preferably a range of 15 μm in the thickness direction from the outermost surface.

[0050] On the other hand, the nitrogen concentration in the range from the top surface to 20 μm in the thickness direction of the silicon wafer after the high nitrogen concentration layer removal process is 1 × 10 14 atom / cm -3 More than 1×1015 atom / cm -3 is less than or equal to 2 x 10 14 atom / cm -3 It is preferable to set the value to 3×10 or more. 14 atom / cm -3 More preferably, it should be 9×10 or more. 14 atom / cm -3 It is preferable to set it to 8×10 or less. 14 atom / cm -3 It is more preferable to set it as follows:

[0051] In this way, by removing only the high nitrogen concentration layer on the front surface while leaving a high nitrogen concentration region on the back surface side, it is possible to manufacture a silicon wafer that is suitable for IGBT applications, has high resistance, small resistance fluctuation, and can suppress the occurrence of slip.

[0052] Next, a silicon wafer that can be obtained by the embodiment of the manufacturing method described above will be specifically described.

[0053] (Silicon wafer) In the silicon wafer according to the present invention, the maximum nitrogen concentration is 2×10 in the nitrogen concentration profile in the thickness direction of the silicon wafer. 15 atom / cm -3 More than 1×10 16 atom / cm -3 The following high nitrogen concentration region exists in the range from the top surface of the back surface of the silicon wafer to 20 μm in the thickness direction, and the nitrogen concentration in the range from the top surface of the front surface of the silicon wafer to 20 μm in the thickness direction is 1×10 14 atom / cm -3 More than 1×10 15 atom / cm -3 The oxygen concentration of silicon wafers (ASTM F121, 1979) is 1×10 17 atom / cm -3The silicon wafer is as follows. Each component will be described in detail below. Here, since the proportion of the high nitrogen concentration region of the back surface layer portion to the entire silicon wafer is small, the oxygen concentration of the entire silicon wafer may be considered to be substantially the same as the oxygen concentration of the silicon wafer before heat treatment or the like is performed.

[0054] <Oxygen concentration in silicon wafers> Since the oxygen concentration of a silicon wafer remains almost unchanged before and after the high nitrogen concentration layer formation process and the polishing process in the manufacture of the silicon wafer, the oxygen concentration of the silicon wafer can be the value measured before the high nitrogen concentration layer is formed. Here, the oxygen concentration refers to the oxygen concentration measured by FT-IR.

[0055] <Silicon wafer resistivity> The resistivity of the silicon wafer is preferably 30 Ω·cm or more and 10,000 Ω·cm or less. Here, the resistivity is measured by the four-probe method. Specifically, the resistivity can be measured by measuring the central part of the front surface of the silicon wafer by the four-probe method.

[0056] In the case of the wafer according to the present invention, although slip generation is a concern in low-oxygen silicon wafers, the wafer has a high nitrogen concentration region on the back surface side, which suppresses slip generation, and there is no resistance fluctuation other than in the surface layer portion of the back surface of the wafer, making it suitable for use in IGBT devices. [Industrial Applicability]

[0057] According to the present invention, it is possible to provide a silicon wafer suitable for use in IGBTs, which has little resistance variation and can suppress the occurrence of slip, and a method for manufacturing the same. [Explanation of symbols]

[0058] 110 Unpolished silicon wafer 110a Front surface 112 High nitrogen concentration layer on the front side 113 High nitrogen concentration layer on the back side 114 High nitrogen concentration area on the back side

Claims

1. In the nitrogen concentration profile in the thickness direction of the silicon wafer, The maximum nitrogen concentration is 2 x 10 １５ atom / cm －３ Above 1 x 10 １６ atom / cm －３ The following high nitrogen concentration region exists in a range from the outermost surface of the back surface of the silicon wafer to 20 μm in the thickness direction, The nitrogen concentration in the range from the outermost surface of the front surface of the silicon wafer to 20 μm in the thickness direction is 1×10 １４ atom / cm －３ Above 1 x 10 １５ atom / cm －３ is as follows: The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 １７ atom / cm －３ Below is a silicon wafer.

2. 2. The silicon wafer according to claim 1, wherein the high nitrogen concentration region is present in a range from the outermost surface of the back surface of the silicon wafer to 15 μm in a thickness direction.

3. 2. The silicon wafer according to claim 1, wherein the resistivity of the silicon wafer is not less than 30 Ω·cm and not more than 10,000 Ω·cm.

4. 2. The silicon wafer of claim 1, wherein the silicon wafer is free of dislocation clusters and COPs.

5. Oxygen concentration (ASTM F121, 1979) is 1 x 10 １７ atom / cm －３ A high nitrogen concentration layer forming step of forming a high nitrogen concentration layer on each of the front and back surfaces of the unpolished silicon wafer by heat treating the unpolished silicon wafer described below in a nitrogen atmosphere; a high nitrogen concentration layer removing step of removing at least a part of the high nitrogen concentration layer in the surface layer portion of the front surface and the back surface of the unpolished silicon wafer after the high nitrogen concentration layer forming step, The maximum nitrogen concentration in the range of 20 μm in the thickness direction from the outermost surface of the back surface of the silicon wafer after the high nitrogen concentration layer removal process is 2×10 １５ atom / cm －３ Above 1 x 10 １６ atom / cm －３ is as follows: After the high nitrogen concentration layer removal step, the nitrogen concentration in the range from the outermost surface of the front surface of the silicon wafer to 20 μm in the thickness direction is 1×10 １４ atom / cm －３ Above 1 x 10 １５ atom / cm －３ The method for manufacturing a silicon wafer is as follows.

6. The maximum nitrogen concentration in the range from the outermost surface of the back surface of the silicon wafer to 15 μm in the thickness direction after the high nitrogen concentration layer removal process is 2×10 １５ atom / cm －３ Above 1 x 10 １６ atom / cm －３ The method for producing a silicon wafer according to claim 5, wherein:

7. 6. The method for producing a silicon wafer according to claim 5, wherein in the high nitrogen concentration layer forming step, the high nitrogen concentration layer is formed by rapid thermal nitridation treatment.

8. 6. The method for producing a silicon wafer according to claim 5, wherein the high nitrogen concentration layer removing step includes a double-sided polishing step of simultaneously polishing the front and back surfaces of the unpolished silicon wafer using a double-sided polishing machine.

9. In the high nitrogen concentration layer removing step, The amount of polishing of the front surface is 10 μm or more and 12 μm or less, The method for producing a silicon wafer according to claim 5, wherein the amount of polishing of the back surface is 4 μm or more and 8 μm or less.

10. 6. The method for producing a silicon wafer according to claim 5, wherein the unpolished silicon wafer is a silicon wafer produced by an FZ method.

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