Photonic Ising Computation Engine with Optical Phased Array

The photonic processor computing engine with PICs and OPAs efficiently solves NP-hard problems by leveraging optical phased arrays and focal plane arrays, offering a compact and scalable solution for Ising and XY models, surpassing conventional systems in speed and efficiency.

JP2024546421AInactive Publication Date: 2024-12-24RAYTHEON BBN TECHNOLOGIES CORP
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Patent Information

Application Number
JP2024527337
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2021-11-10
Filing Date
2022-11-10
Publication Date
2024-12-24
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Conventional computing systems struggle to efficiently solve computationally difficult problems like NP-hard problems due to inefficiencies, instability, and high power consumption, especially when implemented in bulk optics, with existing spatial light modulators being large and slow.

Method used

A photonic processor computing engine using photonic integrated circuits (PICs) with optical phased arrays (OPAs) and focal plane arrays (FPAs) to compute Ising Hamiltonians, featuring electronic control circuits for phase and amplitude calibration, enabling real-time solution of Ising and XY models with high efficiency.

Benefits of technology

The proposed architecture provides a compact, scalable, and reliable solution for NP-hard problems, outperforming conventional methods in speed and size while reducing power consumption, allowing for efficient computation of Ising and XY Hamiltonians.

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Abstract

The photonic processor computing engine device may include a photonic integrated circuit including an optical phased array having a plurality of emitting pixels that emit optical signal beams. Each of the emitting pixels may include an optical antenna and an optical phase modulator. The engine may include an electronic control circuit positioned to receive the optical signal beams transmitted from the emitting pixels. The computing engine may further include an electronic feedback circuit in electrical communication with the focal plane array (FPA) and an electronic control circuit to process a measured intensity of the optical signal beam received from the optical phased array by the focal plane array and provide a feedback signal to the electronic control circuit based on the measured intensity for recalibrating the optical phase modulators of the plurality of emitting pixels to control the phase of the optical signal beams emitted by the plurality of emitting pixels.
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Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Patent Application No. 63 / 278,033, filed November 10, 2021, the entire contents of which are incorporated herein by reference. [Background technology]

[0002] In computational complexity theory, a computationally hard or computationally intensive problem is a particular algorithm that cannot be solved efficiently by typical computer systems and methods. Such problems are also known as NP-hard problems (i.e., nondeterministic polynomial-time hard problems). Such computationally hard problems cannot be solved "efficiently" if their running time is not upper bounded by a polynomial in the size of the input to the algorithm. In other words, an NP-hard problem is a problem whose solution time increases at a rate greater than polynomial with problem size. Such problems appear in finance, economics, cryptography, medicine, biology, and other scientific and social applications.

[0003] Due to the computational inefficiencies of typical computing systems and methods, these computationally hard problems tend to be solved using other methods. For example, such problems can be mapped to the Ising mathematical model in statistical mechanics. In the Ising model, a solution to the NP-hard problem encoded as an Ising model and an Ising spin glass matrix within the Ising model can be generated by solving for the ground state energy (e.g., lowest energy state) of the model using a Hamiltonian function known in the art. Solving the problem involves exciting (e.g., multiplying) the Ising spin glass matrix with a combination of binary values ​​(e.g., spins) and iteratively arriving at the lowest energy state for the particular problem.

[0004] As will be appreciated by those skilled in the art, the XY-model extends the concepts of the Ising model and the Ising spin glass by providing a continuum of values ​​in the problem. For example, rather than being limited to binary spin states with values ​​of 0 and 1, a class of computationally hard problems that project values ​​onto variable non-binary values ​​can be solved in this manner as well, and are referred to in the art as XY-model problems. The discussion herein applies to both the Ising spin model and the XY-model. Summary of the Invention [Problem to be solved by the invention]

[0005] Various systems and methods have been investigated to solve the Hamiltonian energy in the Ising model to provide a solution to the computationally intractable problem. Techniques using cryogenics, electronics, arrays of coupled parametric oscillators, and matrix-vector multiplication have been used to perform this analog or mixed-signal calculation. However, such techniques have proven to be unstable, introduce additional errors in implementation, or are cumbersome and / or consume undesirably large amounts of power. These techniques are even more difficult to realize in practice in bulk optics due to undesirable drift and difficult alignment issues. These techniques require a large number of iterative calculations, such as the 100-nm lattice, which is a large number of iterative calculations. 2 Further losses occur when expanding by a factor of , where N is the number of Ising spins in the Ising spin glass matrix. Conventional commercially available spatial light modulators (SLMs) and focal plane arrays have shown promise and efficiency for computing the Ising energy Hamiltonian with a very large number of Ising variables. However, commercially available spatial light modulators are large and slow compared to other on-chip photonic devices. Thus, there is a continuing need in the technology field for faster, more efficient, and more compact architectures that can be used to solve the ground state energy of the Ising model. [Means for solving the problem]

[0006] Features and advantages of the technology will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, which together illustrate, by way of example, features of the technology. [Brief description of the drawings]

[0007] [Figure 1] 1 shows a schematic diagram of an optical PIC radiation transmitter and receiver, and a focal plane array according to an example of the present disclosure.

[0008] [Diagram 2] FIG. 1 illustrates a perspective view of a photonic integrated circuit based optical device according to an example of the present disclosure.

[0009] [Diagram 3] 3 shows a perspective view of the inside of the photonic integrated circuit-based optical device of FIG. 2.

[0010] [Figure 4] 3 shows a partial exploded view of the photonic integrated circuit-based optical device of FIG. 2.

[0011] [Diagram 5] FIG. 3 shows a schematic diagram of an optical phased array (OPA) in a photonic integrated circuit.

[0012] [Figure 6] FIG. 6 illustrates a top view of a portion of the optical phased array of FIG. 5 in accordance with an example of the present disclosure.

[0013] [Figure 7] 1 illustrates a schematic diagram of a photonic processor computing engine according to an example of the present disclosure.

[0014] [Figure 8] FIG. 8 shows a schematic diagram of the photonic processor computing engine of FIG.

[0015] [Figure 9]1 illustrates a schematic diagram of a photonic processor computing engine according to an example of the present disclosure.

[0016] [Figure 10] FIG. 1 illustrates a plan view of a portion of an optical phased array in accordance with an example of the present disclosure.

[0017] [Figure 11] FIG. 11 illustrates a perspective view of a portion of the optical phased array of FIG.

[0018] [Figure 12] FIG. 1 illustrates a plan view of a portion of an optical phased array in accordance with an example of the present disclosure.

[0019] [Figure 13] FIG. 1 illustrates an isometric view of a photonic processor computing engine according to an example of the present disclosure.

[0020] [Figure 14] FIG. 1 illustrates an isometric view of a photonic processor computing engine according to an example of the present disclosure.

[0021] [Figure 15] 1 illustrates a computer-implemented method according to an example of the present disclosure.

[0022] Although specific language is used herein to describe the same with reference to the examples illustrated herein, it should nevertheless be understood that no limitation of the scope of the invention is thereby intended. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] An initial overview of the inventive concepts is provided below, followed by a more detailed description of specific embodiments. This initial overview is intended to aid the reader in understanding the embodiments more quickly, but is not intended to identify key features or essential features of the embodiments, nor is it intended to limit the scope of the claimed subject matter.

[0024] Given the above limitations of current technology, there is a need for smaller, more efficient, and more reliable architectures for solving the ground energy state of the Ising spin glass matrix to better solve computationally intensive problems using smaller and more scalable computation engines. Described herein are exemplary photonic phased array architectures integrated with focal plane arrays (FPAs), which can serve as efficient hardware implementations of analog computing / processor computing engines for computing the energy Hamiltonian of the Ising spin glass matrix in the Ising model and finding the ground state energy of the Ising spin glass matrix. This application describes novel devices, systems, and methods that incorporate photonic optical phased arrays (OPAs) into hardware architectures that can compute the Ising Hamiltonian in real time with high computational efficiency.

[0025] In one example of the present disclosure, the photonic processor computing engine device may include a photonic integrated circuit (PIC). The photonic integrated circuit (PIC) may include an optical phased array (OPA) including a plurality of emitting pixels that emit optical signal beams based on electromagnetic radiation. Each of the plurality of emitting pixels may include an optical antenna and an optical phase modulator. The photonic integrated circuit (PIC) may further include an electronic control circuit in electrical communication with the optical phased array (OPA) to calibrate and control the optical phase modulator of the optical phased array (OPA) and a focal plane array (FPA) positioned to receive the optical signal beams emitted from the plurality of emitting pixels. The photonic integrated circuit (PIC) may further include an electronic feedback circuit in electrical communication with the focal plane array (FPA) and the electronic control circuit, and may process a measured intensity of the optical signal beam received from the optical phased array (OPA) by at least a portion (e.g., a defined portion) of the focal plane array (FPA), and provide a feedback signal to the electronic control circuit based on the measured intensity for recalibrating the optical phase modulators of the plurality of emitting pixels, and control the phase of the optical signal beams emitted by the plurality of emitting pixels.

[0026] In some examples, the photonic processor computing engine device may further include a lens assembly comprising one or more lenses and disposed between the photonic integrated circuit (PIC) and the focal plane array (FPA) to project the far field of the optical signal beams from the emitting pixels onto the focal plane array (FPA).

[0027] In some examples, the photonic processor computing engine device may further include multiple layers. The multiple layers may include a photonic layer including an optical phased array (OPA) and an electronic layer including an electronic control circuit disposed on a surface of the photonic layer. The electronic control circuit may include a digital readout integrated circuit (DRIIC) board in electrical communication with each optical phase modulator of the emissive pixel, the digital readout integrated circuit configured to apply a voltage to control each optical phase modulator.

[0028] In some examples, the electronic layer includes one or more CMOS circuits.

[0029] In some examples, the photonic integrated circuit PIC may further include a plurality of optical waveguides each optically coupled to a cascaded waveguide tree including one of a plurality of emissive pixels of an optical phased array (OPA) and an electromagnetic radiation inlet configured to receive electromagnetic radiation from an electromagnetic radiation source, and a plurality of waveguide branches in optical communication with the electromagnetic radiation inlet and the plurality of optical waveguides.

[0030] In some examples, the photonic processor computing engine device may further include a main optical waveguide configured to communicate with the electromagnetic radiation source to receive electromagnetic radiation from the electromagnetic radiation source, and a plurality of branch optical waveguides optically coupled to the main optical waveguide and to two or more emitting pixels of the plurality of emitting pixels, respectively.

[0031] In some examples, the electronic control circuitry controls optical phase modulators in an optical phased array (OPA) to map the computationally intractable problem as an Ising spin glass matrix onto radiating pixels.

[0032] In some examples, the electronic control circuitry can control the optical phase modulator to have a phase value of either 0 or π as the Ising spin value of an Ising spin glass matrix mapped to the emitting pixel.

[0033] In some examples, the PIC further includes an optical attenuator or amplifier, and the electronic control circuitry independently controls each of the optical phase modulators and attenuators / amplifiers to independently control the amplitude and phase of the optical signal beam of each of the multiple emitting pixels to represent the Ising spin glass matrix of the Ising spin model mapped to the emitting pixels.

[0034] In some examples, the photonic processor computing engine device may further include an electronic feedback circuit programmed to provide feedback to the electronic control circuitry of a measured intensity of the optical signal beam received at at least a portion (e.g., a defined portion) of the focal plane array (FPA).

[0035] In some examples, the electronic control circuitry can be programmed to process the feedback to adjust the settings of each of the optical phase modulators of the multiple emitting pixels to a ground energy state of an Ising spin glass matrix mapped to the emitting pixel.

[0036] In some examples, the electronic control circuitry can control the optical phase modulator to have phase values ​​from -π to π as values ​​of an XY Hamiltonian model mapped to radiating pixels.

[0037] In some examples, the PIC further includes an optical attenuator or amplifier, and the electronic control circuitry independently controls each of the optical phase modulators and attenuators / amplifiers to independently control the amplitude and phase of each of the optical signal beams of the multiple emitting pixels to represent the XY Hamiltonian model mapped to the emitting pixels.

[0038] In some examples, the electronic feedback circuitry is programmed to provide feedback of a measured intensity of the optical signal beam received by at least a portion (e.g., a defined portion) of the focal plane array (FPA) to the electronic control circuitry, and the electronic control circuitry is programmed to process the feedback and adjust a setting of each of the optical phase modulators of the plurality of emitting pixels to a signal that correlates to a ground energy state of an XY Hamiltonian model mapped to the emitting pixel.

[0039] In some examples, the focal plane array (FPA) can include a number of pixels, where the number of image pixels is fewer than the number of emission pixels of the optical phased array (OPA).

[0040] In some examples, the photonic processor computing engine device may further include a plurality of photonic integrated circuits (PICs), each of which includes an optical phased array (OPA) including a plurality of emitting pixels that emit optical signal beams based on the electromagnetic radiation. Each pixel includes an optical antenna and an optical phase modulator. The photonic processor computing engine device may further include electronic control circuitry in electrical communication with the optical phased array (OPA) for calibrating and controlling the optical phase modulator of the optical phased array (OPA). The focal plane array (FPA) is positioned to receive the optical signal beams transmitted from the plurality of emitting pixels of one or more of the photonic integrated circuits (PICs).

[0041] In some examples, the photonic processor computing engine device may further include a plurality of focal plane arrays (FPAs), each of the focal plane arrays positioned to receive optical signal beams transmitted from a plurality of emissive pixels of one or more of the plurality of photonic integrated circuits (PICs).

[0042] In another example of the present disclosure, the photonic processing system may include an electromagnetic radiation source. The system may further include a photonic processor computing engine device that may include at least one photonic integrated circuit (PIC). The photonic integrated circuit (PIC) may include an optical phased array (OPA) including a plurality of emitting pixels that emit optical signal beams based on the electromagnetic radiation. Each of the plurality of emitting pixels may include an optical antenna and an optical phase modulator. The photonic integrated circuit (PIC) may further include an electronic control circuit in electrical communication with the optical phased array (OPA) to calibrate and control the optical phase modulator of the optical phased array (OPA) and at least one focal plane array (FPA) positioned to receive the optical signal beams emitted from the plurality of emitting pixels. The system further includes at least one processor in electronic communication with the optical phase modulator and the focal plane array, and a memory device containing instructions that, when executed by the at least one processor, cause the system to (1) measure an intensity of an optical signal beam received from the optical phased array (OPA) by at least a portion (e.g., a defined portion) of the focal plane array (FPA); (2) provide a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam; (3) control the optical phase modulators of the plurality of emitting pixels to control the phase of the optical signal beam emitted by the plurality of emitting pixels to reach a state that correlates with the ground energy state; and (4) obtain the phase of the optical phase modulator at a state that correlates with the ground energy state.

[0043] In another example of the present disclosure, a computer-implemented method for solving a computationally difficult problem using a photonic processor computing engine device including an optical phased array (OPA) and a focal plane array (FPA) is disclosed. The method may include emitting an optical signal beam from a plurality of emitting pixels of the optical phased array (OPA) to a focal plane array (FPA), each of the emitting pixels including an optical antenna and an optical phase modulator. The method may include measuring an intensity of the optical signal beam received by at least a portion (e.g., a defined portion) of the focal plane array (FPA) from the emitting pixels of the optical phased array (OPA). The method may include providing a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam. The method may include actuating the optical phase modulators of the plurality of emitting pixels to control a phase of the optical signal beam emitted by the plurality of emitting pixels. The method may include obtaining a phase of the optical phase modulator at a desired measurement of intensity at the focal plane array. The desired measurement of intensity may be set to a predetermined threshold desired by a user or may be set to a predetermined value based on a ground energy state. In other words, the phase value may be obtained at the state.

[0044] In some examples, the method can include individually controlling each of the optical phase modulators such that an optical signal beam emitted from each of the emitting pixels has a binary phase value of either a first value or a second value. The method can further include providing feedback to the optical phase modulator of a measured intensity of the optical signal beam received by at least a portion (e.g., a defined portion) of the focal plane array (FPA). The method can further include processing the feedback signal to recalibrate the optical phase modulators of the plurality of emitting pixels to a state that correlates with a ground energy state of the Ising spin glass mapped to the emitting pixel.

[0045] In some examples of the method, the optical phase modulator may have a phase value of either 0 or π as the Ising spin value for each radiating pixel.

[0046] In some examples of the method, the PIC further includes an optical attenuator or amplifier, wherein each of the optical phase modulators and the optical attenuator / amplifiers are independently controlled to control the amplitude and phase of each emitted optical signal beam for each of the plurality of emitting pixels to represent an Ising spin glass matrix of the Ising spin model mapped to the emitting pixel.

[0047] In some examples of the method, the optical phase modulator may have phase values ​​from -π to π as values ​​of the XY Hamiltonian model for each radiating pixel.

[0048] In some examples of the method, the PIC further includes an optical attenuator or amplifier, wherein each of the optical phase modulators and the optical attenuator / amplifiers are independently controlled to control the amplitude and phase of each of the emitted optical signal beams of each of the plurality of emitting pixels, representing an XY Hamiltonian model mapped to the emitting pixels.

[0049] In another example of the disclosure, a non-transitory machine-readable storage medium may include instructions embodied therein that, when executed by at least one processor, cause a photonic processing engine including an optical phased array (OPA) and a focal plane array (FPA) to: (1) emit optical signal beams from a plurality of emitting pixels of the optical phased array (OPA) to the focal plane array (FPA), each of the emitting pixels including an optical antenna and an optical phase modulator; (2) measure an intensity of the optical signal beam received by at least a portion (e.g., a defined portion) of the focal plane array (FPA) from the emitting pixels of the optical phased array (OPA); (3) provide a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam; (4) control the optical phase modulators of the plurality of emitting pixels to control a phase of the optical signal beam emitted by the plurality of emitting pixels; and (5) obtain a phase of the optical phase modulator at a state that correlates with a ground energy state.

[0050] In some examples, the non-transitory machine-readable storage medium may further execute instructions to individually control each of the optical phase modulators such that an optical signal beam emitted from each of the emissive pixels has a binary phase value of either a first value or a second value, cause the optical phase modulator to provide feedback to the optical phase modulator of a measured intensity of the optical signal beam received by at least a portion (e.g., a defined portion) of the focal plane array (FPA), and process the feedback signal to recalibrate the optical phase modulators of the plurality of emissive pixels to a state that correlates with a ground energy state of an Ising spin glass matrix mapped to the emissive pixel.

[0051] In some examples of the storage medium, the optical phase modulator can have a phase value of either 0 or π as the Ising spin value for each radiating pixel.

[0052] In some examples of the storage medium, the instructions, when executed by the at least one processor, further cause the photonic processing engine to individually control the phase (and amplitude) of each of the emitted optical signal beams of each of the plurality of emitting pixels to represent an Ising spin glass matrix of an Ising spin model mapped to the photonic processor computing engine device.

[0053] In some examples of the storage medium, the optical phase modulator may have phase values ​​from -π to π as values ​​of the XY Hamiltonian model for each radiative pixel.

[0054] In some examples of the storage medium, the instructions, when executed by the at least one processor, cause the photonic processing engine to further individually control the phase (and amplitude) of each of the emitted optical signal beams of each of the plurality of emitting pixels and represent an XY Hamiltonian model mapped to the photonic processor computing engine device.

[0055] Photonic Integrated Circuits and Optical Phased Arrays 1 to 15 described below and the various examples used to illustrate the principles of the present disclosure are for illustrative purposes only and should not be construed as limiting the scope of the present disclosure in any way. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any type of suitably arranged device or system.

[0056] A transmit OPA uses antenna elements to form a transmit optical signal beam, where the phase associated with the antenna elements can be controlled or adjusted to perform beam shaping, beam pointing, or beam steering. Silicon integrated photonic phase and amplitude modulation arrays ("optical phased arrays") have been extensively studied and demonstrated in the literature for a wide range of applications. The antenna elements and various other components of an OPA or associated with an OPA can be implemented using one or more PICs. The present disclosure provides a new application of optical phased arrays to provide designs that are provided to support solving the Hamiltonian energy (e.g., ground state energy) of the Ising model and its Ising spin glass matrix. The principles described herein can provide various advantages and benefits depending on the implementation. For example, compared to the current knowledge in the art, the designs and implementations described herein can provide for solving the Ising model problem more efficiently and with a more compact and scalable architecture. The size and low power consumption required to drive the architecture described herein allows the described embodiments to be extended to other sizes for use in a variety of situations. In the embodiments described herein, the Ising Hamiltonian of the Ising spin glass matrix can further be calculated in real time with high computational "efficiency" as defined by computational complexity theory.

[0057] The OPA can include an array of silicon nanoantenna elements or other antenna elements, where the relative phase and amplitude of radiation emitted from the antenna elements can be electronically controlled individually to map to the Ising spin glass matrix of the Ising model. The Ising spin glass matrix can be a set of spin states, i.e., phase values, that are set on the antenna elements as initial conditions for solving the Ising model problem. In some cases, the array can support a unit cell architecture with low power resonant microrings or other modulators, where the phase and amplitude of each antenna element can be individually calibrated and controlled. If desired, a supercell design (logical grouping of multiple antenna elements and associated components into multiple supercells) can provide routing simplification and size scalability. Also, in some cases, amplitude modulation of each supercell can be used to control transmit power.

[0058] FIG. 1 illustrates a configuration that may be used to facilitate computation of an Ising model problem. For example, FIG. 1 illustrates an exemplary schematic diagram of a system 100 supporting photonic integrated circuit-based optical beam transmission according to the present disclosure. As shown in FIG. 1, the system 100 may include a node 102 that may transmit and / or receive data using optical communication. The node 102 may be in unidirectional communication with another element (e.g., another node, an optical phased array, an image sensor, or a focal plane array (FPA) 200), in which case the node 102 transmits only optical signals or beams to the other element. However, it will be appreciated that the node 102 may further engage in bidirectional communication in which it is capable of both transmitting and receiving optical signal beams.

[0059] The node 102 of this embodiment may include elements capable of performing the required functions. For example, the optical transmitter 106 may encode information into the optical signal beam 108 using appropriate amplitude, phase, frequency, and / or other modulation(s) of light, etc. The optical signal beam 108 may be transmitted through free space or other transmission medium to the focal plane array (FPA) 200 where optical receivers, pixels, image sensors, or other electromagnetic radiation sensing elements receive and process the optical signal beam 108. For example, the focal plane array (FPA) 200 may identify the amplitude, phase, frequency, and / or other modulation(s) of light in the optical signal beam 108 and use the identified modulation(s) or characteristics to generate a feedback or other data signal for further processing. The FPA 200 may further analyze the level, phase, amplitude, or other characteristics of the optical signal beam from the node 102 for purposes of computing the feedback or other data signal. Any suitable type of modulation / demodulation scheme may be used herein to encode and decode the optical signal beam 108.

[0060] The optical transmitters, receivers, and transceivers described in this disclosure, as discussed above, may be used in numerous applications. In general, this disclosure is directed to using optical transmitters, receivers, or transceivers to solve Ising model problems that are not limited to any particular problem that can be mapped to the Ising model. However, this disclosure is not intended to exclude other possible applications of the optical transmitters, receivers, and transceivers of the various nodes.

[0061] Although FIG. 1 illustrates an example of a system 100 supporting photonic integrated circuit based communication with focal plane arrays, various modifications may be made to FIG. 1. For example, although only one node 102 is shown here in communication with one focal plane array 200, system 100 may include any suitable number of nodes and any suitable number of focal plane arrays in any suitable unidirectional, bidirectional, or other communication with each other. Additionally, each node of system 100 may include any suitable number of optical transmitters, receivers, or transceivers communicating via any number of optical signal beams. Additionally, system 100 is illustrated here in a simplified form and may include any number of additional components in any suitable configuration as needed or desired.

[0062] 2-4 illustrate an example of a photonic integrated circuit-based optical device 300 according to the present disclosure. The optical device 300 can be used in any suitable apparatus and in any suitable system used for optical communication to or from an optical phased array (OPA).

[0063] 2, the optical device 300 may include a package 302 that encloses and protects the electronic and optical components of the optical transmitter 106, the optical receiver 116, or the optical transceiver 118. The package 302 may be formed in any suitable manner from any suitable material(s), such as one or more metals. The package 302 may also have any suitable size, shape, dimensions, and may have any suitable form, without any intended limitation.

[0064] The package 302 can include an optical window 306, which is at least partially optically transparent to the optical signal beam transmitted or received from the optical device 300. The optical window 306 can be formed in any suitable manner from any suitable material(s), such as borosilicate glass or other glasses. The optical window 306 can also have any suitable size, shape, and dimensions.

[0065] The package 302 may also include one or more electrical connections 308 that may be used to transmit one or more electrical signals between the interior and exterior of the package 302. The one or more electrical signals may be used for any suitable purpose, such as controlling one or more operations of the optical device 300. As a specific example, the one or more electrical signals may be used to control an amplitude or phase modulator to control the phase or amplitude of an optical signal beam from an antenna element of a photonic integrated circuit in the optical device 300. The package 302 may further include one or more optical inputs / outputs 310 (e.g., optical fibers) that may be used to provide one or more input signals to the optical device 300 and / or receive one or more output signals from the optical device 300. The one or more input signals may carry information to be transmitted from the optical device 300 or may include continuous wave electromagnetic radiation, such as coherent constant amplitude light that is amplitude or phase modulated within the device. The one or more output signals may carry information received and collected at the optical device 300. In this example, there are two fiber inputs / outputs 310, although optical device 300 may include one fiber input / output 310 or more than one fiber input / output 310. However, it should be noted that if all light generation and processing is performed using components within package 302, fiber input / output 310 is not required, in which case electrical connection 308 may be used to transfer information to and from optical device 300.

[0066] As shown in FIG. 3, the photonic integrated circuit 402 is disposed within the package 302, i.e., where the photonic integrated circuit 402 can transmit and / or receive optical signal beams through the optical window 306. As described below, the photonic integrated circuit 402 can be used to support the transmission and / or reception of optical signal beams, depending on the design of the photonic integrated circuit 402. The photonic integrated circuit 402 can also support some additional optical functions as needed or desired. The photonic integrated circuit 402 can be formed in any suitable manner from any suitable material(s), such as silicon, indium phosphide, or gallium arsenide. The photonic integrated circuit 402 can also have any suitable size, shape, and dimensions. As a specific example, the photonic integrated circuit 402 can be square with a side length of about 40 mm, although other suitable sizes and shapes can be used herein.

[0067] The fiber mount 404 can be used to couple to the optical fiber 406 where the optical fiber 406 can provide an optical signal to the photonic integrated circuit 402 and / or receive an optical signal from the photonic integrated circuit 402. For example, the optical fiber 406 can provide an optical signal from a source laser to the photonic integrated circuit 402 for use during transmission of an optical signal beam. The optical fiber 406 can also, or alternatively, provide an optical signal received by the photonic integrated circuit 402 to a receiver for processing. Each fiber mount 404 can include any suitable structure configured to be coupled to the optical fiber 406. Each optical fiber 406 represents any suitable length of optical media configured to transmit an optical signal to or from the photonic integrated circuit 402. It should be noted that while four fiber mounts 404 and optical fibers 406 are shown here, the optical device 300 can include one, two, three, or more than four fiber mounts 404 and optical fibers 406. Also, note that if all light generation and processing is performed using components of photonic integrated circuit 402, fiber mount 404 and optical fiber 406 may not be required.

[0068] The electronic control board 408 includes electronic components, such as one or more integrated circuit chips or other components, that control the operation of the photonic integrated circuit 402. For example, the electronic control board 408 can include one or more components that calculate a desired phase and / or amplitude of an optical signal beam generated by an antenna element of the photonic integrated circuit 402, such that an Ising spin glass is imputed to the Ising model (or an XY model value is imputed to the XY model). Additionally or alternatively, the electronic control board 408 can include one or more components that calculate a desired phase to be applied to an optical signal received by an antenna element of the photonic integrated circuit 402, such that the electronic control board 408 can control a wavefront reconstruction operation, such as minimizing an energy Hamiltonian. The electronic control board 408 includes any suitable components configured to perform one or more desired functions associated with the photonic integrated circuit 402.

[0069] As shown in FIG. 4, the photonic integrated circuit 402 itself can include a number of array elements 502, which represent PIC unit cells of the photonic integrated circuit 402. Each array element 502 can be configured to transmit or receive one or more optical signals. The photonic integrated circuit 402 can include any suitable number of array elements 502, and in some cases can include a very large number of array elements 502. In some embodiments, for example, the photonic integrated circuit 402 can include an array of elements 502 up to a size of 1024×1024 (i.e., more than one million array elements 502) or more. The size of the photonic integrated circuit 402 is based, at least in part, on the number and size of the array elements 502. As mentioned above, in some cases, the photonic integrated circuit 402 can be a square with a side length of about 40 mm. However, the photonic integrated circuit 402 can be scaled to smaller or larger sizes (such as about 2.5 cm by about 2.5 cm) and, depending on manufacturing capabilities, even larger sizes (such as about 20 cm by about 20 cm or about 30 cm by about 30 cm).

[0070] Each array element 502 may include an antenna element 504 configured to physically transmit and / or receive one or more optical signal beams to or from one or more external devices or systems. For example, each antenna element 504 may represent a nanophotonic antenna or other antenna element that transmits or receives at least one optical signal beam. Depending on the implementation, the antenna elements 504 may also sometimes be referred to as transmitters in a transmit array or receivers in a receive array. Each antenna element 504 may have any suitable size, shape, and dimensions. In some cases, the transmit / receive face of the antenna element 504 may be about 2 μm to about 4 μm in diameter.

[0071] Here, each antenna element 504 is coupled to a signal path 506. The signal path 506 is configured to transmit optical signals to and from the antenna element 504. For example, the signal path 506 may provide an optical signal to the antenna element 504 for transmission. Additionally or alternatively, the signal path 506 may provide an optical signal received by the antenna element 504 to a photodetector or other component for processing. Each signal path 506 includes any suitable structure configured to transmit an optical signal, such as an optical waveguide. It should be noted that only a portion of the signal path 506 may be shown in FIG. 4 because the signal path 506 may vary based on how the associated array element 502 is designed and positioned within the photonic integrated circuit 402.

[0072] A modulator 508 may be provided at each antenna element 504 and may be used to control the phase and / or amplitude of an optical signal transmitted or received by the associated antenna element 504. For example, when an antenna element 504 is transmitting, the modulator 508 may be used to achieve a desired phase of the transmitted optical signal beam to perform beam forming or beam steering. When an antenna element 504 is receiving, e.g., when used as an FPA, the modulator 508 may be used to apply phase control to an input wavefront of a received optical signal to decompose or reconstruct the wavefront. Each modulator 508 may include any suitable structure configured to modulate the phase of an optical signal, such as a resonant micro-ring modulator, or a PN junction micro-ring modulator. In some cases, each modulator 508 may be a resonant micro-ring modulator with a diameter of about 4 μm to 6 μm, although modulators of other sizes may also be used.

[0073] The modulator 508 of the photonic integrated circuit 402 can be electrically coupled to a digital readout integrated circuit (DRIIC) layer 510, which is used to provide an electrical signal to the modulator 508 to control the phase and / or amplitude modulation applied to the optical signal input or output by the modulator 508. The (DRIIC) designs described herein can be tailored to the unique characteristics of optical phased arrays. Instead of using large breakout circuit boards and digital-to-analog converters, the DRIIC designs can be thinned and can support operations such as flip-chip bonding to the photonic integrated circuit. In some cases, the DRIIC designs integrate all PIC-related electronic control into a hybrid or monolithic design. The DRIIC designs can also support a unit cell architecture, where each DRIIC unit cell corresponds to and interacts with a corresponding PIC unit cell. This allows the scalability of the PIC and DRIIC designs to be scaled to any suitable size. Overall, the DRIIC designs serve to support a variety of functions, such as coordinated array phase and amplitude control, in a compact package. Photonic integrated circuit PIC402 may be coupled to DRIIC layer 510 using any mechanism for electrically coupling photonic integrated circuit 402 and DRIIC layer 510.

[0074] The DRIIC layer 510 of this example includes a number of individual DRIIC cells 512, each of which may be associated with a corresponding one of the array elements 502 (and may be approximately the same size in some cases). The DRIIC cells 512 control the phase modulation applied by the modulators 508 of the array elements 502. The DRIIC cells 512 may essentially function as digital-to-analog conversion devices, converting digital programming (such as 2-bit, 8-bit, or other digital values) to an appropriately scaled direct current (DC) analog voltage over a particular voltage range. As a specific example, the DRIIC cells 512 may operate to convert digital values ​​to an appropriate DC analog voltage between 0V and 3.3V, although other voltages (including negative voltages) may be supported depending on the implementation.

[0075] In this example, each DRIIC cell 512 may include a register 514 configured to store a value associated with a different phase shift and / or amplitude change to be applied by the modulator 508 of the corresponding array element 502. To provide the desired phase shift or amplitude change, an appropriate value from the register 514 is selected and provided to two amplifiers 516 and 518 to generate an output voltage that is provided to the associated modulator 508. The output voltage controls the phase shift provided by the associated modulator 508. Different values ​​from the register 514 are provided to the amplifiers 516 and 518 over time to apply different output voltages to the associated modulator 508. In this manner, each DRIIC cell 512 can cause the associated modulator 508 to provide different phase shifts over time.

[0076] In some embodiments, each DRIIC cell 512 may be used to provide a relatively small number of different output voltages to the associated modulator 508. For example, in some cases, each DRIIC cell 512 may have the associated modulator 508 provide four different phase shifts. However, other numbers of output voltages and associated phase shifts may also be supported herein, such as where up to 256 or more different phase shifts are supported. Also, the output voltages provided to the modulators 508 in different DRIIC cells 512 may differ even if the modulators 508 are providing the same phase shift, which may be due to factors such as manufacturing tolerances. The actual output voltage used for each modulator 508 may be selected during calibration, and the appropriate value may be stored in each register 514.

[0077] In this example, the actual value of each DRIIC cell 512 provided by register 514 over time to amplifiers 516 and 518 can be controlled using a demultiplexer 520. Each demultiplexer 520 receives a stream of calculated array phase shifts 522 and outputs a phase shift 522 to be applied by the modulator 508 associated with that DRIIC cell. The phase shift 522 output by the demultiplexer 520 can be used to identify or select a particular value from the register 514 for output to the amplifiers 516 and 518. The calculated array phase shifts 522 can be provided by one or more external components, such as the electronic control board 408 or an external component in communication with the electronic control board 408. Although not shown here, an array-level deserialization circuit can be used to separate and fan out the high speed digital signal to an array of individual DRIIC cells 512.

[0078] Each register 514 includes any suitable structure configured to store and retrieve a value. Each amplifier 516 and 518 includes any suitable structure configured to generate a control voltage or other control signal based on an input. Each demultiplexer 520 includes any suitable structure configured to select and output a value.

[0079] It should be noted that this represents one exemplary manner in which the modulator 508 of an array element 502 may be controlled. In general, any suitable technique may be used to provide an appropriate control voltage or other control signal to the modulator 508 for use in controlling the phase shift and / or amplitude change provided by the modulator 508. For example, in the approach shown in FIG. 4, the values ​​applied to the amplifiers 516 and 518 are stored in a register 514 and can be retrieved as needed, allowing an external component to provide an indicator to the DRIIC cell 512 of the desired value to be retrieved. In other embodiments, the external component may provide a digital value that is converted to an analog value by a different circuit.

[0080] Various electrical connections 524 are provided within or with the DRIIC layer 510. The electrical connections 524 can be used to provide electrical signals to the DRIIC cells 512, such as when the electrical connections 524 are used to receive a high speed digital signal including the calculated array phase shifts 522 of the DRIIC cells 512. Any suitable number and arrangement of electrical connections 524 can be used herein. Positioning the heat spreader 526 in thermal contact with the DRIIC layer 510 can provide a more consistent temperature throughout the DRIIC layer 510 and the photonic integrated circuit 402. The heat spreader 526 can provide thermal energy to the DRIIC layer 510 to heat the DRIIC layer 510 and the photonic integrated circuit 402, and can serve to maintain a substantially constant temperature of the photonic integrated circuit 402. The heat spreader 526 can be formed in any suitable manner from any suitable material(s), such as one or more metals, such as copper. The heat spreader 526 can have any suitable size, shape, and dimensions.

[0081] 2-4 illustrate an example of a photonic integrated circuit-based optical device 300, various modifications may be made to FIGS. 2-4. For example, one or more photonic integrated circuits may be packaged in other suitable ways, positioned relative to other components in other suitable ways, and coupled to other components in other suitable ways. Also, other suitable modulation control techniques and other suitable thermal management techniques may be used with one or more photonic integrated circuits. For example, the configuration and arrangement of the array elements 502, signal paths 506 (e.g., waveguides), and modulators 508 may differ from that shown in FIG. 4. Alternative configurations are illustrated at least in FIG. 6.

[0082] 5 and 6 illustrate more specific exemplary implementations of a photonic integrated circuit-based optical system including the photonic integrated circuit-based optical device 300 of FIGS. 2-4 according to the present disclosure. In particular, FIGS. 5 and 6 illustrate an exemplary architecture 600 that may be implemented within the optical device 300. As shown in FIG. 5, the architecture 600 may include a source laser 602, an OPA 604, and a receiver 606. The source laser 602 is generally an electromagnetic radiation source that operates to generate an optical signal (e.g., electromagnetic radiation) that is provided to and transmitted by the OPA 604. The OPA 604 generally operates to transmit outgoing optical signals and receive received optical signals. The receiver 606 generally operates to process received optical signals. These components enable the architecture 600 to support optical transceiver functionality, although some components (e.g., the source laser 602 or the receiver 606) may be removed from the architecture 600 if only optical transmitter or only optical receiver functionality is desired.

[0083] In this example, the source laser 602 may include a laser 608 operative to generate a low power input beam. The laser 608 may include any suitable structure configured to generate a laser output, such as a distributed feedback (DFB) diode laser. The low power input beam may have any suitable power level based on the laser 602 being used in a particular application. In some cases, the low power input beam may have a power level of 1 or tens of milliwatts to 100 or hundreds of milliwatts, although these values ​​are for illustrative purposes only. Also, in some cases, the laser 602 may be fabricated using at least one group III element and at least one group V element, thereby sometimes referred to as a "III-V" laser. However, other suitable materials may be used to fabricate the laser 602. The low power input beam may be optionally provided to an electro-optic modulator (EOM) 610, which may modulate the low power input beam based on an input electrical signal. The EOM 610 may provide any suitable modulation here, such as where the EOM 610 is implemented as a Mach-Zehnder Modulator (MZM) that provides amplitude modulation. The EOM 610 may be optically coupled to the circulator 620 via an optical path, such as a waveguide, that may transmit an optical beam from the EOM 610 to the circulator 620.

[0084] In the OPA 604, the laser output from the source laser 602 can be split by a splitter 622, and a substantially equal first portion of the combined signal is provided to two waveguides 624a and 624b. Here, the waveguides 624a and 624b can have substantially the same length, so that there is little or no phase difference between the first portion of the combined signal output from the waveguides 624a and 624b. In this example, the photonic integrated circuit 402 can be implemented using supercells 626, with each supercell 626 including a portion of the array elements 502. In some embodiments, for example, each supercell 626 can include a 32×32 array of array elements 502, although other numbers and arrangements of array elements 502 can be used in each supercell 626. In this particular example, the photonic integrated circuit 402 includes 64 supercells 626, although other numbers of supercells 626 can be used. Multiple supercells 626 can be driven using the same portion of the combined signal from the source laser 602, simplifying phase control and other operations in the architecture 600. The ability to collectively drive all array elements 502 within a supercell 626 allows the transmit power of the array elements 502 in each supercell 626 to be controlled, for example, by amplitude modulation of that supercell 626.

[0085] To drive the supercell 626 using the combined signal from the source laser 602, the waveguides 624a and 624b provide a first portion of the combined signal to splitters 628a and 628b, such as 1×8 optical splitters, which split the first portion of the combined signal into a second portion of a larger number of combined signals. Additional splitters 630a and 630b, such as 8×32 splitters, split the second portion of the combined signal into a third portion of a larger number of combined signals. This creates 64 optical signals that can be used to drive the supercell 626. It should be noted that this arrangement of 1×8 and 8×32 splitters is merely one example of how the supercell 626 in this particular photonic integrated circuit 402 may be driven. Other approaches to driving the photonic integrated circuit 402 may also be used, including approaches using other numbers or arrangements of splitters. The particular approach shown in FIG. 5 is merely one example of how the supercell 626 of this particular photonic integrated circuit 402 may be driven.

[0086] To compensate for different optical path lengths to reach different supercells 626, time delay paths 632a and 632b are provided between splitters 630a and 630b and supercells 626. For example, assuming that each row of supercells 626 in photonic integrated circuit 402 is driven using four outputs from splitter 630a and four outputs from splitter 630b, without compensation, different outputs from splitters 630a and 630b may reach different supercells 626 at different times, resulting in undesirable phase differences and reducing the throughput of architecture 600. Time delay paths 632a and 632b represent different optical path lengths, such as those produced by a spiral or other optical path that delays at least a portion of the outputs from splitters 630a and 630b, causing the outputs from splitters 630a and 630b to reach all supercells 626 at approximately the same time. For example, time delay paths 632a and 632b may provide a greater delay for signals to closer supercell 626 and a lesser or no delay for signals to more distant supercell 626. The optical signals received at supercell 626 are used by supercell 626 to generate a transmit optical signal.

[0087] The supercell 626 can receive an input optical signal, which is forwarded across waveguides 624a-624b to the receiver 606 via the circulator 620. In this embodiment, the receiver 606 can include at least one photodetector 634, such as at least one photodiode, that converts the received input optical signal into a current. The transimpedance amplifier 636 converts the current into a voltage, which can then be further processed (e.g., to recover information contained in the input optical signal).

[0088] It should be noted that various components of OPA 604 and source laser 602 may be fabricated from different materials to allow different optical power levels to be used in architecture 600. In OPA 604, waveguides 624a and 624b, as well as splitters 628a and 628b, may similarly be fabricated using silicon nitride or other materials that support the transmission and splitting of the relatively high power combined beam from source laser 602. Splitters 630a and 630b may be fabricated using silicon (rather than silicon nitride) or other materials capable of splitting low power optical signals (because at this point the optical energy from source laser 602 has already been split). However, the components of architecture 600 may also be fabricated from other suitable materials. It should also be noted that various components of architecture 600 may or may not be fabricated using one or more common materials.

[0089] In some embodiments, all components within the architecture 600 of FIG. 5 can be implemented in an integrated manner, such as when implemented using a single integrated electrical and photonic chip. For example, as described above, various components of the architecture 600 can be fabricated using silicon and silicon nitride, which allows for fabrication using standard silicon-based processes. When implemented in an integrated manner, the architecture 600 can be implemented using a single photonic integrated circuit chip, and components such as the fiber input / output 310, the fiber mount 404, and the optical fiber 406 may not be required. However, integration of components within the architecture 600 is not necessary. Thus, for example, the source laser 602 can be implemented off-chip or replaced using a standard erbium-doped fiber amplifier laser or other external laser. As another example, the receiver 606 can be implemented off-chip.

[0090] 5 and 6 show more specific implementations of the photonic integrated circuit based optical device of FIGS. 2-4, although various modifications may be made to FIGS. 5 and 6. For example, in this particular embodiment, the photonic integrated circuit 402 is logically divided in half using two waveguides 624a-624b, two sets of splitters 628a-628b, 630a-630b, and two sets of time delay paths 632a-632b. However, the photonic integrated circuit 402 may be logically divided into other numbers of parts or may not be logically divided at all. Similarly, the various components of FIGS. 5 and 6 may be combined, further subdivided, duplicated, omitted, rearranged, and additional components may be added according to particular needs.

[0091] One portion 638 of the supercell 626 is shown in FIG. 5 and in more detail in FIG. 6. As shown in FIG. 6, the portion 638 of the supercell 626 includes a 4×4 arrangement of array elements 502. As can be seen, the structure of the array elements 502 can be modified from that shown in FIG. 4 as needed or desired. These array elements 502 can each be powered using a single corresponding waveguide 506. Each waveguide 506 can be in optical communication with a source laser 602 and can be configured to receive electromagnetic radiation (e.g., optical signals) from the source laser 602. Each of the array elements 502 and corresponding waveguides 506 can be in communication with a phase modulator 708 and an attenuator 709 to modify the phase and / or amplitude of the electromagnetic radiation in the waveguide 506. The phase modulator 708 can operate similarly to the phase modulator 508 described above.

[0092] A source laser 602 can provide an optical signal and / or electromagnetic radiation to each of the array elements 502 via a waveguide 506. The laser source can provide an optical signal through electromagnetic radiation inlets 550 of a series of branches in a cascade tree 710 that splits the laser beam equally from the source laser 602 to an attenuator 709, a phase modulator 708, and each of the waveguides 506 of the array elements 502. The optical routing of the branches, waveguides, array elements, phase modulators 708, and attenuators 709 shown in FIG. 6 is one example of an arrangement of an OPA, but this disclosure does not impose any limitations on the routing or waveguide pattern. The waveguide pattern and optical routing can be either an H-tree configuration, Manhattan routing, a cascade tree, or any other type of waveguide routing for an optical phased array.

[0093] Although portion 626 of supercell 626 shows a 4x4 arrangement of array elements 502, it is understood that other quantities and arrangements of array elements 502 are possible, such as, for example, 8x8, 16x16, 32x32, and others. Note that if each supercell 626 contains a 32x32 arrangement of array elements 502, then each supercell 626 will contain 32 rows of array elements 502, with each row containing 32 array elements 502. Thus, portion 638 shown in FIG. 6 will be replicated 64 times within each supercell 626. However, each supercell 626 can have a different number and arrangement of array elements 502, as needed or desired.

[0094] In FIG. 6, it can be seen that there are different path lengths (e.g., lengths of waveguide 506) between each array element. In this particular example, the shortest path lengths (e.g., lengths of waveguide 506) exist for the two lower array elements located near the center of portion 638. The longest path lengths exist for the two upper array elements located closest to the center of portion 638. As with the supercell 626 itself, without compensation, these different path lengths would cause different portions of the optical signal to arrive at the array elements 502 at different times. In some cases, phase shifts and / or amplitude changes provided by the modulators 508 in the array elements 502 can be used to compensate for the different path lengths between the input 701 of the main waveguide 702 and each array element 502. Additionally or alternatively, linear or other phase modulators can be used to compensate for the different path lengths between the input 701 of the main waveguide 702 and each array element 502.

[0095] 6, each array element 502 in portion 638 of OPA 604 may be spaced apart from one another in a regular arrangement to form an array of array elements 502 that are equally spaced apart in both the X and Y directions of OPA 604. However, it should be understood that the arrangement and spacing of the array elements 502 in FIG. 6 is merely an example, and that other spacings and / or arrangements of array elements 502 are intended to be within the scope of the present disclosure without limitation.

[0096] Photonic Ising Computing Engine Architecture The optical device 300 described above, including the photonic integrated circuit 402 with the optical phased array (OPA) 604, can be used in a scalable and compact photonic electronic architecture that can be implemented as a photonic Ising computing engine. An exemplary photonic processor computing engine 800 is shown in FIG.

[0097] As shown in FIG. 7, the computing engine 800 can include a photonic integrated circuit 402 having the architecture 600 shown in FIG. 5. The photonic integrated circuit 402 can include an optical phased array (e.g., an optical phased array (OPA) 604) and an electronic layer (e.g., the DRIIC layer 510 described above). The DRIIC layer 510 can include CMOS or other electronic circuitry that controls and calibrates the phase and amplitude and other characteristics of the beam emitted from the array elements of the optical phased array 604. The OPA 604 and control electronics (e.g., the DRIIC layer 510) can be programmed to operate the array elements (e.g., emitting pixels) of the OPA 604 to emit an optical signal beam B into free space. The optical signal beam B may pass through an optical element 804 (e.g., a lens, lens array, lens assembly, prism, or other optical element) including one or more lenses disposed between the photonic integrated circuit (PIC) 402 and the focal plane array (FPA) 802 to project the optical signal beam from the emitting pixel to the focal plane array (FPA) 802.

[0098] The beam passing through the optical element 804 may then proceed to a focal plane array (FPA) 802, which may include an image sensor that receives the light beam B. The focal plane array may consist of an OPA operating in a receive mode, or may consist of a spatial light modulator and a detector, or may consist of an imaging device commonly found in the focal plane of commercial and industrial cameras, such as a charge-coupled device (CCD) or CMOS imager. The focal plane array 802 receives the beam and outputs a data signal from the OPA 604 indicative of the intensity level recorded by the FPA 802. The intensity calculated at the FPA 802 plane due to optical interference of the light signal beam B emitted from the OPA 604 correlates (or is proportional) to the Ising Hamiltonian energy of the Ising spin glass matrix of a particular Ising model problem. The Ising spin glass matrix is ​​a set of phase values ​​imposed on the array elements 502 (e.g., emitting pixels) as initial conditions for solving the Ising model.

[0099] The output data signal from the FPA 802 may be transmitted across an electronic feedback circuit. The electronic feedback circuit may include a communication path 807 (e.g., wireless or wired communication) between the FPA 802 and the digital electronics 806. The electronic feedback circuit may further include the digital electronics 806, which may include a processor, memory, and instructions stored in the memory executed by the processor. The digital electronics 806 may process the output data signal from the FPA 802 to calculate the Hamiltonian energy state of the Ising spin glass matrix encoded as a phase to the array element 502. The electronic feedback circuit may then generate a feedback signal, which is transmitted via a signal path 808 (e.g., a wired or wireless path) of the electronic feedback circuit to the OPA control electronics (e.g., the DRIIC layer 510) to recalibrate and control the array elements of the OPA 604 based on the feedback signal and the energy Hamiltonian to move the OPA 604 and the emitted optical signal beam B closer to the ground state energy of the Ising spin glass matrix of the Ising model. The process (e.g., emitting optical signal beam B, outputting a signal indicative of the intensity of optical signal beam B from FPA 802, processing the signal from FPA 802 with digital electronics 806, and sending a feedback signal to the DRIIC layer based on the intensity) may be iteratively re-run until the ground state Hamiltonian energy of the Ising spin glass matrix encoded in the array elements 502 is achieved and a solution is calculated by obtaining the phase / amplitude of each emitting pixel or array element 502 using a phase acquisition algorithm at the ground state Hamiltonian energy.

[0100] 7, digital electronics 806 (e.g., electronic feedback circuitry) and DRIIC layer 510 (e.g., electronic control circuitry) can each communicate with one or more processors 820 and one or more non-transitory computer-readable storage media 822 operable with processor 820 that execute and store, respectively, instructions for operation of engine 800. The processors may be on-board digital electronics 806 and DRIIC layer 510 or may be located remotely from digital electronics 806 and DRIIC layer 510. It will also be appreciated that digital electronics 806 and DRIIC layer 510 can each include their own individual processor and storage media.

[0101] FIG. 8 shows another view of the computing engine 800. In FIG. 8, the computing engine 800 is shown as including an optical phased array similar to that shown in FIG. 6. It will be understood that the number of array elements 502 is not limited to the number shown in FIG. 6 or FIG. 8, and indeed any number of array elements can be included in the OPA 604. The photonic integrated circuit 402 and the OPA 604 can be used for analog computing, in particular for computing the Ising Hamiltonian energy of an Ising spin glass matrix. In FIG. 7, the laser light from the laser source 602 is coupled into the photonic integrated circuit 402 and then split into multiple branches via the cascaded binary tree splitting architecture 710 shown in FIG. 6 and FIG. 8. The laser light in each waveguide branch then passes through a separate phase modulator 708 and attenuator 709 to adjust the phase and amplitude of the light in each branch. Following this, the light in each branch travels to reach a 2D array of optical antennas 504 (e.g., array elements 502, or in other words, emitting pixels), with each branch corresponding to one array element 502. An emitting pixel (e.g., array element 502) emits an optical signal beam B, which travels through free space and, optionally, through a lens optical element 802 (not shown in FIG. 8 ) before reaching the FPA 802. The interference at the FPA plane of all emitted optical signal beams B and the intensity measured at the FPA 802 has an analytical formula that correlates with the Hamiltonian energy of the Ising spin glass matrix of the Ising model. The equivalence of the intensity of the optical signal beams measured at the FPA plane to the Ising model is shown in an experiment that solves the Ising model using a spatial light modulator (SLM). The intensity measured at the FPA 802 in FIG. 8 is processed in the digital electronics 806, and an appropriate feedback signal can be provided to the DRIIC layer 510 and the photonic optical phased array 604 for reprogramming the phase (and amplitude, if necessary) of each array element 502. This process can be iterated to generate the lowest energy state of the Ising Hamiltonian of the Ising spin glass matrix encoded in the radial pixel intensity map of the PIC-OPA computing engine 800.

[0102] An alternative architecture photonic processor computing engine 900 is shown in Figure 9. Elements of engine 900 that are similar to elements in engine 800 are identified with the same identification numbers. In Figure 9, computing engine 900 is shown as including another optical phased array 901 than that shown in Figure 6. For example, OPA 901 can include amplitude and phase control local to each array element 902.

[0103] Referring to FIG. 10, an alternative OPA 901 is shown, illustrating the location and configuration of array elements 902 within the OPA 901. As shown in FIG. 10, the array elements 902 can each include an antenna element 904 and a phase / amplitude modulator 915. Each modulator 915 can include any suitable structure configured to modulate the phase of an optical signal, such as a resonant micro-ring modulator, or a PN junction micro-ring modulator. In some cases, each modulator 508 can be a resonant micro-ring modulator with a diameter of about 4 μm to 6 μm, although modulators of other sizes can also be used. On-chip electronic control circuitry (e.g., DRIIC layer 510) can be configured to apply a voltage to each of the optical phase modulators 915 to modulate an optical signal beam within a segment 917 of a waveguide in communication with the optical antenna 904.

[0104] Each array element 902 may be fed using a waveguide that includes one or more separate waveguides. As shown, the waveguide may include a main waveguide 907. The main waveguide 907 may be in optical communication with the source laser 602 and may be configured to receive electromagnetic radiation (e.g., an optical signal) from the source laser 602. A splitter 909 may be positioned along the main waveguide 907 and may split a portion of the optical signal propagating within the main waveguide 907. These portions of the optical signal split from the main waveguide 907 are optically coupled to each other at multiple different locations along the main waveguide 907 and provided via branch waveguides 913 that are coupled to the main waveguide 907 by the splitter 909. A splitter 911 may be positioned along the branch waveguide 913 to further split the portions of the optical signal within each branch waveguide 913. Ideally, splitters 909 and 911 are configured so that each of the array elements 902 receives a roughly equal portion of the optical signal input to the main waveguide 907. In some embodiments, the main waveguide 907, branch waveguide 913, and splitters 909 and 911 may be formed from silicon, although other materials may be used.

[0105] Note that if each supercell 626 contains a 32 by 32 arrangement of array elements 902, then each supercell 626 will contain 32 rows of array elements 902, with each row containing 32 array elements 902. Thus, portion 638 shown in Figure 6 will be replicated 16 times within each supercell 626. However, each supercell 626 can have a different number and arrangement of array elements 902, as needed or desired.

[0106] In FIG. 10, it can be seen that there are different path lengths between the input of the main waveguide 907 (located at the bottom of the main waveguide 907 in FIG. 10) and the different array elements 902. In this particular example, the shortest path length is between the input of the main waveguide 907 and the bottom left array element 902, and the longest path length is between the input of the main waveguide 907 and the top right array element 902. As with the supercell 626 itself, without compensation, these different path lengths would cause different portions of the optical signal to arrive at the array element 902 at different times. In some cases, a phase shift provided by a modulator 915 in the array element 902 can be used to compensate for the different path lengths between the input of the main waveguide 907 and each array element 902. Additionally or alternatively, a linear modulator or other phase modulator can be used to compensate for the different path lengths between the input of the main waveguide 902 and each array element 902.

[0107] It is understood that the OPA 901 may be located in the portion 638 shown in the architecture 600 of FIG. 5. It should be further understood that the number of array elements 902 is not limited to the number shown in FIG. 9 or FIG. 10, and in fact any number of array elements may be included in the OPA 901. Returning now to FIG. 9, the photonic integrated circuit 402′ and the OPA 901 may be used for analog calculations, in particular for calculation of the Ising energy Hamiltonian of the Ising spin glass matrix. In FIG. 9, the laser light from the laser source 602 is coupled into the photonic integrated circuit 402′, and then split from the main waveguide 907 into multiple branch waveguides 913 via splitter 909 shown in FIG. 9 and FIG. 10. The laser light in each branch waveguide 913 is then split into segments 917 by splitter 911. The light then passes through individual phase / amplitude modulators 915 to adjust the phase and / or amplitude of the light in each segment 911. The light of each segment 917 then travels to reach a 2D array of optical antennas 904 (e.g., array elements 904, or in other words, emitting pixels), with each segment 917 corresponding to one array element 902. The emitting pixels (e.g., array elements 902) emit an optical signal beam B, which reaches the FPA 802 after passing through free space and the lens optical element 802 (not shown in FIG. 8). The total interference of the emitted optical signal beam B at the FPA plane and the intensity measured at the FPA 802 has an analytical formula that correlates to the Hamiltonian energy of the Ising spin glass matrix. The equivalence of the intensity of the light measured at the FPA plane to the Ising spin glass matrix has been shown in experiments using a spatial light modulator (SLM) to solve the Ising model. The intensity measured by the FPA 802 in FIG. 8 can be processed in the digital electronics 806, and an appropriate feedback signal can be provided to the DRIIC layer 510 and the photonic phased array 901 to reprogram the phase (and optionally the amplitude) of each array element 902.This process can be iterative, which can result in the lowest energy state of the Ising Hamiltonian of the Ising spin glass matrix being encoded into the radial pixel intensity map of the PIC-OPA computing engine 900.

[0108] 9, each of the digital electronics 806 (e.g., electronic feedback circuitry) and the DRIIC layer 510 (e.g., electronic control circuitry) can be in communication with one or more processors 820 and one or more non-transitory computer-readable storage media 822 that execute and store instructions for operation of the engine 800. The processors may be on-board the digital electronics 806 and the DRIIC layer 510 or may be located remotely from the digital electronics 806 and the DRIIC layer 510. It will also be understood that each of the digital electronics 806 and the DRIIC layer 510 can include its own individual processor and storage media.

[0109] The alternative computing engine 900 offers several additional advantages over current technology. For example, the computing engine 900 moves phase and amplitude control locally to the emitting pixels to form replicable unit cells. Using this unit cell approach facilitates scalability to many more problem variables represented by Ising spin and / or Ising spin glass matrix elements. Because concatenating multiple SLM-based devices is topologically challenging, thus limiting the scalability of the alternative approach, the scalability of the unit cell and computing engine 900 enables an Ising-solving computing engine that can be scaled to any desired size for a particular application. This gives users much more architecture and design options for solving Ising models, allowing designs to be embedded into many more applications and platforms. While splitting the problem into separate SLM subproblems and solving the individual problems individually is a possible approach for an SLM Ising solver, it has been shown that it does not provide the desired (ground state) solution for many interconnected analog problem formulations.

[0110] To extend the phased array architecture shown in FIG. 9 to a large number of array elements 902 (e.g., representing problem variables represented by Ising spin and / or Ising spin glass matrix elements), the phase / amplitude modulator 915 is controlled by a CMOS circuit layer (e.g., DRIIC layer 510) below the photonic layer containing the OPA 901. This is shown in more detail in FIG. 11, where the photonic layer containing the OPA 901, array elements 902, and antenna 904 is coupled to an electronic layer 510. The electronic layer 510 can include electronic control circuitry (e.g., DRIIC layer 510) disposed on a surface of the photonic layer, the electronic control circuitry including a digital readout integrated circuit (DRIIC) board in electrical communication with each optical phase modulator of the emitting pixel. The electronic control circuitry (e.g., DRIIC layer 510) can be configured to apply voltages to control each optical phase modulator.

[0111] Metal vias 507 through the bonding layer connect the CMOS electronics in the DRIIC layer 510 to the contact electrodes of the phase / amplitude modulator 915 in the photonic layer. Placing the control electronics in the DRIIC layer 510 on a different layer than the OPA 901 allows the electronic routing and wiring to be on a different layer than the optical routing (e.g., waveguides), which provides additional space for scaling to more array elements and larger array sizes. Additionally, because the electrical and optical routing are on different layers, there is no interference between crossing optical and electrical wiring.

[0112] It is understood that the electrical wiring and the optical routing waveguides do not have to be on different layers, but can be formed on the same chip if the number of array elements in the OPA is below a certain number. If the number of array elements in the optical phased array is not very large (e.g., 16x16 or less), the OPA can have the area to accommodate the electrical wiring and the optical routing on the same optical chip without being limited by the circuit topology. For example, FIG. 12 shows an example of an 8x8 optical phased array with both the optical routing (e.g., waveguides 905) and the electrical routing (e.g., wires 1302) on the same photonic chip. The DRIIC electronics 1200 can be connected to each of the wires 1302, and each of the wires can be connected to a modulator 915 to apply a voltage to the modulator 915 and control the amplitude and phase of each array element 902. In this approach, the optical routing is placed at a different height than the metal routing in the photonic integrated circuit chip to prevent the optical wiring from crossing the metal wiring. In contrast to the configuration shown in Figure 11, the example of Figure 12 cannot be scaled to larger arrays or arrays with a large number of array elements (e.g., 32x32), but moderately sized arrays (e.g., 16x16) that place the optical routing and electrical wiring on the same chip do not overly tax the available space of the chip.

[0113] The PIC-OPA configuration shown in FIG. 7 allows for a more advanced architecture to solve larger Ising problems while reducing hardware complexity. For example, multiple PIC-OPA computing engines can be tiled to perform larger size problem solving. In accordance with the principles described herein (e.g., 402 in FIG. 7), a compact computing system 1300 is shown in FIG. 13, which is a multi-core analog processor showing four optical phased arrays 604a, 604b, 604c, and 604d. In the multi-core analog processor of system 1300, the four OPAs 604a-604d each face one of the corresponding focal plane arrays 802a, 802b, 802c, or 802d. In this configuration, larger Ising model problems can be solved by splitting the problem into four parallel sub-problems. This is resolved by each computing engine including an OPA 604a, 604b, 604c, and 604d and its corresponding FPA 802a, 802b, 802c, or 802d in accordance with the principles described in this disclosure.

[0114] FIG. 14 shows an alternative computing system 1400. The system 1400 is a single-core analog processor with four optical phased arrays 604e, 604f, 604g, and 604h facing a single FPA camera 802. In the computing system 1400, the scalability of the optical phased arrays significantly reduces the hardware complexity of the optical phased arrays 604e, 604f, 604g, and 604h in terms of electronics and optics. Due to the scalability of each PIC-OPA shown in FIG. 13, the PIC-OPA (e.g., 604a) can also be divided into sub-blocks 604e, 604f, 604g, and 604h as shown in FIG. 14. Although the computing system 1400 can solve large-scale Ising model problems with all interactions represented, the optical phased array divided into sub-blocks 604e, 604f, 604g, and 604h eases the manufacturing process and avoids the problem of limited space for optical and electrical routing. Scalability means that there are fewer issues with circuit topology and crosstalk in electronic or optical wiring / routing, either in the electronic wiring to reach the phase modulators or in the optical routing to deliver the laser light to each optical antenna. Although the calculation of the Ising Hamiltonian for the Ising spin glass matrix is ​​conventionally performed using sub-arrays, a single computation plane (e.g., a single FPA 802) has a performance advantage over the multiple FPAs of FIG. 13. For example, the calculation is more accurate when all-to-all connections can be achieved, but the discontinuity of the array or parallelization into sub-arrays leads to a decrease in overall performance by adding interruptions to the all-to-all connections. Thus, as the problem complexity increases, a single uninterrupted FPA with continuous sensing elements provides better overall performance than a segmented FPA. Because the wavefront sensed by the FPA is independent of the lateral position of the source and because all sources from multiple OPAs are combined at each position of the FPA, discontinuities on the transmit side have less impact on performance, and thus system 1400 achieves better performance than system 1300.

[0115] Thus, the novel architecture of FIG. 7, and in particular the configuration shown in FIG. 14, facilitates solving NP-hard problems with Ising models that have a significantly increased number of Ising spin states than is possible with alternative techniques (e.g., SLM). Specifically, the optical and electrical wiring shown in FIG. 11 shows how the optical phased arrays 604a-604h increase the capacity of the problem size to be solved by allowing more array elements to be placed on the circuit without complicating the optical and electrical routing. Allowing more array elements to be placed on a smaller sized array (e.g., more Ising variables in the Ising spin glass matrix) without complicating the wiring and routing allows problems with the Ising model to be solved significantly faster than the speed at which similar problem sizes can be solved using alternative techniques and architectures (e.g., SLM) while keeping the size, weight, and power of the hardware implementation low. The manner in which the Ising model can be solved using the novel architecture of the computing engine described herein is described in more detail below.

[0116] Solving the Ising model with a public computing engine As mentioned above, NP-hard optimization problems are of interest in many fields, including finance, economics, cryptography, medicine, biology, and other scientific and social applications. However, solutions to such problems are not guaranteed to be found in polynomial time, i.e., they are not deterministic. As understood in computational complexity theory, NP-hard combinatorial optimization problems can be mapped to Ising Hamiltonian models (e.g., Ising spin glass matrices) and / or XY Hamiltonian models for efficient solution of NP-hard problems. Non-conventional processors, such as the computing engines described herein, can exploit properties unique to the physical system of the implementation (e.g., the far-field intensity, phase, amplitude, and interference patterns of the emitted optical signal beam) to achieve less resource-intensive algorithms that cannot be implemented by conventional processors. Processors that have been used to solve Ising model problems include quantum annealers, gate-based quantum computers, trapped ions, coherent Ising machines, stochastic nanomagnets, and spatial light modulators. However, conventional methods for solving such problems require resources (e.g., processors, computing power, and time) that grow exponentially with the size of the problem.

[0117] The computing engine 800 described herein utilizes different architectures and different types of engines / processing elements to solve NP-hard problems. This disclosure describes a photonic integrated circuit with an optical phased array (e.g., PIC-OPA shown in engines 800 and 900) used to solve NP-hard problems mapped to an Ising model (e.g., Ising spin glass matrix). The PIC-OPA computing engine 800 can include a uniform array of antennas spaced at uniform distances as shown in FIG. 6. The array elements 502 can each correspond to an adjustable phase modulator 708 that can be used to shape light beams and light patterns in the far field to solve the all-to-all coupled Ising model. The all-to-all coupled Ising model is an Ising model in which every spin (e.g., phase value of an array element 502 of an Ising spin glass matrix) is coupled to every other spin in the spin array. In other words, each phase value of each individual antenna is coupled to (e.g., influenced by) every other phase of every other array element 502 in the OPA 604, 901.

[0118] Photonic Ising solvers, such as the computing engine architecture described herein, offer advantages over other Ising solving methods, including the ability to encode the Ising spins of an Ising spin glass matrix in the optical phase of an optical signal beam emitted from an optical antenna, easy reconstruction of such phases, and infrastructure that is more compact, less complex, and less costly than infrastructure used for cold atom or ion based Ising solvers. Photonic Ising machines can further simulate all-to-all coupled Ising models for very large numbers of spins, which is not possible with alternative solvers. Compared to photonic spatial light modulators used to solve large scale Ising model problems, the PIC-OPA arrangements described herein (e.g., engines 800 and 900) offer more compact size and faster control of on-chip beam emission. Thus, the systems and computing engine 800 described herein are expected to be more compact and efficient solvers of NP-hard problems than current methods and architectures.

[0119] Some methods of solving the Ising model use spatial light modulators (SLMs) to find the solution. However, spatial light modulators can be large and slow, and therefore, in this disclosure, a PIC-OPA engine 800 is used to solve the Ising model. A PIC-OPA is more compact than an SLM, and programming a PIC-OPA (e.g., about 100 kHz to 1 MHz) is significantly faster than a conventional SLM (about 1 kHz). In addition, a large SLM also requires the use of two SLMs in series to solve the Ising model, which increases the size of the system. Furthermore, the use of two SLMs in series requires maintaining precise free-space alignment both between the SLMs and between the FPA to perform phase and amplitude modulation separately. The photonic processor computing engine device described herein allows for a more reliable and compact solution of the Ising model problem, eliminating the need for precise alignment between the OPA and the FPA.

[0120] In the photonic processor computing engines 800 and 900 described herein, the propagation of an optical signal beam from a near field (emitted directly from the device) to a far field (far enough away from the emission point of the optical signal beam such that the energy from the optical signal beam is inversely proportional to the square of the distance) is used for the Ising Hamiltonian energy calculation of the Ising spin glass matrix. The optical phased array (OPA) of the computing engines 800 and 900 includes an antenna array (e.g., 504 and 904) with corresponding adjustable phase shifters (e.g., 708 and 915) that emit optical signal beams that can form beams or patterns in the far field. The OPA can be used to encode and solve the Ising model and the XY model to obtain solutions to NP-hard problems. The Ising Hamiltonian energy H of the Ising spin glass matrix is ​​proportional to:

number

[0121] The photonic computing engines 800 and 900 with OPA can also be used to encode and solve problems in the XY model, which is the continuous-phase counterpart of the Ising model, where the spin-spin interaction part is proportional to

number

[0122] An example of solving an Ising model using a computing engine 800 is described below with reference to Figures 6-8. Although the engine 800 is used as an example, it is understood that a computing engine using any of the principles described herein can be used to solve an Ising model or an XY Hamiltonian model. To solve an Ising model or an XY model using the computing engine 800, laser light from the laser source 602 is routed through a branch 710 to the OPA 604. The phase / amplitude of the light can be shifted by a phase modulator 708 and an attenuator 709. The phase / amplitude of each optical signal beam from a number of emitting pixels (e.g., array elements 502) can be individually and independently controlled to represent an Ising spin glass matrix of an Ising spin model mapped to the emitting pixels. The phase of the light induced by the phase modulator 708 can represent a spin value in an Ising spin glass matrix. Thus, the array of array elements 502 emitting phase light can be viewed as an Ising spin glass matrix that includes an array or matrix of spin values ​​positioned relative to each other in the OPA. The spin values / phases representing the values ​​in the Ising spin glass matrix can be modeled using the Ising model and represent an NP-hard problem or a computationally difficult / intensive problem mapped to the array elements 502 of the OPA 604 as an Ising spin glass matrix.

[0123] The light travels through the waveguide 506 to the antenna 504, which radiates the optical signal beam towards the focal plane array 802. The resulting radiation pattern in the far field is imaged at the focal plane array 802. To find the Hamiltonian energy associated with a particular spin configuration (phase of the optical signal beam radiated from the antenna 504), the brightness / intensity of the far field pattern is calculated by summing the pixel intensities of periodic portions of the far field pattern at the focal plane array 802. The number of pixels of the focal plane array 802 does not have a one-to-one relationship with the radiating pixels of the OPA 604 (e.g., antenna 504 or array elements 502) and in practice may be significantly less than the number of radiating pixels of the OPA 604. The intensity calculation may be performed by the digital electronics 806 of an electronic feedback circuit electronically connected to the focal plane array 802. The electronic feedback circuit may be programmed to provide a feedback signal of the intensity measured by the focal plane array (FPA) to the electronic control circuitry. The digital electronics 806 may include a non-transitory computer readable storage medium and a processor that executes instructions stored on the storage medium to calculate a Hamiltonian energy based on pixel intensities observed in the far field pattern at the focal plane array 802. The digital electronics may then provide a feedback signal based on the Hamiltonian energy to the DRIIC layer 510 to adjust the phase of the optical signal beam B from the antenna 502. The electronic control circuitry (e.g., the DRIIC layer 510) may be programmed to process the feedback signal from the electronic feedback circuitry to adjust the settings of each of the optical phase modulators of the multiple emitting pixels to the ground energy state of the Ising spin glass matrix mapped to the emitting pixel.After the phase is adjusted based on the feedback signal, the antenna 504 can again radiate the optical signal beam to the focal plane array 802, which can output a signal indicative of the intensity of the far field pattern to the digital electronics 806, which can process the intensity of the far field pattern to provide another feedback signal to the DRIIC layer 510 for adjusting the phase of the antenna. This process can be repeated iteratively until the OPA reaches the ground state energy of the encoded Ising problem.

[0124] The iterations may be performed as a genetic algorithm. For example, the initial phase of each antenna 504 may be set to a desired starting point or initial condition as an Ising spin glass matrix. A genetic algorithm may be used to adjust the voltage applied to each phase modulator 708 and the phase of each optical signal beam emitted from the antenna 504 to reduce the far-field intensity and iteratively solve the ground state or minimum energy level of the Ising model. Once the ground state energy level is found for the Ising model, the phase of each antenna 504 in the OPA may be recovered using the Gerchberg-Saxton phase recovery algorithm, using the constraint of a uniform array structure in the near field, and using an image of the far-field interference pattern as the constraint in the far field. It is understood that any suitable phase retrieval algorithm may be used to obtain the phase value of each radiating pixel at the ground state energy level to determine a solution of the Ising model mapped to the radiating pixel as an Ising spin glass matrix. The final phase value associated with the radiating pixel (e.g., array element 502) of the OPA 604 at the ground state energy level of the Ising model represents a solution to the NP-hard problem mapped to the OPA as an Ising spin glass matrix.

[0125] With reference to Figures 6-8, an example of solving the XY model with the computing engine 800 is described below. Although the engine 800 is used as an example, it is understood that a computing engine using any of the principles described herein can be used to solve the Ising model or the XY Hamiltonian model. To solve the XY model with the computing engine 800, the laser light from the laser source 602 is routed through a branch 710 to the OPA 604. The phase / amplitude of the light can be shifted by a phase modulator 708 and an attenuator 709. The phase / amplitude of each optical signal beam from a number of emitting pixels (e.g., array elements 502) can be individually and independently controlled to represent the Ising spin glass matrix of the Ising spin model mapped to the emitting pixel. The phase of the light induced by the phase modulator 708 can represent the spin value in the Ising spin glass matrix, which can range from -π to π, or alternatively from 0 to 2π, in the XY Hamiltonian model. The spin values / phases representing values ​​in the XY Hamiltonian model may represent NP-hard or computationally difficult / computationally intensive problems modeled in the array elements 502 of the OPA 604 using the XY Hamiltonian model.

[0126] The light travels through the waveguide 506 to the antenna 504, which radiates the optical signal beam towards the focal plane array 802. The resulting radiation pattern in the far field is imaged at the focal plane array 802. To find the Hamiltonian energy associated with a particular spin configuration (phase of the optical signal beam radiated from the antenna 504), the brightness / intensity of the far field pattern is calculated by summing the pixel intensities of periodic portions of the far field pattern at the focal plane array 802. The number of pixels of the focal plane array 802 does not have a one-to-one relationship with the radiating pixels of the OPA 604 (e.g., antenna 504 or array elements 502) and in practice may be significantly less than the number of radiating pixels of the OPA 604. The intensity calculation may be performed by the digital electronics 806 of an electronic feedback circuit electronically connected to the focal plane array 802. The electronic feedback circuit may be programmed to provide a feedback signal of the intensity measured by the focal plane array (FPA) to the electronic control circuitry. The digital electronics 806 may include a non-transitory computer readable storage medium and a processor that executes instructions stored on the storage medium to calculate a Hamiltonian energy based on pixel intensities observed in the far field pattern at the focal plane array 802. The digital electronics may then provide a feedback signal based on the Hamiltonian energy to the DRIIC layer 510 to adjust the phase of the optical signal beam B from the antenna 502. The electronic control circuitry (e.g., the DRIIC layer 510) may be programmed to process the feedback signal from the electronic feedback circuitry to adjust the settings of each of the optical phase modulators of the multiple emitting pixels to the ground energy state of the Ising spin glass matrix mapped to the emitting pixel.After the phase has been adjusted based on the feedback signal, the antenna 504 can again radiate the optical signal beam to the focal plane array 802, which can output a signal indicative of the intensity of the far field pattern to the digital electronics 806, which can process the intensity of the far field pattern to provide another feedback signal to the DRIIC layer 510 for adjusting the phase of the antenna. This process can be repeated iteratively until the OPA reaches the encoded ground state energy of interest.

[0127] The iterations may be implemented as a genetic algorithm used to adjust the voltage applied to each phase modulator 708 to increase or decrease the far-field intensity to resolve the minimum or maximum intensity of a particular XY model. For example, the initial phase of each antenna 504 may be set to a desired starting point or initial condition. A genetic algorithm may be used to adjust the voltage applied to each phase modulator 708 and the phase of each optical signal beam emitted from the antenna 504 to reduce or increase the far-field intensity to iteratively resolve the maximum or minimum intensity of the XY model. Once the ground state energy levels are found for the Ising model, the phase of each antenna 504 in the OPA may be recovered using a Gerchberg-Saxton phase retrieval algorithm, using the constraint of a uniform array structure in the near field, and using an image of the far-field interference pattern as a constraint in the far field. It will be appreciated that any suitable phase retrieval algorithm may be used to obtain the phase value of each radiating pixel at the ground state energy level to determine a solution of the Ising model mapped to the radiating pixels as an Ising spin glass matrix. The final phase value associated with the radiating pixel (eg, array element 502) of the OPA 604 at the minimum (or maximum) energy state of the XY model represents the solution to the NP-hard problem that has been mapped to the OPA as an XY problem.

[0128] FIG. 15 illustrates exemplary operations and algorithms for computing the ground energy state of an NP-hard problem mapped to either the Ising model or the XY Hamiltonian model. As described elsewhere in this disclosure, the photonic processor computing engine described herein can perform a number of computer-implemented operations to solve an NP-hard problem using the Ising model or the XY Hamiltonian model. The engines described herein (e.g., 800 and 900) can include one or more memory devices (e.g., RAM, ROM, or other non-transitory computer-readable storage medium used to store software instructions) and one or more processors that execute instructions stored in the memory to perform various operations. The memory devices and / or processors can be incorporated into one or both of the electronic feedback circuitry and the DRIIC layer 510 (e.g., electronic control circuitry) that includes the digital electronics 806. Additionally, the memory devices and / or processors can alternatively be located at locations remote from the electronic feedback circuitry and the electronic control circuitry and can alternatively provide instructions to the respective circuits via wired or wireless communication.

[0129] The processor can execute instructions stored in the memory to perform the operations of the photonic processor computing engine described herein. A process for computing a solution to a particular NP-hard problem using the Ising model or the XY Hamiltonian model is shown in FIG. 15 and described as follows. As shown in FIG. 15, this process may be a computer-implemented method in which the processor executes instructions stored in a non-transitory computer-readable storage medium. The processor and the storage medium may be part of the photonic processor computing engine and / or the photonic processor computing system described herein.

[0130] The computer-implemented method 1500 may include step 1501 of starting a process. The method may further include a step of setting a phase value of the phase modulator 708 of the computing engine 800 based on an initial condition or a step for mapping to an Ising spin glass matrix or an XY Hamiltonian problem. For an Ising model, the phase is either a first value 0 or a second value π. For an XY Hamiltonian model, the phase can be any phase value between -π and π, or alternatively between 0 and 2π. In step 1503, the method may cause an emitting pixel (e.g., array element 502, antenna 504) to emit electromagnetic radiation with a phase (and optionally amplitude) provided by the laser source 602 and modulated based on the initial phase value set in step 1502. The emitted optical signal beam of electromagnetic radiation then reaches the focal plane array 802. In step 1504, the intensity of the electromagnetic radiation reaching the focal plane array 802 may be measured and processed by the digital electronics 806. At this point, in step 1505, a Hamiltonian energy calculation may be performed for the intensity to see if the ground state energy level of the Ising spin glass or XY Hamiltonian model has been reached. If the answer is no, the method may proceed to step 1506, where a feedback signal may be provided to the phase modulator to adjust the phase of the array element 502 to attempt to reach the ground state energy level. The phase may be adjusted based on a genetic algorithm designed to reach the ground state energy level of the system. For the Ising model, the phase may be either a first value 0 or a second value π. For the XY Hamiltonian model, the phase may be any phase value between -π and π, or alternatively between 0 and 2π. In step 1507, the phase of the phase modulator 708 and the array element 502 may be readjusted, at which point the process returns to step 1503 to emit light from the emissive pixels and measure the intensity at the focal plane array 802.In step 1505, if the ground state energy is reached (e.g., "yes" at step 1505), the process proceeds to step 1508, where phase values ​​for the phase modulators 708 of each array element 502 are obtained. The obtained phase values ​​represent a solution to the Ising model problem or XY Hamiltonian problem mapped to the engine. Processing ends at step 1509.

[0131] It is understood that the method 1500 may be implemented in a photonic processor computing engine, a photonic processor computing engine system (e.g., engine 800 or 900 further including laser source 602), a non-transitory machine-readable storage medium, or may be implemented as a computer-implemented method.

[0132] Reference has been made to the examples illustrated in the drawings, and specific language has been used herein to describe these. It will be understood, however, that no limitation of the scope of the technology is intended thereby. Modifications and further variations of the features illustrated herein, as well as additional uses of the examples illustrated herein, should be considered within the scope of the description.

[0133] Although the present disclosure may not explicitly disclose that some embodiments or features described herein may be combined with other embodiments or features described herein, the present disclosure should be read to describe any such combinations that may be performed by one of ordinary skill in the art. The use of "or" in this disclosure should be understood to mean a non-exclusive or, i.e., "and / or," unless otherwise indicated herein.

[0134] Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the foregoing description, numerous specific details, such as examples of various configurations, have been provided to provide a thorough understanding of examples of the described technology. However, it will be understood that the technology may be practiced without one or more of the specific details, or with other methods, components, devices, etc. In other instances, well-known structures or operations have not been shown or described in detail to avoid obscuring aspects of the technology.

[0135] Although the subject matter has been described in language specific to structural features and / or operations, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features and operations described. Rather, the specific features and operations described above are disclosed as example forms of implementing the claims. Numerous modifications and alternative arrangements may be devised without departing from the spirit and scope of the described technology.

Claims

1. an optical phased array (OPA) including a plurality of emitting pixels configured to emit an optical signal beam based on electromagnetic radiation, each of the plurality of emitting pixels including an optical antenna and an optical phase modulator; a photonic integrated circuit (PIC) including: an electronic control circuit in electrical communication with the optical phased array (OPA) for calibrating and controlling the optical phase modulators of the OPA; a focal plane array (FPA) positioned to receive the optical signal beams transmitted from the plurality of emissive pixels; and an electronic feedback circuit in electrical communication with the focal plane array (FPA) and the electronic control circuitry to process a measured intensity of the optical signal beam received from the optical phased array (OPA) by a defined portion of the focal plane array (FPA), and to provide a feedback signal to the electronic control circuitry based on the measured intensity to recalibrate the optical phase modulators of the plurality of emitting pixels, thereby controlling the phase of the optical signal beam emitted by the plurality of emitting pixels.

2. 13. The photonic processor computing engine device of claim 1, further comprising a lens assembly including one or more lenses and disposed between said photonic integrated circuit (PIC) and said focal plane array (FPA) to project said far field from said emissive pixels onto said focal plane array (FPA).

3. a photonic layer including the optical phased array (OPA); 2. The photonic processor computing engine device of claim 1, further comprising: an electronic layer including the electronic control circuitry disposed on a surface of the photonic layer, the electronic control circuitry including a digital readout integrated circuit (DRIIC) board in electrical communication with the optical phase modulator of each of the emissive pixels, the digital readout integrated circuit being configured to apply a voltage to control each of the optical phase modulators.

4. The photonic processor computing engine device of claim 3 , wherein the electronic layer comprises one or more CMOS circuits.

5. The (PIC) is a plurality of optical waveguides, each optically coupled to one of the plurality of emissive pixels of the optical phased array (OPA); 10. The photonic processor computing engine device of claim 1, further comprising: an electromagnetic radiation inlet configured to receive electromagnetic radiation from an electromagnetic radiation source; and a cascaded waveguide tree including a plurality of waveguide branches in optical communication with the electromagnetic radiation inlet and the plurality of optical waveguides.

6. The (PIC) is a main optical waveguide in communication with an electromagnetic radiation source and configured to receive electromagnetic radiation from the electromagnetic radiation source; 10. The photonic processor computing engine device of claim 1, further comprising: a plurality of branch optical waveguides, each optically coupled to the main optical waveguide and to two or more emissive pixels of the plurality of emissive pixels.

7. 2. The photonic processor computing engine device of claim 1, wherein the electronic control circuitry controls the optical phase modulators of the optical phased array (OPA) to map a computationally hard problem as an Ising spin glass matrix to the radiative pixels.

8. 8. The photonic processor computing engine device of claim 7, wherein the electronic control circuitry controls the optical phase modulator to have a phase value of either 0 or π as an Ising spin value of the Ising spin glass matrix mapped to the radiating pixel.

9. 9. The photonic processor computing engine device of claim 8, wherein the PIC further comprises an optical attenuator or amplifier, and the electronic control circuitry independently controls each of the optical phase modulators and attenuators or amplifiers to independently control the amplitude and phase of each of the optical signal beams of the plurality of emitting pixels and represents an Ising spin glass matrix of the Ising spin model mapped to the emitting pixels.

10. 10. The photonic processor computing engine device of claim 9, wherein the electronic feedback circuitry is programmed to provide feedback of the measured intensity of the optical signal beam received by at least a defined portion of the focal plane array (FPA) to the electronic control circuitry, the electronic control circuitry being programmed to process the feedback and adjust the settings of each of the optical phase modulators of the plurality of emissive pixels.

11. 8. The photonic processor computing engine device of claim 7, wherein the electronic control circuitry controls the optical phase modulator to have phase values ​​from -π to π as values ​​of an XY Hamiltonian model mapped to the radiating pixels.

12. 12. The photonic processor computing engine device of claim 11, wherein the PIC further comprises an optical attenuator or amplifier, and wherein the electronic control circuitry independently controls each of the optical phase modulators and attenuators / amplifiers to independently control the amplitude and phase of each of the optical signal beams of the plurality of emissive pixels to represent an XY Hamiltonian model mapped to the emissive pixels.

13. 13. The photonic processor computing engine device of claim 12, wherein the electronic feedback circuitry is programmed to provide feedback of the measured intensity of the optical signal beam received by at least a defined portion of the focal plane array (FPA) to the electronic control circuitry, the electronic control circuitry being programmed to process the feedback and adjust the setting of each of the optical phase modulators of the plurality of emissive pixels to a signal that correlates to the ground energy state of the XY Hamiltonian model mapped to the emissive pixel.

14. 2. The photonic processor computing engine device of claim 1, wherein the focal plane array (FPA) comprises a plurality of pixels, the plurality of image pixels being fewer in number than the plurality of radiation pixels of the optical phased array (OPA).

15. The method further includes a plurality of said photonic integrated circuits (PICs), each of which comprises: an optical phased array (OPA) including a plurality of emitting pixels configured to emit an optical signal beam based on electromagnetic radiation, each of the plurality of emitting pixels including an optical antenna and an optical phase modulator; an electronic control circuit in electrical communication with the OPA for calibrating and controlling the optical phase modulators of the OPA; 2. The photonic processor computing engine device of claim 1, wherein the focal plane array (FPA) is positioned to receive the optical signal beams transmitted from the plurality of emissive pixels of one or more of the plurality of photonic integrated circuits (PICs).

16. 16. The photonic processor computing engine device of claim 15, further comprising a plurality of focal plane arrays (FPAs), each positioned to receive the optical signal beams transmitted from the plurality of emissive pixels of one or more of the plurality of photonic integrated circuits (PICs).

17. A source of electromagnetic radiation; a photonic processor computing engine device including at least one photonic integrated circuit (PIC) including a plurality of emitting pixels that emit optical signal beams based on electromagnetic radiation from the electromagnetic radiation source, each of the emitting pixels including an optical antenna and an optical phased array (OPA) including an optical phase modulator; at least one focal plane array (FPA) positioned to receive the optical signal beams transmitted from the plurality of emissive pixels; at least one processor in electronic communication with the optical phase modulator and the focal plane array; a memory device, the system, when executed by the at least one processor, comprising: measuring an intensity of the optical signal beam received from the optical phased array (OPA) by a defined portion of the focal plane array (FPA); providing a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam; controlling the optical phase modulators of the plurality of emissive pixels to control the phase of the optical signal beam emitted by the plurality of emissive pixels to a state relative to a ground energy state; and the memory device adapted to obtain the phase of the optical phase modulator at the state correlated to the ground energy state.

18. 1. A computer-implemented method for solving a computationally difficult problem using a photonic processor computing engine device including an optical phased array (OPA) and a focal plane array (FPA), comprising: emitting optical signal beams from a plurality of emitting pixels of the optical phased array (OPA) to the focal plane array (FPA), each of the emitting pixels including an optical antenna and an optical phase modulator; measuring an intensity of the optical signal beam received by a defined portion of the focal plane array (FPA) from the emitting pixels of the optical phased array (OPA); providing a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam; actuating the optical phase modulators of the plurality of emissive pixels to control the phase of the optical signal beam emitted by the plurality of emissive pixels to a state relative to a ground energy state; obtaining the phase of the optical phase modulator at a predetermined value of the intensity at the focal plane array.

19. individually controlling each of said optical phase modulators such that an optical signal beam emitted from each of said emissive pixels has a binary phase value of either a first value or a second value; providing feedback to the optical phase modulator of the measured intensity of the optical signal beam received by a defined portion of the focal plane array (FPA); 20. The computer-implemented method of claim 18, further comprising: processing the feedback signal to recalibrate the optical phase modulators of the plurality of emitting pixels to the states that correlate to the ground energy state of the Ising spin glass mapped to the emitting pixels.

20. 20. The method of claim 19, wherein the optical phase modulator has a phase value of either 0 or π as an Ising spin value for each radiating pixel.

21. 21. The method of claim 20, wherein the PIC further comprises an optical attenuator or amplifier, each of the optical phase modulators and optical attenuators / amplifiers being independently controlled to control the amplitude and phase of a respective emitted optical signal beam for each of the plurality of emitting pixels to represent an Ising spin glass matrix of the Ising spin model mapped to the emitting pixel.

22. The method of claim 18 , wherein the optical phase modulator has phase values ​​from −π to π as values ​​of an XY Hamiltonian model for each radiative pixel.

23. 20. The method of claim 18, wherein the PIC further comprises an optical attenuator or amplifier, each of the optical phase modulators and optical attenuators / amplifiers being independently controlled to control the amplitude and phase of each of the emitted optical signal beams of each of the plurality of emissive pixels to represent an XY Hamiltonian model mapped to the emissive pixels.

24. 1. A non-transitory machine-readable storage medium containing instructions embodied therein that, when executed by at least one processor, cause a photonic processing engine, including an optical phased array (OPA) and a focal plane array (FPA), to: Emitting optical signal beams from a plurality of radiating pixels of the optical phased array (OPA) to the focal plane array (FPA), each of the radiating pixels including an optical antenna and an optical phase modulator; measuring an intensity of the optical signal beam received by a defined portion of the focal plane array (FPA) from the emitting pixels of the optical phased array (OPA); providing a feedback signal to the optical phase modulator based on the measured intensity of the optical signal beam; controlling the optical phase modulators of the plurality of emissive pixels to control the phase of the optical signal beam emitted by the plurality of emissive pixels to a state relative to a ground energy state; The non-transitory machine-readable storage medium obtains the phase of the optical phase modulator in a state correlated to the ground energy state.

25. The instructions, when executed by at least one processor, further cause the photonic processing engine to: Independently controlling each of the optical phase modulators; providing feedback to the optical phase modulator of the measured intensity of the optical signal beam received by a defined portion of the focal plane array (FPA); 25. The non-transitory machine-readable storage medium of claim 24, further comprising: processing the feedback signal to recalibrate the optical phase modulators of the plurality of radiating pixels to states correlated to the ground energy states of the Ising spin glass matrices mapped to the radiating pixels.

26. 26. The non-transitory machine-readable storage medium of claim 25, wherein the photonic processing engine individually controls each of the optical phase modulators such that the optical signal beam from each of the emissive pixels has a binary phase value that is either a first value or a second value, the binary phase value being either 0 or π as an Ising spin value for each emissive pixel.

27. The instructions, when executed by at least one processor, further cause the photonic processing engine to:

27. The non-transitory machine-readable storage medium of claim 26, wherein the phase (and amplitude) of each of the emitted optical signal beams of each of the plurality of emissive pixels is individually controlled to represent an Ising spin glass matrix of the Ising spin model mapped to the photonic processor computing engine device.

28. 26. The non-transitory machine-readable storage medium of claim 25, wherein the optical phase modulator has phase values ​​from -π to π as values ​​of the XY Hamiltonian model for each radiative pixel.

29. The instructions, when executed by at least one processor, further cause the photonic processing engine to:

30. The non-transitory machine-readable storage medium of claim 28, wherein the phase (and amplitude) of each of the emitted optical signal beams of each of the plurality of emissive pixels is individually controlled to represent an XY Hamiltonian model mapped to the photonic processor computing engine device.