Constant voltage generation circuit

Abstract

To provide a constant voltage generation circuit with high accuracy output.SOLUTION: The constant voltage generation circuit 1 comprises a current source CS which generates an electric current I proportional to the temperature, and a first transistor M2 through which the electric current I flows. The constant voltage generation circuit 1 outputs an interelectrode voltage Vgs2 between a control electrode of the first transistor M2 and a first main electrode, or a voltage corresponding thereto, as an output voltage VOUT.SELECTED DRAWING: Figure 18

Description

[Technical field]

[0001] The present disclosure relates to a constant voltage generating circuit. [Background technology]

[0002] Conventionally, as one type of constant-voltage generating circuit, an ED type constant-voltage source that combines a depletion-type metal oxide semiconductor field effect transistor (NMOSFET) and an enhancement-type NMOSFET is widely known.

[0003] As examples of the related prior art, Patent Documents 1 and 2 proposed by the applicant of the present application can be mentioned. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2021 / 172001 [Patent Document 2] International Publication No. 2021 / 241257

[0005] [overview] However, in the above-mentioned conventional constant voltage generating circuit, there is room for improvement in output accuracy.

[0006] For example, a constant voltage generating circuit according to the present disclosure includes a current source configured to generate a reference current proportional to temperature, and a first transistor configured to pass the reference current, and outputs an inter-electrode voltage between a control electrode and a first main electrode of the first transistor or a voltage corresponding thereto as an output voltage.

[0007] However, other features, elements, steps, advantages, and characteristics will become more apparent from the detailed description that follows and the accompanying drawings related thereto. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating a comparative example of a constant voltage generating circuit. [Diagram 2] FIG. 2 is a diagram showing the temperature characteristics of the output voltage in the comparative example. [Diagram 3] FIG. 3 is a diagram showing a first embodiment of a constant voltage generating circuit. [Figure 4] FIG. 4 is a diagram showing the temperature characteristics of the output voltage in the first embodiment. [Diagram 5] FIG. 5 is a diagram showing a second embodiment of the constant voltage generating circuit. [Figure 6] FIG. 6 is a diagram showing variations in output voltage in the first and second embodiments. [Figure 7] FIG. 7 is a diagram showing a third embodiment of the constant voltage generating circuit. [Figure 8] FIG. 8 is a diagram showing variations in output voltage in the third embodiment. [Figure 9] FIG. 9 is a diagram showing a fourth embodiment of the constant voltage generating circuit. [Figure 10] FIG. 10 is a diagram showing a constant voltage generating circuit according to a fifth embodiment. [Figure 11] FIG. 11 is a diagram showing a sixth embodiment of the constant voltage generating circuit. [Figure 12] FIG. 12 is a diagram showing a seventh embodiment of the constant voltage generating circuit. [Figure 13] FIG. 13 is a diagram showing an eighth embodiment of the constant voltage generating circuit. [Figure 14] FIG. 14 is a diagram showing a ninth embodiment of the constant voltage generating circuit. [Figure 15] FIG. 15 is a diagram showing a constant voltage generating circuit according to a tenth embodiment. [Figure 16] FIG. 16 is a diagram showing an eleventh embodiment of the constant voltage generating circuit. [Figure 17] FIG. 17 is a diagram showing a constant voltage generating circuit according to a twelfth embodiment. [Figure 18] FIG. 18 is a diagram showing a constant voltage generating circuit according to a thirteenth embodiment.

[0009] [Detailed Description] <Comparative Example> 1 is a diagram showing a comparative example of a constant voltage generating circuit (basic configuration to be compared with the embodiments described later). The constant voltage generating circuit 1 of this comparative example is a so-called ED type reference voltage source. With reference to this figure, the constant voltage generating circuit 1 includes a transistor M1 (e.g., a depletion type NMOSFET) and a transistor M2 (e.g., an enhancement type NMOSFET).

[0010] Note that the depletion type is one in which a drain current flows even when the gate-source voltage is 0 V. On the other hand, the enhancement type is one in which no drain current flows when the gate-source voltage is 0 V.

[0011] The drain of the transistor M1 is connected to a terminal to which an input voltage VIN (e.g., 5V) is applied. The source and back gate of the transistor M2 are connected to a ground terminal (=reference potential terminal). The gate, source and back gate of the transistor M1 and the gate and drain of the transistor M2 are all connected to a terminal to which an output voltage VOUT is applied.

[0012] In the constant voltage generating circuit 1 of this comparative example, the gate and source of the transistor M1 are shorted. Therefore, the gate-source voltage Vgs1 of the transistor M1 is 0V. Therefore, the transistor M1 functions as a constant current source that generates a constant drain current. In other words, a constant bias current (= the drain current of the transistor M1) flows through the transistor M2. As a result, a constant output voltage VOUT equivalent to the gate-source voltage Vgs2 of the transistor M2 is generated.

[0013] <Considerations regarding temperature characteristics of output voltage VOUT> Meanwhile, the currents I1 and I2 flowing through the transistors M1 and M2, respectively, operating in the saturation region, are expressed by the following formulas (1a) and (1b).

[0014]

number

[0015] In the above formulas (1a) and (1b), μ1 and μ2 are the carrier mobilities of the transistors M1 and M2, respectively. Cox is the oxide film capacitance of the transistors M1 and M2, respectively. W1 and W2 are the gate widths of the transistors M1 and M2, respectively. L1 and L2 are the gate lengths of the transistors M1 and M2, respectively. Vth1 and Vth2 are the threshold voltages of the transistors M1 and M2, respectively.

[0016] In the constant voltage generating circuit 1, I1=I2 holds. Therefore, the output voltage VOUT is expressed by the following equation (2).

[0017]

number

[0018] The threshold voltage Vth1 of the depletion-type transistor M1 is a negative value. Therefore, the above formula (2) can be expressed as the following formula (3).

[0019]

number

[0020] Therefore, the temperature characteristics of the threshold voltages Vth1 and Vth2 can be offset by appropriately designing the W / L of each of the transistors M1 and M2.

[0021] FIG. 2 is a diagram showing the temperature characteristics of the output voltage VOUT in the comparative example.

[0022] Ideally, the output voltage VOUT generated by the constant voltage generating circuit 1 should always be a constant value, independent of temperature T, within the operating temperature range of the constant voltage generating circuit 1, as shown on the left side of this diagram.

[0023] However, the actual output voltage VOUT has a second-order temperature characteristic (a mountain-shaped or bowl-shaped temperature characteristic) as shown in the center of this figure (corresponding to the enlarged view of the left figure). This is thought to be due to the influence of leakage currents and other factors of actual elements. In other words, the temperature characteristic of the output voltage VOUT changes depending on the process used and the size of the element.

[0024] In the constant voltage generating circuit 1 of the comparative example, the element sizes of the transistors M1 and M2 are generally determined by prioritizing flattening the first-order temperature characteristic of the output voltage VOUT. Therefore, as described above, it is difficult to cancel the second-order temperature characteristic of the output voltage VOUT.

[0025] In conventional applications, there was no particular problem even if the output voltage VOUT had a secondary temperature characteristic. However, in recent years, the characteristics required of semiconductor devices have become more precise, and there is an increasing need to improve the secondary temperature characteristic.

[0026] However, if the element sizes of the transistors M1 and M2 are determined so as to cancel the second-order temperature characteristic of the output voltage VOUT, the first-order temperature characteristic will deteriorate, as shown on the right side of the figure, and as a result, the output voltage VOUT may fluctuate significantly with temperature T.

[0027] In the following, in consideration of the above considerations, an embodiment capable of improving the temperature characteristics of the output voltage VOUT will be proposed.

[0028] First Embodiment 3 is a diagram showing a first embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the above comparative example (FIG. 1) and further includes resistors R1 and R2.

[0029] The drain of the transistor M1 is connected to an application terminal of the input voltage VIN. The source and back gate of the transistor M1 are both connected to a first terminal of the resistor R1. The source and back gate of the transistor M2 are both connected to a first terminal of the resistor R2. The second terminal of the resistor R2 is connected to the ground terminal. The gate of the transistor M1, the gate and drain of the transistor M2, and the second terminal of the resistor R1 are all connected to an application terminal of the output voltage VOUT.

[0030] In this manner, resistor R1 is connected between the gate and source of transistor M1. Resistor R2 is connected between the source of transistor M2 (corresponding to the first main electrode) and the ground terminal. That is, resistors R1 and R2 are connected in series between the application terminal of input voltage VIN and the ground terminal. Therefore, a current I flows through resistor R2 that is equal to the current I (=Vgs1 / R1) flowing through resistor R1. Therefore, a voltage V (=Vgs1×(R2 / R1)) corresponding to the current I is generated across resistor R2.

[0031] In addition, the gate of the transistor M1, the second terminal of the resistor R1, and the drain of the transistor M2 are directly connected to the application terminal of the output voltage VOUT.

[0032] Furthermore, the gate of the transistor M2 is directly connected to the application terminal of the output voltage VOUT. Therefore, the constant voltage generating circuit 1 outputs the sum of the gate-source voltage Vgs2 of the transistor M2 and the voltage V across the resistor R2 as the output voltage VOUT (=Vgs2+Vgs1×(R2 / R1)).

[0033] The resistors R1 and R2 may be elements having the same temperature characteristic. For example, the resistors R1 and R2 may both be polysilicon resistors having a negative temperature characteristic. Also, for example, the resistors R1 and R2 may both be diffused resistors having a positive temperature characteristic.

[0034] 4 is a diagram showing the temperature characteristic of the output voltage VOUT in the first embodiment. As shown in the upper left of this figure, the gate-source voltage Vgs2 of the enhancement type transistor M2 has a negative temperature characteristic. That is, the gate-source voltage Vgs2 decreases as the temperature T increases.

[0035] On the other hand, as shown in the lower left of the figure (dash line), the gate-source voltage Vgs1 of the depletion-type transistor M1 has a positive temperature characteristic. In other words, the higher the temperature T, the higher the gate-source voltage Vgs1. Therefore, as shown in the lower left of the figure (solid line), the voltage V (= Vgs1 × (R2 / R1)) across resistor R2 also has a positive temperature characteristic. In other words, the higher the temperature T, the higher the voltage V across resistor R2.

[0036] Therefore, by appropriately adjusting the element sizes of the transistors M1 and M2 and the resistance values ​​of the resistors R1 and R2, the temperature characteristics of the output voltage VOUT can be made closer to flatter than the comparative example (dashed line) described above.

[0037] In one example of the adjustment process, in the first step, the element sizes (and thus the element size ratio) of the transistors M1 and M2 may be determined so that the quadratic temperature characteristics of the gate-source voltages Vgs1 and Vgs2, respectively, are offset. For example, if the output voltage VOUT is a quadratic function of temperature T, f(T)=ax 2 When expressed as +bx+c, the element sizes of the transistors M1 and M2 may be adjusted so that the quadratic coefficient a in the quadratic function f(T) becomes zero.

[0038] In this state, if the gate-source voltage Vgs2 of the transistor M2 and the voltage V across the resistor R2 are simply added together, the first-order temperature characteristics of the gate-source voltages Vgs1 and Vgs2 may remain.

[0039] Therefore, in the subsequent second step, the resistance values ​​(and hence the resistance ratio) of the resistors R1 and R2 may be adjusted. For example, the resistance values ​​of the resistors R1 and R2 may be adjusted so that the linear coefficient b in the quadratic function f(T) becomes 0.

[0040] More specifically, for example, if the output voltage VOUT still has a negative temperature characteristic, the resistance values ​​of the resistors R1 and R2 may be adjusted so that R2>R1. With such an adjustment, the temperature characteristic (positive) of the gate-source voltage Vgs1 becomes dominant over the temperature characteristic (negative) of the gate-source voltage Vgs2. Therefore, the temperature characteristic of the output voltage VOUT approaches flat.

[0041] In addition, when the resistance values ​​of the resistors R1 and R2 are adjusted, the secondary temperature characteristics offset in the first step may be shifted. Therefore, in a third step, the element sizes of the transistors M1 and M2 may be fine-tuned.

[0042] By the series of adjustment processes described above, a highly accurate output voltage VOUT with a nearly flat temperature characteristic can be generated, as shown on the right side of the figure.

[0043] <Second embodiment> 5 is a diagram showing a second embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the first embodiment (FIG. 3) and further includes a transistor M3 (e.g., a depletion-type NMOSFET) and a resistor R3.

[0044] The drains of the transistors M1 and M3 are both connected to an application terminal of the input voltage VIN. The source and backgate of the transistor M1 are connected to a first terminal of the resistor R1. The source and backgate of the transistor M2 are connected to a first terminal of the resistor R2. The gate of the transistor M1, the drain of the transistor M2, and the second terminal of the resistor R1 are all connected to the gate of the transistor M3. The gate of the transistor M2, the source and backgate of the transistor M3, and the first terminal of the resistor R3 are all connected to an application terminal of the output voltage VOUT. The second terminals of the resistors R2 and R3 are all connected to the ground terminal.

[0045] The transistor M3 connected in this manner functions as a voltage follower VF (a source follower in the figure). That is, in the constant voltage generating circuit 1 of this embodiment, the gate of the transistor M1, the second terminal of the resistor R1, and the drain of the transistor M2 are connected to the application terminal of the output voltage VOUT via the voltage follower VF.

[0046] Even when the voltage follower VF is introduced, the output voltage VOUT is the sum of the gate-source voltage Vgs2 of the transistor M2 and the voltage V across the resistor R2 (=Vgs2+Vgs1×(R2 / R1)), as in the first embodiment (FIG. 3).

[0047] According to this embodiment, the current capability of the constant voltage generating circuit 1 is increased without affecting the temperature characteristics of the output voltage VOUT. It is preferable to use an element having a current capability larger than those of the transistors M1 and M2 as the transistor M3.

[0048] In addition, the gate of the transistor M2 is directly connected to the application terminal of the output voltage VOUT. Therefore, negative feedback control is applied to the transistor M2 so that the output voltage VOUT is constant. The resistor R3 functions as a leakage current absorption element. However, if a separate load is connected to the application terminal of the output voltage VOUT, the resistor R3 may be omitted.

[0049] Furthermore, if a depletion-type NMOSFET is used as a component of the voltage follower VF, it becomes possible to output the output voltage VOUT following the input voltage VIN immediately after the input voltage VIN is applied.

[0050] Although not shown in the figure, the transistor M3 may be replaced with an enhancement type NMOSFET or a bipolar type npn transistor.

[0051] The gate and base of a transistor can be interpreted as corresponding to the control electrode of the transistor, the source and emitter of a transistor can be interpreted as corresponding to the first main electrode of the transistor, and the drain and collector of a transistor can be interpreted as corresponding to the second main electrode of the transistor.

[0052] FIG. 6 is a diagram showing the variation of the output voltage VOUT in the first and second embodiments. As described above, in the constant voltage generating circuit 1 of the first and second embodiments, the temperature characteristic of the output voltage VOUT can be made nearly flat. However, the gate-source voltages Vgs1 and Vgs2 of the transistors M1 and M2, respectively, vary relatively widely. Therefore, the variation of the output voltage VOUT (=Vgs2+Vgs1×(R2 / R1)) is also likely to increase. In the following, in view of the above considerations, various embodiments are proposed that can reduce the variation of the output voltage VOUT compared to the first and second embodiments.

[0053] <Third embodiment> 7 is a diagram showing a third embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the second embodiment (FIG. 5) and includes a current source CS instead of the transistor M1 and resistor R1.

[0054] The current source CS may be a PTAT [proportional to absolute temperature] current source that generates a current I (corresponding to a reference current) that is proportional to temperature T (absolute temperature). That is, the current I is large at high temperatures and small at low temperatures.

[0055] With reference to this figure, the current source CS includes transistors Q1 and Q2 (eg, npn-type transistors), transistors Q3 to Q5 (eg, pnp-type transistors), and a resistor R0.

[0056] The emitter of transistor Q1 is connected to the ground terminal (corresponding to the reference potential terminal). The emitter of transistor Q2 is connected to a first terminal of resistor R0. The second terminal of resistor R0 is connected to the ground terminal. The bases of transistors Q1 and Q2 are both connected to the collector of transistor Q1. Transistors Q1 and Q2 connected in this manner function as a current mirror CM1 that replicates the current flowing through the input terminal to the output terminal. The collector of transistor Q1 corresponds to the input terminal of current mirror CM1. The collector of transistor Q2 corresponds to the output terminal of current mirror CM1. Transistors Q1 and Q2 may have an emitter area ratio of 1:N (e.g., N>1).

[0057] The emitters of the transistors Q3 to Q5 are all connected to the application terminal of the input voltage VIN. The bases of the transistors Q3 to Q5 are all connected to the collector of the transistor Q4. The transistors Q3 to Q5 connected in this manner function as a current mirror CM2 that replicates the current flowing through the input terminal to a first output terminal and a second output terminal, respectively. The collector of the transistor Q3 corresponds to a first output terminal of the current mirror CM2. The collector of the transistor Q4 corresponds to an input terminal of the current mirror CM2. The collector of the transistor Q5 corresponds to a second output terminal of the current mirror CM2 (and therefore to an output terminal of the current source CS).

[0058] The collector of transistor Q4 is connected to the collector of transistor Q2. That is, the input terminal of current mirror CM2 is connected to the output terminal of current mirror CM1. The collector of transistor Q3 is connected to the collector of transistor Q1. That is, the first output terminal of current mirror CM2 is connected to the input terminal of current mirror CM1. The collector of transistor Q5 is connected to the drain of transistor M2 as the output terminal of current source CS (i.e., the output terminal of current I).

[0059] When the current source CS is started, a start-up current is flowed into the collector of the transistor Q1 via a start-up switch (not shown) or the like. The collector current of the transistor Q1 is replicated as the collector current of the transistor Q2 by the action of the current mirror CM1. The collector current of the transistor Q2 (and thus the collector current of the transistor Q4) is replicated as the collector current of the transistor Q3 (and thus the collector current of the transistor Q1) by the action of the current mirror CM2.

[0060] In this way, the current mirrors CM1 and CM2 form a series of current loops. Here, the current I (corresponding to the output current of the current mirror CM) flowing through the collector of the transistor Q2 flows through the resistor R0 connected to the emitter of the transistor Q2. At this time, the resistor R0 has a voltage V0 (=V T × lnN, where V T =kT / q) occurs. Here, k is the Boltzmann coefficient, T is temperature (absolute temperature), and q is the electron charge. Therefore, the current I (=V0 / R0) flowing through the resistor R0 is proportional to the temperature T.

[0061] Moreover, the above current I is replicated as the collector current of transistor Q5 and flows into resistor R2 via transistor M2. Therefore, a voltage V2 (=I×R2=V0×(R2 / R0)) corresponding to the current I is generated across resistor R2. The voltage V2 across resistor R2 thus generated has a positive temperature characteristic, just like the current I. In other words, the higher the temperature T, the higher the voltage V2 across resistor R2.

[0062] On the other hand, the gate-source voltage Vgs2 of the transistor M2 has a negative temperature characteristic as described above. That is, the gate-source voltage Vgs2 decreases as the temperature T increases.

[0063] Here, the constant voltage generating circuit 1 outputs the sum of the gate-source voltage Vgs of the transistor M2 and the voltage V2 across the resistor R2 (=Vgs2+V2) as the output voltage VOUT.

[0064] Therefore, by appropriately adjusting the element sizes of the transistors Q1 and Q2, the element size of the transistor M2, and the resistance values ​​of the resistors R0 and R2, the temperature characteristics of the output voltage VOUT can be made closer to flat, as in the first embodiment (FIG. 3) and the second embodiment (FIG. 5) described above.

[0065] 8 is a diagram showing the variation of the output voltage VOUT in the third embodiment. As described above, the constant voltage generating circuit 1 of the third embodiment includes a current source CS instead of the depletion type transistor M1. Therefore, the voltage V2 across the resistor R2 is determined according to the emitter area ratio of the transistors Q1 and Q2 and the resistance ratio of the resistors R0 and R2.

[0066] The variations in the emitter area ratio and the resistance ratio are sufficiently smaller than the variations in the gate-source voltage Vgs1 of the transistor M1. Therefore, the constant voltage generating circuit 1 of the third embodiment has less variation in the output voltage VOUT than the first embodiment (FIG. 3) and the second embodiment (FIG. 5).

[0067] <Fourth embodiment> 9 is a diagram showing a fourth embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the third embodiment (FIG. 7) with a modification to the connection relationship of the resistor R2. In accordance with this figure, the second terminal of the resistor R2 is not directly connected to the ground terminal, but is connected to the ground terminal via a resistor R0. In other words, the second terminal of the resistor R2 is connected to the connection node between the emitter of the transistor Q2 and the first terminal of the resistor R0.

[0068] In this case, the current I flowing through the resistor R0 is generated by adding the shunt current I / 2 flowing through the transistors Q4 and Q2 and the shunt current I / 2 flowing through the transistors Q5 and M2 and the resistor R2. Therefore, the current consumption of the constant voltage generating circuit 1 can be reduced compared to the third embodiment (FIG. 7).

[0069] When this configuration is adopted, a voltage V2 (=I / 2×R2=V0×(R2 / 2·R0)) is generated across resistor R2 according to the shunt current I / 2 through transistors Q5 and M2. The output voltage VOUT is the sum of the gate-source voltage Vgs2 of transistor M2, the voltage V0 across resistor R0, and the voltage V2 across resistor R2 (=Vgs2+V0+V2).

[0070] <Fifth embodiment> Fig. 10 is a diagram showing a fifth embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the third embodiment (Fig. 7) and further includes a resistor R4.

[0071] A first end of the resistor R4 is connected to the application end of the output voltage VOUT. A second end of the resistor R4 and a first end of the resistor R3 are connected to the gate of the transistor M2. A second end of the resistor R3 is connected to the ground end. The resistors R3 and R4 connected in this manner function as a resistive voltage divider that divides the output voltage VOUT and applies it to the gate of the transistor M2.

[0072] That is, in the constant voltage generating circuit 1 of this embodiment, the gate of the transistor M2 is connected to the application terminal of the output voltage VOUT via a resistive voltage divider. With this configuration, the resistance values ​​of the resistors R3 and R4 (and thus the voltage division ratio of the resistive voltage divider) are appropriately adjusted to generate an arbitrary output voltage VOUT (=(Vgs2+V2)×{(R3+R4) / R3}).

[0073] Sixth embodiment 11 is a diagram showing a sixth embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the fourth embodiment (FIG. 8) and further includes a resistor R4. With this configuration, the resistance values ​​of the resistors R3 and R4 (and thus the voltage division ratio of the resistive voltage divider) are appropriately adjusted to generate an arbitrary output voltage VOUT (=(Vgs2+V0+V2)×{(R3+R4) / R3}).

[0074] Seventh embodiment 12 is a diagram showing a seventh embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the third embodiment (FIG. 7) and includes a transistor M2′ (e.g., an npn-type transistor) instead of the transistor M2.

[0075] That is, the gate-source voltage Vgs2 of the transistor M2, which has a negative temperature characteristic, can be replaced with the base-emitter voltage of an npn transistor. However, since a base current flows through a bipolar transistor, the temperature characteristic of the output voltage VOUT may deviate. In that case, the element sizes of the transistors Q1 and Q2 and the resistance values ​​of the resistors R0 and R2 may be adjusted as appropriate.

[0076] Eighth embodiment Fig. 13 is a diagram showing an eighth embodiment of the constant voltage generating circuit 1. As shown in this diagram, based on the previous fourth embodiment (Fig. 8), the transistor M2 may be replaced with a transistor M2' (for example, an npn-type transistor).

[0077] <Ninth embodiment> Fig. 14 is a diagram showing a ninth embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the third embodiment (Fig. 7) described above, but includes transistors M11 and M12 (e.g., enhancement type NMOSFETs) instead of the transistors Q1 and Q2. The constant voltage generating circuit 1 of this embodiment also includes transistors M13 to M15 (e.g., PMOSFETs) instead of the transistors Q3 to Q5.

[0078] In this way, the transistors forming the current mirror CM1 are not limited to the npn type but may be the N-channel type, and the transistors forming the current mirror CM2 are not limited to the pnp type but may be the P-channel type.

[0079] Tenth embodiment 15 is a diagram showing a tenth embodiment of the constant voltage generating circuit 1. As shown in this diagram, based on the fourth embodiment (FIG. 8) mentioned above, the current source CS may be formed of a MOSFET.

[0080] <Eleventh embodiment> 16 is a diagram showing an eleventh embodiment of the constant voltage generating circuit 1. As shown in this diagram, based on the seventh embodiment (FIG. 12) mentioned above, the current source CS may be formed of a MOSFET.

[0081] <Twelfth embodiment> Fig. 17 is a diagram showing a twelfth embodiment of the constant voltage generating circuit 1. As shown in this diagram, based on the preceding eighth embodiment (Fig. 13), the current source CS may be formed of a MOSFET.

[0082] <Thirteenth embodiment> 18 is a diagram showing a thirteenth embodiment of the constant voltage generating circuit 1. The constant voltage generating circuit 1 of this embodiment is based on the third embodiment (FIG. 7) described above, but omits the resistors R2 and R3 and the transistor M3.

[0083] In this figure, the source of the transistor M2 is directly connected to the ground terminal, and the gate and drain of the transistor M2 are both directly connected to the application terminal of the output voltage VOUT.

[0084] In this way, when only the reduction of the variation in the output voltage VOUT is of interest, the current source CS and the transistor M2 are sufficient as components of the constant current generating circuit 1. In other words, when the constant voltage generating circuit 1 is not required to have a large current supply capability, the aforementioned transistor M3 (and thus the voltage follower VF) may be omitted. In addition, in applications where the temperature characteristic requirements are not strict, the resistor R2 may also be omitted.

[0085] <Combination of embodiments> The circuit configurations of the first to thirteenth embodiments described above may be arbitrarily combined within a range where no contradiction occurs.

[0086] <Additional Notes> The following provides a general description of the various embodiments described above.

[0087] For example, a constant voltage generating circuit according to the present disclosure includes a current source configured to generate a reference current proportional to temperature, and a first transistor configured to pass the reference current, and is configured (first configuration) to output an inter-electrode voltage between a control electrode and a first main electrode of the first transistor or a voltage corresponding thereto as an output voltage.

[0088] In addition, the constant voltage generating circuit according to the first configuration may further include a first resistor connected to a first main electrode of the first transistor so that the reference current flows therethrough, and may be configured to output, as the output voltage, a voltage obtained by adding together an inter-electrode voltage between the control electrode and first main electrode of the first transistor and a voltage across the first resistor, or a voltage corresponding thereto (second configuration).

[0089] In addition, in the constant voltage generating circuit according to the second configuration, the second main electrode of the first transistor may be connected to the application terminal of the output voltage directly or via a voltage follower (third configuration).

[0090] Furthermore, in the constant voltage generating circuit of the third configuration, the voltage follower may be configured (fourth configuration) to include a second transistor having a first main electrode connected to the application terminal of the output voltage, a second main electrode connected to the application terminal of the input voltage, and a control electrode connected to the second main electrode of the first transistor.

[0091] In addition, in the constant voltage generating circuit according to any one of the second to fourth configurations, the control electrode of the first transistor may be configured (fifth configuration) to be connected to the application terminal of the output voltage directly or via a resistive voltage divider.

[0092] Furthermore, in the constant voltage generating circuit according to any one of the second to fifth configurations, the current source may be configured (sixth configuration) to include a first current mirror, a second current mirror having an input terminal connected to an output terminal of the first current mirror, a first output terminal connected to an input terminal of the first current mirror, and a second output terminal connected to a second main electrode of the first transistor, and a second resistor configured to pass the output current of the first current mirror.

[0093] In addition, in the constant voltage generating circuit of the sixth configuration, the first resistor may be configured (seventh configuration) such that a first terminal is connected to a first main electrode of the first transistor and a second terminal is connected to a reference potential terminal directly or via the second resistor.

[0094] In the constant voltage generating circuit according to the sixth or seventh configuration, the plurality of transistors forming the first current mirror may all be of the npn type or N-channel type (eighth configuration).

[0095] In the constant voltage generating circuit according to any one of the sixth to eighth configurations, the plurality of transistors forming the second current mirror may all be of a pnp type or a P-channel type (ninth configuration).

[0096] In the constant voltage generating circuit according to any one of the first to ninth configurations, the first transistor may be of an N-channel type or an npn type (tenth configuration).

[0097] According to the present disclosure, it is possible to provide a constant voltage generating circuit with high output accuracy.

[0098] <Other> In addition, various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation, in addition to the above-mentioned embodiment. In other words, the above-mentioned embodiment should be considered to be illustrative and not restrictive in all respects. In addition, the technical scope of the present disclosure is defined by the claims, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims. [Explanation of symbols]

[0099] 1 Constant voltage generation circuit CM1, CM2 current mirror CS current source M1 Transistor (Depletion-type NMOSFET) M2 transistor (enhancement type NMOSFET) M2' Transistor (npn type transistor) M3 transistor (depletion type NMOSFET) M11, M12 Transistors (enhancement type NMOSFET) M13, M14, M15 Transistors (PMOSFET) Q1, Q2 Transistors (npn type transistors) Q3, Q4, Q5 Transistors (pnp type transistors) R0, R1, R2, R3, R4 Resistance

Claims

1. a current source configured to generate a reference current proportional to temperature; a first transistor configured to pass the reference current; Equipped with a constant voltage generating circuit that outputs, as an output voltage, an inter-electrode voltage between the control electrode and the first main electrode of the first transistor or a voltage corresponding thereto.

2. a first resistor connected to a first main electrode of the first transistor so as to pass the reference current; 2. The constant voltage generating circuit according to claim 1, wherein the output voltage is a voltage obtained by adding together an inter-electrode voltage between the control electrode and the first main electrode of the first transistor and a voltage across the first resistor, or a voltage corresponding thereto.

3. 3. The constant voltage generating circuit according to claim 2, wherein the second main electrode of the first transistor is connected to an application terminal of the output voltage directly or via a voltage follower.

4. 4. The constant voltage generating circuit according to claim 3, wherein the voltage follower includes a second transistor having a first main electrode connected to an application terminal of the output voltage, a second main electrode connected to an application terminal of the input voltage, and a control electrode connected to the second main electrode of the first transistor.

5. 3. The constant voltage generating circuit according to claim 2, wherein a control electrode of the first transistor is connected to an application terminal of the output voltage directly or via a resistive voltage divider.

6. The current source is A first current mirror; and a second current mirror having an input terminal connected to an output terminal of the first current mirror, a first output terminal connected to an input terminal of the first current mirror, and a second output terminal connected to a second main electrode of the first transistor; a second resistor configured to receive the output current of the first current mirror; The constant voltage generating circuit according to claim 2 ,

7. 7. The constant voltage generating circuit according to claim 6, wherein the first resistor has a first terminal connected to the first main electrode of the first transistor and a second terminal connected to a reference potential terminal directly or via the second resistor.

8. 7. The constant voltage generating circuit according to claim 6, wherein the plurality of transistors forming the first current mirror are all of an npn type or an N-channel type.

9. 7. The constant voltage generating circuit according to claim 6, wherein the plurality of transistors forming the second current mirror are all of a pnp type or a P-channel type.

10. 10. The constant voltage generating circuit according to claim 1, wherein the first transistor is an N-channel type or an npn type.

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