Electronic apparatus, and operation control method

Abstract

To provide an electronic apparatus, and an operation control method that can reduce power consumption in a power saving mode without reducing waveform quality.SOLUTION: An image forming apparatus comprises: a control board that includes a power supply layer adjacent to a first wiring layer 31; a plurality of DRAMs 12 that can make a transition from a first state in which they can hold data to a second state in which they cannot hold data and consume less power than the first state, and that receive supply of power from the power supply layer; and a transition processing unit that, when the operation mode of the apparatus shifts from a normal mode to a power saving mode, stores data for returning used in returning to the normal mode in some of the plurality of DRAMs 12, and causes each of the DRAMs 12 in which the data for returning is not stored to make a transition from the first state to the second state.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an electronic device and an operation control method. [Background technology]

[0002] There is known an electronic device such as a multifunction peripheral that can switch an operation mode between a normal mode and a power saving mode that consumes less power than the normal mode. Also, the electronic device that can reduce power consumption during the power saving mode is known as a related technology (see Patent Document 1). Specifically, the electronic device according to the related technology includes a first power source that supplies power to a first DRAM and a second power source that supplies power to a second DRAM, and when the operation mode of the device shifts from the normal mode to the power saving mode, data in the first DRAM is saved to the second DRAM and power supply from the first power source is stopped. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2011-59937 A Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, a plurality of DRAMs mounted on a substrate may be powered from a power supply layer that functions as a reference layer of a wiring layer on the substrate. In order to apply the related technology to a configuration including a plurality of DRAMs that receive power from the power supply layer, it is necessary to divide the power supply layer. However, if the power supply layer that functions as a reference layer of the wiring layer is divided, the return path of the current that flows through the wiring layer becomes discontinuous, and the waveform quality of the signal transmitted through the wiring layer may deteriorate.

[0005] An object of the present invention is to provide an electronic device and an operation control method that can reduce power consumption in a power saving mode without degrading waveform quality. [Means for solving the problem]

[0006] According to one aspect of the present invention, an electronic device includes a substrate, a plurality of DRAMs, and a transition processing unit. The substrate includes a power supply layer adjacent to a wiring layer. Each of the DRAMs is capable of transitioning from a first state capable of retaining data to a second state in which data cannot be retained and consumes less power than the first state, and is powered by the power supply layer. When the operation mode of the device transitions from a normal mode to a power saving mode that consumes less power than the normal mode, the transition processing unit stores recovery data used when returning to the normal mode in a portion of the plurality of DRAMs, and transitions each of the DRAMs in which the recovery data is not stored from the first state to the second state.

[0007] According to another aspect of the present invention, an operation control method is executed in an electronic device including a substrate including a power supply layer adjacent to a wiring layer, and a plurality of DRAMs capable of transitioning from a first state capable of retaining data to a second state incapable of retaining data and consuming less power than the first state, the DRAMs receiving power from the power supply layer, and includes a transition step, in which, when an operation mode of the electronic device transitions from a normal mode to a power saving mode consuming less power than the normal mode, recovery data used when returning to the normal mode is stored in some of the plurality of DRAMs, and each of the DRAMs in which the recovery data is not stored is transitioned from the first state to the second state. Effect of the Invention

[0008] According to the present invention, it is possible to reduce power consumption during the power saving mode without degrading the waveform quality. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing a configuration of an image forming apparatus according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a block diagram showing a system configuration of the image forming apparatus according to the embodiment of the present invention. [Diagram 3] FIG. 3 is a diagram showing the configuration of a control unit of the image forming apparatus according to the embodiment of the present invention. [Figure 4] FIG. 4 is a diagram showing the configuration of a control board of the image forming apparatus according to the embodiment of the present invention. [Diagram 5] FIG. 5 is a flowchart showing an example of an operation control process executed in the image forming apparatus according to the embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. Note that the following embodiment is an example of the present invention, and is not intended to limit the technical scope of the present invention.

[0011] [Configuration of image forming apparatus 100] First, the configuration of an image forming apparatus 100 according to an embodiment of the present invention will be described with reference to Figures 1 and 2. Here, Figure 1 is a cross-sectional view showing the configuration of the image forming apparatus 100.

[0012] The image forming apparatus 100 is a multifunction machine having multiple functions such as a scanning function for reading an image of an original document, a printing function for forming an image based on image data on a sheet, a fax function, and a copy function. The image forming apparatus 100 is an example of an electronic device of the present invention. The present invention is applicable to electronic devices such as scanners, printers, fax machines, copy machines, personal computers, notebook computers, smartphones, tablet terminals, televisions, air conditioners, refrigerators, and washing machines.

[0013] As shown in FIGS. 1 and 2, an image forming apparatus 100 includes an ADF (Auto Document Feeder) 1, an image reading unit 2, an image forming unit 3, a sheet conveying unit 4, an operation display unit 5, a power supply unit 6, and a control unit .

[0014] The ADF 1 transports documents to be read by the scanning function, and includes a document setting section, a plurality of transport rollers, a document holder, and a paper ejection section.

[0015] The image reading unit 2 realizes the scanning function. The image reading unit 2 includes a document table, a light source, a plurality of mirrors, an optical lens, and a CCD (Charge Coupled Device).

[0016] The image forming unit 3 realizes the print function. Specifically, the image forming unit 3 forms an image on a sheet by electrophotography. The image forming unit 3 includes a photoconductor drum, a charging device, an optical scanning unit (LSU), a developing device, a transfer device, a cleaning device, and a fixing device.

[0017] The sheet transport unit 4 transports a sheet on which an image is formed by the image forming unit 3. The sheet transport unit 4 includes a paper feed cassette and a plurality of transport rollers.

[0018] The operation display unit 5 is a user interface of the image forming apparatus 100. The operation display unit 5 includes a display unit and an operation unit. The display unit displays various information in response to control instructions from the control unit 7. For example, the display unit is a liquid crystal display. The operation unit inputs various information to the control unit 7 in response to user operations. For example, the operation unit is a touch panel.

[0019] Power supply unit 6 supplies power supplied from an external commercial power source to each unit of image forming apparatus 100. Specifically, power supply unit 6 is an AC-DC converter that converts an AC voltage of 100 V supplied from the commercial power source into a DC voltage of a predetermined voltage value.

[0020] The control unit 7 controls the image forming apparatus 100 in an overall manner.

[0021] [Configuration of control unit 7] Next, the configuration of the control unit 7 will be described with reference to Fig. 2 to Fig. 4. Fig. 3 is a plan view showing the configuration of a portion of the first wiring layer 31 of the control board 30. Fig. 4 is a side view showing the configuration of the control board 30.

[0022] The control unit 7 includes a plurality of electronic components including a CPU 11 and two dynamic random access memories (DRAMs) 12 (12A, 12B) shown in Fig. 3. The control unit 7 also includes a control board 30 (see Fig. 4) on which the plurality of electronic components are mounted.

[0023] The control board 30 is a multi-layer board. As shown in Fig. 4, the control board 30 includes a first wiring layer 31, a first insulating layer 32, a power supply layer 33, a second insulating layer 34, a ground layer 35, a third insulating layer 36, and a second wiring layer 37. The control board 30 is an example of a board of the present invention.

[0024] The first wiring layer 31 forms one outer surface of the control board 30. A wiring pattern is formed on the first wiring layer 31. The electronic components including the CPU 11 and the two DRAMs 12 are mounted on the first wiring layer 31. In Fig. 3, an area 31A of the first wiring layer 31 where the CPU 11 and the two DRAMs 12 are mounted is indicated by a two-dot chain line.

[0025] The power supply layer 33 is provided adjacent to the first wiring layer 31. Specifically, as shown in Fig. 4, the power supply layer 33 is provided facing the first wiring layer 31 with the first insulating layer 32 interposed therebetween. A power supply plane is formed in the power supply layer 33. The CPU 11 and the two DRAMs 12 are electrically connected to the power supply layer 33 and receive power from the power supply layer 33.

[0026] The ground layer 35 is provided adjacent to the power supply layer 33. Specifically, as shown in Fig. 4, the ground layer 35 is provided facing the power supply layer 33 with the second insulating layer 34 interposed therebetween. A ground plane is formed on the ground layer 35. The CPU 11 and the two DRAMs 12 are electrically connected to the ground layer 35.

[0027] The second wiring layer 37 forms the other outer surface of the control board 30. As shown in Fig. 4, the second wiring layer 37 is provided opposite the ground layer 35 with the third insulating layer 36 interposed therebetween. A wiring pattern is formed on the second wiring layer 37.

[0028] The first insulating layer 32, the second insulating layer 34, and the third insulating layer 36 are formed of an insulator.

[0029] The CPU 11 is a processor that executes various types of arithmetic processing by executing a control program that is pre-stored in a ROM (not shown) included in the plurality of electronic components.

[0030] For example, the CPU 11 functions as a switching processing unit 41 shown in FIG. 2 by executing the control program.

[0031] The switching processor 41 switches the operation mode of the image forming apparatus 100 between a normal mode and a power saving mode in which power consumption is smaller than that in the normal mode. In the power saving mode, power supply to some of the components of the image forming apparatus 100 is stopped.

[0032] Specifically, when the operation mode is the normal mode, the switching processing unit 41 switches the operation mode from the normal mode to the power saving mode if a predetermined transition condition is satisfied.

[0033] For example, the transition condition includes a first transition condition and a second transition condition. When either the first transition condition or the second transition condition is satisfied, the switching processing unit 41 switches the operation mode to the power saving mode. The first transition condition is that a no-operation state in which no operation input is made to the image forming apparatus 100 continues for more than a predetermined time. The second transition condition is that an input operation of an instruction to transition to the power saving mode is made on the operation display unit 5. Note that the transition condition may include conditions different from the above-mentioned conditions.

[0034] Furthermore, when the operation mode is the power saving mode, the switching processing unit 41 switches the operation mode from the power saving mode to the normal mode if a predetermined return condition is satisfied.

[0035] For example, the return conditions include a first return condition and a second return condition. The switching processing unit 41 switches the operation mode to the normal mode when either the first return condition or the second return condition is satisfied. The first return condition is receiving an image formation job transmitted from an external information processing device. The second return condition is operating the operation display unit 5. The return conditions may include conditions different from the above-mentioned conditions.

[0036] When switching the operation mode from the normal mode to the power saving mode, the switching processing unit 41 inputs a control signal (not shown) to that effect to the power supply unit 6 to stop power supply to some of the components of the image forming apparatus 100. When switching the operation mode from the power saving mode to the normal mode, the switching processing unit 41 inputs a control signal (not shown) to that effect to the power supply unit 6 to resume power supply to some of the components of the image forming apparatus 100.

[0037] Each of the DRAMs 12 is a volatile memory. The two DRAMs 12 are used as temporary storage memories (work areas) for various processes executed by the CPU 11.

[0038] Specifically, each of the DRAMs 12 is a Low Power Double Data Rate 4 (LPDDR4). Note that each of the DRAMs 12 may be a Double Data Rate 4 Synchronous Dynamic Random Access Memory (DDR4-SDRAM) or the like.

[0039] Meanwhile, electronic devices capable of reducing power consumption during the power saving mode are known as related art. Specifically, the electronic device according to the related art includes a first power supply that supplies power to DRAM 12A and a second power supply that supplies power to DRAM 12B, and when the operation mode of the device shifts from the normal mode to the power saving mode, data in DRAM 12A is saved to DRAM 12B and power supply from the first power supply is stopped.

[0040] Here, in the image forming device 100, the two DRAMs 12 receive power from a power supply layer 33 that functions as a reference layer of the first wiring layer 31 in the control board 30. In order to apply the related technology to the image forming device 100 configured as described above, it is necessary to divide the power supply layer 33. However, if the power supply layer 33 that functions as a reference layer of the first wiring layer 31 is divided, the return path of the current that has flowed in the first wiring layer 31 becomes discontinuous, and the waveform quality of the signal transmitted in the first wiring layer 31 may deteriorate.

[0041] In contrast, in the image forming apparatus 100 according to the embodiment of the present invention, as will be described below, it is possible to reduce the power consumption during the power saving mode without degrading the waveform quality.

[0042] Specifically, each of the DRAMs 12 can transition its operating state among a first state, a second state, and a third state.

[0043] Here, the first state is a state in which data can be retained and data can be read and written. In the first state, a refresh operation is periodically performed to continue retaining the data.

[0044] Moreover, the third state is a state in which data can be retained, but data cannot be read or written. In the third state, the refresh operation is periodically performed. The third state consumes less power than the first state. The third state is a state called a "self-refresh mode" or the like. The third state may be included in the first state of the present invention.

[0045] Moreover, the second state is a state in which data cannot be retained. In the second state, the refresh operation is not periodically performed. The second state consumes less power than the first state and the third state. The second state is a state called a "power down mode" or the like.

[0046] Further, each of the DRAMs 12 can transition a part of its operating state among the first state, the second state, and the third state.

[0047] For example, as shown in FIG. 3, each DRAM 12 includes four silicon dies 20. The four silicon dies 20 are provided in a package of the DRAM 12. Each silicon die 20 constitutes a part of the DRAM 12. Each silicon die 20 includes a number of memory cells and is capable of storing data. Each silicon die 20 is capable of transitioning an operating state among the first state, the second state, and the third state. The silicon die 20 is an example of a data storage unit of the present invention.

[0048] As shown in FIG. 3, the DRAM 12A includes silicon dies 21 to 24. The silicon die 21 and the silicon die 22 are connected to the CPU 11 via a data signal line DA1 (see FIG. 3). The silicon die 23 and the silicon die 24 are connected to the CPU 11 via a data signal line DA2 (see FIG. 3). The silicon die 21 is connected to the CPU 11 via a control signal line CO1 (see FIG. 3). The silicon die 22 is connected to the CPU 11 via a control signal line CO2 (see FIG. 3). The silicon die 23 is connected to the CPU 11 via a control signal line CO3 (see FIG. 3). The silicon die 24 is connected to the CPU 11 via a control signal line CO4 (see FIG. 3).

[0049] As shown in FIG. 3, the DRAM 12B includes silicon dies 25 to . The silicon die 25 and the silicon die 26 are connected to the CPU 11 via a data signal line DA3 (see FIG. 3). The silicon die 27 and the silicon die 28 are connected to the CPU 11 via a data signal line DA4 (see FIG. 3). The silicon die 25 is connected to the CPU 11 via a control signal line CO5 (see FIG. 3). The silicon die 26 is connected to the CPU 11 via a control signal line CO6 (see FIG. 3). The silicon die 27 is connected to the CPU 11 via a control signal line CO7 (see FIG. 3). The silicon die 28 is connected to the CPU 11 via a control signal line CO8 (see FIG. 3).

[0050] The control signal lines CO1 to CO8 are used to specify the silicon die 20 to which data is to be read or written. The control signal lines CO1 to CO8 are also used to control the operating state of each of the silicon dies 20. The data signal lines DA1 to DA4 are also used to transmit and receive data.

[0051] As shown in FIG. 2, the control unit 7 includes a transition processing unit .

[0052] Specifically, the ROM of the control unit 7 stores in advance an operation control program for causing the CPU 11 of the control unit 7 to function as the transition processing unit 42. The CPU 11 of the control unit 7 executes the operation control program stored in the ROM to function as the transition processing unit 42. The transition processing unit 42 may be configured with an electronic circuit. The operation control program may also be a program for causing a plurality of processors to function as the transition processing unit 42.

[0053] When the operating mode of the image forming device 100 transitions from the normal mode to the power saving mode, the transition processing unit 42 stores recovery data to be used when returning to the normal mode in a portion of the multiple DRAMs 12, and transitions each of the DRAMs 12 in which the recovery data is not stored from the first state to the second state.

[0054] Furthermore, the transition processing unit 42 transitions each of the silicon dies 20 that does not store the restoration data and that is included in the DRAM 12 in which the restoration data is stored, from the first state to the second state.

[0055] Moreover, the transition processing unit 42 transitions each of the silicon dies 20 in which the restoration data is stored from the first state to the third state.

[0056] For example, the transition processing unit 42 generates the return data when the operation mode of the image forming apparatus 100 transitions from the normal mode to the power saving mode. For example, the transition processing unit 42 deletes a specific type of data, such as cache data, that is determined in advance to be less important from among the data stored in the two DRAMs 12. Then, the transition processing unit 42 generates the return data by compressing the data remaining after the deletion of the specific type of data.

[0057] Furthermore, the transition processing unit 42 determines a storage destination of the generated restoration data. Specifically, the transition processing unit 42 determines one or more of the eight silicon dies 20 as the storage destination of the restoration data based on the data amount of the restoration data so that the number of silicon dies 20 in which the restoration data is stored is minimized.

[0058] Moreover, the transition processing unit 42 stores the restoration data in each of the one or more silicon dies 20 determined as the storage destinations.

[0059] Then, the transition processing unit 42 executes a first state transition process to transition each silicon die 20 in which the restoration data is stored from the first state to the third state, and to transition each silicon die 20 in which the restoration data is not stored from the first state to the second state.

[0060] Each of the silicon dies 20 may not be able to transition to the third state. In this case, the transition processing unit 42 does not need to transition each of the silicon dies 20 in which the restoration data is stored from the first state to the third state.

[0061] Also, each of the DRAMs 12 may not be able to partially transition between operation states. In this case, the transition processing unit 42 does not need to transition each of the silicon dies 20 in which the restoration data is not stored and which are included in the DRAM 12 in which the restoration data is stored, from the first state to the second state.

[0062] [Motion control processing] 5, an example of the procedure of the operation control process executed by the control unit 7 in the image forming apparatus 100 and the operation control method of the present invention will be described. Here, steps S11, S12, etc. indicate the numbers of the processing procedures (steps) executed by the control unit 7.

[0063] <Step S11> First, in step S11, the control unit 7 determines whether or not the transition condition is satisfied.

[0064] Specifically, when either the first transition condition or the second transition condition is satisfied, the control unit 7 determines that the transition condition is satisfied.

[0065] Here, if the control unit 7 determines that the transition condition is satisfied (Yes side of S11), it transitions the process to step S12. If the transition condition is not satisfied (No side of S11), the control unit 7 waits for the transition condition to be satisfied in step S11.

[0066] <Step S12> In step S12, the control unit 7 generates the recovery data.

[0067] Specifically, the control unit 7 deletes the specific type of data from among the data stored in the two DRAMs 12. Then, the control unit 7 generates the recovery data by compressing the data remaining after deleting the specific type of data.

[0068] <Step S13> In step S13, the control unit 7 determines a storage destination for the recovery data generated in the process of step S12.

[0069] Specifically, based on the amount of data of the recovery data, the control unit 7 determines one or more of the eight silicon dies 20 as the storage destination for the recovery data so as to minimize the number of silicon dies 20 in which the recovery data is stored.

[0070] <Step S14> In step S14, the control unit 7 stores the recovery data in the storage destination determined in the process of step S13.

[0071] <Step S15> In step S15, the control unit 7 executes the first state transition process. Here, the processes from step S11 to step S15 are an example of a transition step of the present invention, and are executed by the transition processing unit 42 of the control unit 7.

[0072] As a result, among the eight silicon dies 20 included in the two DRAMs 12, the silicon dies 20 in which the restoration data is not stored are each transitioned to the second state. Also, among the eight silicon dies 20, the silicon dies 20 in which the restoration data is stored are each transitioned to the third state. Therefore, the power consumption in the two DRAMs 12 during the power saving mode is suppressed to the minimum necessary.

[0073] After executing the process of step S15, the switching process unit 41 of the control unit 7 switches the operation mode of the image forming apparatus 100 from the normal mode to the power saving mode.

[0074] <Step S16> In step S16, the control unit 7 determines whether or not the return condition is satisfied.

[0075] Specifically, when either the first return condition or the second return condition is satisfied, the control unit 7 determines that the return condition is satisfied.

[0076] Here, if the control unit 7 determines that the return condition is satisfied (Yes side of S16), it shifts the process to step S17. On the other hand, if the return condition is not satisfied (No side of S16), the control unit 7 waits for the return condition to be satisfied in step S16.

[0077] <Step S17> In step S17, the control unit 7 executes a second state transition process to transition each silicon die 20 in which the return data is stored from the third state to the first state, and to transition each silicon die 20 in which the return data is not stored from the second state to the first state.

[0078] After executing the process of step S17, the switching process unit 41 of the control unit 7 switches the operation mode of the image forming apparatus 100 from the power saving mode to the normal mode by using the recovery data.

[0079] In this way, in the image forming apparatus 100, when the operation mode transitions from the normal mode to the power saving mode, the recovery data is stored in some of the DRAMs 12, and each of the DRAMs 12 in which the recovery data is not stored transitions from the first state to the second state. This makes it possible to reduce power consumption during the power saving mode without dividing the power supply plane 33. Therefore, compared to a configuration in which the power supply plane 33 is divided, it is possible to reduce power consumption during the power saving mode without degrading waveform quality.

[0080] The number of DRAMs 12 included in the control unit 7 may be three or more. Also, the number of silicon dies 20 included in each of the DRAMs 12 may be two or more. [Explanation of symbols]

[0081] 1 ADF 2 Image reading section 3. Image forming section 4 Sheet transport section 5 Operation display section 6 Power supply unit 7 Control section 11 CPU 12 DRAM 20 Silicon Die 30 Control Board 31 1st wiring layer 32 First insulating layer 33 Power layer 34 Second insulating layer 35 Ground Layer 36 Third insulating layer 37 2nd wiring layer 41 Switching Processing Unit 42 Transition section 100 Image forming device

Claims

1. a substrate including a power layer adjacent to a wiring layer; a plurality of DRAMs each capable of transitioning from a first state capable of retaining data to a second state in which data cannot be retained and consumes less power than the first state, the DRAMs receiving power from the power supply layer; a transition processing unit that, when an operation mode of the device itself transitions from a normal mode to a power saving mode having lower power consumption than the normal mode, stores recovery data to be used when returning to the normal mode in a portion of the plurality of DRAMs, and transitions each of the DRAMs in which the recovery data is not stored from the first state to the second state; An electronic device comprising:

2. each of the DRAMs includes a plurality of data storage units capable of transitioning between the first state and the second state; the transition processing unit transitions each of the data storage units, which is included in the DRAM in which the recovery data is stored, and in which the recovery data is not stored, from the first state to the second state; 2. The electronic device according to claim 1.

3. each of the data storage units is capable of retaining data and transitioning to a third state having lower power consumption than the first state, the transition processing unit transitions each of the data storage units in which the recovery data is stored from the first state to the third state; 3. The electronic device according to claim 2.

4. The image reading unit reads an image of a document and / or the image forming unit forms an image on a sheet.

4. The electronic device according to claim 1.

5. An operation control method executed in an electronic device including: a substrate including a power supply layer adjacent to a wiring layer; and a plurality of DRAMs that are capable of transitioning from a first state capable of retaining data to a second state incapable of retaining data and consuming less power than the first state, and that receive power from the power supply layer, the method comprising: a transition step of storing recovery data to be used at the time of returning to the normal mode in a portion of the plurality of DRAMs when the operation mode of the electronic device transitions from a normal mode to a power saving mode having lower power consumption than the normal mode, and transitioning each of the DRAMs in which the recovery data is not stored from the first state to the second state, Operation control method.

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