Semiconductor device and bonding method for semiconductor element

Abstract

To provide a semiconductor device that suppresses the outflow of solder in an unintended direction and movement (e.g., misalignment or rotation) of a semiconductor element in the unintended direction following that.SOLUTION: A semiconductor device comprises: a circuit board in which a metal pattern is formed on its surface; a rectangular semiconductor element mounted on the metal pattern; a first solder wetting part which is formed by at least a part of the metal pattern, and located within a mounting area of the semiconductor element; a second solder wetting part which is formed by at least other part of the metal pattern and extends to the outside of each apex of the semiconductor element; and a solder non-wetting part which is positioned between the adjacent second solder wetting parts and has lower solder wettability than the first and second solder wetting parts. The semiconductor element is surrounded by the second solder wetting part and the solder non-wetting part, and the semiconductor element and the first solder wetting part are bonded using solder.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for bonding a semiconductor element. [Background technology]

[0002] A typical semiconductor device is manufactured by electrically connecting a semiconductor element to a circuit board on which a metal pattern is formed or a lead frame with inner leads, and then sealing the semiconductor element with resin. In particular, power chips such as transistors and diodes that handle high power, which are typical semiconductor elements, are mainly soldered to the metal pattern in a reflow process. In addition, when there is a power chip and a control chip such as a control IC that does not handle as much power as the power chip, it is common to place them in different positions on the circuit board or in different areas of the lead frame. In addition, the control chip may be connected with a conductive adhesive instead of soldering.

[0003] When it comes to soldering power chips (hereafter also referred to as semiconductor elements), power chips handle large amounts of power and therefore suffer large heat losses, and there is also a need to dissipate heat through metal patterns to prevent thermal destruction, so solder is sometimes applied thickly to prevent the contact area between the power chip and the metal pattern from decreasing and to prevent gaps from occurring due to an amount of solder being too small. However, in this case, if there is too much solder, it may overflow from the designated area and come into contact with other adjacent metal patterns, so delicate adjustments are required. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-12567 A Summary of the Invention [Problem to be solved by the invention]

[0005] FIG. 7 is a schematic diagram showing the layout around a power chip of a conventional semiconductor device, where FIG. 7(a) shows the state before reflow and FIG. 7(b) shows the state after reflow.

[0006] In Fig. 7(a), multiple holes 2 are formed in the metal pattern 1 by etching, with a power chip (semiconductor element) 3a in the center, and solder 4a applied between the power chip 3a and the metal pattern 1. The solder 4a has an area of ​​about 70% of the power chip 3a, but has a certain thickness, and was applied in an amount just enough to bond the entire bottom surface of the power chip 3a when it is heated and melted in the reflow process.

[0007] However, in the state after reflow in FIG. 7(b), although the area of ​​the melted solder 4a has expanded to the same extent as the power chip 3a, it may shift and protrude to the lower right side of the paper. Also, due to the outflow of this solder 4a, the power chip 3a may be pulled and rotated clockwise by about 6 degrees. This may cause the solder 4a to almost come into contact (short circuit) with the solder 4b for the adjacent power chip 3b (semiconductor element). Also, as described above, the power chip may be moved by the outflow of solder, but the direction of movement may change depending on various conditions. For example, the inclination of the arrangement surface of the semiconductor device or the temperature distribution of the solder may be the influences.

[0008] In order to prevent such solder outflow and the associated movement of the semiconductor element, Patent Document 1 discloses a semiconductor device in which the semiconductor element is surrounded by a key groove (a key-shaped (L-shaped) groove, hereinafter referred to as the groove) and a non-wetting portion that has low solder wettability (i.e., solder does not easily adhere to the key groove). The groove can capture the solder that overflows during joining, and the non-wetting portion surrounds and limits the mounting area of ​​the semiconductor element, thereby preventing the solder from spreading unnecessarily. However, when the amount of solder supplied increases further and the surplus amount exceeds the capacity of the groove, the solder will overflow the groove and the non-wetting portion and flow outward. When this happens, it is not clear in which direction the solder will spread, and the semiconductor element will be pulled in the direction of the solder outflow and move from its specified position, which is a problem.

[0009] If solder flows in an unexpected direction as described above and the semiconductor element moves in an unexpected direction (e.g., shifts or rotations) as a result, it may cause a short circuit with a metal pattern other than the specified metal pattern, or conversely, it may become separated from the metal pattern to which it should be connected. This could result in the semiconductor device not performing as designed, an increase in the rate of defective products, a decrease in yield, and a decrease in productivity.

[0010] The present invention has been made to solve the above problems, and aims to provide a semiconductor device and a method for joining semiconductor elements that suppresses solder flow in unexpected directions and the resulting movement of the semiconductor element in unexpected directions (e.g., misalignment or rotation). [Means for solving the problem]

[0011] In order to solve the above problems, the semiconductor device of the present invention comprises a circuit board having a metal pattern formed on its surface, a rectangular semiconductor element mounted on the metal pattern, a first solder wettability portion constituted by at least a part of the metal pattern and provided in the mounting area of ​​the semiconductor element, a second solder wettability portion constituted by at least another part of the metal pattern and extending outward from each vertex of the semiconductor element, and a solder non-wettable portion provided between adjacent second solder wettability portions and having a lower solder wettability than the first and second solder wettability portions, the second solder wettability portion and the solder non-wettable portion surrounding the semiconductor element, and the semiconductor element and the first solder wettability portion being joined by solder.

[0012] In such a semiconductor device, when the solder melts and spreads on the first solder wettability portion, it does not easily flow in the direction of the solder non-wettable portion but easily flows in the direction of the second solder wettability portion, so that the solder flows outwardly toward each vertex of the semiconductor element where the second solder wettability portion is located, making it difficult for the solder to flow in an unexpected direction. In addition, because the solder flows outwardly toward each vertex, the semiconductor element is pulled outwardly toward each vertex, making it difficult for the semiconductor element to move in a specific direction, and movement of the semiconductor element in an unexpected direction (for example, displacement or rotation) is suppressed.

[0013] The solder non-wettable portion is preferably an oxide of the metal constituting the metal pattern.

[0014] Such a solder non-wettable portion made of a metal oxide can reliably form a solder non-wettable portion that is difficult for solder to join. In addition, the solder non-wettable portion can be easily formed by simply oxidizing the metal pattern.

[0015] It is also preferable that the semiconductor element is a power chip, further comprising a control chip and a lead frame having inner leads, and that the power chip, the control chip and the lead frame are sealed with resin.

[0016] This configuration results in a module in which the power chip, which is prevented from moving in unexpected directions (such as misalignment or rotation), and other components are sealed in resin. As a result, problems caused by the movement of the power chip are less likely to occur, leading to more stable performance and improved yields for the module.

[0017] In addition, the method for joining a semiconductor element of the present invention is a method for joining a semiconductor element to a circuit board having a metal pattern formed on a surface thereof, which includes processing the metal pattern on the circuit board to form a first solder wettability portion provided in an area where the semiconductor element is to be mounted, a second solder wettability portion extending outwardly from each vertex of the rectangular semiconductor element, and a solder non-wettability portion provided between adjacent second solder wettability portions and having a lower solder wettability than the first and second solder wettability portions, printing solder on the first solder wettability portion, and melting the solder in a reflow process, thereby soldering the semiconductor element to the circuit board.

[0018] With this method of joining semiconductor elements, when the solder melts and spreads on the first solder wettability portion during the reflow process, it is difficult for it to flow in the direction of the solder non-wetability portion and easy for it to flow in the direction of the second solder wettability portion, so that the solder flows outward toward each vertex of the semiconductor element where the second solder wettability portion is located, thereby preventing the solder from flowing out in an unexpected direction. In addition, because the solder flows outward toward each vertex, the semiconductor element is pulled outward toward each vertex, making it difficult for the semiconductor element to move in a specific direction, and it is possible to suppress the movement of the semiconductor element in an unexpected direction (for example, misalignment or rotation).

[0019] It is also preferable that solder is printed on the second solder wettability portion, and in a reflow process, the semiconductor element and the circuit board are soldered together by melting both the solder printed on the first solder wettability portion and the solder printed on the second solder wettability portion.

[0020] If such a method is used for soldering the second solder wettable portion, it is possible to solder each vertex of the semiconductor element, and it is possible to reliably pull the semiconductor element outward from each vertex.

[0021] It is also preferable that the first solder wettable portion and the second solder wettable portion are formed by at least a part of the metal pattern, and the solder non-wettable portion is formed by oxidizing a metal constituting the metal pattern.

[0022] If the method of forming the solder non-wetted portion is to oxidize the metal constituting such a metal pattern, it is possible to reliably form a solder non-wetted portion that is difficult to join with solder. In addition, the solder non-wetted portion can be formed simply by oxidizing the same metal pattern as the metal pattern forming the first solder wetted portion and the second solder wetted portion, so that the method can be easily realized. Effect of the Invention

[0023] As described above, according to the semiconductor device of the present invention, when the solder melts and spreads on the first solder wettability portion, it does not easily flow in the direction of the solder non-wettable portion but easily flows in the direction of the second solder wettability portion, so that the solder flows outwardly toward each vertex of the semiconductor element where the second solder wettability portion is located, making it difficult for the solder to flow in an unexpected direction. In addition, because the solder flows outwardly toward each vertex, the semiconductor element is pulled outwardly toward each vertex, making it difficult for the semiconductor element to move in a specific direction, and movement of the semiconductor element in an unexpected direction (for example, displacement or rotation) can be suppressed.

[0024] Furthermore, according to the method for bonding a semiconductor element of the present invention, when the solder melts and spreads on the first solder wettability portion during the reflow process, it does not easily flow in the direction of the solder non-wetability portion but easily flows in the direction of the second solder wettability portion, so that the solder flows outwardly toward each vertex of the semiconductor element where the second solder wettability portion is located, thereby preventing the solder from flowing out in an unexpected direction. In addition, because the solder flows outwardly toward each vertex, the semiconductor element is pulled outwardly toward each vertex, making it difficult for the semiconductor element to move in a specific direction, and movement of the semiconductor element in an unexpected direction (for example, displacement or rotation) can be suppressed.

[0025] In this way, by preventing solder from flowing in unexpected directions and the resulting movement of the semiconductor element in unexpected directions (e.g., misalignment or rotation), the risk of a short circuit with a metal pattern other than the specified metal pattern is reduced, and conversely, it is less likely that the metal pattern will become separated from the metal pattern it is supposed to be connected to, allowing the semiconductor device to perform as designed, reducing the rate of defective products and improving yields, leading to increased productivity. [Brief description of the drawings]

[0026] [Figure 1] 1 is a schematic diagram of a semiconductor device according to a first embodiment of the present invention; [Diagram 2] 2A to 2C are schematic diagrams illustrating steps of a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Diagram 3] 1 is a schematic diagram showing a configuration in which a semiconductor device according to a first embodiment of the present invention is modularized; [Figure 4] 5A to 5C are schematic diagrams showing steps of a method for manufacturing a semiconductor device according to a second embodiment of the present invention. [Diagram 5] FIG. 11 is a schematic diagram showing a modularized configuration of a semiconductor device according to a second embodiment of the present invention. [Figure 6] 5A to 5C are schematic diagrams showing steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention. [Figure 7] 1A and 1B are schematic diagrams of a conventional semiconductor device before and after reflow. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] The present invention will be described in detail below, but the present invention is not limited thereto.

[0028] As described above, there has been a demand for a semiconductor device and a method for bonding semiconductor elements that prevent solder from flowing in unexpected directions and the associated movement (e.g., displacement or rotation) of the semiconductor element in an unexpected direction.

[0029] As a result of extensive research into the above-mentioned problems, the inventors discovered that by surrounding the semiconductor element with a solder non-wettable portion while providing a solder wettable portion extending outward from each vertex of the semiconductor element, it is possible to suppress solder flow in unexpected directions and the resulting movement of the semiconductor element in unexpected directions (e.g., shifting or rotation), and thus completed the present invention.

[0030] That is, the present invention is a semiconductor device comprising: a circuit board having a metal pattern formed on its surface; a rectangular semiconductor element mounted on the metal pattern; a first solder wettability portion constituted by at least a part of the metal pattern and provided in the mounting area of ​​the semiconductor element; a second solder wettability portion constituted by at least another part of the metal pattern and extending outwardly from each vertex of the semiconductor element; and a solder non-wettable portion provided between adjacent second solder wettability portions and having a lower solder wettability than the first and second solder wettability portions, wherein the second solder wettability portion and the solder non-wettable portion surround the semiconductor element, and the semiconductor element and the first solder wettability portion are joined by solder.

[0031] The present invention also relates to a method for joining a semiconductor element to a circuit board having a metal pattern formed on a surface thereof, the method comprising: processing the metal pattern on the circuit board to form a first solder wettability portion provided in an area where the semiconductor element is to be mounted, a second solder wettability portion extending outwardly of each vertex of the rectangular semiconductor element, and a solder non-wettability portion provided between adjacent second solder wettability portions and having a lower solder wettability than the first and second solder wettability portions; printing solder on the first solder wettability portion; and melting the solder in a reflow process to solder the semiconductor element to the circuit board.

[0032] The following description will be given with reference to the drawings.

[0033] Here, the circuit board is not particularly limited as long as a metal pattern is formed on the front surface thereof, and may be a double-sided board having a metal pattern also formed on the back surface thereof, or may be a multi-layer board.

[0034] The metal pattern is not particularly limited as long as it can be joined with solder, and may be a copper pattern.

[0035] The holes in the metal pattern may be recesses that penetrate the metal pattern or may not penetrate the metal pattern.

[0036] The solder non-wetted portion only needs to have low wettability with respect to the solder wetted portion, and may be formed by removing the metal pattern there, for example by etching, or may be formed by forming a separate film. In particular, it is preferable to form the solder non-wetted portion by oxidizing the metal that constitutes the metal pattern, because this makes it easier to form the solder non-wetted portion.

[0037] The solder is not particularly limited as long as it can fix the semiconductor element. For example, a lead-free solder can be used.

[0038] The shape of the solder print portion may be substantially rectangular or circular, but is not particularly limited thereto, and may be, for example, a shape combining a substantially rectangular shape with a substantially X-shape.

[0039] The semiconductor element is not particularly limited, and may be a power chip such as a diode or a transistor.

[0040] The shape of the second solder wettability portion is not particularly limited as long as it extends outward from the apex of the semiconductor element.

[0041] [First embodiment] A first embodiment of the present invention will be described with reference to Fig. 1 to Fig. 3. Fig. 1 is a schematic diagram of a semiconductor device, Fig. 2 is a schematic diagram showing steps of a method for manufacturing the semiconductor device, and Fig. 3 is a schematic diagram showing a configuration in which the semiconductor device is modularized.

[0042] <Semiconductor device> 1 includes a circuit board 15 having metal patterns 13 and 14 made of copper formed on both sides of a ceramic base material 12, a solder (lead-free solder) 16, and a power chip (semiconductor element) 17. The metal pattern 13 also includes holes 18 formed by etching, solder non-wetted areas 19 formed by oxidizing the surface by laser processing, a first solder wetted area 20 (not shown in FIG. 1, see FIG. 2(b)) provided in the mounting area of ​​the semiconductor element 17, and a second solder wetted area 21 extending outward from each vertex of the semiconductor element 17.

[0043] Here, the semiconductor element 17 is surrounded by the second solder wettability 21 and the solder non-wettable portion 19, but since the solder non-wettable portion 19 has a lower solder wettability than the first solder wettability portion 20 and the second solder wettability portion 21, when the solder 16 melts and spreads on the first solder wettability portion 20, it does not easily flow in the direction of the solder non-wettable portion 19, but easily flows in the direction of the second solder wettability portion 21, so that the solder 16 flows in the direction of the arrow 22 outward from each vertex of the semiconductor element 17 where the second solder wettability portion 21 is located, and outflow in an unexpected direction is unlikely to occur. In addition, the flow of solder outward from each vertex in the direction of the arrow 22 pulls the semiconductor element 17 outward from each vertex, making it difficult for the semiconductor element 17 to move in a specific direction, and movement (for example, displacement or rotation) in an unexpected direction of the semiconductor element 17 is suppressed.

[0044] Furthermore, if it is expected that there will be a large amount of excess solder, the excess solder may flow in the direction of arrow 22, and then pass over second solder wettable portion 21 and accumulate in hole 18. For this reason, hole 18 in this embodiment is made larger than hole 2 in the conventional semiconductor device in Fig. 7. Of course, hole 18 can be designed to an appropriate size, assuming the maximum amount of excess solder.

[0045] <Method of Manufacturing Semiconductor Device> With reference to FIG. 2, among the steps of the method for manufacturing a semiconductor device, the step of attaching a semiconductor element will be described in particular.

[0046] {Step (a) Substrate state} A metal pattern 13 made of copper on the surface of a ceramic base material 12 is etched to prepare a circuit board 15 having holes 18 and second solder wettable portions 21 formed therein.

[0047] {Step (b) Laser processing} Next, the prepared circuit board 15 is laser processed to oxidize the surface of the metal pattern 13 to create a solder non-wetted area 19 (hatched area, showing an image of a roughened surface). At this time, by creating the solder non-wetted area 19, a first solder wetted area 20 having a shape substantially the same as the outer shape of the power chip (semiconductor element) 17 to be mounted in the following step (d) is formed inside the solder non-wetted area 19. Here, the second solder wetted area 21 has a shape that extends outward from the apex of the first solder wetted area 20.

[0048] Such a metal oxide solder non-wetted portion 19 can reliably form the solder non-wetted portion 19 that is difficult for solder to bond to. In addition, the solder non-wetted portion 19 can be easily formed by simply oxidizing a desired region of the metal pattern 13.

[0049] {Step (c) Solder printing} Next, the solder 16 is printed on the first solder wettability portion 20, and the shape of the solder 16 is preferably a combination of a substantially rectangular shape and a substantially X-shape.

[0050] {Step (d) Chip mounting} Next, the power chip 17 is mounted. In reality, the solder 16 is hidden by the power chip 17 and cannot be seen, but in this example, the shape of the solder 16 is shown by a dashed line to make the positional relationship easier to understand.

[0051] {Step (e) Reflow} Next, the solder 16 is melted by heating in a reflow furnace, and the power chip 17 and the first solder wettability portion 20 are joined. When the solder 16 melts and spreads on the first solder wettability portion 20, it does not easily flow in the direction of the solder non-wetability portion 19, but easily flows in the direction of the second solder wettability portion 21. As a result, the solder flows outward from each vertex of the power chip 17 where the second solder wettability portion 21 is located, and it is possible to prevent the solder from flowing out in an unexpected direction. In addition, the power chip 17 is pulled outward from each vertex by the flow of the solder 16 outward from each vertex, making it difficult for the power chip 17 to move in a specific direction, and it is possible to suppress the movement of the power chip 17 in an unexpected direction (for example, displacement or rotation).

[0052] {Step (f) Wire bonding} Next, for example, three wires 23a, 23b, and 23c are attached to complete the step of attaching the semiconductor element.

[0053] <module> FIG. 3 is a schematic diagram showing a modularized configuration of semiconductor devices. The circuit board 26 on which power chips (semiconductor elements) 24, 25 are mounted, a control chip 27, and a lead frame 29 having inner leads 28 are resin-sealed to form a module.

[0054] With this configuration, the power chips 24, 25, which are prevented from moving in unexpected directions (e.g., misalignment or rotation), are sealed with resin together with other components in a module. As a result, problems associated with the movement of the power chips 24, 25 are less likely to occur, the module performs as designed, the rate of defective products is reduced, the yield is improved, and productivity is improved.

[0055] In this embodiment, the method of storing the excess solder in the hole 18 has been described, but this is not limiting and other methods are also possible. For example, it is also possible to make the second solder wettable portion 21 larger so that it is large enough to hold all of the excess solder. In this way, the solder is held in the wettable portion, so that the solder can be fixed more reliably.

[0056] [Second embodiment] A second embodiment of the present invention will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a schematic diagram showing steps of a method for manufacturing a semiconductor device, and Fig. 5 is a schematic diagram showing a configuration in which the semiconductor device is modularized.

[0057] <Method of Manufacturing Semiconductor Device> With reference to FIG. 4, among the steps of the method for manufacturing a semiconductor device, the step of attaching a semiconductor element will be described, focusing on the differences from the first embodiment.

[0058] {Step (a) Substrate state} A circuit board 31 having a metal pattern 30 made of copper with no holes is prepared.

[0059] {Step (b) Laser processing} Next, the prepared circuit board 31 is laser-processed to oxidize the surface of the metal pattern 30, and a frame-shaped solder non-wetted portion 32 is produced to surround the power chip (semiconductor element) to be mounted in the following step (d). The solder non-wetted portion 32 has an outer shape similar to that of the power chip and a rectangular shape larger than the power chip, and an inner shape having four straight line portions 33 approximately parallel to each side of the outer shape of the power chip and four angular recesses 34 carved outward from the vertices of the power chip. As a result, a first solder wetted portion 35 having a shape approximately similar to the outer shape of the power chip and four angular second solder wetted portions 36 extending outward from each vertex of the power chip are formed inside the solder non-wetted portion 32.

[0060] {Step (c) Solder printing} Next, solders 37a, 37b are printed on the first solder wet portion 35 and the second solder wet portion 36, with the solders 37a being approximately rectangular on the first solder wet portion 35 and the solders 37b being approximately round on the second solder wet portion 36, printed spaced apart from each other.

[0061] {Step (d) Chip mounting} Next, a power chip (semiconductor element) 38 is mounted.

[0062] {Step (e) Reflow} Next, the solder 37a and 37b are melted by heating in a reflow furnace, and the power chip 38 is joined to the first solder wettability portion 35 and the second solder wettability portion 36. The melted solder 37a and 37b are unlikely to flow in the direction of the surrounding solder non-wettable portion 32, so they are connected on the first solder wettability portion 35 and the second solder wettability portion 36 to form the solder 37c (hatched portion) that surrounds the power chip 38. This is the case when the amount of solder is appropriate, but if there is an excess amount of solder, the surrounding solder wettability portion surrounding the power chip 38 is wide outward from each vertex, so that a flow toward the outward direction of each of the wide vertices also occurs. As a result, the solder flows toward the outward direction of each vertex of the power chip 38 where the second solder wettability portion 36 is located, and it is possible to prevent the solder from flowing in an unexpected direction. In addition, due to the outward flow of solder 37c from each vertex, the power chip 38 is pulled outward from each vertex, making it less likely to move in a specific direction, thereby preventing the power chip 38 from moving in an unexpected direction (e.g., shifting or rotation).

[0063] {Step (f) Wire bonding} Next, one thick wire 39a and two thin wires 39b, 39c are attached to complete the step of attaching the semiconductor element.

[0064] <module> FIG. 5 is a schematic diagram showing a modularized configuration of semiconductor devices. The circuit board 42 on which power chips (semiconductor elements) 40 and 41 are mounted, a control chip 43, and a lead frame 45 having inner leads 44 are resin-sealed to form a module.

[0065] [Third embodiment] A third embodiment of the present invention will be described with reference to Fig. 6. Fig. 6 is a schematic diagram showing steps of a method for manufacturing a semiconductor device.

[0066] <Method of Manufacturing Semiconductor Device> With reference to FIG. 6, among the steps of the method for manufacturing a semiconductor device, the step of attaching a semiconductor element will be described, focusing on the differences from the second embodiment.

[0067] {Step (a) Substrate state} A circuit board 31 having no holes in a metal pattern 30 made of copper is prepared. This is the same as in the second embodiment.

[0068] {Step (b) Laser processing} Unlike the second embodiment, this is an example in which the second solder wettability is formed in a circular shape. The prepared circuit board 31 is laser processed to oxidize the surface of the metal pattern 30, and a frame-shaped solder non-wetability 46 is produced to surround the power chip (semiconductor element) to be mounted in the following step (d). The solder non-wetability 46 has an outer shape similar to the power chip and a rectangular shape larger than the power chip, and an inner shape having four straight line parts 47 approximately parallel to each side of the outer shape of the power chip and four recesses 48 that are like circular hollows outward from the vertices of the power chip. As a result, inside the solder non-wetability 46, a first solder wettability 49 approximately similar in shape to the outer shape of the power chip and four circular second solder wettability 50 extending outward from each vertex of the power chip are formed.

[0069] {Step (c) Solder printing} Next, solders 51a, 51b are printed on the first solder wet portion 49 and the second solder wet portion 50, with square-shaped solder 51a printed on the first solder wet portion 49 and round-shaped solder 51b printed on the second solder wet portion 50, spaced apart from each other.

[0070] In the above embodiment of the present invention, the solder is applied to the center and the vertices of the semiconductor element, but it is also possible to apply the solder only to the center. For example, if the solder is applied thickly only to the center, when the solder melts it will naturally flow from the center to the vertices, so that the solder can easily flow outward to each vertex.

[0071] The present invention is not limited to the above-described embodiment. The above-described embodiment is merely an example, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits similar effects is included in the technical scope of the present invention. [Explanation of symbols]

[0072] 1, 13, 14, 30...metal pattern, 2, 18...hole, 3a, 3b, 17, 24, 25, 38, 40, 41...power chip (semiconductor element), 4a, 4b, 16, 37a, 37b, 37c, 51a, 51b...solder (lead-free solder), 11...semiconductor device, 12...ceramic substrate, 15, 26, 31, 42...circuit board, 19, 32, 46...solder non-wetted portion, 20, 35, 49...first solder wetted portion, 21, 36, 50...second solder wetted portion, 22...arrow, 23a, 23b, 23c, 39a, 39b, 39c...wire, 27, 43...control chip, 28, 44...inner lead, 29, 45...lead frame, 33, 47...straight portion, 34, 48…recesses.

Claims

1. A circuit board having a metal pattern formed on a surface thereof; a rectangular semiconductor element mounted on the metal pattern; a first solder wettable portion formed by at least a part of the metal pattern and provided in a mounting area for the semiconductor element; a second solder wettable portion formed by at least another portion of the metal pattern and extending outwardly from each vertex of the semiconductor element; a solder non-wettable portion provided between adjacent second solder wettable portions and having a lower solder wettability than the first and second solder wettable portions; a semiconductor device in which the second solder wettability portion and the solder non-wetability portion surround the semiconductor element, and the semiconductor element and the first solder wettability portion are joined by solder.

2. 2. The semiconductor device according to claim 1, wherein the solder non-wettable portion is an oxide of the metal constituting the metal pattern.

3. the semiconductor device is a power chip, In addition, the control chip A lead frame having an inner lead is provided.

3. The semiconductor device according to claim 1, wherein the power chip, the control chip and the lead frame are sealed with a resin.

4. A method for bonding a semiconductor element to a circuit board having a metal pattern formed on a surface thereof, comprising the steps of: processing the metal pattern on the circuit board to form a first solder wettability portion provided in an area where the semiconductor element is to be mounted, a second solder wettability portion extending outwardly from each vertex of the rectangular semiconductor element, and a solder non-wettability portion provided between adjacent second solder wettability portions and having a lower solder wettability than the first and second solder wettability portions; Printing solder on the first solder wettability portion; A method for joining a semiconductor element, comprising the steps of: melting the solder in a reflow process to solder the semiconductor element and the circuit board.

5. Solder is also printed on the second solder wettable portion; 5. The method for joining a semiconductor element according to claim 4, characterized in that in the reflow process, the semiconductor element and the circuit board are soldered by melting both the solder printed on the first solder wettability area and the solder printed on the second solder wettability area.

6. The first solder wettability portion and the second solder wettability portion are formed by at least a portion of the metal pattern; 6. The method for bonding a semiconductor element according to claim 4, wherein the solder non-wettable portion is formed by oxidizing a metal constituting the metal pattern.

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