Printed circuit board and method for manufacturing the same

Abstract

To provide a printed circuit board having via conductors that do not easily come off from an insulating layer, and a method for manufacturing the same.SOLUTION: A printed circuit board comprises a core substrate, and a build-up layer laminated on the core substrate. The build-up layer has an insulating layer laminated on the core substrate, holes penetrating the insulating layer in a thickness direction, and via conductors filled into the holes. The via conductors have a columnar shape.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a printed wiring board and a method for manufacturing the same. [Background technology]

[0002] Conventionally, a printed wiring board has been disclosed in which a build-up layer is laminated on at least one surface of a core substrate (for example, Patent Document 1). The build-up layer is provided with a via conductor. This via conductor is connected to a plated wiring on the surface of the core substrate and a plated wiring on the surface of the build-up layer. These plated wirings are electrically connected by the via conductor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-084913 A Summary of the Invention [Problem to be solved by the invention]

[0004] In recent years, with the miniaturization of electronic devices, technological developments have been made to make printed wiring boards thinner. Technological developments have also progressed to make the build-up layer thinner, and to make the via conductors smaller in diameter. When the build-up layer is thin and the via conductors are small in diameter, the contact area between the via conductors and the insulating layer around them is small, and the contact area between the via conductors and the plated wiring is also small. This poses the problem that the via conductors are easily pulled out of the insulating layer. [Means for solving the problem]

[0005] One aspect of the present disclosure is A core substrate; a build-up layer laminated on the core substrate; The build-up layer is an insulating layer laminated on the core substrate; a hole penetrating the insulating layer in a thickness direction; a via conductor filled in the hole; having The via conductor has a cylindrical shape, the build-up layer has a surface conductor layer on the insulating layer opposite the core substrate; the surface conductor layer has a base layer and an upper layer, the underlayer is located on the insulating layer side and has an opening at a position overlapping the via conductor, The inner edge of the opening is located at a position overlapping with the edge of the hole or located outside the edge of the hole, The region on the inner edge of the opening has a tapered portion, the thickness of which gradually decreases toward the edge of the opening, The tapered portion has a surface that contacts the upper layer, and the surface is curved convexly toward the upper layer. It is a printed wiring board.

[0006] A step of preparing a laminate in which a build-up precursor layer including an insulating layer and a metal underlayer in this order is laminated on a core substrate; a step of disposing a first mask having a first through hole above the underlayer side of the laminate, and irradiating the underlayer with a first laser beam through the first through hole to form an opening in the underlayer; a step of disposing a second mask having a second through hole having a diameter smaller than that of the first through hole above the first through hole of the undercoat layer, and irradiating the insulating layer with a second laser beam through the opening to form a hole in the insulating layer; expanding the hole such that an edge of the hole does not exceed an inner edge of the opening of the undercoat layer; a step of performing a plating process on the insulating layer in which the holes are formed, and growing a plating film on the underlayer and the holes to form via conductors and an upper layer; Including, an inner edge of the opening of the undercoat layer is positioned to overlap an edge of the opening of the hole or to the outside of the edge of the opening of the hole; a region of the undercoat layer on an inner edge side of the opening has a tapered portion, the thickness of the tapered portion gradually decreasing toward the edge of the opening; The tapered portion has a surface that contacts the upper layer, and the surface is curved convexly toward the upper layer. A method for manufacturing a printed wiring board. Effect of the Invention

[0007] According to the present disclosure, the via conductor is less likely to come out of the insulating layer. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 shows a cross section of a printed wiring board. [Diagram 2] FIG. 2 shows an enlarged view of region II in FIG. [Diagram 3] FIG. 3 shows an enlarged cross section of the boundary between the outer periphery of a via conductor and the inner periphery of a hole. [Figure 4] FIG. 4 shows an enlarged cross section of the boundary between the outer periphery of a via conductor and the inner periphery of a hole. [Diagram 5] FIG. 5 shows an enlarged cross section of a via conductor in a modified example. [Figure 6] FIG. 6 shows a cross section of a laminate at one stage in the manufacture of a printed wiring board. [Figure 7] FIG. 7 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 8] FIG. 8 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 9] FIG. 9 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 10] FIG. 10 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 11] FIG. 11 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 12] FIG. 12 shows a cross section of the laminate at a step subsequent to that of FIG. [Figure 13]FIG. 13 shows a cross section of the laminate at a step subsequent to that of FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described with reference to the drawings. However, for the sake of convenience, each of the drawings referred to below shows only the main components necessary for explaining the embodiments in a simplified form. Therefore, the printed wiring board 1 of the present disclosure may include any component not shown in the drawings. Furthermore, the dimensions of the components in the drawings do not faithfully represent the dimensions and dimensional ratios of the actual components.

[0010] [1. Printed wiring board] With reference to FIG. 1, a printed wiring board 1 will be described. The printed wiring board 1 is a multi-layer board. The printed wiring board 1 has a core substrate 10 and a first buildup layer 20. If necessary, the printed wiring board 1 may include a first solder resist layer 40, a second buildup layer 50, and a second solder resist layer 70, as shown in FIG. 1. The second solder resist layer 70, the second buildup layer 50, the core substrate 10, the first buildup layer 20, and the first solder resist layer 40 may be laminated in this order.

[0011] [1-1. Core board] The core substrate 10 includes a base material 11 and conductive layers 12 and 13 . The substrate 11 is formed in a flat plate shape. The substrate 11 has a first surface 11a and a second surface 11b opposite the first surface 11a. The first surface 11a and the second surface 11b face in opposite directions. The substrate 11 has a thickness from the first surface 11a to the second surface 11b. The direction from the first surface 11a toward the second surface 11b and the reverse direction are the thickness directions.

[0012] The substrate 11 is made of an insulating material. Examples of such insulating materials include organic resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether (PPE) resin, polyphenylene oxide (PPO) resin, cyanate ester resin, and liquid crystal polymer. Two or more of these organic resins may be mixed. One or more of these organic resins may be mixed with a reinforcing material. Examples of the reinforcing material include cloth materials such as glass fiber, glass nonwoven fabric, aramid fiber, aramid nonwoven fabric, polyester fiber, and polyester nonwoven fabric. One or more of these organic resins may contain an inorganic filler such as barium sulfate, talc, clay, glass, calcium carbonate, and titanium.

[0013] The conductor layer 12 is laminated on the first surface 11a of the substrate 11. The conductor layer 13 is laminated on the second surface 11b of the substrate 11. The conductor layers 12, 13 are formed into a wiring pattern. The material of the conductor layers 12, 13 is a conductive metal such as copper. The conductor layers 12, 13 are made of a metal plating such as copper plating. The thickness of the conductor layers 12, 13 is preferably, for example, 18 μm or more and 100 μm or less.

[0014] The core substrate 10 may have a multi-layer structure. The following aspects can be given as examples of such a multi-layer structure. For example, the multi-layer structure has a plurality of insulating layers, one or a plurality of internal conductor layers, and two surface conductor layers. The insulating layers are laminated in order. The internal conductor layer is sandwiched between these insulating layers. The two surface conductor layers are laminated on the two outermost surfaces of a laminate consisting of a plurality of insulating layers, in the same manner as the conductor layers 12 and 13 are laminated on the surfaces 11a and 11b of the base material 11, respectively. The internal conductor layer and the surface conductor layer form a wiring pattern.

[0015] [1-2. Build-up layer] The first buildup layer 20 has an insulating layer 21 , at least one via conductor 22 , and a surface conductor layer 23 .

[0016] The insulating layer 21 is laminated on the surface of the core substrate 10. That is, the insulating layer 21 covers the conductor layer 12 and also covers the first surface 11a of the base material 11. In other words, the core substrate 10 has the conductor layer 12 on the surface in contact with the build-up layer 20. The thickness of the insulating layer 21, that is, the thickness from the surface 12d of the conductor layer 12 opposite to the surface 12c of the conductor layer 12 that is in contact with the first surface 11a, to the surface 21d of the insulating layer 21 opposite to the core substrate 10, is, for example, 40 to 100 μm.

[0017] The insulating layer 21 is formed of a material having insulating properties. Examples of such insulating materials include organic resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether (PPE) resin, polyphenylene oxide (PPO) resin, cyanate ester resin, polytetrafluoroethylene (PTFE) resin, and liquid crystal polymer. Two or more of these organic resins may be mixed. One or more of these organic resins may be mixed with a reinforcing material. Examples of the reinforcing material include cloth materials such as glass fiber, glass nonwoven fabric, aramid fiber, aramid nonwoven fabric, polyester fiber, and polyester nonwoven fabric. One or more of these organic resins may contain an inorganic filler such as barium sulfate, talc, clay, glass, calcium carbonate, and titanium.

[0018] The via conductor 22 penetrates the insulating layer 21 in the thickness direction. Specifically, the insulating layer 21 has at least one hole 21a penetrating the insulating layer 21 in the thickness direction, and the via conductor 22 is filled in each hole 21a. The material of the via conductor 22 is a conductive metal such as copper. The via conductor 22 is bonded to the conductor layer 12 of the core substrate 10 and is electrically connected to the conductor layer 12.

[0019] When multiple via conductors 22 are arranged, sufficient insulation can be ensured even if the pitch of the via conductors 22 is 245 μm. The build-up layer 20 may have an underlayer 24 between the insulating layer 21 and the upper layer 25. The underlayer 24 is preferably conductive. The underlayer 24 is preferably a metal film.

[0020] FIG. 2 is an enlarged view of region II in FIG. 1. As shown in FIG. 2, the surface 12a of the conductor layer 12 in contact with the via conductor 22 may be concave. In other words, if the conductor layer 12 in contact with the via conductor 22 is concave, the bottom 22a of the via conductor 22 fits into the concave. The contact area between the conductor layer 12 and the via conductor 22 becomes larger. This makes it possible to increase the bonding strength between the conductor layer 12 and the via conductor 22. In this case, it is preferable that the end face of the via conductor 22 on the conductor layer 12 side is convex. In this way, the bottom 22a of the via conductor 22 fits into the concave surface 12a.

[0021] As shown in FIG. 1, macroscopically, the via conductor 22 is formed in a cylindrical shape around a central axis along the thickness direction of the insulating layer 21. Here, the cylindrical shape means that the diameter of the via conductor 22 is uniform along the thickness direction. The via conductor 22 is in contact with the inner wall surface of the hole 21a over the entire thickness direction. As shown in FIG. 2, microscopically, the inner wall surface of the hole 21a has an uneven shape, and the via conductor 22 is filled up to the unevenness of the inner wall surface of the hole 21a over the entire thickness direction. In other words, the via conductor 22 is formed unevenly, and the unevenness of the via conductor 22 fits into the unevenness of the inner wall surface of the hole 21a without any gaps.

[0022] 3 and 4 are enlarged views of a cross section of the boundary between the via conductor 22 and the inner wall surface of the hole 21a. The portion shown in FIG. 4 is in a different position from the portion shown in FIG. 3. As shown in FIG. 3 and FIG. 4, the unevenness of the via conductor 22 has at least one convex portion 22b and at least one convex portion 22c. The convex portions 22b and 22c protrude radially outward and are stuck into the insulating layer 21. In other words, the convex portions 22b and 22c protrude radially outward. Also, the convex portions 22b and 22c are arranged so as to stick into the insulating layer 21. In this case, the convex portion 22b is inclined toward the surface conductor layer 23. Alternatively, the convex portion 22b is inclined toward the upper layer 25. In other words, the convex portion 22b is inclined from the side surface of the via conductor 22, and is oriented toward the surface conductor layer 23 or the upper layer 25. Protrusion 22c is oriented so as to incline toward core substrate 10. In other words, protrusion 22c is oriented obliquely from the side surface of via conductor 22, and its direction faces toward core substrate 10.

[0023] 1, the surface conductor layer 23 is laminated on a surface 21d of the insulating layer 21, which is on the opposite side to the core substrate 10 with respect to the insulating layer 21. The surface conductor layer 23 forms a wiring pattern. The surface conductor layer 23 is electrically connected to the via conductors 22.

[0024] The surface conductor layer 23 may have an underlayer 24 and an upper layer 25. Here, the upper layer 25 refers to a metal film of the surface conductor layer 23 located on the opposite side of the insulating layer 21 with the underlayer 24 interposed therebetween. The upper layer 25 is a part of the metal film constituting the surface conductor layer 23. The underlayer 24 and the upper layer 25 are arranged to be laminated in this order on the surface 21d of the insulating layer 21 on the opposite side of the core substrate 10 with respect to the insulating layer 21. The thickness of the underlayer 24 is, for example, 2 μm or more and 17 μm or less. The underlayer 24 and the upper layer 25 form a wiring pattern. The material of the underlayer 24 and the upper layer 25 is, for example, a conductive metal such as copper.

[0025] The underlayer 24 has an opening 24a at a position overlapping the hole 21a. The inner edge of the opening 24a is located at a position overlapping the edge of the hole 21a or outside the edge of the hole 21a. The underlayer 24 has a tapered portion 24b around the opening 24a. Here, the periphery of the opening 24a refers to a region including the inner edge (or edge) of the opening 24a and extending from the inner edge in a normal direction by a predetermined width. The thickness of the tapered portion 24b gradually decreases toward the edge of the opening 24a. In other words, the thickness of the underlayer 24 is preferably increased from the edge of the opening 24a toward the direction of the normal to the outside. If the underlayer 24 has a shape in which the thickness increases from the edge of the opening 24a toward the direction of the normal to the outside, the probability that the tapered portion 24b of the underlayer 24 is not easily peeled off from the insulating layer 21 increases. The vicinity of the tapered portion 24b of the underlayer 24 is a portion where a plurality of members, such as the insulating layer 21, the via conductor 22, and the upper layer 25, are in contact with each other. In the portion where a plurality of members are in contact with each other, stress is likely to occur due to differences in the thermal expansion coefficient and Young's modulus of each member. In such a case, if the underlayer 24 has a shape in which the thickness increases from the edge of the opening 24a toward the direction of the normal line to the outside, the stress that is likely to occur near the edge of the opening 24a, which is the end of the tapered portion 24b, can be reduced. In this case, it is particularly preferable that the thickness of the underlayer 24 decreases toward the edge of the opening 24a. Furthermore, it is preferable that the surface of the tapered portion 24b in contact with the upper layer 25 has a curved shape that is convex toward the upper layer 25. The upper layer 25 is connected to the via conductor 22 through the opening 24a, and the via conductor 22 is integrated with the upper layer 25. The thickness of the upper layer 25 at the overlapping portion of the tapered portion 24b gradually decreases toward the edge of the opening 24a. The angle θ of the tapered portion 24b at the edge of the opening 24a is, for example, greater than 45°, and more specifically, is preferably 50° or more and 80° or less.

[0026] The portions of the surface conductor layer 23 that overlap the via conductors 22 are lands having a diameter greater than the line width of the wiring pattern. The diameter of the land is preferably, for example, 200 μm or more and 250 μm or less.

[0027] As described above, the printed wiring board 1 may have a second buildup layer 50. The second buildup layer 50 is located on the surface of the core substrate 10 opposite to the surface on which the first buildup layer 20 is located. The core substrate 10 may have a conductor layer 13 on the surface in contact with the second buildup layer 50. The second buildup layer 50 has an insulating layer 51, at least one via conductor 52, and a surface conductor layer 53. The second buildup layer 50 is provided in the same manner as the first buildup layer 20. The insulating layer 51 of the second buildup layer 50 corresponds to the insulating layer 21 of the first buildup layer 20, the via conductor 52 of the second buildup layer 50 corresponds to the via conductor 22 of the first buildup layer 20, and the surface conductor layer 53 of the second buildup layer 50 corresponds to the surface conductor layer 23 of the first buildup layer 20. Moreover, the hole 51a in the insulating layer 51 corresponds to the hole 21a in the insulating layer 21, the underlayer 54 of the surface conductor layer 53 corresponds to the underlayer 24 of the surface conductor layer 23, the upper layer 55 of the surface conductor layer 53 corresponds to the upper layer 25 of the surface conductor layer 23, and the opening 54a in the underlayer 54 corresponds to the opening 24a in the underlayer 24. Moreover, just as the underlayer 24 has a tapered portion around the opening 24a, the underlayer 54 has a tapered portion around the opening whose thickness gradually decreases toward the edge of the opening 54a.

[0028] [1-3. Solder resist layer] The solder resist layers 40 and 70 are laminated on both sides of the laminate of the first buildup layer 20, the core substrate 10, and the second buildup layer 50. That is, the first solder resist layer 40 covers the surface conductor layer 23, and also covers the surface 21d of the insulating layer 21 opposite the core substrate 10 with respect to the insulating layer 21. The second solder resist layer 70 covers the surface conductor layer 53, and also covers the surface 51d of the insulating layer 51 opposite the core substrate 10 with respect to the insulating layer 51.

[0029] The first solder resist layer 40 has at least one opening 41. A portion of the surface conductor layer 23 overlaps the opening 41, and the portion of the surface conductor layer 23 within the opening 41 is a terminal. The second solder resist layer 70, like the first solder resist layer 40, also has at least one opening 71. A portion of the surface conductor layer 53 overlaps the opening 71, and the portion of the surface conductor layer 53 within the opening 71 is a terminal.

[0030] [1-4. Modifications] (1) In the example shown in Fig. 1, the number of first buildup layers 20 is one. Alternatively, a plurality of first buildup layers 20 may be laminated between the core substrate 10 and the first solder resist layer 40. Similarly, a plurality of second buildup layers 50 may be laminated between the core substrate 10 and the second solder resist layer 70. When the number of first buildup layers 20 is n, counting from directly above the core substrate 10, the via conductors 22 of the second to nth first buildup layers 20 are electrically connected to the surface conductor layer 23 of the first buildup layer 20 directly below. The same applies to the via conductors 52 of the nth second buildup layers 50.

[0031] (2) In the example shown in Fig. 2, the diameters of the via conductor 22 and the hole 21a are uniform in the thickness direction. In contrast, as shown in Fig. 5, the diameter of the portion 21e of the hole 21a proximal to the conductor layer 12 may be tapered so that the diameter gradually decreases from the opening 24a side toward the conductor layer 12, and the portion 21e is tapered. In accordance with this, the diameter of the portion of the via conductor 22 proximal to the conductor layer 12 gradually decreases from the opening 24a side toward the conductor layer 12, and the portion 21e is tapered.

[0032] [1-5. Summary] (1) As in the conventional case, if the diameter of the via conductor gradually decreases from the solder resist layer side to the core substrate side and the via conductor is formed in a truncated cone shape, the via conductor is likely to come out of the insulating layer. In contrast, the diameter of the above-mentioned via conductors 22 and 52 is uniform throughout the thickness direction and the via conductors 22 and 52 are formed in a cylindrical shape. Therefore, the via conductors 22 and 52 are less likely to come out of the insulating layers 21 and 51 compared to the conventional via conductors.

[0033] (2) The uniform diameter of the via conductor 22 in the thickness direction contributes to improving the connection reliability between the via conductor 22 and the conductor layer 12. The bonding area between the via conductor 22 and the conductor layer 12 is larger than the bonding area between a conventional via conductor and a conductor layer. Therefore, whereas a conventional via conductor is likely to separate from the conductor layer, the via conductor 22 is unlikely to separate from the conductor layer 12. Similarly, the uniform diameter of the via conductor 52 in the thickness direction contributes to improving the connection reliability between the via conductor 22 and the conductor layer 12.

[0034] (3) The difference in thermal expansion coefficient between the via conductor 22 and the insulating layer 21 is a factor in the separation of the via conductor 22 from the conductor layer 12. Even so, since the diameter of the via conductor 22 is uniform throughout the thickness direction, the via conductor 22 is unlikely to separate from the conductor layer 12.

[0035] (4) The bottom 22a of the via conductor 22 is convex, the surface 12a of the conductor layer 12 is concave, and the bottom 22a of the via conductor 22 is fitted into the concave surface 12a. This contributes to improving the electrical characteristics between the via conductor 22 and the conductor layer 12. Specifically, since the bonding area between the via conductor 22 and the conductor layer 12 increases, the electrical resistance, conductivity, etc. near the boundary between the via conductor 22 and the conductor layer 12 are stabilized. The same applies to the via conductor 52 and the conductor layer 13.

[0036] (5) Since the boundary surface between the outer periphery of the via conductor 22 and the inner wall surface of the hole 21a is formed uneven, the adhesion and bonding between the via conductor 22 and the insulating layer 21 is high and the via conductor 22 is less likely to come out of the insulating layer 21. The same is true for the via conductor 52 and the insulating layer 51.

[0037] (6) The unevenness on the outer periphery of the via conductor 22 has at least one protruding portion 22b, which is inclined toward the upper layer 25 and protrudes from the hole 21a into the insulating layer 21. The protruding portion 22b anchors the via conductor 22 to the insulating layer 21. Therefore, the via conductor 22 is unlikely to come out of the hole 21a toward the upper layer 25, and the via conductor 22 is unlikely to separate from the conductor layer 12. The same applies to the via conductor 52.

[0038] (7) The unevenness on the outer periphery of via conductor 22 has at least one protruding portion 22c, which is inclined toward core substrate 10 and protrudes from hole 21a into insulating layer 21. Protruding portion 22c anchors via conductor 22 to insulating layer 21. Therefore, it has a stronger anchoring effect than only protruding portion 22b inclined toward upper layer 25, and via conductor 22 is less likely to separate from upper layer 25. The same applies to via conductor 52.

[0039] (8) Because underlayer 24 has tapered portion 24b around opening 24a, the contact area between underlayer 24 and upper layer 25 near opening 24a is larger than when tapered portion 24b does not exist. This prevents upper layer 25 from peeling off from underlayer 24 around opening 24a, and thus prevents via conductor 22 from coming out of insulating layer 21. The same applies to via conductor 52.

[0040] [2. Manufacturing method of printed wiring board] A method for manufacturing printed wiring board 1 will be described with reference to FIGS.

[0041] [2-1. Preparation] First, the laminate 10A is prepared. The laminate 10A is prepared by laminating the buildup precursor layer 20A on the core substrate 10. If necessary, the buildup precursor layer 50A may be laminated on the core substrate 10 on the opposite side of the buildup precursor layer 20A with respect to the core substrate 10. The laminate 10A includes the underlayer 54, the insulating layer 51, the core substrate 10, the insulating layer 21, and the underlayer 24 in FIG. 6, which are arranged in this order. The buildup precursor layer 20A includes the insulating layer 21 and the underlayer 24. The buildup precursor layer 50A includes the insulating layer 51 and the underlayer 54. The underlayers 24 and 54 have not yet been formed into a wiring pattern. The insulating layer 21 has no hole 21a formed therein, and the insulating layer 51 has no hole 51a formed therein. At this point, the underlayers 24 and 54 have a thickness of, for example, 3 μm or more and 18 μm or less. The insulating layer 21 has a thickness of, for example, 40 to 100 μm.

[0042] The laminate 10A is prepared, for example, as follows (1) or (2). (1) Prepregs or resin films, etc. are laminated on both sides of core substrate 10, and metal foil is further laminated on these prepregs or resin films, etc. Thereafter, the metal foil, prepregs or resin films, etc., and core substrate 10 are heated and pressurized to harden the prepregs or resin films and bond them to core substrate 10 and the metal foil, thereby forming insulating layers 21, 51 and underlayers 24, 54. (2) Build-up sheets, in which metal foil has been pre-laminated on a resin film or the like, are laminated on both sides of the core substrate 10. Then, the build-up sheets and the core substrate 10 are heated and pressurized to harden the resin film or the like and adhere it to the core substrate 10, thereby forming the insulating layers 21, 51.

[0043] [2-2. Roughening] Next, the surfaces of the underlayers 24, 54 are roughened. Specifically, the surfaces of the underlayers 24, 54 are etched. As a result, the surfaces of the underlayers 24, 54 become rough and black, and the underlayers 24, 54 become thinner. The thickness of the underlayers 24, 54 after the surface treatment is, for example, 2 μm or more and 17 μm or less.

[0044] [2-3. First laser beam irradiation] 7, the laminate 10A is set in a laser beam processing machine, and a mask 110 is set between a laser oscillator of the laser beam processing machine and the underlayer 24. The mask 110 has at least one circular through-hole 111 penetrating the mask 110. The diameter of the through-hole 111 is, for example, 2 to 3 mm, and more specifically, 2.4 mm.

[0045] 8, a laser beam processing machine is used to irradiate the underlayer 24 with a laser beam 150 through the through-hole 111. An opening 24a is formed in the underlayer 24 at a location irradiated with the laser beam 150. Since the underlayer 24 has already been roughened as described above, the laser beam 150 is absorbed by the underlayer 24 without being reflected by the underlayer 24.

[0046] The output of the laser beam 150 in the laser beam processing machine is, for example, 10 to 20 mJ / shot, more specifically, 16 mJ / shot. The diameter of the opening 24a is determined according to the diameter of the through hole 111 and the output of the laser beam 150. The larger the diameter of the through hole 111, the larger the diameter of the opening 24a, and the higher the output of the laser beam 150, the larger the diameter of the opening 24a. For example, if the diameter of the through hole 111 is 2.4 mm and the output of the laser beam 150 is, for example, 16 mJ / shot, the opening 24a with a diameter of 100 μm is formed. The output of the laser beam 150 is also called power.

[0047] When the laser beam 150 reaches the surface of the insulating layer 21, the irradiation of the laser beam 150 is stopped.

[0048] When forming a plurality of via conductors 22, a plurality of openings 24a are formed in the underlayer 24 by changing the location where the laser beam 150 is irradiated.

[0049] [2-4. Second laser beam irradiation] 9, the mask 110 is replaced with a mask 120 and set. The mask 120 has at least one circular through-hole 121 penetrating the mask 120. The diameter of the through-hole 121 is shorter than the diameter of the through-hole 111 of the mask 110. The diameter of the through-hole 121 is, for example, 1 / 3 to 1 / 2 of the diameter of the through-hole 111, and more specifically, 1.1 mm.

[0050] Next, as shown in FIG. 10, the laser beam processing machine is used to irradiate the insulating layer 21 with a laser beam 160 through the through hole 121 and the opening 24a. As a result, a cylindrical hole 21a is formed in the insulating layer 21 at the irradiated portion of the laser beam 160. The output of the laser beam 160 is, for example, 1 / 15 to 1 / 8 of the output of the laser beam 150 when the opening 24a is formed, more specifically, 1.8 mJ / shot. The diameter of the formed hole 21a is shorter than the diameter of the opening 24a. The diameter of the hole 21a is determined according to the diameter of the through hole 121 and the output of the laser beam 160. The longer the diameter of the through hole 121, the longer the diameter of the hole 21a, and the higher the output of the laser beam 160, the longer the diameter of the hole 21a. For example, if the opening 24a is formed according to the above-mentioned preferred conditions, the diameter of the through hole 121 is 1.1 mm, and the output of the laser beam 160 is, for example, 1.8 mJ / shot, then a hole 21a having a diameter of 80 μm is formed.

[0051] When the laser beam 160 reaches the surface of the conductor layer 12, the irradiation of the laser beam 160 is stopped. Just before the irradiation of the laser beam 160 is stopped, the laser beam 160 is incident on the surface of the conductor layer 12 for a short period of time, so that the surface of the conductor layer 12 is shaped into a concave shape by the laser beam 160.

[0052] In the process of sequentially irradiating the laser beams 150 and 160 onto the underlayer 24 and the insulating layer 21 as described above, the laser beam 150 is incident on the periphery of the opening 24a, so that the tapered portion 24b is formed around the opening 24a.

[0053] When forming a plurality of via conductors 22, a plurality of holes 21a are formed in the insulating layer 21 by changing the location where the laser beam 160 is irradiated.

[0054] [2-5. Processing of the base layer and insulating layer on the opposite side] Next, in the same manner as the opening 24a was formed in the base layer 24, the opening 54a is formed in the base layer 54. Next, in the same manner as the hole 21a was formed in the insulating layer 21, the hole 51a is formed in the insulating layer 51.

[0055] [2-6. Desmear] Next, the smears in the holes 21a and 51a are removed by, for example, plasma treatment or a permanganic acid solution. As shown in Fig. 11, such a desmear treatment expands the diameter of the hole 21a to the same diameter as the opening 24a, and expands the diameter of the hole 51a to the same diameter as the opening 54a.

[0056] [2-7. Plating] Next, the laminate 10A in which the openings 24a, 54a and the holes 21a, 51a are formed is subjected to a plating process to form via conductors 22, 52 and metal plating layers 25A, 55A on the entire surfaces of the laminate 10A as shown in FIG.

[0057] [2-8. Pattern] Next, as shown in FIG. 13, a wiring pattern is formed on the metal plating layers 25A, 55A and the underlayers 24, . Specifically, first, a resist is laminated on the metal plating layers 25A, 55A. The resist is exposed to light and then developed. The metal plating layers 25A, 55A and the underlayers 24, 54 are etched using the resist as a mask, so that the metal plating layers 25A, 55A and the underlayers 24, 54 are shaped into a wiring pattern. The remaining metal plating layer 25A is the upper layer 25 having the wiring pattern, and the remaining metal plating layer 55A is the upper layer 55 having the wiring pattern.

[0058] [2-9. Formation of solder resist layer] Next, a first solder resist layer 40 is laminated on the insulating layer 21 and the upper layer 25, and a second solder resist layer 70 is laminated on the insulating layer 51 and the upper layer 55. Through the above steps, the printed wiring board 1 is completed.

[0059] [2-10. Modifications] (1) As described above, the wiring patterns of the underlayers 24, 54 and the upper layers 25, 5 are formed by a subtractive method, but may be formed by a modified semi-additive process (MSAP).

[0060] (2) In the case where there are a plurality of first buildup layers 20 and second buildup layers 50, after the process of [2-8], a new insulating layer 21 and underlayer 24 are formed on the existing first buildup layer 20, and a new insulating layer 51 and underlayer 54 are formed on the existing second buildup layer 50. Thereafter, the processes of [2-4] to [2-8] are performed on the new insulating layers 21, 51 and underlayers 24, 54. After performing such a series of processes once or a plurality of times, the process of [2-9] is performed.

[0061] [2-11. Summary] (1) The diameter of the through hole 121 through which the laser beam 160 passes is shorter than the diameter of the through hole 111. Therefore, the diameter of the hole 21a formed by the laser beam 160 is shorter than the diameter of the opening 24a formed by the laser beam 150. However, after the hole 21a is formed, the inner wall of the hole 21a may be expanded by a desmear process, so that the diameters of the hole 21a and the opening 24a are likely to be close to each other or equal to each other. At this time, it is preferable to set the output of the laser beam 160 to 1 / 5 to 1 / 100 of the output of the laser beam 150. In this way, the underlayer 24 can be prevented from protruding inward from the edge of the hole 21a. As a result, the plating solution in the hole 21a is easily circulated. The metal plating grows well in the hole 21a, and the via conductor 22 is well formed. In other words, voids, defects, etc. are less likely to occur in the via conductor 22. The same is true for the via conductor 52. In the via conductors 22 and 52, minute metal crystals are likely to form on the inner wall side of the hole 21a, and are likely to fill in the irregularities on the inner wall of the hole 21a. In addition, the metal crystals tend to have fewer defects from near the inner wall of the hole 21a toward the central axis of the via conductors 22 and 52, and tend to form a crystal structure with a regular kink structure.

[0062] (2) Under the above-mentioned output conditions of the laser beam 160, when the hole 21a advances toward the conductor layer 12 during irradiation with the laser beam 160, the hole 21a is not easily enlarged by the laser beam 160. Therefore, the opening diameter of the hole 21a distal to the underlayer 24 is almost equal to the opening diameter of the hole 21a proximal to the underlayer 24, the diameter of the hole 21a is uniform in the thickness direction even after the desmearing process, and the diameter of the via conductor 22 is uniform in the thickness direction. Therefore, the via conductor 22 is less likely to come out of the insulating layer 21 than when a tapered hole is formed and filled with a conductor, and the contact area between the via conductor 22 and the conductor layer 12 can be increased. The same applies to the via conductor 52.

[0063] (3) In general, plating does not adhere well to liquid crystal polymers and polytetrafluoroethylene resins. Even if the insulating layer 21 is made of a liquid crystal polymer or polytetrafluoroethylene resin, the via conductors 22 are unlikely to come out of the insulating layer 21 if the manufacturing method described above is used.

[0064] (4) The diameter of through hole 121 through which laser beam 160 passes is ⅓ or more and ½ or less of the diameter of through hole 111 through which laser beam 150 passes. The output of laser beam 160 is ⅓ or more and ⅛ or less of the output of laser beam 150 when opening 24a is formed. Therefore, even if insulating layer 21 has a thickness of 40 to 100 μm, the difference in opening diameter between hole 21a proximal to underlayer 24 and hole 21a distal from underlayer 24 can be made 5 μm or less.

[0065] (5) Since the diameters of the hole 21a and the via conductor 22 are uniform in the thickness direction, the diameter of the portion of the via conductor 22 proximal to the underlayer 24 can be reduced by making the opening diameter of the hole 21a distal from the underlayer 24 equal to the opening diameter of the bottom of the tapered hole. Accordingly, the diameter of the land overlapping the via conductor 22 can also be reduced. When there are multiple via conductors 22, the interval between the via conductors 22 can be shortened. Even when the diameter of the land is 225 μm or more and 250 μm or less and the pitch of the via conductors 22 is 245 μm, the insulation between the lands and the insulation between the via conductors 22 are ensured.

[0066] (6) Since no complicated etching process is performed when forming the opening 24a in the underlayer 24, the process of forming the opening 24a in the underlayer 24 can be simplified compared to processes using other methods such as the large window method and the conformal mask method. Here, the large window method is a method in which an opening is formed in the copper foil by etching, and then a hole having a smaller diameter than the opening is formed in the resin layer by laser beam processing. The conformal mask method is a method in which an opening is formed in the copper foil by etching, and then a hole having a larger diameter than the opening is formed in the resin layer by laser beam processing.

[0067] (7) The same laser beam processing machine is used for both the irradiation of the laser beams 150 and 160. Therefore, the number of steps in the above-mentioned manufacturing method is reduced.

[0068] [3. Other] The specific details of the configuration, structure, positional relationship, shape, etc. shown in the above embodiment can be changed as appropriate without departing from the spirit of the present disclosure. Furthermore, the configurations, structures, positional relationships, and shapes shown in the above embodiment can be combined as appropriate without departing from the spirit of the present disclosure.

[0069] In one embodiment, (1) a printed wiring board comprises a core substrate and a build-up layer laminated on the core substrate, the build-up layer having an insulating layer laminated on the core substrate, a hole penetrating the insulating layer in a thickness direction, and a via conductor filled in the hole, and the via conductor has a cylindrical shape.

[0070] (2) In the printed wiring board of (1) above, the inner wall surface of the hole has projections and recesses, and the via conductor abuts against the inner wall surface.

[0071] (3) In the printed wiring board of (1) or (2) above, the build-up layer has a surface conductor layer on the insulating layer opposite the core substrate, and the via conductor has a side facing an inner wall surface of the hole, the side having at least one convex portion, and the convex portion is inclined so as to face toward the surface conductor layer.

[0072] (4) In the printed wiring board of (3) above, the convex portion is inclined so as to face toward the core substrate.

[0073] (5) In the printed wiring board of either (3) or (4) above, the surface conductor layer has a base layer and an upper layer, the base layer is located on the insulating layer side and has an opening at a position overlapping the via conductor, and the inner edge of the opening is located at a position overlapping with the edge of the hole or outside the edge of the hole.

[0074] (6) In the printed wiring board of (5) above, the region on the inner edge side of the opening has a tapered portion, and the thickness of the tapered portion gradually decreases toward the edge of the opening.

[0075] (7) In any one of the printed wiring boards (1) to (6) above, the core substrate has a conductor layer on a surface that contacts the build-up layer, and the surface of the conductor layer that contacts the via conductor is concave.

[0076] In one embodiment, (8) a method for manufacturing a printed wiring board includes the steps of preparing a laminate in which a build-up precursor layer having an insulating layer and a metallic base layer in this order is superimposed on a core substrate; arranging a first mask having a first through hole above the base layer side of the laminate, and irradiating a first laser beam through the first through hole toward the base layer to form an opening in the base layer; arranging a second mask having a second through hole smaller in diameter than the first through hole above the first through hole in the base layer, and irradiating a second laser beam through the opening toward the insulating layer to form a hole in the insulating layer; and plating the insulating layer in which the hole has been formed, and growing a plating film on the base layer and the hole to form a via conductor and an upper layer.

[0077] (9) In the manufacturing method according to (8) above, the diameter of the second through hole is not less than 1 / 3 and not more than 1 / 2 of the diameter of the first through hole.

[0078] (10) In the manufacturing method according to (8) or (9) above, the output of the second laser beam is 1 / 15 or more and 1 / 8 or less of the output of the first laser beam.

[0079] (11) The manufacturing method according to any one of (8) to (10) above, further comprising the step of enlarging the hole so that the hole does not extend beyond an inner edge of the opening of the undercoat layer. [Explanation of symbols]

[0080] 10 Core Board 10A laminate 20 First build-up layer 20A Build-up Precursor Layer 21 Insulating layer Hall 21a 22 Via conductor 22b Convex part 22c Convex 24 Base layer 24a opening 24b Tapered section 25 Upper layer 50 Second build-up layer 50A build-up precursor layer 51 Insulating layer Hall 51a 52 Via conductor 54 Base layer 54a aperture 55 Upper layer

Claims

[Claim 1] A core substrate; a build-up layer laminated on the core substrate; The build-up layer is an insulating layer laminated on the core substrate; a hole penetrating the insulating layer in a thickness direction; a via conductor filled in the hole; having The via conductor has a cylindrical shape, the build-up layer has a surface conductor layer on the insulating layer opposite the core substrate; the surface conductor layer has a base layer and an upper layer, the underlayer is located on the insulating layer side and has an opening at a position overlapping the via conductor, The inner edge of the opening is located at a position overlapping with the edge of the hole or located outside the edge of the hole, The region on the inner edge side of the opening has a tapered portion, and the thickness of the tapered portion gradually decreases toward the edge of the opening, The tapered portion has a surface that contacts the upper layer, and the surface is curved convexly toward the upper layer. Printed wiring board.

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