Printed wiring board

Abstract

To provide a printed wiring board that enables wiring lengths between IC chips mounted on a printed wiring board and electronic components mounted in inner layers to be shorten.SOLUTION: A printed wiring board has: a conductor layer of an inner layer; an uppermost resin insulation layer having a first face and a second face opposite to the first face, and formed on the conductor layer of the inner layer in a manner that the second face faces the conductor layer of the inner layer; an uppermost conductor layer formed on the first face of the uppermost resin insulation layer; solder resist layers formed on the first face of the uppermost resin insulator layer and on the uppermost conductor layer; an electronic component embedded in the uppermost resin insulation layer, and having electrodes facing the first face; and IC chip mounting pins disposed in an opening through the solder resist layer and the uppermost resin insulation layer to the electrode, and electrically connected to the electrodes.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The technology disclosed in this specification relates to a printed wiring board. [Background technology]

[0002] Patent Document 1 discloses a multilayer printed wiring board having a plurality of conductor circuits, interlayer insulating layers interposed between each conductor circuit, and chip capacitors mounted on the conductor circuits in the inner layers. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2001-308539 A Summary of the Invention

[0004] [Problem of Patent Document 1] In the printed wiring board of Patent Document 1, it is thought that the wiring length between the electronic components mounted on the inner layer conductor circuits and the IC chip mounted on the printed wiring board will be long. [Means for solving the problem]

[0005] The printed wiring board of the present invention comprises an inner conductor layer, a top resin insulating layer having a first surface and a second surface opposite to the first surface and formed on the inner conductor layer so that the second surface faces the inner conductor layer, a top conductor layer formed on the first surface of the top resin insulating layer, a solder resist layer formed on the first surface of the top resin insulating layer and on the top conductor layer, an electronic component embedded in the top resin insulating layer and having an electrode facing the first surface, and a pin for mounting an IC chip that is arranged in an opening that penetrates the solder resist layer and the top resin insulating layer and leads to the electrode and is connected to the electrode.

[0006] A printed wiring board according to an embodiment of the present invention has a top resin insulating layer and a solder resist layer. The top resin insulating layer is formed on an inner conductor layer. An electronic component is embedded in the top resin insulating layer. The electronic component has an electrode facing a first surface of the top resin insulating layer. An opening is formed through the solder resist layer and the top resin insulating layer to reach the electrode. Pins for mounting the IC chip are formed inside the opening. The pins are connected to the electrodes of the electronic component. The IC chip is mounted on the pins. The IC chip and electronic component are connected by the pins. Therefore, the wiring length between the IC chip and the electronic component is short. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view illustrating a printed wiring board according to an embodiment. [Figure 2A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 2B] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 2C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 3A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 3B] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 3C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 4A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 4B] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 4C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5A] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5B] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 5C] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. [Figure 6] 1A to 1C are cross-sectional views each showing a schematic diagram of a method for manufacturing a printed wiring board according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] <Embodiment> 1 is a cross-sectional view of a semiconductor device 1 according to an embodiment. The semiconductor device 1 is formed of a printed wiring board 10 according to an embodiment and an IC chip 100 mounted on the printed wiring board 10. The IC chip 100 is mounted on the printed wiring board 10 by pins 300.

[0009] 1, printed wiring board 10 has core substrate 20 and buildup layers 80A, 80B formed on the front and back sides of core substrate 20. Buildup layers 80A, 80B are formed of resin insulating layers 60U, 60L, conductor layers 70U, 70L, and via conductors 72U, 72L that penetrate resin insulating layers 60U, 60L and connect adjacent conductor layers. Resin insulating layer 60U is the uppermost resin insulating layer.

[0010] The printed wiring board 10 has solder resist layers 62U, 62L on the build-up layers 80A, 80B. The solder resist layer 62U has an opening 62a. The conductor layer 70U exposed by the opening 62a functions as a pad for mounting the IC chip 100. Solder bumps 76 for mounting the IC chip 100 are formed on the pads.

[0011] The resin insulating layer 60U has a first surface F and a second surface S opposite the first surface F. The resin insulating layer 60U is formed on the conductor layer 28U such that the second surface S faces the conductor layer 28U. The conductor layer 28U is an inner conductor layer. The conductor layer 70U is formed on the first surface F. The solder resist layer 62U is formed on the first surface F of the resin insulating layer 60U and on the conductor layer 70U. A chip capacitor (electronic component) C is built into the resin insulating layer 60U. The chip capacitor C has an electrode 200. The electrode 200 faces the first surface F.

[0012] The solder resist layer 62U and the resin insulating layer 60U have an opening 150. The opening 150 penetrates the solder resist layer 62U and the resin insulating layer 60U. The opening 150 reaches the electrode 200. A pin 300 for mounting the IC chip 100 is disposed in the opening 150. The pin 300 is connected to the electrode 200. The pin 300 has an upper end 300U and a lower end 300L opposite to the upper end 300U. The lower end 300L is joined to the electrode 200 via solder 250. The upper end 300U is joined to the IC chip 100 via solder 250. The IC chip 100 is mounted on the pin 300. The IC chip 100 and the chip capacitor C are connected by the pin 300. Therefore, the wiring length between the IC chip 100 and the chip capacitor C is short.

[0013] <Method of manufacturing a printed wiring board according to an embodiment> 2A to 6 show a method for manufacturing the printed wiring board 10 of the embodiment.

[0014] As shown in Fig. 2A, a copper-clad laminate 20a is used as a starting material, in which copper foil 22 is laminated on both sides of a resin core substrate 20. As shown in Fig. 2B, the copper-clad laminate 20a is drilled to form through holes 24 for through holes.

[0015] 2C, after the plating resist is formed, a predetermined electroless plating process is performed to form through-holes 26. Furthermore, as shown in FIG. 3A, copper foil 22 is etched into a pattern to form conductor layers 28U, 28L on both sides of core substrate 20.

[0016] As shown in Fig. 3B, solder 30 is formed on a portion of conductor layer 28U on which chip capacitor C (described later) is mounted. As shown in Fig. 3C, chip capacitor C is placed on conductor layer 28U on which solder 30 is formed. Solder 30 is melted by a reflow process, and chip capacitor C is attached to conductor layer 28U. Thereafter, core substrate 20 is washed, and flux and the like that has melted from solder 30 is removed.

[0017] 4A, a predetermined resin insulating agent is applied to the surface of core substrate 20 and inside through holes 26. After drying, resin insulating layers 60U, 60L are formed.

[0018] 4B, a photomask film with black circles printed on it is attached to both sides of core substrate 20, exposed to light, and then developed to form openings that will become via holes in resin insulating layers 60U and 60L. Furthermore, after core substrate 20 is exposed to light, a heat treatment is performed to form openings 60a for via holes that correspond to the photomask film.

[0019] After the surfaces of the resin insulating layers (60U, 60L) are roughened by a predetermined process, a predetermined catalyst is applied to the core substrate 20. Catalyst nuclei are applied to the resin insulating layers (60U, 60L) and the via-hole openings (60a). As shown in FIG. 4C, a liquid resist is applied to both sides of the core substrate 20 to form a resist layer 62.

[0020] A photomask film on which a pattern corresponding to the conductor circuit is formed is placed, and after ultraviolet irradiation and exposure, the photomask film is removed. The resist layer 62 is dissolved and developed, and a plating resist with the conductor circuit pattern portion missing is formed on the core substrate 20. As shown in Fig. 5A, exposure and heat treatment are performed, and solder resist layers 62U, 62L are formed on the resin insulating layers 60U, 60L. The solder resist layers 62U, 62L have openings 62a.

[0021] 5B, after the core substrate 20 is subjected to a plating pretreatment, electroless copper plating 64 is deposited on the resist-free portions by electroless plating. Conductive layers 70U, 70L and via conductors 72U, 72L are formed, and a conductive layer is formed by an additive method.

[0022] As shown in FIG. 5C, openings 150 are formed in the solder resist layer 62U and the resin insulating layer 60U by a laser.

[0023] As shown in Fig. 6, a pin 300 having solder 250 at an upper end 300U and a lower end 300L is placed on an electrode 200 of a chip capacitor C. The solder 250 at the lower end 300L is melted by a reflow process, and the pin 300 is fixed to the electrode 200. An IC chip 100 is mounted on the upper end 300U, and the solder 250 at the upper end 300U is melted by a reflow process. A semiconductor device 1 of an embodiment in which the IC chip 100 is mounted on the pin 300 of the printed wiring board 10 is obtained (see Fig. 1). [Explanation of symbols]

[0024] 1: Semiconductor device 10: Printed wiring board 20: Core board 20a: Copper-clad laminate 22: Copper foil 24:Through hole 26:Through hole 28L: Conductive layer 28U: Conductor layer 30: Solder 60L: Resin insulation layer 60U: Resin insulation layer 60a: Via hole opening 62: Resist layer 62L: Solder resist layer 62U: Solder resist layer 62a:Aperture 64: Electrolytic copper plating 70L: Conductive layer 70U: Conductive layer 72L: Via conductor 72U: Via conductor 76: Solder bump 80A: Build-up layer 80B: Build-up layer 100: IC chip 150:Aperture 200: Electrode 250: Solder 300: Pin 300L: Bottom end 300U: Upper end C: Chip capacitor F: 1st page S: 2nd side

Claims

1. An inner conductor layer; an uppermost resin insulating layer having a first surface and a second surface opposite to the first surface, the uppermost resin insulating layer being formed on the conductor layer of the inner layer such that the second surface faces the conductor layer of the inner layer; an uppermost conductor layer formed on the first surface of the uppermost resin insulating layer; a solder resist layer formed on the first surface of the uppermost resin insulating layer and on the uppermost conductor layer; an electronic component embedded in the uppermost resin insulating layer and having an electrode facing the first surface; a printed wiring board having a pin for mounting an IC chip, the pin being disposed in an opening that penetrates the solder resist layer and the uppermost resin insulating layer and reaches the electrode, and connected to the electrode.

2. 2. The printed wiring board according to claim 1, wherein the pin has an upper end and a lower end opposite the upper end, and the lower end and the electrode are joined via solder.

3. 2. The printed wiring board according to claim 1, wherein the electronic component is a chip capacitor.

4. 2. A semiconductor device comprising the printed wiring board of claim 1 and the IC chip mounted on the printed wiring board by the pins.

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