Method for manufacturing semiconductor packaging circuit and method for manufacturing semiconductor element unit

Abstract

To realize excellent electrical connection between a semiconductor and a circuit while realizing a small-sized configuration.SOLUTION: A semiconductor element unit 1 is annealed with a first electrode 3 and a semiconductor element 2 placed one on top of a formation sacrificial layer 42, thereby eutectic bonding the semiconductor element 2 and the first electrode 3 and maintaining the first electrode mounting surface 3B in an extremely flat state. As a result, when the semiconductor element unit 1 is mounted on a circuit board 51 having an extremely flat board surface 51A, the first electrode mounting surface 3B can be transferred so as to abut against a first pad surface 61A, allowing an intermolecular force to act and physically and electrically connect therebetween, and thereby eliminating need for annealing after mounting.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor mounted circuit and a method for manufacturing a semiconductor element unit, and is suitable for use in, for example, a semiconductor device in which a semiconductor element is mounted on a circuit board. [Background technology]

[0002] In recent years, so-called vertical structure semiconductor devices have been proposed as semiconductor devices incorporating semiconductor elements, in which the underside of the semiconductor element is electrically connected (i.e., conductive) to a circuit board in order to reduce the size and increase the integration density of the semiconductor element.

[0003] For example, a semiconductor device has been proposed in which the cathode surface of a semiconductor element is exposed and faces downward (toward the circuit board), and the cathode surface is attached to a terminal portion provided on a drive circuit board (see, for example, Patent Document 1). In this semiconductor device, for example, the anode surface is exposed upward, and wiring is provided between this anode surface and the drive circuit to electrically connect the two. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-219374 A (Fig. 3, etc.) Summary of the Invention [Problem to be solved by the invention]

[0005] In the above-mentioned semiconductor element, an electrode is provided on the cathode surface and the electrode is brought into contact with the terminal portion of the drive circuit board, thereby making the electrical connection between the semiconductor element and the drive circuit board reliable and easy. In this case, it is also possible to make the contact surface of the electrode and the contact surface of the terminal portion extremely smooth, thereby making the electrical connection (so-called conduction) between them good.

[0006] However, in a semiconductor element, it is difficult to achieve good electrical continuity because ohmic contact is not formed between the material constituting the semiconductor element and the material constituting the electrode, etc., simply by bringing the material constituting the semiconductor element and the material constituting the electrode, etc. into contact with each other. Therefore, in a semiconductor device, for example, when attaching an electrode to a semiconductor element, it is possible to perform a so-called annealing process in which the two are placed in a high temperature (for example, about 600°C) environment while in contact with each other. If this annealing process is performed appropriately, the semiconductor element forms a eutectic bond with the electrode, and is in a so-called ohmic contact state, which improves contactability and allows good electrical continuity with the electrode.

[0007] However, if an annealing treatment is performed with an electrode in contact with a semiconductor element and the contact surface of the electrode exposed, the smoothness of the contact surface will be significantly reduced due to the influence of heat, which may deteriorate the contact with the terminal portion of the drive circuit board and make it impossible to ensure good conduction. Also, if an annealing treatment is performed on the semiconductor element, the electrode, and the drive circuit board in a state in which a semiconductor element and an electrode are in contact with each other and the electrode is in contact with the terminal portion of the drive circuit board, the smoothness of the contact surface can be maintained, but the drive circuit board may be damaged by high temperature.

[0008] That is, there is a problem in that it is not easy for the semiconductor element to be in ohmic contact with the electrode and for the abutment surface of the electrode to be flat.

[0009] The present invention has been made in consideration of the above points, and aims to propose a manufacturing method for a semiconductor mounted circuit and a manufacturing method for a semiconductor element unit that can achieve good electrical connection between the semiconductor and the circuit while being compact. [Means for solving the problem]

[0010] In order to solve such problems, in the method for manufacturing a semiconductor mounted circuit of the present invention, a semiconductor element unit includes a first electrode that forms a eutectic bond with the semiconductor element, a second electrode provided at a position that does not abut the semiconductor element and the first electrode, a wiring section that electrically connects the semiconductor element and the second electrode, and an insulating section that covers the semiconductor element, the wiring section, and the second electrode, and the first electrode mounting surface, which is a surface different from the surface that forms a eutectic bond with the semiconductor element of the first electrode, and the second electrode mounting surface of the second electrode are formed on the same plane, and the semiconductor element unit arranged on a first substrate via a sacrificial layer is separated from the first substrate by removing the sacrificial layer, and the semiconductor element unit separated from the first substrate is joined to a second substrate different from the first substrate.

[0011] In addition, in the manufacturing method for a semiconductor element unit of the present invention, a semiconductor element is bonded onto an electrode of a first substrate having a sacrificial layer and an electrode formed on the sacrificial layer, and after bonding the semiconductor element onto the electrode, the semiconductor element and the electrode are eutectic-bonded by an annealing treatment to form a semiconductor element unit, and after the semiconductor element and the electrode are eutectic-bonded, the sacrificial layer is removed and the semiconductor element unit is separated from the first substrate.

[0012] Furthermore, in the manufacturing method of a semiconductor mounted circuit of the present invention, in the manufacturing method of a semiconductor mounted circuit using the above-mentioned semiconductor element unit, an electrode mounting surface formed on an electrode of the semiconductor element unit separated from the first substrate is joined to a second substrate different from the first substrate.

[0013] In the present invention, since a eutectic bond is formed between the semiconductor element and the first electrode in the semiconductor element unit, there is no need to perform an annealing process again after mounting the semiconductor element unit on the second substrate, and the driving circuit on the circuit substrate is not damaged. Furthermore, since the present invention has a flat first electrode mounting surface and a flat second electrode mounting surface, if the portions of the second substrate to be bonded to the first electrode and the second electrode are flat, the semiconductor element unit can be bonded to the second substrate by intermolecular forces and electrically connected by simply transferring the semiconductor element unit to the second substrate. Effect of the Invention

[0014] According to the present invention, it is possible to realize a method for manufacturing a semiconductor mounted circuit and a method for manufacturing a semiconductor element unit that can realize good electrical connection between a semiconductor and a circuit while being configured compactly. [Brief description of the drawings]

[0015] [Figure 1] 1 is a schematic diagram showing a configuration of a semiconductor element unit according to a first embodiment. [Diagram 2] 1 is a schematic cross-sectional view showing the manufacturing process (1) of a semiconductor element unit according to a first embodiment. [Diagram 3] 5 is a schematic cross-sectional view showing the manufacturing process (2) of a semiconductor element unit according to the first embodiment. [Figure 4] 4 is a schematic diagram illustrating a configuration of a supply substrate. FIG. [Diagram 5] 1 is a schematic cross-sectional view showing a configuration of a semiconductor package circuit according to a first embodiment. [Figure 6] 5A to 5C are schematic cross-sectional views illustrating the manufacture of a semiconductor package circuit. [Figure 7] FIG. 1 is a schematic perspective view showing a configuration of an LED display device. [Figure 8] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to a second embodiment. FIG. [Figure 9] 1 is a schematic cross-sectional view showing the manufacturing process (1) of a semiconductor element unit according to a second embodiment. [Figure 10] 10 is a schematic cross-sectional view showing the manufacturing process (2) of a semiconductor element unit according to the second embodiment. [Figure 11] 10 is a schematic cross-sectional view showing the manufacture (3) of a semiconductor element unit according to the second embodiment. [Figure 12] FIG. 11 is a schematic cross-sectional view showing a configuration of a semiconductor package circuit according to a second embodiment. [Figure 13] 1 is a flowchart showing a manufacturing process procedure. [Figure 14] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 15]13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 16] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 17] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 18] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 19] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. [Figure 20] 13 is a schematic diagram showing a configuration of a semiconductor element unit according to another embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, modes for carrying out the invention (hereinafter referred to as embodiments) will be described with reference to the drawings.

[0017] 1. First embodiment [1-1. Configuration of semiconductor element unit] As shown in a schematic external view in Fig. 1(A) and a schematic cross-sectional view in Fig. 1(B), a semiconductor element unit 1 according to the first embodiment is composed of a semiconductor element 2 configured in a rectangular parallelepiped shape and a first electrode 3 configured in a thin plate shape. In the following, the direction from left to right in Fig. 1(A) is defined as the X direction, the direction from top to bottom is defined as the Y direction, and the direction from the back to the front of the paper is defined as the Z direction. Incidentally, Fig. 1(B) is a cross-sectional view taken along the line A1-A2 in Fig. 1(A).

[0018] The semiconductor element 2 is a light-emitting element having, for example, a p-type or n-type cladding layer and an active layer. For example, the surface on the Z direction side (i.e., the upper surface) of this semiconductor element 2 serves as an anode, and the surface on the -Z direction side (i.e., the lower surface) serves as a cathode. For example, the shorter of the length along the X direction and the length along the Y direction of the semiconductor element 2 is 200 [μm] or less, and the length (thickness) along the Z direction is 20 [μm] or less.

[0019] The first electrode 3 is made of a conductive metal material such as Ti, Pt, Au, or an alloy thereof. The first electrode 3 has a first electrode mounting surface 3B, which is the surface on the -Z direction side, formed extremely flat, with a surface roughness of 10 nm or less. The first electrode 3 is also configured in a flat rectangular parallelepiped shape, and is longer in both the X direction and the Y direction and shorter in the Z direction than the semiconductor element 2.

[0020] In this semiconductor element unit 1, the -Z direction surface of the semiconductor element 2 and the Z direction surface of the first electrode 3 are joined, and a eutectic bond is formed at the joint between the two. That is, in the semiconductor element unit 1, an ohmic connection is realized between the semiconductor element 2 and the first electrode 3 by eutectic bonding, and the resistivity between the two is, for example, 1.0×10 -2 [Ω cm 2 Hereinafter, the surface on the -Z direction side of the semiconductor element unit 1, that is, the first electrode mounting surface 3B of the first electrode 3, will also be referred to as a unit mounting surface 1B.

[0021] [1-2. Manufacturing of semiconductor element units] Next, a method for manufacturing the semiconductor element unit 1 will be described with reference to Figs. 2(A)-(D) and 3(A)-(C). Incidentally, Figs. 2 and 3 are schematic cross-sectional views showing a state in which the Z direction faces upward. For convenience of explanation, the Z direction will also be called the upward direction, and the -Z direction will also be called the downward direction.

[0022] The semiconductor element unit 1 is manufactured in stages by a specified manufacturing apparatus 100 sequentially carrying out a first process group for forming the semiconductor element 2 and a second process group for combining the semiconductor element 2 and the first electrode 3.

[0023] First, in the first process group, the manufacturing apparatus 100 forms the semiconductor element 2 according to various manufacturing processes similar to those used in manufacturing a general semiconductor. Specifically, as shown in FIG. 2A, the manufacturing apparatus 100 forms a growth sacrificial layer 32 on the upper side of a predetermined growth substrate 31, i.e., on the Z direction side, and further forms a semiconductor functional layer 33 on the upper side thereof.

[0024] Of these, the growth substrate 31, which is the bottom layer, is, for example, a silicon wafer. The surface of the upper side (Z direction side) of this growth substrate 31 is formed extremely flat, with a surface roughness of 10 nm or less. The growth sacrificial layer 32 is, for example, a relatively thin layer made of Si (silicon). A material that can be removed by wet etching performed in a later process is selected for this growth sacrificial layer 32. The semiconductor functional layer 33 is made of the same material as the semiconductor element 2.

[0025] Next, in the manufacturing apparatus 100, as shown in Fig. 2(B), a process is performed in which unnecessary portions of the semiconductor functional layer 33 are removed to form a semiconductor element 2 on the growth sacrificial layer 32. Next, in the manufacturing apparatus 100, as shown in Fig. 2(C), a process is performed in which a stamp 101 is attached to the Z direction side (upper side) of the semiconductor element 2. This stamp 101 is formed into a predetermined shape from a material such as dimethylpolysiloxane (Polydimethylsiloxane: PDMS).

[0026] 2(D), the manufacturing apparatus 100 performs a process of removing the growth sacrificial layer 32 by etching using a solution such as phosphoric acid. As a result, in the manufacturing apparatus 100, the semiconductor element 2 is attached to the underside of the stamp 101 and is separated from the growth substrate 31. Incidentally, the manufacturing apparatus 100 moves the stamp 101 to a predetermined storage location, and stores the stamp 101 and the semiconductor element 2 in the storage location.

[0027] Next, in the subsequent process group, the manufacturing apparatus 100 performs various manufacturing processes similar to those used in the manufacture of general semiconductors to combine the semiconductor element 2 and the first electrode 3. Specifically, the manufacturing apparatus 100 first performs a process of forming a formation sacrificial layer 42 on the upper side, i.e., the Z direction side, of a predetermined formation substrate 41, as shown in FIG.

[0028] Of these, the lower formation substrate 41 is, for example, a silicon wafer, similar to the growth substrate 31 (FIG. 2). The surface of the formation substrate 41 in the Z direction (upper side) is also formed extremely flat, similar to the growth substrate 31, with a surface roughness of 10 nm or less. Incidentally, the manufacturing apparatus 100 may reuse the previously used growth substrate 31 as the formation substrate 41, or may separately prepare a formation substrate 41 different from the growth substrate 31.

[0029] The formation sacrificial layer 42 is a relatively thin layer made of, for example, Al2O3 (alumina). As with the growth sacrificial layer 32, a material that can be removed by wet etching in a later process is selected for this formation sacrificial layer 42. As with the formation substrate 41, the surface of the formation sacrificial layer 42 on the Z direction side (upper side) is formed extremely flat, with a surface roughness of 10 nm or less.

[0030] Next, as shown in FIG. 3B, the manufacturing apparatus 100 performs a process of forming a thin-film first electrode 3 on the Z-direction side (upper side) of the formation sacrificial layer 42. The first electrode 3 is made of a metal material such as Al or Ti. The first electrode 3 is longer in both the X-direction and Y-direction and shorter in the Z-direction than the semiconductor element 2 manufactured by the previous process group. Furthermore, the first electrode mounting surface 3B, which is the surface on the -Z-direction side (lower side) of the first electrode 3, is formed extremely flat due to the influence of the surfaces on the Z-direction side (upper side) of the formation substrate 41 and the formation sacrificial layer 42, and has a surface roughness of 10 nm or less.

[0031] 3(C), the manufacturing apparatus 100 performs a process of transferring the semiconductor element 2 manufactured in the previous process group to the Z direction side (upper side) of the first electrode 3. Specifically, the manufacturing apparatus 100 moves, for example, the stamp 101 to which the semiconductor element 2 is attached from a predetermined storage location to the Z direction side (upper side) of the first electrode 3, and then moves the stamp 101 to the -Z direction side (lower side) to transfer the semiconductor element 2 onto the surface of the Z direction side (upper side) of the first electrode 3. Thereafter, the manufacturing apparatus 100 moves only the stamp 101 to the Z direction side (upper side) to separate it from the semiconductor element 2, and then returns it to the storage location.

[0032] Next, as shown in Figure 3 (C), the manufacturing equipment 100 abuts the semiconductor element 2 against the Z-direction side (upper side) of the first electrode 3 and also abuts the first electrode mounting surface 3B against the upper surface of the formation sacrificial layer 42, and places them in an environment of, for example, approximately 600°C, thereby performing an annealing process.

[0033] As a result, the semiconductor element 2 and the first electrode 3 form a eutectic bond at the joint, thereby completing the semiconductor element unit 1. At this time, the first electrode mounting surface 3B is in contact with the upper surface of the formation sacrificial layer 42, and therefore remains extremely flat without becoming rough even after the annealing process.

[0034] For convenience of explanation, hereinafter, the state in which the completed semiconductor element unit 1 is placed on the formation substrate 41 and the formation sacrificial layer 42, i.e., the state in which the first electrode mounting surface 3B is abutted against the upper surface of the formation sacrificial layer 42, will be referred to as a supply substrate 40 or a semiconductor element unit supply substrate. Further, hereinafter, the formation substrate 41 and the formation sacrificial layer 42 will also be simply referred to as a substrate, and the surface of the substrate, i.e., the surface of the formation sacrificial layer 42 on the Z direction side, will also be referred to as a substrate surface.

[0035] This supply board 40 is configured to enable stable transport of the semiconductor element unit 1 in cases where, for example, the manufacturer of the semiconductor element unit 1 and the mounter who mounts the semiconductor element unit 1 on a specified circuit board are different and the semiconductor element unit 1 needs to be supplied from the manufacturer to the mounter.

[0036] 2 and 3, for convenience of explanation, the manufacturing apparatus 100 is shown manufacturing one semiconductor element unit 1, i.e., one semiconductor element unit 1 is included in a supply substrate 40. However, the actual manufacturing apparatus 100 can collectively manufacture a plurality of semiconductor element units 1 arranged in a grid pattern on a formation substrate 41 and a formation sacrificial layer 42, i.e., a plurality of semiconductor element units 1 is included in a single supply substrate 40, as in a general semiconductor manufacturing process, as shown in schematic diagrams in, for example, FIGS.

[0037] When manufacturing a semiconductor mounted circuit, which will be described later, the supply board 40 manufactured in this manner has each semiconductor element unit 1 moved in sequence from above the formation board 41 and the formation sacrificial layer 42. Specifically, as shown in Fig. 3(D), first, a process is performed in which the stamp 101 is moved by the manufacturing apparatus 100 and the Z-direction side (upper side) surface of the semiconductor element 2 in the semiconductor element unit 1 is attached to the lower surface side of the stamp 101.

[0038] 3(E), the manufacturing apparatus 100 performs a process of removing the formation sacrificial layer 42 by etching using a solution such as phosphoric acid. As a result, in the manufacturing apparatus 100, the semiconductor element unit 1 is attached to the underside of the stamp 101 and separated from the formation substrate 41. In this state, the manufacturing apparatus 100 can move the stamp 101 to move, i.e., supply, the semiconductor element unit 1 to a desired position.

[0039] [1-3. Configuration and manufacturing of semiconductor mounted circuits] Next, a description will be given of a semiconductor mounted circuit 50 shown in Fig. 5. The semiconductor mounted circuit 50 has a configuration in which a semiconductor element unit 1 is mounted on a circuit board 51, and a first insulating section 55 and a wiring section 56 are further provided.

[0040] The circuit board 51 has a base portion 60, first circuit connection pads 61 and second circuit connection pads 62, as well as predetermined internal wiring materials and a drive circuit (not shown), etc. The base portion 60 is made of, for example, so-called glass epoxy resin, that is, glass fiber impregnated with epoxy resin and thermally cured, and has sufficient strength, insulation properties, etc.

[0041] The first circuit connection pad 61 is made of a conductive material, and has, for example, Al exposed on its surface on the Z direction side (hereinafter referred to as the first pad surface 61A). The first circuit connection pad 61 has the first pad surface 61A exposed on the surface on the Z direction side of the circuit board 51 (hereinafter referred to as the board surface 51A), and is electrically connected to a predetermined wiring material (not shown) inside the circuit board 51. The lengths of the first circuit connection pad 61 in the X direction and the Y direction are longer than the lengths of the first electrode 3 of the semiconductor element unit 1 (FIG. 1), respectively, in the X direction and the Y direction.

[0042] The second circuit connection pad 62 is configured similarly to the first circuit connection pad 61, and its surface on the Z direction side (hereinafter referred to as the second pad surface 62A) is exposed to the substrate surface 51A.

[0043] Furthermore, in the circuit board 51, the board surface 51A is formed in an extremely flat plane shape. That is, in the circuit board 51, the surface of the base portion 60, the first pad surface 61A, and the second pad surface 62A are all extremely flat and are parallel to each other, and further, the distance between them in the Z direction (i.e., the step) is also extremely small.

[0044] Specifically, in the circuit board 51, the surface roughness of the board surface 51A, i.e., the surface roughness (roughness) of the base part 60, the first pad surface 61A, and the second pad surface 62A, is all 10 nm or less. Also, in the circuit board 51, the distance in the Z direction (i.e., the height of the step) between the surface of the base part 60 and the first pad surface 61A, and between the surface of the base part 60 and the second pad surface 62A is 1 / 1000 or less of the shorter of the length of the side along the X direction and the length of the side along the Y direction in the semiconductor element unit 1 (FIG. 1(A)).

[0045] A semiconductor element unit 1 is placed on the Z-direction side of the first pad surface 61A on the board surface 51A of the circuit board 51. This semiconductor element unit 1 is disposed so as to be contained within the range of the first circuit connection pads 61 when viewed from the Z direction, and the first electrode mounting surface 3B is in contact with and faces the first pad surface 61A.

[0046] The first insulating portion 55 is made of an organic material such as polyimide or an inorganic material such as silicon nitride, and is an insulating thin film. The first insulating portion 55 is provided so as to cover the range from the vicinity of the end of the semiconductor element 2 on the -Y direction side of the surface (i.e., the upper surface) on the Z direction side to the vicinity of the end of the second pad surface 62A on the Y direction side.

[0047] The wiring portion 56 is made of a conductive material such as metals such as Au, Al, Cu, Ti, and Pt, or compounds such as ITO (indium tin oxide). This wiring material is provided so as to overlap the Z direction side (i.e., the upper side) of the first insulating portion 55, and is in contact with the Z direction side surface (i.e., the upper surface) of the semiconductor element 2 and the second pad surface 62A, respectively, to electrically connect the two.

[0048] That is, the semiconductor mounting circuit 50 electrically connects the cathode on the -Z direction side (i.e., the lower side) of the semiconductor element 2 of the semiconductor element unit 1 to the first circuit connection pad 61, and electrically connects the anode on the Z direction side (i.e., the upper side) to the second circuit connection pad 62.

[0049] Therefore, the semiconductor mounting circuit 50 can cause the semiconductor element 2, which is a light-emitting element, to emit light by applying a predetermined voltage and supplying a predetermined current between the first circuit connection pad 61 and the second circuit connection pad 62 from a drive circuit not shown.

[0050] Next, a method for manufacturing the semiconductor mounted circuit 50 will be described with reference to Figures 6(A)-(D). Incidentally, Figures 6(A)-(D) are schematic side views or cross-sectional views showing a state in which the Z direction faces upward, similar to Figures 2 and 3. For convenience of explanation, the Z direction is also called the upward direction, and the -Z direction is also called the downward direction.

[0051] The semiconductor mounted circuit 50 is manufactured step by step in accordance with various manufacturing processes similar to those used in manufacturing general semiconductors by the manufacturing apparatus 100. Incidentally, the manufacturing apparatus 100 that manufactures the semiconductor mounted circuit 50 may be the same as the manufacturing apparatus 100 that manufactured the semiconductor element unit 1, or may be a different one.

[0052] 6(A), the manufacturing apparatus 100 manufactures the circuit board 51, exposing the first pad surface 61A and the second pad surface 62A on the surface of the base part 60. The manufacturing apparatus 100 can manufacture the circuit board 51 having an extremely flat board surface 51A, that is, the base part 60, the first pad surface 61A, and the second pad surface 62A are all extremely flat, and the respective steps are kept extremely small, by performing a process such as chemical mechanical polishing.

[0053] Next, as shown in Fig. 6(B), the manufacturing apparatus 100 performs a step of transferring the semiconductor element unit 1 onto the first circuit connection pad 61 of the circuit board 51. Specifically, the manufacturing apparatus 100 moves the stamp 101 (Fig. 3(E)) to which the semiconductor element unit 1 is attached, toward the Z direction side (i.e., upward) of the first circuit connection pad 61 on the circuit board 51, and then moves it in the -Z direction (downward). As a result, the semiconductor element unit 1 is in a state in which the first electrode mounting surface 3B faces and is in contact with the first pad surface 61A.

[0054] Next, the manufacturing apparatus 100 performs a process of forming a first insulating portion 55 on the circuit board 51 in an area extending from a portion of the surface on the Z-direction side (upper side) of the semiconductor element 2 to a portion of the second pad surface 62A, as shown in FIG. 6(C).

[0055] 6(D), the manufacturing apparatus 100 performs a process of forming a wiring portion 56 on the circuit board 51 so as to overlap the Z direction side (upper side) of the first insulating portion 55. As a result, the wiring portion 56 electrically connects the semiconductor element 2 and the second circuit connection pad 62. In this way, the manufacturing apparatus 100 can manufacture the semiconductor mounted circuit 50 (FIG. 5).

[0056] [1-4. LED display device configuration] Incidentally, the above-mentioned semiconductor element unit 1 is also called an LED (Light Emitting Diode) element, and by incorporating multiple units into an LED display device 70 shown in FIG. 7, for example, multiple semiconductor mounting circuits 50 are formed.

[0057] The LED display device 70 includes an LED display unit 71, a frame 72, a heat dissipation member 73, a connection cable 74, a connection terminal unit 75, and a display driver 76. Incidentally, the LED display device 70 is also called a micro LED display, and is a display device in which a set of red, green, and blue LED elements corresponds to one pixel.

[0058] The LED display unit 71 is configured such that a plurality of semiconductor element units 1 (FIG. 1) are mounted in a lattice pattern within a display area set on the surface of a flat display circuit board 71D in the Z direction. This display circuit board 71D is, for example, a so-called glass epoxy board similar to the circuit board 51, and is configured such that a plurality of circuit boards 51 are aligned in a lattice pattern. The frame 72 is formed into a rectangular frame shape from, for example, a predetermined steel material, and is attached to the Z direction side of the LED display unit 71 so as to surround the outside of the display area.

[0059] The heat dissipation member 73 is made of a metal material having a relatively high thermal conductivity, such as aluminum, and is configured to have a flat rectangular parallelepiped shape as a whole. The heat dissipation member 73 is installed so as to abut against the LED display unit 71 on the -Z direction side of the LED display unit 71, i.e., on the opposite side to the surface that displays images, etc. The connection cable 74 is electrically connected to a predetermined control device (not shown) via a connection terminal portion 75, and transmits an image signal supplied from the control device to the display driver 76.

[0060] A display driver 76 as a drive circuit is electrically connected to the connection cable 74 and the LED display unit 71. The display driver 76 generates drive signals for red, green, and blue colors based on an image signal supplied via the connection cable 74, for example, and supplies a drive current based on these drive signals to the LED display unit 71. As a result, the LED display device 70 can display an image based on an image signal supplied from a control device (not shown) or the like in the display area of ​​the LED display unit 71.

[0061] [1-5. Effects, etc.] In the above configuration, the semiconductor element unit 1 according to the first embodiment eutectic bonds the -Z direction surface of the semiconductor element 2 and the Z direction surface of the first electrode 3, and maintains the first electrode mounting surface 3B, which is the -Z direction surface of the first electrode 3, in an extremely flat state (Figure 1).

[0062] Specifically, the manufacturing apparatus 100 for manufacturing the semiconductor element unit 1 forms a thin-film first electrode 3 on the Z direction side (upper side) of the formation substrate 41 with the formation sacrificial layer 42 formed on the formation substrate 41 (FIG. 3(B)), transfers the separately manufactured semiconductor element 2 (FIG. 2) onto the formation substrate 41 (FIG. 3(C)), and performs an annealing process in this state. At this time, the manufacturing apparatus 100 performs the annealing process while keeping the first electrode mounting surface 3B in contact with the formation sacrificial layer 42, so that the first electrode 3 and the semiconductor element 2 can be eutectic bonded while keeping the first electrode mounting surface 3B in an extremely flat state without roughening it.

[0063] In the first embodiment, the board surface 51A of the circuit board 51 is formed extremely flat, and the step between the first pad surface 61A and the second pad surface 62A is also kept extremely small (FIG. 5).

[0064] Therefore, when manufacturing a semiconductor mounted circuit 50 by mounting the semiconductor element unit 1 on the circuit board 51, the manufacturing apparatus 100 can apply an intermolecular force between the first electrode mounting surface 3B and the first pad surface 61A simply by transferring the first electrode mounting surface 3B so as to abut against the first pad surface 61A. This allows the semiconductor mounted circuit 50 to physically and electrically connect the first electrode 3 of the semiconductor element unit 1 to the first circuit connection pad 61 of the circuit board 51.

[0065] In other words, the semiconductor element unit 1 can achieve good electrical connection between the driving circuit (not shown) of the circuit board 51 and the semiconductor element 2 simply by abutting the first electrode mounting surface 3B with the first pad surface 61A of the circuit board 51.

[0066] In other words, the semiconductor element unit 1 can achieve good electrical connection between the semiconductor element 2 and the drive circuit without the need for an annealing process after being mounted on the circuit board 51, and therefore it is possible, in principle, to avoid the heat from the annealing process being applied to the drive circuit and damaging it.

[0067] According to the above configuration, the semiconductor element unit 1 according to the first embodiment is annealed with the first electrode 3 and the semiconductor element 2 placed one on top of the formation sacrificial layer 42, thereby eutectic bonding the semiconductor element 2 and the first electrode 3 and maintaining the first electrode mounting surface 3B in an extremely flat state. As a result, when the semiconductor element unit 1 is mounted on the circuit board 51 having an extremely flat board surface 51A, the first electrode mounting surface 3B can be transferred to abut against the first pad surface 61A by simply transferring the first electrode mounting surface 3B to abut against the first pad surface 61A, allowing an intermolecular force to act between them and allowing them to be physically and electrically connected, eliminating the need for annealing after mounting.

[0068] 2. Second embodiment [2-1. Configuration of semiconductor element unit] 8(A) and (B) corresponding to Fig. 1(A) and (B), a semiconductor element unit 201 according to the second embodiment is composed of a semiconductor element 202, a first electrode 203, a second electrode 204, a first insulating portion 205, a wiring portion 206, and a second insulating portion 207. This semiconductor element unit 201 has a configuration similar to that of the portion of the semiconductor mounted circuit 50 (Fig. 5) according to the first embodiment that is provided on the circuit board 51.

[0069] The semiconductor element 202 is configured similarly to the semiconductor element 2 according to the first embodiment. That is, the semiconductor element 202 is rectangular parallelepiped-shaped and configured as, for example, a light-emitting element. The first electrode 203 is configured similarly to the first electrode 3 according to the first embodiment, is generally flat rectangular parallelepiped-shaped, and is made of a conductive metal material or an alloy thereof. Similarly to the first embodiment, the first electrode 203 is in contact with the -Z direction side of the semiconductor element 202, and a eutectic bond is formed at the joint between the two. Furthermore, the first electrode mounting surface 203B, which is the surface on the -Z direction side of the first electrode 203, is formed extremely flat, similar to the first electrode mounting surface 3B according to the first embodiment, and its surface roughness is 10 [nm] or less.

[0070] The second electrode 204, like the first electrode 203, is configured as a flat rectangular parallelepiped as a whole, and is made of a conductive metal material such as Au, Al, Cu, Ti, Pt, or an alloy thereof. Similarly to the first electrode 203, the second electrode 204 has a second electrode mounting surface 204B, which is the surface on the -Z direction side, formed extremely flat, with a surface roughness of 10 nm or less.

[0071] Like the first insulating section 55 (FIG. 5) in the first embodiment, the first insulating section 205 is made of an organic material such as polyimide or an inorganic material such as silicon nitride film, and is an insulating thin film. The first insulating section 205 is provided so as to cover the range in the Y direction from the vicinity of the end on the -Y direction side of the Z direction surface (i.e., the upper surface) of the semiconductor element 202 to the vicinity of the end on the Y direction side of the Z direction surface (i.e., the upper surface) of the second electrode 204.

[0072] The wiring section 206, like the wiring section 56 (FIG. 5) in the first embodiment, is made of a conductive material such as metals such as Au, Al, Cu, Ti, and Pt, or compounds such as ITO (indium tin oxide). This wiring material is provided so as to overlap the Z direction side (i.e., the upper side) of the first insulating section 205, and is in contact with the Z direction side surface (i.e., the upper surface) of the semiconductor element 202 and the Z direction side surface (i.e., the upper surface) of the second electrode 204, respectively, to electrically connect them to each other.

[0073] The second insulating section 207, like the first insulating section 205, is made of an organic material such as polyimide or an inorganic material such as silicon nitride film, and is an insulating thin film. The second insulating section 207 covers the semiconductor element 202, the first electrode 203, the second electrode 204, the first insulating section 205, and the wiring section 206 from the Z direction side, and is provided in a wide range surrounding the semiconductor element 202, the first electrode 203, the second electrode 204, the first insulating section 205, and the wiring section 206 in the X direction and the Y direction. In other words, the second insulating section 207 covers the semiconductor element 202, the first electrode 203, the second electrode 204, the first insulating section 205, and the wiring section 206 in each direction except for the -Z direction side (i.e., the lower side).

[0074] Hereinafter, the surface on the -Z direction side of the second electrode 204 is referred to as the second electrode mounting surface 204B, and the surface on the -Z direction side of the first insulating portion 205 is referred to as the first insulating portion mounting surface 205B. In addition, hereinafter, the surfaces on the -Z direction side of the semiconductor element unit 201, that is, the first electrode mounting surface 203B, the second electrode mounting surface 204B, the first insulating portion mounting surface 205B, and the -Z direction surfaces of the second insulating portion 207, are collectively referred to as the unit mounting surface 201B. This unit mounting surface 201B is formed extremely flat overall, with a surface roughness of 10 nm or less.

[0075] Furthermore, in the semiconductor element unit 201, the size of the step (i.e., the length along the Z direction) at a location on the unit mounting surface 201B where different materials are adjacent, for example, where the first electrode 203 and the first insulating portion 205 are adjacent, is sufficiently small compared with each side forming the outline of the unit mounting surface 201B. Specifically, in the semiconductor element unit 201, the size of the step is 1 / 1000 or less of the length LX, which is the shorter of the length LX of the side along the X direction and the length LY of the side along the Y direction.

[0076] [2-2. Manufacturing of semiconductor element units] Next, a method for manufacturing the semiconductor element unit 201 will be described with reference to Figures 2(A)-(D), 3(A)-(E), and 6(A)-(D), as well as Figures 9(A)-(D), 10(A)-(G), and 11(A)-(B). Incidentally, Figures 9, 10, and 11 are schematic side views or cross-sectional views showing a state in which the Z direction is oriented upward, as in the first embodiment. For convenience of description, the Z direction is also referred to as the upward direction, and the -Z direction is also referred to as the downward direction.

[0077] As in the first embodiment, the semiconductor element unit 201 is manufactured in stages by a specified manufacturing apparatus 100 sequentially carrying out a first process group for forming a semiconductor element 202 and a second process group for combining the semiconductor element 202 with a first electrode 203, etc.

[0078] First, in the first step group, the manufacturing apparatus 100 forms the semiconductor element 202 according to various manufacturing processes similar to those used in manufacturing a general semiconductor, as in the first embodiment. Specifically, as shown in Fig. 9(A) corresponding to Fig. 2(A), the manufacturing apparatus 100 performs the steps of forming a growth sacrificial layer 232 on the upper side of a predetermined growth substrate 231, i.e., on the Z direction side, and further forming a semiconductor functional layer 233 on the upper side thereof. The growth substrate 231, the growth sacrificial layer 232, and the semiconductor functional layer 233 are configured in the same manner as the growth substrate 31, the growth sacrificial layer 32, and the semiconductor functional layer 33 in the first embodiment, respectively.

[0079] Thereafter, in the manufacturing apparatus 100, as shown in Figures 9(B)-(D) which correspond to Figures 2(B)-(D) respectively, processes such as removal of unnecessary portions and etching are carried out in sequence, so that the semiconductor element 202 is attached to the underside of the stamp 101.

[0080] Next, in the subsequent process group, the manufacturing apparatus 100 combines the semiconductor element 202 and the first electrode 203, etc., according to various manufacturing processes similar to those used in the manufacture of general semiconductors. Specifically, the manufacturing apparatus 100 first performs a process of forming a formation sacrificial layer 242 on the upper side, i.e., the Z direction side, of a predetermined formation substrate 241, as shown in FIG. 10(A) corresponding to FIG. 3(A). The formation substrate 241 and the formation sacrificial layer 242 are configured in the same manner as the formation substrate 41 and the formation sacrificial layer 42 in the first embodiment. That is, the surface of the formation sacrificial layer 242 on the Z direction side (upper side) is formed extremely flat, with a surface roughness of 10 nm or less.

[0081] Next, as shown in Fig. 10(B) corresponding to Fig. 3(B), the manufacturing apparatus 100 performs a process of forming a thin-film first electrode 203 on the Z-direction side (upper side) of the formation sacrificial layer 42. The first electrode 203 is made of a metal material such as Ti or Pt. At this time, the first electrode mounting surface 203B is formed extremely flat due to the influence of the surface of the formation sacrificial layer 242 on the Z-direction side (upper side), and the surface roughness is 10 [nm] or less.

[0082] 10(C), the manufacturing apparatus 100 performs a process of forming a thin-film second electrode 204 on the Z-direction side (upper side) of the formation sacrificial layer 42. The second electrode 204 is made of an alloy material such as AuGeNi. At this time, the second electrode mounting surface 204B, like the first electrode mounting surface 203B, is formed extremely flat due to the influence of the surface of the formation sacrificial layer 242 on the Z-direction side (upper side), and has a surface roughness of 10 [nm] or less.

[0083] 3(C) and FIG. 10(D), the manufacturing apparatus 100 performs a process of transferring the semiconductor element 202 manufactured in the previous process group to the Z direction side (upper side) of the first electrode 203. Specifically, the manufacturing apparatus 100 moves, for example, the stamp 101 (FIG. 9(D)) to which the semiconductor element 202 is attached to the Z direction side (upper side) of the first electrode 203, and then moves the stamp 101 to the -Z direction side (lower side), thereby transferring the semiconductor element 202 to the Z direction side (upper side) of the first electrode 203.

[0084] Next, as shown in FIG. 10(D), the manufacturing apparatus 100 abuts the semiconductor element 202 against the Z-direction side (upper side) of the first electrode 203, and also abuts the first electrode mounting surface 203B and the second electrode mounting surface 204B against the upper surface of the formation sacrificial layer 242, and places them in an environment of, for example, about 600°C, thereby performing an annealing process.

[0085] As a result, the semiconductor element 202 and the first electrode 203 form a eutectic bond at the joint between them. At this time, the first electrode mounting surface 203B and the second electrode mounting surface 204B are both in contact with the upper surface of the formation sacrificial layer 242, so they do not become rough even after the annealing process is performed and remain extremely flat.

[0086] Next, the manufacturing apparatus 100 performs a process of forming a first insulating portion 205 on the formation sacrificial layer 242 in an area extending from a portion of the Z-direction side (upper side) surface of the semiconductor element 202 to a portion of the Z-direction side (upper side) surface of the second electrode 204, as shown in Figure 10(E) which corresponds to Figure 6(C).

[0087] 6(D) and 10(F), the manufacturing apparatus 100 performs a process of forming the wiring portion 206 on the formation sacrificial layer 242 so as to overlap the Z direction side (upper side) of the first insulating portion 205. As a result, the wiring portion 206 electrically connects the Z direction side (upper side) surface of the semiconductor element 202 and the Z direction side (upper side) surface of the second electrode 204.

[0088] 10(G), the manufacturing apparatus 100 performs a process of forming a second insulating section 207 on the formation sacrificial layer 242 so as to overlap the Z direction side (upper side) of the semiconductor element 202, the first insulating section 205, the wiring section 206, etc. As a result, the second insulating section 207 covers the Z direction side, the X direction side and the opposite side, and the Y direction side and the opposite side of the semiconductor element 202, the first electrode 203, the second electrode 204, the first insulating section 205, and the wiring section 206. As a result, the manufacturing apparatus 100 can complete the semiconductor element unit 201.

[0089] For convenience of explanation, in this embodiment, the formation substrate 241 and the formation sacrificial layer 242 on which the completed semiconductor element unit 201 is placed are referred to as a supply substrate 240 or a semiconductor element unit supply substrate. In this embodiment, the formation substrate 241 and the formation sacrificial layer 242 are also simply referred to as substrates, and the surface of the substrate, i.e., the surface of the formation sacrificial layer 242 on the Z direction side, is also referred to as a substrate surface.

[0090] Furthermore, similar to the first embodiment (FIG. 4), the manufacturing apparatus 100 can collectively manufacture a plurality of semiconductor element units 201 arranged on the formation substrate 241 and the formation sacrificial layer 242, i.e., a plurality of semiconductor element units 201 included in one supply substrate 240.

[0091] As in the first embodiment, when manufacturing a semiconductor mounted circuit described later, the supply board 240 manufactured in this manner has each semiconductor element unit 201 moved in sequence from above the formation board 241 and the formation sacrificial layer 242. Specifically, as shown in Fig. 11(A) corresponding to Fig. 3(D), a process is performed by the manufacturing apparatus 100 to attach the Z-direction side (upper side) surface of the second insulating portion 207 of the semiconductor element unit 201 to the lower surface of the stamp 101. Incidentally, the manufacturing apparatus 100 that performs this process may be the same as the manufacturing apparatus 100 that manufactured the semiconductor element unit 201, or may be a different one.

[0092] Next, as shown in Fig. 11(E) corresponding to Fig. 3(E), the manufacturing apparatus 100 performs a process of removing the formation sacrificial layer 242 by etching using a solution such as phosphoric acid. As a result, the manufacturing apparatus 100 attaches the semiconductor element unit 201 to the underside of the stamp 101 and separates it from the formation substrate 241. In this state, the manufacturing apparatus 100 moves the stamp 101, thereby moving, i.e., supplying, the semiconductor element unit 201 to a desired position.

[0093] [2-3. Configuration and manufacturing of semiconductor mounted circuits] Next, a description will be given of a semiconductor mounted circuit 250 shown in Fig. 12 which corresponds to Fig. 5. The semiconductor mounted circuit 250 has a configuration in which a semiconductor element unit 201 is mounted on a circuit board 251.

[0094] The circuit board 251 is configured similarly to the circuit board 51 (FIG. 5) according to the first embodiment, and has a substrate part 260, a first circuit connection pad 261, and a second circuit connection pad 262 corresponding respectively to the substrate part 60, the first circuit connection pad 61, and the second circuit connection pad 62. Hereinafter, the surfaces on the Z direction side of the first circuit connection pad 261 and the second circuit connection pad 262 will be referred to as a first pad surface 261A and a second pad surface 262A, respectively.

[0095] Similarly to the first embodiment, circuit board 251 has board surface 251A, which is the surface on the Z direction side, formed in an extremely flat plane shape. That is, in circuit board 251, the surface of base portion 260, first pad surface 261A, and second pad surface 262A are all extremely flat and parallel to each other, and the distance between them in the Z direction (i.e., the step) is also extremely small.

[0096] This semiconductor mounted circuit 250 is manufactured in accordance with various manufacturing processes similar to those used in manufacturing general semiconductors, for example, by the manufacturing apparatus 100. Incidentally, the manufacturing apparatus 100 that manufactures this semiconductor mounted circuit 250 may be the same as the manufacturing apparatus 100 that manufactured the semiconductor element unit 201, or may be a different one.

[0097] 6(A), the manufacturing apparatus 100 manufactures the circuit board 251, and exposes the first pad surface 261A and the second pad surface 262A on the surface of the base material 260. Incidentally, the manufacturing apparatus 100 performs a process such as chemical mechanical polishing to make the board surface 251A extremely flat, as in the first embodiment.

[0098] Specifically, in the circuit board 251, the surface roughness of the board surface 251A, i.e., the surface roughness (roughness) of the base material 260, the first pad surface 261A, and the second pad surface 262A, is 10 [nm] or less, as in the first embodiment. Also, in the circuit board 251, the distance in the Z direction (i.e., the height of the step) between the surface of the base material 260 and the first pad surface 261A, and between the surface of the base material 260 and the second pad surface 262A is extremely small, as in the first embodiment. Specifically, the height of the step is 1 / 1000 or less of the shorter of the length of the side along the X direction and the length of the side along the Y direction in the semiconductor element unit 201 (FIG. 8(A)).

[0099] Next, the manufacturing apparatus 100 performs the step of transferring the semiconductor element unit 201 attached to the stamp 101 onto the substrate surface 251A of the circuit substrate 251, in the same manner as in the case shown in FIG. 6(B).

[0100] Specifically, the manufacturing apparatus 100 first moves the stamp 101, to which one semiconductor element unit 201 has been attached, in the Z direction toward a location on the circuit board 251 to which no other semiconductor element unit 201 has been attached yet. At this time, the manufacturing apparatus 100 adjusts the position of the stamp 101 in the X and Y directions so that the entire area of ​​the first electrode 203 in the semiconductor element unit 201 faces the first pad surface 261A and the entire area of ​​the second electrode 204 faces the second pad surface 262A.

[0101] Next, the manufacturing apparatus 100 moves the stamp 101 in the -Z direction (downward) to bring the unit mounting surface 201B of the semiconductor element unit 201 into contact with the board surface 51A of the circuit board 51. Specifically, the semiconductor element unit 201 brings the first electrode mounting surface 203B into contact with the first pad surface 261A, the second electrode mounting surface 204B into contact with the second pad surface 262A, and the first insulating portion mounting surface 205B and the second insulating portion mounting surface 207B into contact with the surface of the base material portion 260.

[0102] Furthermore, the manufacturing apparatus 100 applies (pressures) a predetermined pressure in the -Z direction (i.e., downward) from the stamp 101 to the semiconductor element unit 201. As a result, an intermolecular force acts between the unit mounting surface 201B and the substrate surface 251A of the semiconductor element unit 201, and the semiconductor element unit 201 is attached to the circuit substrate 251 by the intermolecular force.

[0103] At this time, the first electrode mounting surface 203B is electrically connected to the first pad surface 261A by bonding with an intermolecular force. The second electrode mounting surface 204B is electrically connected to the second pad surface 262A by bonding with an intermolecular force. That is, the first electrode 203 and the second electrode 204 are electrically connected to the first circuit connection pad 261 and the second circuit connection pad 262, respectively. This allows the semiconductor mounting circuit 250 to supply a current from a drive circuit (not shown) of the circuit board 251 to the semiconductor element 202 of the semiconductor element unit 201, causing the semiconductor element 202 to emit light.

[0104] In addition, in the semiconductor mounted circuit 250, the semiconductor element unit 201 is bonded to the circuit board 251 by intermolecular forces. However, when a force stronger than the intermolecular forces is applied, this bond is broken and the semiconductor element unit 201 can be easily peeled off from the circuit board 251.

[0105] For example, the manufacturing apparatus 100 reduces the bonding force of the semiconductor element unit 201 by bringing a peeling head (not shown) close to the semiconductor mounted circuit 250 and discharging a predetermined solvent. Next, the manufacturing apparatus 100 moves the stamp 101 to adsorb the semiconductor element unit 201, and further moves the stamp 101 to peel and remove the semiconductor element unit 201 from the circuit board 251. At this time, the circuit board 251 is hardly damaged, and when another semiconductor element unit 201 is transferred later, it can be bonded to this semiconductor element unit 201 by intermolecular forces.

[0106] Meanwhile, the semiconductor mounted circuit 250 is manufactured as a part of, for example, an LED display device 70 (FIG. 7) in the same manner as in the first embodiment. In this case, for example, a display circuit board 71D which is a part of the LED display unit 71 is configured such that a plurality of circuit boards 251 are arranged in a lattice shape. The display circuit board 71D is provided with first circuit connection pads 261 and second circuit connection pads 262 for each portion corresponding to each circuit board 251, and mounting positions where each semiconductor element unit 201 should be mounted are set.

[0107] When manufacturing the LED display device 70, the manufacturing apparatus 100 sequentially mounts a plurality of semiconductor element units 201 on the above-mentioned display circuit board 71D. In this LED display device 70, one semiconductor element unit 201 corresponds to one pixel. Therefore, for example, several million semiconductor element units 201 are mounted on the display circuit board 71D depending on its resolution.

[0108] However, there is a possibility that the semiconductor element units 201 may be defective due to manufacturing problems, etc. In that case, for example, if some of the semiconductor element units 201 mounted on the LED display device 70 are defective, the LED display device 70 will have a defect such as some pixels not being able to be displayed normally, and may be determined to be defective in an inspection before shipping, and may be discarded without being shipped.

[0109] Therefore, the manufacturing apparatus 100 inspects whether the semiconductor element unit 201 mounted on the display circuit board 71D is operating normally, and if it is defective, replaces the semiconductor element unit 201 with a new semiconductor element unit 201.

[0110] Specifically, when mounting a plurality of semiconductor element units 201 on the display circuit board 71D, the manufacturing apparatus 100 performs a manufacturing procedure RT1 shown in Fig. 13. When the manufacturing apparatus 100 starts this manufacturing procedure RT1, it proceeds to the first step SP1, where it transfers each of the semiconductor element units 201 sequentially to each mounting location on the display circuit board 71D using the stamp 101 (Fig. 11), and then proceeds to the next step SP2. As a result, the semiconductor element units 201 are bonded to each mounting location on the display circuit board 71D by intermolecular forces, and are electrically connected to each of the semiconductor element units 201.

[0111] In step SP2, the manufacturing apparatus 100 supplies a predetermined signal to a drive circuit provided on the display circuit board 71D to cause each semiconductor element unit 201 at each mounting location to emit light, and then proceeds to the next step SP3.

[0112] In step SP3, the manufacturing apparatus 100 uses a predetermined imaging unit to capture an image of the light emission state of each semiconductor element unit 201 at each mounting location, generates an inspection image by performing predetermined image processing, and proceeds to the next step SP4. Incidentally, when the manufacturing apparatus 100 is unable to capture all mounting locations on the display circuit board 71D in one inspection image due to restrictions such as the resolution of the imaging unit, the manufacturing apparatus 100 divides the display circuit board 71D into multiple regions and generates an inspection image for each region.

[0113] In step SP4, the manufacturing apparatus 100 determines, based on the inspection image, whether each mounting location is a normal location where the mounted semiconductor element unit 201 normally emits light or an abnormal location where the mounted semiconductor element unit 201 does not normally emit light, and proceeds to the next step SP5. That is, the manufacturing apparatus 100 uses the inspection image to inspect the light emission state of each semiconductor element unit 201 mounted on the display circuit board 71D.

[0114] In step SP5, the manufacturing apparatus 100 judges whether or not there is one or more abnormal locations on the display circuit board 71D. If a positive result is obtained here, this indicates that one or more of the semiconductor element units 201 mounted on the display circuit board 71D are not emitting light normally, and therefore a normal LED display device 70 cannot be manufactured using the display circuit board 71D. This also indicates that if the semiconductor element unit 201 at the mounting location that was abnormal is replaced and the replaced semiconductor element unit 201 emits light normally, the mounting location can be changed to a normal location. Therefore, the manufacturing apparatus 100 proceeds to the next step SP6.

[0115] In step SP6, the manufacturing equipment 100 ejects a predetermined solvent from a peeling head (not shown) onto the abnormal location to reduce the bonding strength of the semiconductor element unit 201 at the abnormal location, and then removes the semiconductor element unit 201 from the abnormal location using the stamp 101, before proceeding to the next step SP7. Incidentally, if there are multiple abnormal locations, the manufacturing equipment 100 removes all of the semiconductor element units 201 from each abnormal location.

[0116] In step SP7, the manufacturing equipment 100 transfers a new semiconductor element unit 201 to the abnormal location using the stamp 101, thereby bonding it to the display circuit board 71D by intermolecular forces. Thereafter, the manufacturing equipment 100 returns to step SP2 again, and by repeating the series of processes, it is determined whether the mounting location that was abnormal has become normally operating.

[0117] On the other hand, if a negative result is obtained in step SP5, this indicates that the mounted semiconductor element units 201 are operating normally in all mounting locations on the display circuit board 71D, that is, the LED display unit 71 in which all pixels operate normally is completed. At this time, the manufacturing apparatus 100 proceeds to the next step SP8, and ends the manufacturing procedure RT1.

[0118] [2-4. Effects, etc.] In the above configuration, the semiconductor element unit 201 according to the second embodiment has a eutectic bond between the -Z direction surface of the semiconductor element 202 and the Z direction surface of the first electrode 203, connects the semiconductor element 202 and the second electrode 204 by a wiring portion 206, and configures the unit mounting surface 201B to be extremely flat (Figure 8).

[0119] Specifically, the manufacturing apparatus 100 for manufacturing the semiconductor element unit 201, in a state in which a formation sacrificial layer 242 is formed on a formation substrate 241, forms a thin-film first electrode 203 and a thin-film second electrode 204 on the Z direction side (upper side) of the formation substrate 241 in the same manner as in the first embodiment (FIGS. 10(B) and (C)). Next, the manufacturing apparatus 100 transfers a separately manufactured semiconductor element 202 (FIG. 9) to the Z direction side of the first electrode 203 (FIG. 10(D)), and performs an annealing process in this state.

[0120] At this time, the manufacturing apparatus 100 performs the annealing process while the first electrode mounting surface 203B and the second electrode mounting surface 204B are in contact with the formation sacrificial layer 242, so that the first electrode 203 and the semiconductor element 202 can be eutectic bonded while maintaining the first electrode mounting surface 203B and the second electrode mounting surface 204B in an extremely flat state without roughening them.

[0121] Furthermore, the manufacturing apparatus 100 forms the first insulating portion 205 and the second insulating portion 207 on the formation sacrificial layer 242 (FIGS. 10(E) and (G)). Therefore, the manufacturing apparatus 100 can form the first insulating portion mounting surface 205B and the second insulating portion mounting surface 207B extremely flat, and can also minimize the step between the first electrode mounting surface 203B and the second electrode mounting surface 204B, and can finish the unit mounting surface 201B of the semiconductor element unit 201 extremely flat overall.

[0122] When the semiconductor element unit 201 manufactured in this manner is transferred so that the unit mounting surface 201B is brought into contact with the substrate surface 251A of the circuit substrate 251 (FIG. 12), an intermolecular force acts between the two, and the two can be bonded with sufficient strength. At this time, the semiconductor element unit 201 can electrically connect the first electrode 203 and the second electrode 204 to the first circuit connection pad 261 and the second circuit connection pad 262, respectively.

[0123] Therefore, for example, when manufacturing an LED display unit 71 (Figure 7) using the manufacturing apparatus 100, it is possible to physically join and electrically connect, i.e., mount, each semiconductor element unit 201 by simply transferring it to multiple mounting locations provided on the display circuit board 71D.

[0124] This allows the manufacturing apparatus 100 to supply current to each of the mounted semiconductor element units 201 to check whether they emit light normally, and if there is an abnormal portion that does not emit light normally, the semiconductor element unit 201 can be easily removed and replaced with a new one with almost no damage to the display circuit board 71D. As a result, the manufacturing apparatus 100 can significantly increase the rate of non-defective products, or the so-called yield rate, in the LED display unit 71 and the LED display device 70.

[0125] According to the above configuration, in the manufacturing process of the semiconductor element unit 201 according to the second embodiment, the semiconductor element 202 and the first electrode 203 are eutectic-bonded, and the unit mounting surface 201B including the first electrode mounting surface 203B and the second electrode mounting surface 204B is formed in an extremely flat state. As a result, when the semiconductor element unit 201 is simply transferred to the circuit board 251 during the manufacturing process of the semiconductor mounted circuit 250, the unit mounting surface 201B and the board surface 251A can be bonded by intermolecular forces, and the light emission state can be inspected in this state, and replacement work for abnormal parts can be easily performed.

[0126] 3. Other embodiments In the above-mentioned first embodiment, the case where only the first electrode 3 is bonded to the semiconductor element 2 of the semiconductor element unit 1 (FIG. 1) has been described. However, the present invention is not limited to this. For example, as in the semiconductor element unit 301 shown in FIG. 14 corresponding to FIG. 1, the direct-upper electrode 311 may be provided on the surface of the semiconductor element 2 on the Z direction side, that is, on the upper surface that is different from the bonding surface with the first electrode 3. When manufacturing this semiconductor element unit 301, the manufacturing apparatus 100 transfers the semiconductor element 2 to the upper side of the first electrode 3 as shown in FIG. 3(C), and then forms the direct-upper electrode 311 on the Z direction side (i.e., the upper side) of the semiconductor element 2 by a method such as deposition, and then performs an annealing process. As a result, the semiconductor element unit 301 can form a eutectic bond not only between the semiconductor element 2 and the first electrode 3, but also between the semiconductor element 2 and the direct-upper electrode 311. In this case, for example, the direct-upper electrode 311 can be made of a material with high light transmittance, so-called a transparent electrode, so that the light emitted by the light emission of the semiconductor element 2 can be efficiently transmitted in the Z direction.

[0127] In the above-mentioned first embodiment, the first circuit connection pad 61 is configured to be larger (longer) than the first electrode 3 in the X direction and the Y direction in the semiconductor mounting circuit 50 (FIG. 5), and the first electrode mounting surface 3B is mounted at a position facing the first pad surface 61A within the range of the first pad surface 61A. However, the present invention is not limited to this, and for example, the first electrode 3 may be configured to be larger (longer) than the first circuit connection pad 61 in at least one of the X direction and the Y direction, and may be mounted at a position facing the first electrode mounting surface 3B so that a part of the first electrode mounting surface 3B protrudes from the range of the first pad surface 61A. In this case, it is desirable that the board surface 51A of the circuit board 51 is as flat as possible, and specifically, for example, it is desirable that the size of the step between the surface of the base material 60 on the Z direction side and the first pad surface 61A, that is, the distance in the Z direction, is 1 / 1000 or less of the length along the X direction and the Y direction of the semiconductor element unit 1. The same is true for the first electrode 203 and the second electrode 204 in the second embodiment.

[0128] Furthermore, in the above-mentioned embodiment, as shown in FIG. 3(C) and FIG. 4(A) and (B), the supply substrate 40 is described as a state in which the semiconductor element unit 1 is placed on the formation substrate 41 and the formation sacrificial layer 42. However, the present invention is not limited to this. For example, as shown in FIG. 3(E), the supply substrate may be a stamp 101 with the semiconductor element unit 1 attached to its lower surface, or a predetermined substrate from which the semiconductor element unit 1 is transferred from the stamp 101. Furthermore, in this case, for example, a plurality of formation substrates 41 and formation sacrificial layers 42 may be used to manufacture different types of semiconductor element units 1 using different types of semiconductor elements 2, and then the plurality of types of semiconductor element units 1 may be transferred to a single substrate so as to be mixed thereon, to serve as the supply substrate. The same applies to the second embodiment.

[0129] Furthermore, in the above-described embodiment, a case has been described in which a plurality of semiconductor element units 1 are manufactured by arranging them on a supply substrate 40, and a plurality of semiconductor elements 2 of the same type are transferred onto a plurality of first electrodes 3 (FIGS. 3(C) and 4). However, the present invention is not limited to this, and for example, the supply substrate 40 may be constructed by transferring a plurality of semiconductor elements 2 of a mixture of different types onto a plurality of first electrodes 3. Also, as in the above-described case, the supply substrate may be formed by attaching each semiconductor element unit 1 (i.e., a mixture of multiple types of semiconductor elements 2) to the underside of the stamp 101, or may be formed by transferring each semiconductor element unit 1 onto a predetermined substrate. The same applies to the second embodiment.

[0130] Furthermore, in the above-mentioned first embodiment, a case has been described in which one type of semiconductor element unit 1 is mounted on the display circuit board 71D of the LED display section 71 when manufacturing the LED display device 70 (FIG. 7). However, the present invention is not limited to this, and a plurality of types of semiconductor element units 1 may be mounted. Specifically, for example, a red semiconductor element unit 1 using a semiconductor element 2 that emits red light, a green semiconductor element unit 1 using a semiconductor element 2 that emits green light, and a blue semiconductor element unit 1 using a semiconductor element 2 that emits blue light are mounted in a repeated line, thereby realizing an LED display section 71 capable of performing color display. The same applies to the second embodiment.

[0131] Further, in the above-mentioned second embodiment, the case where only the first electrode 203 is bonded to the semiconductor element 202 of the semiconductor element unit 201 (FIG. 8) has been described. However, the present invention is not limited to this. For example, as in the semiconductor element unit 401 shown in FIG. 15 corresponding to FIG. 8, the direct-upper electrode 411 may be provided on the surface of the semiconductor element 202 on the Z direction side, that is, on the upper surface opposite to the surface bonded to the first electrode 203. When manufacturing this semiconductor element unit 401, the manufacturing apparatus 100 transfers the semiconductor element 202 to the upper side of the first electrode 203 as shown in FIG. 10(D), for example, and then forms the direct-upper electrode 411 on the Z direction side (i.e., the upper side) of the semiconductor element 202 by a method such as deposition, and then performs an annealing process. As a result, the semiconductor element unit 401 can form a eutectic bond not only between the semiconductor element 202 and the first electrode 203, but also between the semiconductor element 202 and the direct-upper electrode 411. In this case, for example, by forming the direct-top electrode 411 from a material with high light transmittance, so as to be a so-called transparent electrode, the light emitted by the semiconductor element 202 can be efficiently transmitted in the Z direction.

[0132] Furthermore, in the above-mentioned second embodiment, the first insulating portion 205 of the semiconductor element unit 201 (FIG. 8) is provided in a range extending from a part of the surface of the semiconductor element 202 on the Z direction side (upper side) to a part of the surface of the second electrode 204 on the Z direction side (upper side) in the Y direction. However, the present invention is not limited to this. For example, as in a semiconductor element unit 501 shown in FIG. 16 corresponding to FIG. 8, the first insulating portion 505 may be provided in a wider range in the Y direction, for example, in a range from the Y direction side of the semiconductor element 202 to the -Y direction side of the second electrode 204. In this case, it is sufficient to expose a part of the surface of the semiconductor element 202 on the Z direction side and a part of the surface of the second electrode 204 on the Z direction side so that the wiring portion 206 can be electrically connected to both. The same applies to the first insulating portion 55 of the semiconductor mounting circuit 50 (FIG. 5) in the first embodiment.

[0133] Furthermore, in the above-mentioned second embodiment, the second insulating section 207 is provided so as to directly overlap the Z direction side (upper side) of the first insulating section 205 and the wiring section 206 in the semiconductor element unit 201 (FIG. 8). However, the present invention is not limited to this. For example, as in a semiconductor element unit 601 shown in FIG. 17 corresponding to FIG. 8, one or more films or layers made of other materials such as a fluorescent section 612 may be provided on the Z direction side (upper side) of the first insulating section 205 and the wiring section 206, and the second insulating section 207 may be provided on the Z direction side (upper side) thereof. When manufacturing this semiconductor element unit 401, the manufacturing apparatus 100 may provide the wiring section 206 overlapping the first insulating section 205 as shown in FIG. 10(F), and then provide the fluorescent section 612 so as to overlap it, and then provide the second insulating section 207 as shown in FIG. 10(G). Note that fluorescent section 612 only needs to cover at least semiconductor element 202, and may expose a part of first insulating section 205 and wiring section 206. When semiconductor element unit 601 causes semiconductor element 202 to emit light, the color of the emitted light can be converted into another color by fluorescent section 612. The same applies to semiconductor mounted circuit 50 in the first embodiment.

[0134] Furthermore, in the above-mentioned second embodiment, the case where one each of the semiconductor element 202, the first electrode 203, the second electrode 204, the first insulating portion 205, and the wiring portion 206 is provided in the semiconductor element unit 201 has been described. However, the present invention is not limited to this, and one semiconductor element unit may be provided with a plurality of semiconductor elements 202, etc., and may be configured such that three semiconductor element units 701R, 701G, and 701B are arranged along the X direction, as in the semiconductor element unit 701 shown in FIG. 18 corresponding to FIG. 8(A). In this case, for example, the semiconductor element 202R is a red light-emitting element, the semiconductor element 202G is a green light-emitting element, and the semiconductor element 202B is a blue light-emitting element, whereby the semiconductor element unit 701 can be used as a display element for each pixel in a color display device. Alternatively, for example, as in a semiconductor element unit 801 shown in Fig. 19 corresponding to Fig. 18, instead of the first electrodes 203 in the semiconductor element units 801R, 801G, and 801B of each color, a common first electrode 803 configured to connect the first electrodes 203 to each other along the X direction may be provided. Alternatively, for example, as in a semiconductor element unit 901 shown in Fig. 20 corresponding to Figs. 18 and 19, instead of the second electrodes 204 in the semiconductor element units 901R, 901G, and 901B of each color, a common second electrode 904 configured to connect the second electrodes 204 to each other along the X direction may be provided.

[0135] Furthermore, in the above-mentioned second embodiment, when manufacturing the semiconductor element unit 201 by the manufacturing apparatus 100, the case where the first electrode 203 is formed on the formation sacrificial layer 242 and then the second electrode 204 is formed has been described (FIGS. 10(B) and (C)). However, the present invention is not limited to this, and for example, the first electrode 203 may be formed after the second electrode 204 is formed, or when the first electrode 203 and the second electrode 204 are made of the same material, both may be formed at the same time. Alternatively, for example, the first electrode 203 may be formed, the semiconductor element 202 may be transferred onto it, an annealing process may be performed, and then the second electrode 204 may be formed.

[0136] Furthermore, in the above-mentioned second embodiment, when a negative result is obtained in step SP5 of the manufacturing procedure RT1 (FIG. 13) and no abnormality is found, the LED display unit 71 is considered to be completed and the manufacturing procedure RT1 is terminated. However, the present invention is not limited to this. For example, when a negative result is obtained in step SP5, the manufacturing apparatus 100 may apply at least one of a predetermined pressure and a predetermined heat to the display circuit board 71D in which the semiconductor element units 201 are bonded by intermolecular forces at each mounting location. This allows eutectic bonding between the first electrode 203 and the first circuit connection pad 261, and between the second electrode 204 and the second circuit connection pad 262, respectively, to realize ohmic connection, and stabilize the electrical connection between the two. In other words, in the LED display unit 71, the state in which the two are joined only by intermolecular forces can be considered to be a "temporarily fixed" state in which they are electrically connected and fixed with a relatively small force that allows for easy replacement, and the state in which a eutectic bond is formed can be considered to be a "permanently fixed" state in which they are firmly fixed with a relatively large force that does not easily peel off.

[0137] Furthermore, in the above-mentioned second embodiment, a case has been described in which a predetermined solvent is discharged onto the abnormal portion in step SP6 of the manufacturing procedure RT1 (FIG. 13) to weaken the bond due to intermolecular forces, and then the semiconductor element unit 201 is peeled off from the display circuit board 71D. However, the present invention is not limited to this, and for example, the semiconductor element unit 201 may be peeled off from the display circuit board 71D after weakening the bond due to intermolecular forces by another method, or without weakening the bond due to intermolecular forces.

[0138] Furthermore, in the above-mentioned first embodiment, the LED display device 70 (FIG. 7) is configured by mounting the semiconductor element unit 1 having the semiconductor element 2 made of a light-emitting element on a display circuit board 71D made of a glass epoxy board. However, the present invention is not limited to this, and for example, a flexible display may be configured by mounting a plurality of semiconductor element units 1 on a flexible circuit board. In addition, the present invention may also be configured by mounting the semiconductor element unit 1 having various elements other than the light-emitting element, for example, the semiconductor element 2 made of a sensor element that detects various physical quantities, on a predetermined circuit board. For example, the semiconductor element unit 1 may be configured using the semiconductor element 2 made of a light-receiving element, and a photosensor array may be configured by mounting a plurality of the semiconductor element units 1 on a predetermined circuit board. Also, for example, the semiconductor element 2 may be a pn junction photodiode, and a plurality of the semiconductor element units 1 having the semiconductor element 2 may be mounted side by side on a predetermined circuit board to configure an image sensor. In short, various electronic devices can be configured by configuring the semiconductor element unit 1 using the semiconductor element 2 made of an element having various functions, and mounting a plurality of the semiconductor element units 1. The same applies to the second embodiment.

[0139] Furthermore, the present invention is not limited to the above-described embodiments and other embodiments. That is, the scope of application of the present invention extends to embodiments in which the above-described embodiments and the other embodiments are combined in part or in whole in any manner, or to embodiments in which parts are extracted.

[0140] Furthermore, in the above-described embodiment, a case has been described in which the semiconductor element unit 1 is constituted by the semiconductor element 2 as the semiconductor element and the first electrode 3 as the first electrode. However, the present invention is not limited to this, and the semiconductor element unit may be constituted by a semiconductor element having various other configurations and a first electrode. [Industrial Applicability]

[0141] The present invention can be used, for example, in an LED display having an arrangement of multiple LEDs. [Explanation of symbols]

[0142] 1, 201...semiconductor element unit, 1B, 201B...unit mounting surface, 2, 202...semiconductor element, 3, 203...first electrode, 3B, 203B...first electrode mounting surface, 31, 231...growth substrate, 32, 232...growth sacrificial layer, 33, 233...semiconductor functional layer, 40, 240...supply substrate, 41, 241...formation substrate, 42, 242...formation sacrificial layer, 50, 250...semiconductor mounting circuit, 51, 251...circuit substrate, 51A, 251A...substrate surface, 55...first insulating portion, 56...wiring portion , 60, 260...base material portion, 61, 261...first circuit connection pad, 61A, 261A...first pad surface, 62, 262...second circuit connection pad, 62A, 262A...second pad surface, 70...LED display device, 71...LED display portion, 71D...display circuit board, 204...second electrode, 204B...second electrode mounting surface, 205...first insulating portion, 205B...first insulating portion mounting surface, 206...wiring portion, 207...second insulating portion, 207B...second insulating portion mounting surface.

Claims

1. a semiconductor element unit including a semiconductor element, a first electrode forming a eutectic bond with the semiconductor element, a second electrode provided at a position not in contact with the semiconductor element and the first electrode, a wiring portion electrically connecting the semiconductor element and the second electrode, and an insulating portion covering the semiconductor element, the wiring portion, and the second electrode, wherein a first electrode mounting surface, which is a surface different from a surface of the first electrode that forms the eutectic bond with the semiconductor element, and a second electrode mounting surface of the second electrode are formed on the same plane, and the semiconductor element unit is disposed on a first substrate via a sacrificial layer, and is separated from the first substrate by removing the sacrificial layer; The semiconductor element unit separated from the first substrate is bonded to a second substrate different from the first substrate. A method for manufacturing a semiconductor packaged circuit, comprising the steps of:

2. The first electrode mounting surface and the second electrode mounting surface of the semiconductor element unit are respectively bonded to a first circuit connection pad and a second circuit connection pad exposed on a substrate surface of the second substrate, thereby bonding the semiconductor element unit to the second substrate.

2. The method for manufacturing a semiconductor package circuit according to claim 1 .

3. In the unit mounting surface including the first electrode mounting surface and the second electrode mounting surface of the semiconductor element unit, a step size at a location where different materials are adjacent to each other is 1 / 1000 or less of a length of the shortest side of an outer shape of the insulating portion parallel to the unit mounting surface.

3. The method for manufacturing a semiconductor package circuit according to claim 1 or 2.

4. The unit mounting surface including the first electrode mounting surface and the second electrode mounting surface of the semiconductor element unit has a surface roughness of 10 nm or less.

4. The method for manufacturing a semiconductor packaged circuit according to claim 1,

5. A first substrate has a sacrificial layer and an electrode formed on the sacrificial layer, and a semiconductor element is bonded to the electrode of the first substrate; After bonding the semiconductor element onto the electrodes, the semiconductor element and the electrodes are eutectic-bonded by an annealing process to form a semiconductor element unit; After the semiconductor element and the electrode are eutectic-bonded, the sacrificial layer is removed, and the semiconductor element unit is separated from the first substrate. A method for manufacturing a semiconductor element unit comprising the steps of:

6. A second sacrificial layer and a semiconductor functional layer are laminated on the growth substrate; removing unnecessary portions from the semiconductor functional layer to form the semiconductor element; removing the second sacrificial layer and separating the semiconductor device from the growth substrate; The semiconductor element separated from the growth substrate is bonded onto the electrode of the first substrate.

6. The method for manufacturing a semiconductor element unit according to claim 5.

7. 7. A method for manufacturing a semiconductor packaged circuit using the semiconductor element unit according to claim 5, further comprising the steps of: an electrode mounting surface formed on the electrode of the semiconductor element unit separated from the first substrate is bonded to a second substrate different from the first substrate; A method for manufacturing a semiconductor package circuit comprising the steps of:

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