Printed circuit board
Patent Information
- Application Number
- JP2024074342
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-01
- Filing Date
- 2024-05-01
- Publication Date
- 2025-03-14
AI Technical Summary
【0010】 本発明によれば、電子部品の実装が可能なキャビティを含みながら薄型化が可能なプリント回路基板を提供することができる。
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Figure 2025036066000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to printed circuit boards. [Background technology]
[0002] As the performance of smartphones improves, the thickness of electronic components mounted on package substrates is increasing, but the thickness of the set needs to be reduced or maintained. Therefore, there is a demand for forming cavities for mounting electronic components on package substrates. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2019-87723 A Summary of the Invention [Problem to be solved by the invention]
[0004] An object of the present invention is to provide a printed circuit board that can be thinned while including a cavity in which electronic components can be mounted.
[0005] Another object of the present invention is to provide a printed circuit board capable of improving thermal characteristics by increasing the thickness of electronic components mounted in the cavities.
[0006] It is a further object of the present invention to provide a printed circuit board that can be applied to board-on-board or package-on-package to reduce the space between boards. [Means for solving the problem]
[0007] The solution proposed in this specification is to form a cavity portion in a printed circuit board applied to a lower substrate of a board-on-board or package-on-package, the cavity portion including first and second cavities of different sizes and capable of exposing a plurality of pads embedded at a level between a plurality of wiring layers based on a thickness direction.
[0008] In order to achieve the above-mentioned object, a printed circuit board according to one embodiment of the present invention includes a first insulating layer, a cavity portion including a first cavity penetrating a portion of the first insulating layer in the thickness direction from an upper surface of the first insulating layer and a second cavity penetrating another portion of the first insulating layer in the thickness direction from the first cavity, a first wiring layer arranged on the upper side of the first insulating layer, a second wiring layer arranged on the lower side of the first insulating layer, and a third wiring layer at least partially embedded in the first insulating layer and arranged at a level between the first and second wiring layers in the thickness direction, wherein the third wiring layer includes a plurality of pads, at least a portion of each of whose upper surfaces is exposed from the first insulating layer via the cavity portion, and the first cavity has a wider cross-sectional width than the second cavity.
[0009] A printed circuit board according to another aspect of the present invention made to achieve the above-mentioned object includes a first insulating layer, a first cavity portion including a first cavity penetrating a part of the first insulating layer in the thickness direction from an upper surface of the first insulating layer and a second cavity penetrating another part of the first insulating layer in the thickness direction from the first cavity, a first wiring layer arranged on the upper side of the first insulating layer, a second wiring layer arranged on the lower side of the first insulating layer, and a third wiring layer at least partially embedded in the first insulating layer and arranged at a level between the first and second wiring layers in the thickness direction, wherein the third wiring layer includes a plurality of pads, at least a portion of each of whose upper surfaces is exposed from the first insulating layer via the first cavity portion, and the first cavity has a larger planar area than the second cavity. Effect of the Invention
[0010] According to the present invention, it is possible to provide a printed circuit board that can be thinned while including a cavity in which electronic components can be mounted.
[0011] Furthermore, according to the present invention, it is possible to provide a printed circuit board capable of improving thermal characteristics by increasing the thickness of electronic components mounted in the cavities.
[0012] Furthermore, according to the present invention, it is possible to provide a printed circuit board that can be applied to a board-on-board or package-on-package system to reduce the space between boards. [Brief description of the drawings]
[0013] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4] FIG. 4 is a plan view showing a schematic top view of the printed circuit board of FIG. [Figure 5a] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5b] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5c] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5d] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5e] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5f] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5g] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5h]4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5i] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 5j] 4A to 4C are cross-sectional views illustrating steps in a manufacturing example of the printed circuit board of FIG. 3. [Figure 6] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 7] FIG. 7 is a plan view showing a schematic top view of the printed circuit board of FIG. 6. [Figure 8] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 9] FIG. 9 is a plan view showing a schematic top view of the printed circuit board of FIG. 8. [Figure 10] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 11] FIG. 11 is a plan view showing a schematic top view of the printed circuit board of FIG. [Figure 12] 1 is a cross-sectional view that illustrates an example of a substrate-on-substrate structure or a package-on-package structure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] Hereinafter, the present invention will be described with reference to the drawings. The shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation.
[0015] (electronic equipment) FIG. 1 is a block diagram illustrating an example of an electronic device system.
[0016] 1, an electronic device 1000 includes a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are coupled to other electronic components (described later) to form various signal lines 1090.
[0017] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). In addition, these chip-related components 1020 can be combined with each other. The chip-related components 1020 are in the form of a package including the above-mentioned chips and electronic components.
[0018] The network-related components 1030 include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, and may include any of numerous other wireless or wired standards and protocols. The network-related components 1030 are also combined with the chip-related components 1020.
[0019] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may include passive elements in the form of chip components used for various other applications. In addition, the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.
[0020] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of the other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, a battery 1080, and the like. Other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. Other electronic components used for various purposes may also be included depending on the type of electronic device 1000.
[0021] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.
[0022] FIG. 2 is a perspective view that illustrates an example of an electronic device.
[0023] Referring to FIG. 2, the electronic device is, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are housed inside the smartphone 1100. Some of the components 1120 are chip-related components as described above, for example, a component package 1121, but are not limited thereto. The component package 1121 is in the form of a printed circuit board on which electronic components including active components and / or passive components are mounted on the surface. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built in. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.
[0024] (Printed Circuit Board) FIG. 3 is a cross-sectional view that shows a schematic example of a printed circuit board, and FIG. 4 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0025] 3 and 4, the printed circuit board 100A according to an example includes a first insulating layer 111, a cavity portion C including a first cavity c1 penetrating a part of the first insulating layer 111 from the upper surface of the first insulating layer 111 in the thickness direction and a second cavity c2 penetrating another part of the first insulating layer 111 in the thickness direction from the first cavity c1, a first wiring layer 121 arranged on the upper side of the first insulating layer 111, a second wiring layer 122 arranged on the lower side of the first insulating layer 111, and a third wiring layer 123 at least partially embedded in the first insulating layer 111 and arranged at a level between the first and second wiring layers 121 and 122 in the thickness direction. The third wiring layer 123 includes a plurality of pads P each having at least a part of the upper surface exposed from the first insulating layer 111 through the cavity portion C. The first cavity c1 is larger in size than the second cavity c2. For example, it has a wider cross-sectional width, a larger planar area, and a deeper depth in the thickness direction.
[0026] In this manner, the printed circuit board 100A according to an embodiment has a cavity portion C including first and second cavities c1 and c2 of different sizes formed in the first insulating layer 111, and the cavity portion C is embedded in the first insulating layer 111 and exposes a plurality of pads P disposed at a level between the first and second wiring layers 121 and 122 in the thickness direction. Therefore, even if an electronic component is mounted in the cavity portion C, the entire thickness of the printed circuit board 100A can be reduced by the cavity portion C. In addition, since the cavity portion C has a considerable depth, the thickness of the electronic component mounted therein can be increased, and as a result, the thermal characteristics can be improved. In addition, the printed circuit board 100A having such a structure can be applied as a lower board of a board-on-board or package-on-package. In this case, the gap between the upper board and the lower board can be narrowed, and the size of the solder balls disposed therebetween can be reduced, and thus, a finer ball pitch and an increased number of input / output terminals can be expected.
[0027] Meanwhile, the printed circuit board 100A according to an example further includes a first resist layer 141 disposed on the upper surface of the first insulating layer 111 and having a first opening h1 exposing at least a part of the first wiring layer 121. The cavity portion C further includes a third cavity c3 penetrating between the upper and lower surfaces of the first resist layer 141 in the thickness direction and connected to the first cavity c1. The third cavity c3 has a wider width on the cross section and a larger area on the plane than the first cavity c1. In this way, the printed circuit board 100A further includes a third cavity c3 having a size different from the first and second cavities c1 and c2 in the first resist layer 141. Therefore, the cavity portion C can be further expanded, and as a result, the above-mentioned effects can be more easily achieved.
[0028] Meanwhile, the printed circuit board 100A according to an example further includes a first via layer 131 penetrating the first insulating layer 111 and connecting at least a portion of the first and second wiring layers 121 and 122 to each other, and a second via layer 132 penetrating the first insulating layer 111 and connecting at least a portion of the second and third wiring layers 122 and 123 to each other. The first via layer 131 has a greater cross-sectional thickness than the second via layer 132. In this manner, the second via layer 132 having a smaller thickness than the first via layer 131 is formed in the first insulating layer 111, thereby allowing the multiple pads P to be connected to the second wiring layer 122 via a shorter path. Therefore, the electrical connection path of the electronic components mounted in the cavity portion C can be shortened, and as a result, the signal characteristics and the like can be improved.
[0029] Meanwhile, the printed circuit board 100A according to an example further includes a second insulating layer 112 disposed on the lower surface of the first insulating layer 111, a fourth wiring layer 124 disposed on the lower surface of the second insulating layer 112, a third via layer 133 penetrating the second insulating layer 112 to connect at least a part of each of the second and fourth wiring layers 122, 124 to each other, and a second resist layer 142 disposed on the lower surface of the second insulating layer 112 and having a second opening h2 to expose at least a part of the fourth wiring layer 124. Each of the first to third via layers 131, 132, 133 has a tapered shape in which the width of the lower end is wider than the width of the upper end on the cross section. In this way, the printed circuit board 100A has a multi-layer coreless substrate structure, and may have a multi-layer structure greater than that shown in the figure as necessary.
[0030] Meanwhile, the first wiring layer 121 includes a 1-1 wiring layer 121-1 embedded in the upper side of the first insulating layer 111 and a 1-2 wiring layer 121-2 disposed on the upper surface of the first insulating layer 111. The 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are connected to each other. For example, the 1-2 wiring layer 121-2 has a wider width on the cross section than the 1-1 wiring layer 121-1, and the upper surface of the 1-1 wiring layer 121-1 and the lower surface of the 1-2 wiring layer 121-2 are in direct contact with each other. In addition, the first opening h1 of the first resist layer 141 exposes at least a part of the 1-2 wiring layer 121-2. In this way, the first wiring layer 121 has a multilayer form in which embedded patterns and protruding patterns of different sizes are connected. Therefore, by increasing the thickness of the first resist layer 141, the depth of the third cavity c3 can be made deeper, and the connection reliability with the solder balls can be further improved when applied as the lower substrate in a substrate-on-substrate structure or a package-on-package structure.
[0031] Meanwhile, at least two of the plurality of pads P may have different shapes on a plane. For example, at least one of the plurality of pads P has a circular shape on a plane, while at least one of the plurality of pads P has a rectangular shape on a plane. However, this is not limited thereto, and in addition to a circular or rectangular shape, various other shapes such as an ellipse or other polygonal shapes may be applied. In this way, the printed circuit board 100A can form a plurality of pads P of various shapes in the cavity portion C as a feature of a process described later, thereby increasing the degree of freedom in design.
[0032] On the other hand, the thickness of the 1-1 wiring layer 121-1 is substantially the same as the depth of the first cavity c1. For example, the first cavity c1 is formed by removing a metal block formed in the same process as the 1-1 wiring layer 121-1. In this manner, the first cavity c1 is formed using the process of forming the 1-1 wiring layer 121-1, and therefore the cavity portion C can be formed more easily.
[0033] The components of the example printed circuit board 100A are described in more detail below with reference to the drawings.
[0034] The first and second insulating layers 111 and 112 each include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass cloth, glass fabric) together with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. The first and second insulating layers 111 and 112 may include the same insulating material or different insulating materials. They may have a boundary between them, or may be integrated to the extent that the boundary is unclear.
[0035] Each of the first to fourth wiring layers 121, 122, 123, and 124 includes a metal material. The metal material includes copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal material includes copper (Cu), but is not limited to this. Each of the first to fourth wiring layers 121, 122, 123, and 124 performs various functions according to the design. For example, the functions include a signal pattern, a power pattern, and a ground pattern. Each of these patterns has various forms such as a line, a plane, and a pad. Each of the first to fourth wiring layers 121, 122, 123, and 124 includes an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). The first to fourth wiring layers 121, 122, 123, and 124 may include only an electrolytic plating layer (or electrolytic copper) without the electroless plating layer (or chemical copper). If necessary, a metal foil (or copper foil) or a sputtering layer may be further included. Meanwhile, the 1-2 wiring layer 121-2, the second wiring layer 122, and the fourth wiring layer 124 each include a seed layer such as chemical copper and / or copper foil, whereas the 1-1 wiring layer 121-1 and the third wiring layer 123 do not include a seed layer.
[0036] Each of the first to third via layers 131, 132, and 133 includes a metal material. The metal material includes copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. The metal material preferably includes, but is not limited to, copper (Cu). Each of the first to third via layers 131, 132, and 133 includes a microvia. The microvia is a field via that fills a via hole, or a conformal via that is arranged along the wall surface of a via hole. The microvia is arranged in a stacked type and / or staggered type. The microvias of the first to third via layers 131, 132, and 133 perform various functions depending on the design of the layer. For example, they include a ground via, a power via, and a signal via. The first to third via layers 131, 132, and 133 each include, but are not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, and both may be included. The microvias of the first to third via layers 131, 132, and 133 each have a shape tapered in the same direction.
[0037] The first and second resist layers 141 and 142 each include, but are not limited to, a liquid or film type solder resist, and may include other types of insulating materials such as ABF, etc. The first and second resist layers 141 and 142 each have first and second openings h1 and h2, and a surface treatment layer is formed on the patterns exposed through the first and second openings h1 and h2 as necessary.
[0038] 5a to 5j are cross-sectional views illustrating steps of a manufacturing example of the printed circuit board of FIG.
[0039] 5a, a 1-1 wiring layer 121-1 and a first metal block 321 are formed on both sides of the detached carrier 310. First and second metal layers m1 and m2 are disposed on all sides of the detached carrier 310, and the 1-1 wiring layer 121-1 and the first metal block 321 are formed by, for example, electrolytic plating using the second metal layer m2 as a seed layer.
[0040] 5b, a second metal block 322 is formed on the first metal block 321. The second metal block 322 is formed by, for example, electrolytic plating using the first metal block 321 as a seed layer. The second metal block 322 includes a different metal from the first metal block 321. For example, the first metal block 321 includes copper (Cu) and the second metal block 322 includes nickel (Ni), but is not limited thereto.
[0041] 5c, a third wiring layer 123 including a plurality of pads P is formed on the second metal block 322. The third wiring layer 123 is formed by, for example, electrolytic plating using the second metal block 322 as a seed layer. The plurality of pads P are formed in various shapes.
[0042] Referring to FIG. 5d, a first insulating layer 111 is formed on both sides of the detached carrier 310, in which the first and second metal blocks 321, 322, the 1-1 wiring layer 121-1, and the third wiring layer 123 are embedded. The first insulating layer 111 is formed by a lamination process. In addition, the second wiring layer 122 and the first and second via layers 131, 132 are formed in the first insulating layer 111. The via holes for the first and second via layers 131, 132 are formed by laser processing or the like. The second wiring layer 122 and the first and second via layers 131, 132 are formed by using, for example, AP (Additive Process), SAP (Semi AP), MSAP (Modified SAP), TT (Tenting), or the like.
[0043] 5e, a second insulating layer 112 in which a second wiring layer 122 is embedded is formed on a first insulating layer 111. The second insulating layer 112 is formed by a lamination process. For example, the second insulating layer 112 is formed by laminating RCC (Resin Clad Copper) or the like. For example, a third metal layer m3 is laminated on the outermost side of the second insulating layer 112.
[0044] 5f, the manufactured stack is separated from the detach carrier 310. For example, the first and second metal layers m1, m2 are separated from each other, and the second metal layer m2 remains in the separated stack.
[0045] Referring to FIG. 5g, the fourth wiring layer 124 and the third via layer 133 are formed in the second insulating layer 112. In addition, the 1-2 wiring layer 121-2 and the third metal block 323 are formed in the first insulating layer 111. The third metal block 323 contains the same metal as the first metal block 321, for example, copper (Cu). The via hole for the third via layer 133 is formed by laser processing or the like. The 1-2 wiring layer 121-2, the fourth wiring layer 124, the third metal block 323, and the third via layer 133 are formed by using, for example, AP (Additive Process), SAP (Semi AP), MSAP (Modified SAP), TT (Tenting), or the like. The 1-2 wiring layer 121-2 and the third metal block 323 include the first metal layer m1, and the fourth wiring layer 124 includes the third metal layer m3.
[0046] Referring to FIG. 5h, first and second resist layers 141 and 142 are formed on the first and second insulating layers 111 and 112, respectively. The first and second resist layers 141 and 142 are formed by coating or lamination. Next, the first and second openings h1 and h2 and the third cavity c3 are formed in the first and second resist layers 141 and 142. The first and second openings h1 and h2 and the third cavity c3 are formed by laser processing, but are not limited to this, and other methods such as an etching method may be used. The surfaces exposed through the first and second openings h1 and h2 are surface-treated by gold plating or the like.
[0047] 5i, a first cavity c1 is formed in the first insulating layer 111. The first cavity c1 is formed by etching the first and third metal blocks 321, 323. The second metal block 323 includes a different metal from the first and third metal blocks 321, 323, and thus the pads P can be protected.
[0048] Referring to Fig. 5j, a second cavity c2 is formed in the first insulating layer 111. The second cavity c2 is formed by etching the second metal block 322. The second metal block 322 includes a different metal from the pads P, so that the pads P are hardly affected by the etching in this step. Through a series of processes, the printed circuit board 100A according to the above-mentioned example is manufactured.
[0049] The other details are substantially the same as those described in the printed circuit board 100A according to the above-mentioned embodiment, so that a duplicated description thereof will be omitted.
[0050] FIG. 6 is a cross-sectional view that shows a schematic example of a printed circuit board, and FIG. 7 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0051] 6 and 7, the printed circuit board 100B according to another example is similar to the printed circuit board 100A according to the above example, except that the upper surfaces of the pads P are recessed downward with respect to the bottom surface of the cavity C such that there is a step between the upper surfaces of the pads P and the bottom surface of the cavity C. For example, a recessed portion r is formed on the upper surface of each of the pads P. Electrical connection metals such as solder balls are connected to each other through the recessed portion r, so that occurrence of a short circuit can be more effectively prevented. The recessed portion r can be formed by an etching process using the same metal such as copper (Cu) instead of a different metal such as nickel (Ni) as the material of the second metal block 322 described above, but is not limited thereto.
[0052] The other details are substantially the same as those described in the printed circuit board 100A according to the above-mentioned embodiment, so that a duplicated description thereof will be omitted.
[0053] FIG. 8 is a cross-sectional view that shows a schematic diagram of another example of a printed circuit board, and FIG. 9 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0054] 8 and 9, the printed circuit board 100C according to another example further includes a post portion 125 disposed on the upper surface of the first resist layer 141 in the printed circuit board 100A according to the above example, filling at least a portion of the first opening h1, and connected to at least a portion of the exposed portion of the 1-2 wiring layer 121-2. The effect of the cavity portion C can be further enhanced through the post portion 125. The post portion 125 is formed by a plating process such as electroless plating (or chemical copper) and electrolytic plating (or electrolytic copper). The post portion 125 includes various posts such as a signal post, a power post, and a ground post. The post portion 125 includes the above-mentioned metal material such as copper (Cu).
[0055] The other details are substantially the same as those described in the printed circuit board 100A according to the above-mentioned example, so that a duplicated description thereof will be omitted.
[0056] FIG. 10 is a cross-sectional view that shows a schematic diagram of still another example of a printed circuit board, and FIG. 11 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0057] 10 and 11, the printed circuit board 100D according to another example is a printed circuit board 100A according to the above example, in which the upper surface of each of the pads P is recessed downward with respect to the bottom surface of the cavity portion C so that the upper surface of each of the pads P has a step with the bottom surface of the cavity portion C. For example, a recess portion r is formed on the upper surface of each of the pads P. Electrical connection metals such as solder balls are connected to each other through the recess portion r, so that the occurrence of a short circuit can be more effectively prevented. The recess portion r can be formed by an etching process using the same metal such as copper (Cu) instead of a different metal such as nickel (Ni) as the material of the second metal block 322 described above, but is not limited thereto. In addition, the printed circuit board 100D further includes a post portion 125 disposed on the upper surface of the first resist layer 141, filling at least a part of the first opening h1, and connected to at least a part of the exposed portion of the 1-2 wiring layer 121-2. The effect of the cavity portion C can be further enhanced through the post portion 125. The post portion 125 is formed by a plating process such as electroless plating (or chemical copper) and electrolytic plating (or electrolytic copper). The post portion 125 includes various posts such as signal posts, power posts, and ground posts. The post portion 125 includes the above-mentioned metal material such as copper (Cu).
[0058] The other details are substantially the same as those described in the printed circuit board 100A according to the above-mentioned embodiment, so that a duplicated description thereof will be omitted.
[0059] FIG. 12 is a cross-sectional view that illustrates an example of a substrate-on-substrate structure or a package-on-package structure.
[0060] 12, in a substrate-on-substrate or package-on-package structure 500 according to an embodiment, a second substrate 100-2 is disposed on a first substrate 100-1, an electronic component 210 is disposed between the first and second substrates 100-1 and 100-2, the first and second substrates 100-1 and 100-2 are connected to each other via a first electrically connecting metal 221, the electronic component 210 is mounted on the first substrate 100-1 via a second electrically connecting metal 222, and first and second cavity portions C1 and C2 of the first and second substrates 100-1 and 100-2 are electrically connected to each other via a first electrically connecting metal 221. C2 are at least partially overlapped with each other in the thickness direction, and at least a part different from at least a part of the electronic component 210 is disposed in the first and second cavity parts C1 and C2 of the first and second substrates 100-1 and 100-2, respectively, a third electrical connection metal 223 is attached to the lower side of the first substrate 100-1, a passive component 230 is mounted on the lower side of the first substrate 100-1 via a fourth electrical connection metal 224, and a known molding material 250 is filled between the first and second substrates 100-1 and 100-2. The first substrate 100-1 is at least one of the above-mentioned printed circuit boards 100A, 100B, 100C, and 100D. For example, the second substrate 100-2 is connected to the above-mentioned first wiring layer 121 and / or post part 125 via a plurality of first electrical connection metals 221. Also, the electronic component 210 is connected to the above-mentioned pads P through the second electrical connecting metals 222. The second substrate 100-2 is a core type or coreless type wiring substrate. The wiring substrate is an organic interposer, but is not limited thereto, and may be a silicon interposer as necessary. The electronic component 210 is an active component and / or a passive component, preferably including, but not limited to, a semiconductor chip. The passive component 230 is a chip capacitor and / or a chip inductor, but is not limited thereto. The first to fourth electrical connecting metals 221, 222, 223, and 224 are solder balls, etc. Such a substrate-on-substrate or package-on-package structure 500 can reduce the space between the first and second substrates 100-1 and 100-2, and thus it is possible to reduce the size of the first electrical connecting metal 221 disposed therebetween, thereby making it possible to achieve finer ball pitches and an increase in the number of input / output terminals.In addition, the overall thickness can be minimized, and the electronic component 210 can still have a sufficient thickness, thereby improving the thermal characteristics.
[0061] The other details are substantially the same as those described for the printed circuit boards 100A, 100B, 100C, and 100D described above, so a duplicated description thereof will be omitted.
[0062] In this specification, the term "cover" includes not only the case of covering entirely but also the case of covering at least a part, and not only the case of covering directly but also the case of covering indirectly. Furthermore, the term "fill" includes not only the case of filling completely but also the case of filling roughly, for example, the case where some gaps or voids are present.
[0063] In this specification, the term "cross section" refers to the cross-sectional shape of an object cut vertically or the cross-sectional shape of an object when viewed from the side, and the term "planar" refers to the planar shape of an object cut horizontally or the planar shape of an object when viewed from the top or bottom.
[0064] In this specification, thickness, width, length, depth, etc. are measured using a scanning microscope, optical microscope, etc. based on a cross section obtained by polishing or cutting a printed circuit board. The cut section is a vertical section or a horizontal section, and the numerical values are measured based on the required cut section. If the numerical value is not constant, the numerical value is determined as the average value of the values measured at any five points. The width of the upper end and / or lower end of a via or cavity is measured on a cross section cut along the central axis of the via or cavity in the thickness direction of the board. The depth of a via or cavity is measured as the distance from the upper end to the lower end of each object on a cross section cut along the central axis of each object in the thickness direction of the board.
[0065] In this specification, for convenience, terms such as lower and bottom are used to mean a downward direction based on a cross section of the drawing, and terms such as upper and top are used to mean an upward direction. In addition, terms such as side and side are used to mean a left-right direction. In addition, the thickness direction is used to mean an upward and / or downward direction based on a cross section of the drawing, just like terms such as lower, bottom, upper and top. However, these are definitions of directions for convenience of explanation, and the technical scope of the present invention is not particularly limited by the description of such directions, and the concepts of up / down may change at any time.
[0066] In this specification, the term "connected" includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" includes both physical connection and non-connection. Furthermore, expressions such as "first" and "second" are used to distinguish one component from another, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly the second component may be named the first component, without departing from the scope of the technology.
[0067] The term "one example" used in this specification does not mean the same embodiment, but is provided to emphasize and describe each unique feature that is different from the others. However, the above-mentioned one example does not exclude being realized in combination with the features of another example. For example, even if the matter described in a particular example is not described in another example, it can be understood as being related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.
[0068] The terms used in this specification are merely used to describe an example and are not intended to limit the present invention. In this case, the singular expression includes the plural expression unless the context clearly indicates otherwise. [Explanation of symbols]
[0069] 1000 electronic equipment 1010 Mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 Camera 1060 Antenna 1070 display 1080 Battery 1090 Signal Line 1100 Smartphone 1110 Motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker 500 Substrate-on-substrate structure (package-on-package structure) 100A, 100B, 100C, 100D Printed Circuit Boards 100-1, 100-2 board 111, 112 Insulating layer 121, 122, 123, 124, 121-1, 121-2 wiring layer 131, 132, 133 Via layers 141, 142 Resist layer C, C1, C2 Cavity part c1, c2, c3 cavities r Recessed part 210 Electronic Components 221, 222, 223, 224 Electrically connected metals 230 Passive Components 250 Molding material
Claims
1. A first insulating layer; a cavity portion including a first cavity penetrating a portion of the first insulating layer in a thickness direction from an upper surface of the first insulating layer, and a second cavity penetrating another portion of the first insulating layer in a thickness direction from the first cavity; a first wiring layer disposed on an upper side of the first insulating layer; a second wiring layer disposed below the first insulating layer; a third wiring layer at least partially embedded in the first insulating layer and disposed at a level between the first and second wiring layers in a thickness direction; the third wiring layer includes a plurality of pads, each of which has at least a portion of its upper surface exposed from the first insulating layer through the cavity portion; The first cavity has a greater cross-sectional width than the second cavity.
2. The printed circuit board according to claim 1 , wherein the first cavity has a greater depth in a thickness direction than the second cavity.
3. 2. The printed circuit board according to claim 1, wherein an upper surface of each of the pads is recessed downward from the bottom surface of the cavity so as to have a step with the bottom surface of the cavity.
4. The printed circuit board according to claim 1 , wherein at least two of the plurality of pads have different shapes in a plane.
5. the first wiring layer includes a 1-1 wiring layer embedded in the upper side of the first insulating layer, and a 1-2 wiring layer disposed on an upper surface of the first insulating layer; The first and second wiring layers are connected to each other, 2. The printed circuit board according to claim 1, wherein the first-2 wiring layer has a width greater than that of the first-1 wiring layer in cross section.
6. 6. The printed circuit board according to claim 5, wherein the depth of the first cavity is the same as the thickness of the 1-1 wiring layer.
7. a first resist layer disposed on an upper surface of the first insulating layer and having a first opening exposing at least a portion of the first-2 wiring layer; the cavity portion further includes a third cavity that penetrates between the upper surface and the lower surface of the first resist layer in a thickness direction and is connected to the first cavity, 6. The printed circuit board of claim 5, wherein the third cavity has a greater cross-sectional width than the first cavity.
8. 8. The printed circuit board of claim 7, further comprising a post portion disposed on an upper surface of the first resist layer, filling at least a portion of the first opening, and connected to at least a portion of the exposed portion of the first-2 wiring layer.
9. a second insulating layer disposed on a lower surface of the first insulating layer; a fourth wiring layer disposed on a lower surface of the second insulating layer; a first via layer penetrating the first insulating layer and connecting at least a portion of the first and second wiring layers to each other; a second via layer penetrating the first insulating layer and connecting at least a portion of the second and third wiring layers to each other; a third via layer penetrating the second insulating layer and connecting at least a portion of the second and fourth wiring layers to each other, The printed circuit board according to claim 1 , wherein the first via layer has a cross-sectional thickness greater than that of the second via layer.
10. 10. The printed circuit board according to claim 9, wherein each of the first to third via layers has a tapered shape in which the width of the lower end is wider than the width of the upper end in cross section.
11. 10. The printed circuit board according to claim 9, further comprising a second resist layer disposed on a lower surface of the second insulating layer and having a second opening exposing at least a portion of the fourth wiring layer.
12. A first insulating layer; a first cavity portion including a first cavity penetrating a portion of the first insulating layer in a thickness direction from an upper surface of the first insulating layer, and a second cavity penetrating another portion of the first insulating layer in a thickness direction from the first cavity; a first wiring layer disposed on an upper side of the first insulating layer; a second wiring layer disposed below the first insulating layer; a third wiring layer at least partially embedded in the first insulating layer and disposed at a level between the first and second wiring layers in a thickness direction; the third wiring layer includes a plurality of pads, each of which has at least a portion of its upper surface exposed from the first insulating layer through the first cavity portion; The printed circuit board according to claim 1, wherein the first cavity has a larger area in a plane than the second cavity.
13. a first resist layer disposed on the first insulating layer and having a first opening exposing at least a portion of the first wiring layer; the cavity portion further includes a third cavity that penetrates between the upper surface and the lower surface of the first resist layer in a thickness direction and is connected to the first cavity, The printed circuit board according to claim 12 , wherein the third cavity has a larger area on a plane than the first cavity.
14. A second insulating layer disposed below the first insulating layer; a fourth wiring layer disposed below the second insulating layer; a first via layer penetrating the first insulating layer and connecting at least a portion of the first and second wiring layers to each other; a second via layer penetrating the first insulating layer and connecting at least a portion of the second and third wiring layers to each other; a third via layer penetrating the second insulating layer and connecting at least a portion of the second and fourth wiring layers to each other; 14. The printed circuit board according to claim 13, further comprising: a second resist layer disposed under the second insulating layer and having a second opening exposing at least a portion of the fourth wiring layer.
15. The printed circuit board of claim 12, further comprising an electronic component disposed on the cavity portion and connected to the pads via a plurality of first electrical connection metals.
16. a wiring substrate including a second cavity portion disposed on an upper surface of the first insulating layer, connected to the first wiring layer via a plurality of second electrically connecting metals, and at least partially overlapping the first cavity portion in a thickness direction; 16. The printed circuit board according to claim 15, wherein the electronic component is disposed between the first insulating layer and the wiring board, and at least a portion of the electronic component and at least another portion of the electronic component are disposed within the first and second cavity portions, respectively.
Citation Information
Patent Citations
Printed circuit board and electronic device package including the same
JP2019087723A