Manufacturing method of heat dissipation substrate for power semiconductor module with unique code, and manufacturing method of power semiconductor module including heat dissipation substrate with unique code

Abstract

To meet thickness specifications of a final heat dissipation substrate in a situation where neither the thickness of a ceramic substrate nor the thickness of a metal plate is constant.SOLUTION: A power converter includes: a power semiconductor module that includes a ceramic substrate for a heat dissipation substrate, a heat dissipation substrate for a power semiconductor module, and a power semiconductor module including a heat dissipation substrate, which each have a unique code; and a power semiconductor module with a unique code. A method for manufacturing a heat dissipation substrate for a power semiconductor can include: a step of loading a ceramic substrate including an active area of the ceramic substrate and a dummy area of the ceramic substrate disposed outside the active area; and a step of marking a unique code on the dummy area of the ceramic substrate. The method can further include: a step of cleaning the ceramic substrate; and a step of measuring a thickness of the cleaned ceramic substrate. The unique code is stored on a prescribed central server, and the unique code may comprise thickness information of the ceramic substrate.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The embodiments relate to a ceramic substrate for a heat dissipation substrate, a heat dissipation substrate for a power semiconductor module, a power semiconductor module including the same, a power conversion device including the same, and a method for manufacturing the same.

[0002] Specifically, the embodiments relate to a ceramic substrate for a heat dissipation substrate having a unique code, a heat dissipation substrate for a power semiconductor module having a unique code, a power semiconductor module including the heat dissipation substrate having a unique code, a power conversion device including a power semiconductor module having a unique code, and methods for manufacturing the same. [Background technology]

[0003] A power conversion module is a device that performs power conversion (AC → DC, DC → AC), power transformation (step-down, step-up), power distribution, or power control. It is a core component that improves energy efficiency during the power transmission and control process and controls voltage changes to provide system stability and reliability. It is also called a power module or power system.

[0004] The power conversion module includes various components such as a power semiconductor element, a heat dissipation substrate, a base plate, molding silicon, a case and cover, and a terminal.

[0005] Recently, electric or hydrogen-based eco-friendly vehicles have been gaining attention as an alternative to fossil fuel-based internal combustion engine vehicles, and many power semiconductor elements are used in these eco-friendly vehicles. Eco-friendly vehicles include hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), electric vehicles (EVs), fuel cell electric vehicles (PCEVs), etc.

[0006] In addition to eco-friendly cars, power semiconductors are also used in a variety of electric and electronic devices, such as electric car chargers, energy storage devices, power supply devices, and trains.

[0007] Conventionally, silicon (Si) power semiconductor elements have been widely used, but as Si power semiconductors have reached their physical limits, active research is being conducted into WBG (Wide Bandgap) power semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) as alternatives.

[0008] WBG power semiconductor elements have about three times the band gap energy of Si power semiconductor elements, about ten times higher dielectric breakdown field than Si power semiconductor elements, and about three times higher thermal conductivity than Si power semiconductor elements. These excellent characteristics allow them to operate in high temperature and high voltage environments, and they have the advantages of high switching speed and low switching loss.

[0009] For example, conventional Si-based power semiconductor modules used for power conversion (DC⇔AC), motor drive switching, control, etc. in electric vehicles, hybrid electric vehicles, etc. operate in a temperature environment of about 150°C. However, due to recent demands for increased switching performance and power density, active research is being conducted on wide bandgap (WBG)-based power semiconductor elements such as SiC or GaN that can operate at operating temperatures of about 300°C or higher, for example, about 300 to 700°C.

[0010] Meanwhile, heat generated in the power semiconductor generates thermo-mechanical stress in each part of the power semiconductor module, and thermal fatigue of the junctions reduces the lifespan of the junctions and the power semiconductor elements. Therefore, it is very important to design the reliability of the power semiconductor module to properly dissipate the heat generated in the power semiconductor elements through the heat dissipation board and maintain the junction temperature of the power semiconductor elements below an appropriate temperature.

[0011] Meanwhile, a heat dissipation substrate for a power semiconductor not only transfers heat generated during the operation of the power semiconductor device to the outside, but also has an important function of electrically connecting the power semiconductor device by forming a wiring pattern on one side of the heat dissipation substrate.

[0012] Conventionally, heat dissipation substrates for power semiconductors can be classified into DBC (direct bonded copper) method and AMB (active metal brazing) method depending on the bonding method. The DBC method is a method in which an oxide film is formed on the copper (Cu) layer and then directly bonded to the ceramic. The AMB method is a method in which a paste containing metal particles with a relatively low melting point is placed between the base metal and ceramic as an intermediate material and then brazed.

[0013] Meanwhile, currently, in the field of heat dissipation substrates, the thickness of ceramic substrates supplied is not uniform, and the thickness of metal plates such as copper plates is also not uniform. In this situation, the final heat dissipation substrate needs to meet strict specification standards for heat dissipation substrates, but there are many difficulties in producing heat dissipation substrates that can meet strict thickness specifications.

[0014] Furthermore, in the conventional heat dissipation board industry, the reality is that overall production information, quality information, and history, such as thickness information of the ceramic substrate, inspection information, thickness information of the copper plate, surface information, and interface information after the bonding process, are not accurately coordinated and managed for each "individual heat dissipation board."

[0015] On the other hand, particularly in the case of a ceramic substrate, which is an internal technology to which the present invention is applied, in which a copper plate and hot press process are performed after metal sputtering, even if a predetermined code is marked on the ceramic substrate, the code is blocked by the sputtering process and the subsequent hot press process, so it is impossible to attempt to mark a separate code for each "individual heat dissipation substrate."

[0016] Meanwhile, the internal technology relied on manual labor for the lamination process of ceramic substrates and metal plates. However, when the lamination process is done manually, it is difficult to match the thickness of each ceramic substrate and metal plate, and even controlling the placement of metal plates on the upper and lower sides of the ceramic substrate is not easy.

[0017] In particular, in the internal technology, the stacked set of the heat dissipation board includes a ceramic substrate and metal plates arranged above and below it, and in order to achieve a high degree of stacking, approaching tens or even hundreds of stacked sets, the alignment of the ceramic substrate and the metal plate has been studied as an extremely difficult technical challenge. Summary of the Invention [Problem to be solved by the invention]

[0018] One of the technical challenges of the embodiment is to solve the problem that it is difficult to meet the strict thickness specifications of the final heat dissipation substrate when the thickness of the ceramic substrate, which is a technical challenge, is not constant and the thickness of the metal plate, which is a technical challenge, is also not constant.

[0019] Moreover, one of the technical challenges of the embodiment is to accurately match overall production information, quality information and history, such as thickness information of the ceramic substrate, inspection information, thickness information of the copper plate, surface information, and bonding interface information after the bonding process, for each "individual heat dissipation substrate."

[0020] The technical problems of the embodiments are not limited to those described in this section, but include those that can be understood from the description of the invention. [Means for solving the problem]

[0021] The manufacturing method of the heat dissipation substrate for power semiconductors according to the embodiment may include the steps of loading a ceramic substrate including an effective area AA of the ceramic substrate and a dummy area DA of the ceramic substrate arranged on the periphery of the effective area AA, and marking a unique code UC on the dummy area DA of the ceramic substrate.

[0022] Additionally, the embodiment may further include cleaning the ceramic substrate and measuring a thickness of the cleaned ceramic substrate.

[0023] The unique code may be stored in a predetermined central server, and may include thickness information of the ceramic substrate.

[0024] The method may further include a step of marking a unique ID in a dummy area DA of the ceramic substrate.

[0025] The unique ID may include a combination of numbers, a combination of letters, or a combination of numbers and letters.

[0026] The unique code UC may have a rectangular or square shape and may be arranged such that the vertices of the unique code and the vertices of the effective area face each other.

[0027] The unique code UC may have a rectangular or square shape, and the minimum distance between the unique code and the effective area AA of the ceramic substrate may be the distance between a vertex of the unique code and a vertex of the effective area.

[0028] The unique code UC may have a rectangular or square shape and may be arranged such that the corners of the unique code UC face the vertices of the effective area closest to the unique code.

[0029] Also, the embodiment may further include the steps of: classifying the ceramic substrates into a plurality of groups according to the measured thickness; and loading the classified ceramic substrates into different substrate magazines, respectively.

[0030] Each of the substrate magazines may be marked with a predetermined unique ID or code.

[0031] Also, the embodiment may include the steps of mounting the loaded ceramic substrate in a predetermined sputtering device, and performing sputtering on the mounted ceramic substrate.

[0032] In the sputtering step, the unique code does not have to be sputtered.

[0033] Further, the embodiment may include the steps of stacking first and second metal plates on the lower and upper sides, respectively, of the sputtered ceramic substrate, performing a hot pressing process on the stacked ceramic substrates and the first and second metal plates, and removing a portion of the second metal plate to open the unique code.

[0034] Additionally, the embodiment may include forming a wiring pattern by etching a second metal plate of the ceramic substrate, and marking a second unique code on the first metal plate.

[0035] The first metal plate and the second metal plate may have different thicknesses.

[0036] Also, a method for manufacturing a power semiconductor module according to an embodiment may include the steps of arranging a power semiconductor element, and bonding a first heat dissipation substrate and a second heat dissipation substrate to the upper and lower sides, respectively, of the power semiconductor element.

[0037] The method for manufacturing the first heat dissipation substrate or the second heat dissipation substrate may include any one of the methods for manufacturing a heat dissipation substrate for power semiconductors.

[0038] The ceramic substrate for heat dissipation substrate according to the embodiment may include an effective area AA of the ceramic substrate, a dummy area DA of the ceramic substrate arranged on the outer periphery of the effective area AA, and a unique code UC marked on the dummy area DA of the ceramic substrate.

[0039] The unique code UC may include at least one of a digital matrix code (DMC), a QR code, and a barcode.

[0040] The embodiment may further include a unique ID marked on the dummy area DA of the ceramic substrate.

[0041] The unique ID may include a combination of numbers, a combination of letters, or a combination of numbers and letters.

[0042] The unique code UC may include a rectangular or square shape.

[0043] The apex of the unique code and the apex of the effective area may be disposed so as to face each other.

[0044] The minimum distance between the unique code and the effective area AA of the ceramic substrate may be the distance between the apex of the unique code and the apex of the effective area.

[0045] The corners of the unique code UC may be arranged to face the vertices of the effective area closest to the unique code.

[0046] A heat dissipation substrate for a power semiconductor module according to an embodiment may include a first metal plate, a ceramic substrate bonded onto the first metal plate, and a second metal plate bonded onto the ceramic substrate.

[0047] The first metal plate or the second metal plate may include a unique code marked on it.

[0048] The second metal plate is electrically connected to a predetermined power semiconductor element.

[0049] A unique code is provided on the first metal plate.

[0050] The first metal plate and the second metal plate may have different thicknesses.

[0051] Also, a power semiconductor module according to the embodiment can include a first heat dissipation substrate, a power semiconductor element disposed on the first heat dissipation substrate, and a second heat dissipation substrate disposed on the power semiconductor element.

[0052] The first heat dissipation substrate or the second heat dissipation substrate may include any one of the heat dissipation substrates for a power semiconductor module.

[0053] The second metal plate is electrically connected to the power semiconductor device, and a unique code is provided on the first metal plate.

[0054] The first metal plate and the second metal plate may have different thicknesses.

[0055] Moreover, a power conversion device according to the embodiment may include any one of the power semiconductor modules. Effect of the Invention

[0056] According to the embodiment, there is a technical effect that, for each "individual heat dissipation substrate", overall production information, quality information and history in the manufacture of the heat dissipation substrate, such as thickness information of the ceramic substrate, inspection information, thickness information of the copper plate, surface information, and bonding interface information after the bonding process, can be accurately aligned, updated and managed.

[0057] For example, according to an embodiment, by marking unique information on a dummy area of ​​an initial ceramic substrate during the manufacturing process of a heat dissipation substrate and storing and managing the unique information in a central server, a special technical effect is achieved in that the overall production information, quality information and history of the manufacturing process of the heat dissipation substrate can be accurately matched, updated and managed for each of the "individual ceramic substrates," "individual metal plates" and "individual heat dissipation substrates."

[0058] In addition, according to the embodiment, even if the position or arrangement of the ceramic substrate changes due to an operator's error during the manufacturing process, the application of the embodiment has a technical effect of enabling the history of all processes, such as cleaning steps, hot pressing, etc., of each ceramic substrate to be perfectly updated and managed from the initial receipt of the ceramic substrate by checking unique information of each ceramic substrate.

[0059] In addition, according to the embodiment, the unique information that can confirm the information on the history of all processes from the initial storage stage of the product is perfectly integrated with the final product and delivered to the customer, and the customer can accurately understand and use the quality and production history of the product based on the unique information, and when necessary, requests for A / S, etc. can be made quickly and accurately.

[0060] On the other hand, simply marking product information on the heat dissipation substrate of the final product does not allow for perfect coordination and management of film formation information such as thickness information of the ceramic substrate, thickness information of the metal plate, and bonding interface information that constitute the product.

[0061] Further, according to the embodiment, the technical effect is achieved in that the thickness distribution can be minimized by classifying the individual ceramic substrates and metal plates by thickness and matching each thickness grade.

[0062] For example, according to the embodiment, ceramic substrates are classified and loaded into first to third substrate magazines CM1, CM2, and CM3 according to thickness, and thickness and classification loading information for each ceramic substrate and each substrate magazine is stored and managed by the upper server. Also, information about which substrate magazine each ceramic substrate is loaded into is accurately updated and managed in the unique information UC of each ceramic substrate SS.

[0063] As a result, in the lamination process carried out after the sputtering process, the unique IDs, etc. of the first to third substrate magazines CM1, CM2, and CM3 are read, thereby aligning the lamination process and bonding process with the metal plate for each thickness, thereby achieving the technical effect of optimizing the thickness quality of the heat dissipation substrate.

[0064] In addition, the embodiments precisely measure and manage the thicknesses of ceramic substrates and copper plates, which are delivered in various thicknesses, and thus provide the technical effect of matching each product based on unique information and minimizing thickness distribution based on this unique information.

[0065] The technical effects of the embodiments are not limited to those described in this section, but include those that can be understood from the description of the invention. [Brief description of the drawings]

[0066] [Figure 1] FIG. 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for a power semiconductor according to an embodiment. [Diagram 2] FIG. 2 is a flow chart of a manufacturing process of a heat dissipation substrate for a power semiconductor according to an embodiment. [Diagram 3] FIG. 3 is a diagram relating to a pretreatment process of a ceramic substrate. [Figure 4] FIG. 4 is a diagram relating to a pretreatment process of a ceramic substrate. [Diagram 5]FIG. 5 is a diagram relating to a pretreatment process of a ceramic substrate. [Figure 6] FIG. 6 is a diagram relating to a pretreatment process of a ceramic substrate. [Figure 7a] FIG. 7a is a diagram relating to the pretreatment process of the ceramic substrate. [Figure 7b] FIG. 7a is a diagram relating to the pretreatment process of the ceramic substrate. [Figure 8] FIG. 8 is a diagram relating to a pretreatment process of a ceramic substrate. [Figure 9] FIG. 9 is a diagram relating to a pretreatment process of a ceramic substrate. [Figure 10] FIG. 10 is a diagram showing a sputtering process for a ceramic substrate according to an embodiment of the present invention. [Figure 11] FIG. 11 is a diagram showing a sputtering process for a ceramic substrate according to an embodiment of the present invention. [Figure 12a] FIG. 12a is a diagram showing a sputtering process for a ceramic substrate according to an embodiment of the present invention. [Figure 12b] FIG. 12b is a diagram showing a sputtering process for a ceramic substrate according to the embodiment. [Figure 13] FIG. 13 is a diagram showing a sputtering process for a ceramic substrate according to an embodiment of the present invention. [Figure 14] FIG. 14 is a diagram of a metal magazine MM in which metal plates classified by thickness are loaded. [Figure 15] FIG. 15 is a conceptual diagram of a stack set stacked in a stack unit. [Figure 16] FIG. 16 is a diagram relating to the hot press joining process of the embodiment. [Figure 17] FIG. 17 is a diagram relating to the hot press joining process of the embodiment. [Figure 18] FIG. 18 is a view illustrating the heat dissipation substrate after the inspection process and the etching process. [Figure 19] FIG. 19 is a diagram relating to a laser scribing process, an inspection process, and a cutting process for a heat dissipation substrate. [Figure 20] FIG. 20 is a diagram relating to a laser scribing process, an inspection process, and a cutting process for a heat dissipation substrate. [Figure 21] FIG. 21 is a diagram relating to a laser scribing process, an inspection process, and a cutting process for a heat dissipation substrate. [Figure 22] FIG. 22 is a circuit diagram of a power conversion device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0067] Hereinafter, the invention according to the embodiment for solving the above problems will be described in more detail with reference to the drawings.

[0068] The suffixes "module" and "section" for components used in the following description are merely given to facilitate the writing of the specification and do not impart any particular significance or role to them. Therefore, the terms "module" and "section" can be used interchangeably.

[0069] Although terms including ordinal numbers such as first, second, etc. may be used to describe various components, the components are not limited by the terms. The terms are used only to distinguish one component from another component.

[0070] A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0071] In this application, the terms "including," "having," or "comprising" are intended to specify the presence of any feature, number, step, operation, component, part, or combination thereof set forth in the specification, but are not to be understood as precluding the presence or additional possibility of one or more other features, number, steps, operations, components, parts, or combinations thereof.

[0072] In the embodiments, the power semiconductor module and the heat dissipation substrate for power semiconductors can be used in inverters and converters for automobiles, computers, home appliances, solar power, smart grids, etc. In addition, the power semiconductor module and the heat dissipation substrate for power semiconductors according to the embodiments can be applied to various electric and electronic devices such as electric vehicle chargers, power supply devices, and railways in addition to eco-friendly automobiles.

[0073] In an embodiment, the power semiconductor device may include one power semiconductor module or multiple power semiconductor modules, and the power semiconductor module may include multiple power semiconductor elements.

[0074] In the following embodiments, the power semiconductor device is described as an inverter for an automobile for driving a motor, but the power semiconductor device of the embodiments can be applied to inverters, converters, etc. in the various technical fields mentioned above. Here, the automobile includes a hybrid electric vehicle (HEV), a plug-in hybrid electric vehicle (PHEV), an electric vehicle (EV), a fuel cell electric vehicle (PCEV), etc. In the following description of the embodiments, the switching element and the power semiconductor element may be used interchangeably.

[0075] <Power semiconductor module including heat dissipation substrate> 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for a power semiconductor according to an embodiment. Referring to FIG. 1, the power semiconductor module 500 according to the embodiment may include a first heat dissipation substrate 410, a second heat dissipation substrate 420, a power semiconductor device 100, a first lead frame 310, and a second lead frame 320, and is packaged by a mold 201. The mold 201 may include, but is not limited to, EMC (Epoxy Molding Compound). The power semiconductor device 100 may include a first power semiconductor device 100a and a second power semiconductor device 100b.

[0076] The first heat dissipation substrate 410 and the second heat dissipation substrate 420 may include a first metal plate MP1, a ceramic substrate SS, and a second metal plate MP2.

[0077] One side of each of the first lead frame 310 and the second lead frame 320 is electrically connected to the power semiconductor device 100, and the other side of each is connected to an external connection terminal. The external connection terminal may include an input power source, a motor, an inverter controller, etc.

[0078] For example, the first lead frame 310 can include a No. 1-1 lead frame 310a and a No. 1-2 lead frame 310b.

[0079] Additionally, the front second lead frame 320 may include a 2-1 lead frame 320a and a 2-2 lead frame 320b.

[0080] <Manufacturing process of heat dissipation substrates for power semiconductors> FIG. 2 is a schematic flow chart of a manufacturing process of a heat dissipation substrate for power semiconductors according to an embodiment.

[0081] The manufacturing process of the heat dissipation substrate for power semiconductors according to the embodiment can broadly include: (1) a pretreatment process for the ceramic substrate; (2) a sputtering process; (3) a pretreatment process for the metal plate; (4) a lamination process for the ceramic substrate and the metal plate; (5) a hot press process for the ceramic substrate and the metal plate; (6) an etching process for the heat dissipation substrate; and (7) an inspection and cutting process for the heat dissipation substrate.

[0082] The entire manufacturing process of the heat dissipation substrate for power semiconductors according to the embodiment is controlled by a control unit (not shown) of a central server, and the central server may include a data storage unit (not shown).

[0083] Hereinafter, the main manufacturing process of the heat dissipation board for power semiconductors according to the embodiment will be described with reference to the drawings.

[0084] (Pre-treatment process for ceramic substrates) Hereinafter, the pretreatment process of the ceramic substrate will be described with reference to FIGS.

[0085] In this embodiment, a "pre-treatment process for the ceramic substrate" is performed in a substrate cleaning device (not shown) before the "lamination process" of the ceramic substrate and the metal plate.

[0086] The pretreatment process of the ceramic substrate may include (1) a step of loading the ceramic substrate, (2) a step of marking the unique code UC, (3) a step of cleaning the ceramic substrate, (4) a step of measuring the thickness of the ceramic substrate, and (5) a step of loading the ceramic substrate into a magazine classified by thickness.

[0087] (1) Ceramic substrate loading step First, a predetermined ceramic substrate SS is prepared as shown in Fig. 3 and loaded into a ceramic cleaning device (not shown). The ceramic substrate SS may be made of, but is not limited to, AlN, Si3N4, or Al2O3. The ceramic substrate SS may have an unevenness R on its surface, but is not limited to this.

[0088] (2) Unique code UC marking process In the conventional heat dissipation board industry, it was difficult to accurately match the overall production history and quality history, such as thickness information of the ceramic substrate, thickness information of the copper plate, and product information after the bonding process, for each heat dissipation board.

[0089] In particular, when metal sputtering is performed on the ceramic substrate to which the present invention is applied, followed by copper plating and hot pressing processes, even if a code is marked on the ceramic substrate, the code is blocked by the sputtering process and the subsequent hot pressing process, so that it is impossible to attempt to mark a separate code on each of the "individual heat dissipation substrates."

[0090] 4, a unique code UC is marked on the ceramic substrate SS loaded into the substrate cleaning device. After that, the unique code UC is read and transmitted to and stored in the data storage unit of the server via wired or wireless communication, and detailed information on the "individual heat dissipation substrate" including the "individual ceramic substrate" in the subsequent processes is accurately updated and managed.

[0091] 4, the ceramic substrate SS may include an effective area AA and a dummy area DA. The outermost edge of the effective area AA is a boundary B between the effective area AA and the dummy area DA.

[0092] The effective area AA is an area that will later become a final heat dissipation substrate product, and the dummy area DA is an area that will be removed. The unique code UC may be marked in the dummy area DA of the ceramic substrate SS.

[0093] The unique code UC may include, but is not limited to, a DMC (Digital Matrix Code), a QR code, a barcode, etc. For example, the unique code UC may include a unique code marked or labeled by a unique code technology that may appear due to technological development after the filing of the present invention.

[0094] Also, the unique code UC may be marked by, but is not limited to, laser marking (LM) technology.

[0095] FIG. 5 is a photograph of a ceramic substrate SS on which a unique code UC is marked in a dummy area DA according to an embodiment.

[0096] In the embodiment, the unique code UC is marked in a dummy area DA that is removed by scribing the ceramic substrate SS, and may be spaced a predetermined distance from the effective area AA.

[0097] In an embodiment, in addition to the unique code UC, a unique ID may also be marked in the dummy area DA of the ceramic substrate SS. The unique ID may include a combination of numbers or letters, and may include, but is not limited to, a serial number that can be recognized by an operator or a video device.

[0098] According to the embodiment, after marking each input ceramic substrate SS with a unique code UC and a unique ID, the data can be transmitted to and managed by a data storage unit of a higher-level server, and detailed information on each "individual ceramic substrate" and each "individual heat dissipation substrate" including the ceramic substrate can be accurately updated and managed, and post-event management between multiple processes can be performed. This has a special technical effect.

[0099] On the other hand, FIG. 6 is a photograph showing a technical problem that occurs when marking the unique code UCr on the ceramic substrate SSr of the comparative example.

[0100] There has been no concern or attempt in the heatspreader industry regarding process traceability of the heatspreader manufacturing process for individual ceramic substrates.

[0101] Meanwhile, in the field of heat dissipation substrates, the inventors of the present application, in the course of new research into managing the process history of the manufacturing process for "individual ceramic substrates," discovered a unique problem in that when marking the unique code UCr of the comparative example on a ceramic substrate, soot HR is generated and spreads beyond the dummy area DA into the effective area AA.

[0102] Such soot HR can cause sputtering defects in the subsequent sputtering process, which directly affects the quality of the heat dissipation substrate itself, and can even cause bonding defects in the hot press process with the metal plate, so it was studied as a unique technical issue.

[0103] Therefore, marking a specific unique code on the ceramic substrate itself is incredibly difficult, and there are considerable technical challenges to overcome in order to realize this.

[0104] Nevertheless, the inventors of the present application have independently conducted research to the point where soot does not affect the active area when marking the unique code UC, and have been able to precisely mark the unique code UC in the dummy area DA without soot, as shown in FIG. 5.

[0105] In addition, in the present invention, if a unique code is marked on the ceramic substrate when the copper plate and hot press processes are performed after sputtering, the unique code is blocked by the sputtering and hot press processes, so attempts to mark a unique code on each ceramic substrate are technically difficult.

[0106] Next, FIG. 7a is a marking diagram of a first unique code UC1 according to a first embodiment, and FIG. 7b is a marking diagram of a second unique code UC2 according to a second embodiment.

[0107] In an embodiment, the unique code may include a square or rectangular pattern and may include four corners and four vertices.

[0108] 7a, the apex AE of the effective area of ​​the ceramic substrate closest to the first unique code UC1 may be spaced apart by a first distance D1. In this case, the apex CE1 of the first unique code and the apex AE of the effective area may be disposed to face each other.

[0109] According to the embodiment, by marking the ceramic substrate SS with the unique code UC, a special technical effect is achieved in that the production history and product information of each individual ceramic substrate product can be tracked.

[0110] For example, according to the embodiment, after marking each input ceramic substrate SS with a unique code UC and a unique ID, the entire input ceramic substrate SS can be transmitted to and managed in a data storage unit of a higher-level server, thereby achieving special technical effects in that detailed information on "individual ceramic substrates" and "individual heat dissipation substrates" including the same can be accurately updated and managed, and post-event management between multiple processes can be performed.

[0111] However, referring to FIG. 7b, through further research by the inventors of the present application, the apex CE2 of the second unique code and the apex AE of the active area are positioned far apart, thereby realizing the technical effect of significantly reducing the possibility of soot spreading to the effective area AA even if soot is generated.

[0112] For example, by arranging the side angle of the second unique code UC2 and the apex AE of the effective area so that they face each other, a technical effect is achieved in that even if soot is generated, the possibility of soot spreading into the effective area AA is significantly reduced.

[0113] (3) A process for cleaning the ceramic substrate, and (4) A process for measuring the thickness. Next, as shown in Fig. 8, after the ceramic substrate SS is subjected to a cleaning process using a cleaning device CL, the thickness of the ceramic substrate SS is measured by a thickness measuring device TM. The thickness of the ceramic substrate SS may be, but is not limited to, 200 µm to 1,000 µm. Preferably, the thickness of the ceramic substrate SS may be, but is not limited to, 300 µm to 800 µm.

[0114] The ceramic substrates SS can be classified into a number of groups according to their thickness, for example, first to third groups according to their thickness, but are not limited thereto.

[0115] (5) Loading process for different ceramic substrate thicknesses FIG. 9 is a diagram of a substrate magazine CM into which ceramic substrates sorted by thickness after cleaning are loaded according to an embodiment.

[0116] For example, the ceramic substrates can be classified into first to third groups of ceramic substrates SS1, SS2, and SS3 according to the first to third thicknesses T1, T2, and T3.

[0117] For example, the ceramic substrates SS1 of the first group may be thicker than the ceramic substrates SS2 of the second group and the ceramic substrates SS3 of the third group, but this is not intended to be limiting.

[0118] The first to third groups of ceramic substrates SS1, SS2, and SS3 are loaded into first to third substrate magazines CM1, CM2, and CM3, respectively, and then transferred to a predetermined stacking device. The first to third groups of ceramic substrates may also be referred to as first to third lots.

[0119] In the embodiment, each of the first to third substrate magazines CM1, CM2, and CM3 may also be marked with a predetermined unique ID or unique code.

[0120] According to the embodiment, the ceramic substrates are classified and loaded into the first to third substrate magazines CM1, CM2, and CM3 according to their thickness, and the thickness and classification loading information for each "ceramic substrate" and each "substrate magazine" is stored and managed in the upper server.

[0121] In addition, the unique information UC of each ceramic substrate SS is accurately updated and managed with information on which substrate magazine the substrate is loaded in.

[0122] As a result, in the stacking process which is performed later after the sputtering process, the unique IDs etc. of the first to third substrate magazines CM1, CM2, CM3 can be read, and the thickness quality of the heat dissipation substrate can be optimized by aligning the stacking process and bonding process to the metal plate for each thickness.

[0123] According to the embodiment, the individual ceramic substrates and metal plates are classified by thickness and matched to each thickness grade, thereby achieving a technical effect of minimizing thickness distribution.

[0124] Currently, in the field of heat dissipation substrates, the delivered thickness of ceramic substrates is not uniform, and the delivered thickness of metal plates, such as copper plates, is also not uniform.

[0125] In this situation, the final heat dissipation board must meet strict specifications for the delivery of the heat dissipation board, but there are many difficulties in producing a heat dissipation board that can meet the strict thickness specifications.

[0126] Therefore, the inventors of the present invention have invented a lamination system for ceramic substrates and copper substrates that can thoroughly measure and manage the thicknesses of ceramic substrates and copper plates, which are delivered in various thicknesses, and perfectly manage such thickness information for each product by matching it with unique information UC, and minimize thickness distribution based on such unique information UC.

[0127] (Sputtering process) As mentioned above, the ceramic substrates sorted according to thickness are transported to the sputtering device while being loaded into the first, second and third substrate magazines CM1, CM2 and CM3. After each individual ceramic substrate is unloaded, it is mounted in the sputtering device and subjected to the sputtering process.

[0128] Hereinafter, the "sputtering process for a ceramic substrate" of the embodiment will be described with reference to Figs.

[0129] Referring to FIG. 10, a bonding metal layer 411 having a first thickness is formed on one surface of a ceramic substrate SS by sputtering.

[0130] At this time, sputtering can be prevented from occurring in the area of ​​the unique code UC and the unique ID. For example, in the sputtering process, the area of ​​the unique code UC and the unique ID can be controlled so that sputtering does not occur in the area of ​​the unique code UC and the unique ID by being shielded and protected by the sprayed part PS or the like.

[0131] For example, referring to FIG. 11, a ceramic substrate SS is mounted on an anode electrode plate of a given PVD apparatus 700, and a bonding metal layer 411 including Ti or TiW is formed to a first thickness of about 2000 Å to 4000 Å in an inert atmosphere such as Ar gas.

[0132] For example, the bonding metal layer 411 may be formed to a thickness of about 2500 Å to 3500 Å, but is not limited to this.

[0133] 12a, a diffusion metal layer 412 is formed by sputtering on the bonding metal layer 411. The diffusion metal layer 412 is deposited by sputtering to a second thickness that is thinner than the first thickness of the bonding metal layer 411.

[0134] For example, the second thickness of the diffusion metal layer 412 may be in the range of ¼ to ½ of the first thickness of the bonding metal layer 411 .

[0135] For example, the second thickness of the diffusion metal layer 412 may have a thickness of about 1000 Å to 2000 Å. Preferably, the second thickness of the diffusion metal layer 412 may have a thickness of about 1500 Å to 1900 Å, but is not limited thereto.

[0136] The diffusion metal layer 412 may have a melting point lower than the temperature of a hot pressing process for subsequent bonding. For example, the hot pressing temperature may be in the range of about 900° C. to 1100° C., and the diffusion metal layer 412 may be a material having a melting point lower than 900° C. and excellent diffusion. For example, the diffusion metal layer 412 may be made of one or more of Al, Ag, Au, and Sn, but is not limited thereto.

[0137] According to the embodiment, the diffusion metal layer 412 is formed by sputtering to a second thickness that is thinner than the first thickness of the bonding metal layer 411, thereby achieving a technical effect of preventing the occurrence of microvoids in the subsequent hot press bonding process.

[0138] For example, the metal material of the diffusion metal layer 412 formed thinly by the hot pressing process diffuses into the second metal plate MP2 such as a copper plate, thereby increasing the bonding strength and preventing the occurrence of microvoids.

[0139] 12b, in this embodiment, the diffusion metal regions 412a are formed in the form of islands or dots spaced apart from one another, rather than as a layer, on the bonding metal layer 411. For example, the diffusion metal regions 412a are formed in the form of islands or dots spaced apart from one another, partially filling in the recesses of the surface unevenness of the bonding metal layer 411.

[0140] For example, the diffusion metal regions 412a are formed in the form of islands or dots spaced apart from each other, filling in the concave portions of the surface irregularities of the bonding metal layer 411 having a relatively high energy state or surface area.

[0141] In addition, in the embodiment, sputtering can be performed with the anode electrode plate in Fig. 11 tilted, so that the diffusion metal regions 412a can be controlled to be formed in the form of islands separated from each other while first filling the bottom and side surfaces of the concave portions of the surface unevenness of the bonding metal layer 411.

[0142] The diffusion metal region 412a is formed to a third thickness that is very thin, 1 / 10 to 1 / 4 the thickness of the first thickness of the bonding metal layer 411. For example, the third thickness of the diffusion metal region 412a may have a thickness of about 200 Å to 1000 Å. Preferably, the third thickness of the diffusion metal region 412a may have a thickness of about 500 Å to 900 Å, but is not limited thereto.

[0143] Since the diffusion metal regions 412a are formed on the bonding metal layer 411 in the form of islands or dots spaced apart from each other rather than as a layer, there is a technical effect of more effectively preventing the occurrence of microvoids in the subsequent hot press bonding process.

[0144] For example, the metal material of the diffusion metal region 412a formed in an island or dot shape during the hot pressing process diffuses into the metal plate, thereby increasing the bonding strength and preventing the occurrence of microvoids.

[0145] Next, referring to FIG. 13, the ceramic substrate SS having the diffusion metal layer 412 formed on one surface is turned over, and then the bonding metal layer 411 and the diffusion metal layer 412 can be sequentially formed on the opposite surface by sputtering.

[0146] In the embodiment, after sputtering, the thickness of the bonding metal layer 411 and the diffusion metal layer 412 for each individual ceramic substrate SS is measured, and the thickness data of each unique code UC can be transmitted to a server for update management.

[0147] For example, in the embodiment, the sheet resistance of each ceramic substrate SS can be measured to measure the thickness of the formed bonding metal layer 411 and diffusion metal layer 412, but the present invention is not limited to this.

[0148] After the thicknesses of the bonding metal layer 411 and the diffusion metal layer 412 have been measured, the individual ceramic substrates are transferred to a lamination device where they are reloaded into the first to third substrate magazines CM1, CM2, and CM3, and the thicknesses of the ceramic substrates and the thicknesses of the metal plates can be matched before they are stacked in the lamination device.

[0149] (Pretreatment process for metal plates) FIG. 14 is a diagram of a metal magazine MM into which metal plates sorted by thickness after cleaning are loaded according to an embodiment.

[0150] The pretreatment process of the metal plate is performed separately from the pretreatment process of the ceramic substrate, for example, the pretreatment process of the metal plate may be performed before, after, or simultaneously with the pretreatment process of the ceramic substrate.

[0151] The metal plate may be a metal plate having excellent electrical conductivity and thermal conductivity. For example, the metal plate may be a Cu plate, a Cu alloy plate, etc., but is not limited thereto. The metal plate may also be referred to as a metal substrate.

[0152] The pre-treatment process of the metal plates may include a cleaning process and a thickness measurement process of the metal plates. The metal plates are classified according to their thickness and loaded into a metal magazine.

[0153] For example, a CDA (Clean Dried Air) cleaning process and a particle exhaust process are performed on the metal plate.

[0154] In addition, in the embodiment, after cleaning the metal plate, the thickness of the upper and lower parts of the metal plate can be measured using a displacement sensor, etc. For example, the thickness of the metal plate can be measured at nine points, but is not limited thereto.

[0155] In this case, the embodiment transmits information about the thickness of the metal plate to an upper server, and can accurately update and manage information about each metal plate.

[0156] In addition, the embodiment may include, but is not limited to, a marking procedure of metal specific information (not shown) on the dummy area of ​​the metal plate before the cleaning process.

[0157] In the embodiment, the thickness of the metal plate may be, but is not limited to, 200 μm to 500 μm, and preferably, the thickness of the metal plate may be, but is not limited to, 250 μm to 350 μm.

[0158] The metal plates can be classified into a plurality of groups according to their thickness. For example, the metal plates can be classified into first to third metal plates MP1, MP2, and MP3 according to their thickness, but are not limited thereto. The thicknesses of the first metal plate MP1, the second metal plate MP2, and the third metal plate MP3 can be increased in this order, but are not limited thereto.

[0159] 14, first to third groups of metal plates MP1, MP2, MP3 classified into first to third thicknesses T1, T2, T3 are loaded into first to third metal magazines MM1, MM2, MM3, respectively, and then transferred to a predetermined stacking device. The first to third groups of metal plates can also be called first to third lots.

[0160] In an embodiment, each of the metal magazines MM1, MM2, and MM3 may be marked with a predetermined unique ID or unique code.

[0161] According to the embodiment, metal plates are classified and loaded into first to third metal magazines MM1, MM2, and MM3 according to their thickness, and thickness and classification loading information for each metal plate and metal magazine is stored and managed in an upper server.

[0162] In addition, the unique information of each metal plate, such as which metal magazine it was loaded into, is accurately updated and managed.

[0163] As a result, in the subsequent lamination process, the unique IDs of the metal magazines MM1, MM2, and MM3 can be read and the bonding for each thickness can be matched with the ceramic substrate, thereby optimizing the thickness quality.

[0164] According to the embodiment, a technical effect is achieved in that not only individual ceramic substrates but also metal plates are classified by thickness and matched to each thickness grade, thereby minimizing thickness distribution.

[0165] Currently, in the field of heat dissipation boards, not only the delivered thickness of ceramic boards but also the delivered thickness of metal plates, such as copper plates, are not consistent. In this situation, the final heat dissipation board must meet strict specifications for the delivery standard of the heat dissipation board, but it is difficult to produce a heat dissipation board that meets the strict thickness specifications.

[0166] Therefore, the inventors of the present invention have invented a lamination system for ceramic substrates and copper substrates that can minimize thickness distribution based on unique information by carefully measuring and managing the thicknesses of ceramic substrates and copper plates that are delivered in various thicknesses and matching each product based on unique information.

[0167] (Lamination process of ceramic substrate and metal plate) Next, a lamination process of the ceramic substrate and the metal plate is performed.

[0168] In an embodiment, the lamination process of the ceramic substrate and the metal plate may include (1) a carbon spacer loading process, (2) a lower metal plate loading process, (3) a ceramic substrate loading process, (4) an upper metal plate loading process, (5) a carbon spacer loading process, and (6) a graphite loading process.

[0169] 15 is a conceptual diagram of a stack set including a first stack set ST1 and a second stack set ST2 stacked in a stack unit according to an embodiment. The first stack set ST1, which becomes the first heat dissipation substrate 410 (see FIG. 17), may include a first spacer 415a, a second metal plate MP2, a second ceramic substrate SS2, a second metal plate MP2, and a second spacer 415b, which are stacked in sequence. Also, the second stack set ST2, which becomes the second heat dissipation substrate 420 (see FIG. 17), may include a second spacer 415b, a first metal plate MP1, a first ceramic substrate SS1, a third metal plate MP3, and a third spacer 415c, which are stacked in sequence.

[0170] In a non-limiting example, graphite 480 may be laminated after ten lamination sets have been performed.

[0171] According to the embodiment, the laminate set laminated by the automatic alignment lamination system device is clamped with a predetermined carrier clamp, and a predetermined guide transport device is inserted into the lamination carrier, so that the precisely aligned laminate set can be placed into the hot press while maintaining the alignment.

[0172] (Hot press process) Next, the hot press joining process of the embodiment will be described with reference to FIGS.

[0173] 16, a hot press process is performed in a vacuum on the laminate set placed in a hot press device (not shown), to manufacture heat dissipation substrates 410 and 420 as shown in FIG.

[0174] For example, a first stack set ST1 including a second metal plate MP2, a second ceramic substrate SS2, and a second metal plate MP2 is manufactured as a first heat dissipation substrate 410.

[0175] In addition, a second stack set ST2 including the first metal plate MP1, the first ceramic substrate SS1, and the third metal plate MP3 is manufactured as a second heat dissipation substrate 420.

[0176] The temperature of the hot pressing step may be about 900° C. to 1100° C. Preferably, the temperature of the hot pressing step may be about 950° C. to 1000° C., but is not limited thereto.

[0177] The degree of vacuum in the above hot pressing process is 1.0×10 -1 The degree of vacuum may be, but is not limited to, torr or more. The pressure in the hot pressing step may be, but is not limited to, about 10 MPa to about 100 MPa.

[0178] (Heat dissipation board inspection and etching process) FIG. 18 is a view illustrating the heat dissipation substrate after the inspection step and the etching step.

[0179] Referring to FIG. 18, each heat dissipation substrate manufactured by the hot press bonding process is subjected to a cleaning process, an inspection process, and an etching process.

[0180] The first heat dissipation substrate 410 shown in FIG. 18 may have a structure including a first metal plate MP1, a second ceramic substrate SS2, and a second metal plate MP2, but is not limited thereto.

[0181] For example, a cleaning process is performed on the first heat dissipation substrate 410 manufactured by the hot press bonding process. For example, the first heat dissipation substrate 410 is subjected to brush cleaning, water rinsing, and drying processes, but is not limited thereto.

[0182] In the embodiment, ultrasonic testing is performed on the bonding interface of the heat dissipation substrate manufactured by hot pressing.

[0183] For example, according to the embodiment, the first bonding interface of each heat dissipation substrate can be inspected for an interface thickness, the presence or absence of voids, and the presence or absence of cracks using ultrasonic inspection equipment.

[0184] According to the embodiment, after the hot press bonding process, the metal plate of each heat dissipation substrate dummy area can be partially removed to open the unique code UC formed in the dummy area.

[0185] This provides a special technical effect of enabling accurate updating and management of inspection information regarding the interface thickness, the presence or absence of voids, and the presence or absence of cracks at the bonding interface of each heat dissipation substrate after the hot pressing process.

[0186] Next, referring to FIG. 18, an etching process is performed to form a circuit pattern on the heat dissipation board that has been determined to be a non-defective product in the inspection process.

[0187] For example, the wiring pattern can be formed by etching the first heat dissipation substrate 410 that has been subjected to the hot pressing process. For example, the wiring pattern can be formed by partially removing the second metal plate MP2 of the first heat dissipation substrate 410. The bonding metal layer 411 and the bonding layer 413 on the second ceramic substrate SS2 are also removed.

[0188] The embodiment has a special technical effect that the etching information (etchant, etching process conditions, etc.) of each heat dissipation substrate can be accurately updated and managed after the hot pressing process.

[0189] (Inspection and cutting process) Next, a laser scribing process, an inspection process and a cutting process for the heat dissipation substrate will be described with reference to FIGS.

[0190] Referring to FIG. 19, an etching inspection is performed on the heat dissipation substrate after the etching process is completed.

[0191] For the heat dissipation board that passes the etching inspection, a unique code UC is marked on the metal plate. For example, if one heat dissipation board includes nine snap areas, the unique information UC can be marked on the metal plate on which no circuit pattern is formed in each snap area, for example, on each snap area of ​​the first metal plate MP1.

[0192] Marking the unique information UC on each snap area of ​​the first metal plate MP1 may be performed after laser scribing.

[0193] Next, referring to FIG. 20, a laser scribing process and a breaking process are carried out.

[0194] In the embodiment, an inspection process is performed after the laser scribing process and before the breaking process. This inspection process may include a scanning ultrasonic test (SAT) that secondarily inspects voids and cracks at the bonding interface by ultrasonic waves.

[0195] In addition, in the inspection process after the laser scribing process, an automatic appearance inspection process is performed to analyze surface information such as surface roughness, surface pinhole inspection, protrusion inspection, and foreign matter inspection.

[0196] The embodiment provides a special technical effect of being able to accurately update and manage secondary bonding interface inspection information and automatic appearance inspection information for each heat dissipation substrate after the etching process.

[0197] Thereafter, the final non-defective product is cut and separated to produce individual heat dissipation substrates as shown in Fig. 21. The first metal plate MP1 of the first heat dissipation substrate 410 shown in Fig. 21 is marked with a unique code UC as shown in the photograph of Fig. 19 before delivery.

[0198] As a result, according to the embodiment, the unique information that can confirm information regarding the history of all processes from the initial storage stage of the product is perfectly matched with the final product and delivered to the customer, and the customer can also use the unique information to accurately understand and use the quality, production history, etc. of the product, and when necessary, requests for A / S, etc. can be made quickly and accurately.

[0199] On the other hand, simply marking product information on the heat dissipation substrate of the final product does not allow for perfect coordination and management of film formation information such as thickness information of the ceramic substrate, thickness information of the metal plate, and bonding interface information that constitute the product.

[0200] <Power conversion device including heat dissipation substrate> FIG. 22 is a diagram illustrating a circuit of a power conversion device 1000 to which a power semiconductor module according to an embodiment is applied.

[0201] The power conversion device 1000 according to the embodiment can receive DC power from a battery or a fuel cell, convert it into AC power, and supply the AC power to a predetermined load. For example, the power conversion device 1000 according to the embodiment can include an inverter, receive DC power from a battery, convert it into three-phase AC power, and supply it to a motor M, and the motor M can provide power to an electric vehicle, a fuel cell vehicle, etc.

[0202] The power conversion device 1000 according to the embodiment may include a power semiconductor element 100. The power semiconductor element 100 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but is not limited thereto, and may include an IGBT (Insulated Gate Bipolar Transistor).

[0203] For example, the power conversion device 1000 may include a plurality of power semiconductor elements 100a, 100b, 100c, 100d, 100e, and 100f, and may include a plurality of diodes (not shown).

[0204] In the embodiment, a group of power semiconductor elements arranged in series on the high voltage line and low voltage line on the input side may be referred to as an arm. For example, the first and second power semiconductor elements 100a and 100b may form a first arm 12a, the third and fourth power semiconductor elements 100c and 100d may form a second arm 12b, and the fifth and sixth power semiconductor elements 100e and 100f may form a third arm 12c.

[0205] The power semiconductor element 100 of the embodiment may be a silicon carbide (SiC) power semiconductor element, which can operate in a high temperature and high voltage environment and has a high switching speed while having low switching loss. The power semiconductor element 100 of the embodiment can be packaged on the above-mentioned heat dissipation substrate for power semiconductors to configure a power semiconductor module (see FIG. 1).

[0206] According to the embodiment, a technical effect is achieved in that overall production information, quality information and history in the manufacture of heat dissipation substrates, such as thickness information of the ceramic substrate, inspection information, thickness information of the copper plate, surface information, and bonding interface information after the bonding process, can be accurately matched, updated and managed for each "individual heat dissipation substrate."

[0207] In addition, according to the embodiment, even if the position or arrangement of the ceramic substrate changes due to an operator error during the manufacturing process, the application of the embodiment provides a technical effect in that the history of all processes, such as cleaning steps, hot pressing, etc., from the initial receipt of each ceramic substrate can be perfectly updated and managed by checking unique information of each ceramic substrate.

[0208] In addition, according to the embodiment, the unique information that can confirm the information on the history of all processes from the initial storage stage of the product is perfectly integrated with the final product and delivered to the customer, and the customer can accurately understand and use the quality and production history of the product based on the unique information, and when necessary, requests for A / S, etc. can be made quickly and accurately.

[0209] In addition, according to the embodiment, there is a technical effect that the thickness distribution can be minimized by classifying the individual ceramic substrates and metal plates by thickness and matching the thickness grades.

[0210] As a result, in the lamination process performed after the sputtering process, the unique IDs of the first to third substrate magazines CM1, CM2, and CM3 are read, and the ceramic substrate and metal plate are aligned based on their thickness to perform the lamination and bonding process, thereby achieving the technical effect of optimizing the thickness quality of the heat dissipation substrate.

[0211] In addition, the embodiment carefully measures the thicknesses of the ceramic substrate and the copper plate, which are provided in various thicknesses, and perfectly manages such thickness information, so that each product is matched through unique information, and thickness distribution can be minimized based on this unique information.

[0212] Although the present invention has been described above with reference to an embodiment thereof, it will be readily apparent to those skilled in the art that the present invention can be modified and changed in various ways without departing from the spirit and scope of the present invention as set forth in the claims below.

Claims

1. loading a ceramic substrate including an effective area of ​​the ceramic substrate and a dummy area of ​​the ceramic substrate disposed on the periphery of the effective area; and marking a unique code on a dummy area of ​​the ceramic substrate.

2. cleaning the ceramic substrate; measuring a thickness of the cleaned ceramic substrate; The unique code is stored in a predetermined central server, The method for manufacturing a heat dissipation substrate for power semiconductors according to claim 1 , wherein the unique code includes thickness information of the ceramic substrate.

3. The method for manufacturing a heat dissipation substrate for power semiconductors according to claim 1 , further comprising the step of marking a unique ID in a dummy area of ​​the ceramic substrate.

4. the unique code comprises a rectangular or square shape; The method for manufacturing a heat dissipation substrate for power semiconductors according to claim 1 , wherein the apex of the unique code and the apex of the effective area are arranged to face each other.

5. the unique code comprises a rectangular or square shape; The method for manufacturing a heat dissipation substrate for a power semiconductor according to claim 1 , wherein a corner of the unique code is disposed opposite a vertex of the effective area closest to the unique code.

6. classifying the ceramic substrates into a plurality of groups according to the measured thickness; The method of claim 2 , further comprising: loading the classified ceramic substrates into different substrate magazines, respectively. 3 . The method of claim 2 , further comprising:

7. mounting the loaded ceramic substrate in a predetermined sputtering device; and sputtering the mounted ceramic substrate. The method for manufacturing a heat dissipation substrate for a power semiconductor according to claim 6 , wherein the unique code is not sputtered in the step of performing sputtering.

8. depositing first and second metal plates on the lower and upper sides of the sputtered ceramic substrate, respectively; performing a hot pressing process on the laminated ceramic substrates and the first and second metal plates; The method for manufacturing a heat dissipation substrate for a power semiconductor according to claim 7, further comprising the step of removing a portion of the second metal plate to open the unique code.

9. forming a wiring pattern by etching the second metal plate of the ceramic substrate; The method for manufacturing a heat dissipation substrate for a power semiconductor according to claim 8 , further comprising the step of: marking the first metal plate with a second unique code.

10. A step of disposing a power semiconductor element; bonding a first heat dissipation substrate to a lower side of the power semiconductor device and a second heat dissipation substrate to a upper side of the power semiconductor device, A method for manufacturing a power semiconductor module, comprising the method for manufacturing a heat dissipation substrate for a power semiconductor according to any one of claims 1 to 9, wherein the method for manufacturing the first heat dissipation substrate or the second heat dissipation substrate includes the method for manufacturing a heat dissipation substrate for a power semiconductor according to any one of claims 1 to 9.

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