Semiconductor memory device
The semiconductor memory device addresses the challenge of complex lead bending and insertion by incorporating a substrate with specific surface features, resulting in improved manufacturability and assembly efficiency.
Patent Information
- Application Number
- JP2023150808
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-19
- Publication Date
- 2025-04-01
AI Technical Summary
The existing semiconductor memory devices face challenges in improving manufacturability, particularly due to complex lead bending and insertion processes during the assembly of capacitors within the substrate.
The semiconductor memory device design incorporates a substrate with specific surface features, including a third surface with a depression and a conductive portion, allowing the capacitor leads to be bent and fixed in a simpler manner, reducing the complexity of the assembly process.
This design enhances manufacturing efficiency by reducing the number of lead bends and simplifying the assembly process, thereby improving the overall manufacturability of the semiconductor memory device.
Smart Images

Figure 2025043499000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a semiconductor memory device. [Background technology]
[0002] 2. Description of the Related Art A semiconductor memory device is known that includes a substrate having a through hole and an electronic component having leads that are inserted into the through hole. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] US Patent Application Publication No. 2022 / 0087072 Summary of the Invention [Problem to be solved by the invention]
[0004] One embodiment aims to improve the manufacturability of a semiconductor memory device. [Means for solving the problem]
[0005] A semiconductor memory device according to one embodiment includes a substrate, a semiconductor memory, a controller, and an electronic component. The semiconductor memory is provided on the substrate. The controller is provided on the substrate and controls the semiconductor memory. The electronic component is electrically connected to the substrate. The substrate has a first surface extending in a first direction intersecting a thickness direction of the substrate, a second surface located on the opposite side to the first surface, a third surface extending in a second direction, which is the thickness direction of the substrate, and spanning the first surface and the second surface, a first recess provided on the third surface and extending in the second direction, and a first conductive portion provided on an inner surface of the first recess. The electronic component has a component body overlapping the third surface when viewed from the first direction, and a first lead protruding from the component body. The first lead has a first portion protruding from the component body toward the first recess and a second portion bent from the first portion and extending along the inner surface of the first recess, and the second portion is fixed to the first conductive portion with at least a portion of the first portion overlapping the first recess when viewed from the first direction. [Brief description of the drawings]
[0006] [Figure 1] 1 is a perspective view showing a semiconductor memory device according to a first embodiment. [Diagram 2] 1 is a partially exploded perspective view of a semiconductor memory device according to a first embodiment; [Diagram 3] FIG. 2 is a diagram showing a capacitor according to the first embodiment. [Figure 4] FIG. 2 is a perspective view showing a portion of a substrate according to the first embodiment. [Diagram 5] 5 is a cross-sectional view of a portion of the substrate shown in FIG. 4 taken along line F5-F5. [Figure 6] FIG. 4 is a diagram for explaining the positional relationship between a substrate and a capacitor in the first embodiment. [Figure 7] 7 is a cross-sectional view taken along line F7-F7 of the semiconductor memory device shown in FIG. [Figure 8] FIG. 11 is a partially exploded perspective view showing a semiconductor memory device according to a first modification of the first embodiment. [Figure 9] FIG. 11 is a cross-sectional view showing a semiconductor memory device according to a second modification of the first embodiment. [Figure 10] FIG. 13 is a partially exploded perspective view showing a semiconductor memory device according to a third modification of the first embodiment. [Figure 11] 11 is a cross-sectional view taken along line F11-F11 of the semiconductor memory device shown in FIG. [Figure 12] FIG. 11 is a perspective view showing a part of a board unit according to a second embodiment. [Figure 13] FIG. 11 is a perspective view showing a part of the board unit of the second embodiment from a different angle. [Figure 14] FIG. 11 is a partially exploded perspective view of a board unit according to a second embodiment. [Figure 15] FIG. 11 is a view showing a support component according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0007] Hereinafter, the semiconductor memory device of the embodiment will be described with reference to the drawings. In the following description, the same reference numerals are given to configurations having the same or similar functions. Then, the duplicated description of those configurations may be omitted. In this application, "parallel," "orthogonal," or "same" may include the cases of "substantially parallel," "substantially orthogonal," or "substantially the same," respectively. In this application, "overlap" means that virtual projection images of two objects overlap each other. That is, "overlap" is not limited to the case where two objects are in contact, and may also include the case where the two objects are not in contact (for example, the case where there is a space or another member between the two objects). In this application, "fixed" is not limited to the case where two objects are directly fixed, and may also include the case where the two objects are fixed with another member interposed therebetween. In this application, "connection" is not limited to mechanical connection, and may also include electrical connection. That is, "connection" is not limited to the case where the object is directly connected, and may also include the case where the object is connected with another member interposed therebetween.
[0008] In this application, the +X direction, the -X direction, the +Y direction, the -Y direction, the +Z direction, and the -Z direction are defined as follows. The +X direction, the -X direction, the +Y direction, and the -Y direction are parallel to the first surface 21a of the substrate 21 (see FIG. 2), which will be described later. The +X direction is a direction from the second end 10b of the housing 10 to the first end 10a, which will be described later (see FIG. 1). The -X direction is a direction opposite to the +X direction. When the +X direction and the -X direction are not distinguished, they are simply referred to as the "X direction". The +Y direction and the -Y direction are directions intersecting (for example, perpendicular to) the X direction. The +Y direction is a direction from the fourth end 10d of the housing 10 to the third end 10c, which will be described later (see FIG. 1). The -Y direction is a direction opposite to the +Y direction. When the +Y direction and the -Y direction are not distinguished, they are simply referred to as the "Y direction". The +Z direction and the -Z direction are directions that intersect (e.g., are perpendicular to) the X direction and the Y direction, and are the thickness direction of the substrate 21. The +Z direction is the direction from the substrate 21 toward the first main wall 11 of the housing 10 (see FIG. 2). The -Z direction is the opposite direction to the +Z direction. When there is no need to distinguish between the +Z direction and the -Z direction, they are simply referred to as the "Z direction." The X direction is an example of the "first direction." The Z direction is an example of the "second direction." The +Z direction side is an example of the "first side." The -Z direction side is an example of the "second side."
[0009] (First embodiment) <1. Overall configuration of semiconductor memory device> A semiconductor memory device 1 according to a first embodiment will be described with reference to Fig. 1 to Fig. 7. The semiconductor memory device 1 is a storage device such as an SSD (Solid State Drive). The semiconductor memory device 1 is attached to a host device and used as a storage device for the host device. The host device may be, but is not limited to, a personal computer, a mobile device, a video recorder, or an in-vehicle device.
[0010] 1 is a perspective view showing a semiconductor memory device 1. The semiconductor memory device 1 has, for example, a housing 10 and a board unit 20.
[0011] <1.1 Housing> The housing 10 is a member that forms the outer periphery of the semiconductor memory device 1. The housing 10 is, for example, in the shape of a flat rectangular box. The housing 10 has a first end 10a and a second end 10b as a pair of ends separated in the longitudinal direction (X direction) of the housing 10. The first end 10a has a connector 22 for a board unit 20, which will be described later, in an opening (not shown) that is exposed to the outside of the housing 10. The housing 10 has a third end 10c and a fourth end 10d as a pair of ends separated in the lateral direction (Y direction) of the housing 10.
[0012] The housing 10 has, for example, a first main wall 11, a second main wall 12, a first side wall 13, a second side wall 14, and a third side wall 15. The first main wall 11 is a wall along the X direction and the Y direction. The first main wall 11 is located on the +Z direction side with respect to the board unit 20. The first main wall 11 faces a board 21 described later from the +Z direction side. The first main wall 11 is an example of a "first wall". The second main wall 12 is a wall along the X direction and the Y direction. The second main wall 12 is located on the -Z direction side with respect to the board unit 20. The second main wall 12 faces the board 21 from the -Z direction side. The second main wall 12 is an example of a "second wall". Each of the first side wall 13, the second side wall 14, and the third side wall 15 is a wall along the Z direction and extends between an end of the first main wall 11 and an end of the second main wall 12. The first side wall 13 is located at the end of the housing 10 on the -X direction side. The second side wall 14 is located at the end of the housing 10 on the +Y direction side. The third side wall 15 is located at the end of the housing 10 on the -Y direction side.
[0013] <1.2 Board unit> Next, the board unit 20 will be described. 2 is a partially exploded perspective view of the semiconductor memory device 1. The board unit 20 is housed in a housing 10. The board unit 20 includes, for example, a board 21, a connector 22, a controller 23, a plurality of DRAMs (Dynamic Random Access Memories) 24, a plurality of NAND flash memories 25 (hereinafter referred to as "NAND 25"), and a plurality of capacitors 26.
[0014] The substrate 21 is a plate member extending along the X and Y directions. The substrate 21 is a printed circuit board, and includes an insulating base material and a wiring pattern provided on the insulating base material. The substrate 21 has a first surface 21a and a second surface 21b located on the opposite side to the first surface 21a. The first surface 21a extends in the X and Y directions. The first surface 21a faces the +Z direction. The second surface 21b extends in the X and Y directions. The second surface 21b faces the -Z direction.
[0015] The substrate 21 has an opening 21h. The opening 21h is, for example, rectangular in shape with the longitudinal direction in the Y direction. The opening 21h is a through hole penetrating the substrate 21 in the Z direction. The opening 21h is an example of a "space portion." A component body 30 of a capacitor 26, which will be described later, is disposed in the opening 21h. In this embodiment, the opening 21h has a size capable of accommodating the component bodies 30 of a plurality of capacitors 26 arranged side by side in the Y direction.
[0016] The connector 22 is a connection part that can be connected to a connector of a host device. The connector 22 is also called an edge connector. The connector 22 has a plurality of metal terminals that can be connected to a connector of a host device. The connector 22 is provided at an end of the substrate 21 on the +X direction side.
[0017] The controller 23 is a component that performs overall control of the entire semiconductor memory device 1. The controller 23 is, for example, a semiconductor package including a SoC (System on a Chip) in which a host interface circuit for a host device, a control circuit for controlling a plurality of DRAMs 24, and a control circuit for controlling a plurality of NANDs 25 are integrated into one semiconductor chip. The controller 23 is provided on, for example, the second surface 21b of the substrate 21.
[0018] The DRAM 24 is a semiconductor package including a volatile semiconductor memory chip. The DRAM 24 is a data buffer in which data to be written received from the host device or data to be read read from the NAND 25 is temporarily stored. The DRAM 24 is provided on the first surface 21a of the substrate 21, for example. The DRAM 24 may be provided inside the controller 23.
[0019] The NAND 25 is a semiconductor package including a non-volatile semiconductor memory chip. The NAND 25 is provided, for example, on the first surface 21a and the second surface 21b of the substrate 21. A plurality of NANDs 25 are arranged in the X direction and the Y direction. The NAND 25 is an example of a "semiconductor memory." Note that the "semiconductor memory" in this application is not limited to the NAND 25, and may be other types of semiconductor memory such as a NOR type memory, a Magnetoresistive Random Access Memory (MRAM), or a resistive memory.
[0020] The capacitor 26 is one of the components electrically connected to the substrate 21. The capacitor 26 performs a power backup function for protecting data when, for example, power is unexpectedly cut off. In this embodiment, the capacitor 26 supplies power to the controller 23, the multiple DRAMs 24, and the multiple NANDs 25 for a certain period of time when the power supply from the host device is unexpectedly cut off. The capacitor 26 is, for example, an electrolytic capacitor. More specifically, the capacitor 26 is, for example, an aluminum electrolytic capacitor. However, the capacitor 26 is not limited to the above example. The capacitor 26 is an example of an "electronic component."
[0021] 3 is a diagram showing a capacitor 26. The capacitor 26 has, for example, a component body 30, a first lead 31, and a second lead 32.
[0022] The component body 30 is a part that performs the main function of the electronic component. For example, the component body 30 of the capacitor 26 is a part that accumulates electric charge when a DC voltage is applied. The component body 30 includes, for example, a metal that serves as an electrode, a dielectric, and an electrolyte. The component body 30 is cylindrical. The diameter Da of the component body 30 is larger than the thickness T of the substrate 21 in the Z direction (see FIG. 6). The component body 30 includes, for example, a first end face 30a, a second end face 30b, and a peripheral face 30c.
[0023] The first end surface 30a is an end surface located on the opposite side to the first lead 31 and the second lead 32. The first end surface 30a is circular. A pressure valve (safety valve) 30p is provided on the first end surface 30a. The pressure valve 30p is opened when the internal pressure of the component body 30 rises to or exceeds a predetermined reference value due to an abnormality or the like, and releases gas within the component body 30 to the outside of the component body 30.
[0024] The second end face 30b is located on the opposite side to the first end face 30a. The second end face 30b is circular. The first lead 31 and the second lead 32 protrude from the second end face 30b. The peripheral face 30c extends in a direction intersecting (e.g., perpendicular to) the first end face 30a and the second end face 30b, and spans between the first end face 30a and the second end face 30b. The peripheral face 30c is annular.
[0025] The first lead 31 is a first terminal for electrical connection. The first lead 31 has a first portion 31a and a second portion 31b. The first portion 31a protrudes from a second end surface 30b of the component body 30. The first portion 31a protrudes in a direction intersecting (for example, perpendicular to) the second end surface 30b. The first portion 31a extends linearly in a direction away from the component body 30. The second portion 31b is bent from the tip of the first portion 31a and extends linearly in a direction different from (for example, perpendicular to) the first portion 31a. The second portion 31b extends, for example, parallel to the second end surface 30b. The first portion 31a and the second portion 31b are cylindrical and have the same diameter Db. In this embodiment, the first portion 31a and the second portion 31b form an L-shaped first lead 31.
[0026] The second lead 32 is a second terminal for electrical connection. The second lead 32 has a third portion 32a and a fourth portion 32b. The third portion 32a protrudes from the second end surface 30b of the component body 30. The third portion 32a protrudes in a direction intersecting (for example, perpendicular to) the second end surface 30b. The third portion 32a extends linearly in a direction away from the component body 30. The fourth portion 32b is bent from the tip of the third portion 32a and extends linearly in a direction different from (for example, perpendicular to) the third portion 32a. The fourth portion 32b extends, for example, parallel to the second end surface 30b. The third portion 32a and the fourth portion 32b are cylindrical and have the same diameter Db. In this embodiment, the third portion 32a and the fourth portion 32b form an L-shaped second lead 32.
[0027] <2. Capacitor mounting structure> <2.1 Circuit board structure> Next, a description will be given of the mounting structure of the capacitor 26. First, a description will be given of the structure of the substrate 21 related to the mounting structure of the capacitor 26.
[0028] 4 is a perspective view showing a portion of the substrate 21 adjacent to the opening 21h. The substrate 21 has a third surface 21c. The third surface 21c extends in the Z direction and spans between the first surface 21a and the second surface 21b. The third surface 21c is an end surface that defines the thickness of the substrate 21. In this embodiment, the third surface 21c is an end surface that is adjacent to the opening 21h and defines the edge of the opening 21h.
[0029] In this embodiment, the substrate 21 has a first recess 41, a second recess 42, a first conductive portion 43, and a second conductive portion 44 as part of the mounting structure of the capacitor 26.
[0030] The first recess 41 and the second recess 42 are provided on the third surface 21c. The first recess 41 and the second recess 42 are located, for example, on the +X direction side with respect to the opening 21h. The first recess 41 and the second recess 42 are arranged at different positions in the Y direction. Each of the first recess 41 and the second recess 42 is recessed in the +X direction with respect to the third surface 21c. The first recess 41 and the second recess 42 extend in the Z direction. For example, the first recess 41 and the second recess 42 penetrate the substrate 21 in the Z direction and span the first surface 21a and the second surface 21b of the substrate 21. In this embodiment, the inside of the first recess 41 and the inside of the second recess 42 are adjacent to the opening 21h. The inside of the first recess 41 and the inside of the second recess 42 are connected to the opening 21h.
[0031] The first conductive portion 43 is provided on the inner surface of the first recess 41. The first conductive portion 43 is, for example, a metal layer (for example, a plating layer) formed along the inner surface of the first recess 41. The first conductive portion 43 is, for example, a metal layer having a thickness of 0.05 mm. The first conductive portion 43 may be provided on at least one of the first surface 21a and the second surface 21b of the substrate 21 in addition to the inner surface of the first recess 41. The first conductive portion 43 is connected to the wiring pattern of the substrate 21.
[0032] The second conductive portion 44 is provided on the inner surface of the second recess 42. The second conductive portion 44 is, for example, a metal layer (for example, a plating layer) formed along the inner surface of the second recess 42. The second conductive portion 44 is, for example, a metal layer having a thickness of 0.05 mm. The second conductive portion 44 may be provided on at least one of the first surface 21a and the second surface 21b of the substrate 21 in addition to the inner surface of the second recess 42. The second conductive portion 44 is connected to the wiring pattern of the substrate 21 while being electrically insulated from the first conductive portion 43.
[0033] FIG. 5 is a cross-sectional view of a part of the substrate 21 shown in FIG. 4 taken along line F5-F5. In this embodiment, the first recess 41 has an arc portion 41a and a straight portion 41b. The arc portion 41a is located at the back of the first recess 41. The arc portion 41a is recessed in an arc shape in a direction away from the opening 21h when viewed from the Z direction, for example. The arc portion 41a is semicircular when viewed from the Z direction, for example. The straight portion 41b extends linearly in the -X direction from both ends of the arc portion 41a in the Y direction. The straight portion 41b spans the arc portion 41a and the third surface 21c. The first conductive portion 43 described above is provided on both the arc portion 41a and the straight portion 41b.
[0034] The diameter Db of the second portion 31b of the first lead 31 is, for example, 0.5 mm (tolerance: ±0.05 mm). The radius of curvature R of the arc portion 41a is, for example, 0.5 mm. The length of the straight portion 41b in the X direction is 0.8 mm. In this embodiment, the depth S of the first recess 41 in the X direction is greater than the diameter Db of the second portion 31b of the first lead 31. For example, the depth S of the first recess 41 in the X direction is more than twice the diameter Db of the second portion 31b of the first lead 31.
[0035] Similarly, the second recess 42 has an arc portion 42a and a straight portion 42b. The arc portion 42a is located at the back of the second recess 42. The arc portion 42a is recessed in an arc shape in a direction away from the opening 21h when viewed from the Z direction, for example. The arc portion 42a is semicircular when viewed from the Z direction, for example. The straight portion 42b extends linearly in the -X direction from both ends of the arc portion 42a in the Y direction. The straight portion 42b spans the arc portion 42a and the third surface 21c. The second conductive portion 44 described above is provided in both the arc portion 42a and the straight portion 42b.
[0036] The diameter Db of the fourth portion 32b of the second lead 32 is, for example, 0.5 mm (tolerance: ±0.05 mm). The radius of curvature R of the arc portion 42a is, for example, 0.5 mm. The length of the straight portion 42b in the X direction is 0.8 mm. In this embodiment, the depth S of the second recess 42 in the X direction is greater than the diameter Db of the fourth portion 32b of the second lead 32. For example, the depth S of the second recess 42 in the X direction is more than twice the diameter Db of the fourth portion 32b of the second lead 32.
[0037] <2.2 Positional relationship between the board and the capacitor> Next, the positional relationship between the substrate 21 and the capacitor 26 will be described. 6 is a diagram for explaining the positional relationship between the substrate 21 and the capacitor 26. As described above, the component body 30 of the capacitor 26 is disposed in the opening 21h. Note that the first end face 30a of the component body 30 is disposed between the edge of the opening 21h and at least a distance (e.g., 2 mm) required for opening the pressure valve 30p (see FIG. 2).
[0038] 6, the component body 30 overlaps with the third surface 21c of the substrate 21 when viewed in the X direction. In this embodiment, the center C of the component body 30 in the Z direction overlaps with the third surface 21c of the substrate 21 when viewed in the X direction. For example, the center C of the component body 30 in the Z direction coincides with the center of the substrate 21 in the Z direction when viewed in the X direction.
[0039] The first portion 31a of the first lead 31 protrudes from the component body 30 toward the first recess 41. The tip of the first portion 31a is located inside the first recess 41. The second portion 31b of the first lead 31 is bent in the -Z direction from the first portion 31a inside the first recess 41. The second portion 31b extends linearly in the Z direction inside the first recess 41 so as to follow the inner surface of the first recess 41. The second portion 31b is cylindrical and extends in the Z direction. The peripheral surface 31bs of the second portion 31b faces the arc portion 41a of the first recess 41. The tip of the second portion 31b extends, for example, further toward the -Z direction side than the second surface 21b of the substrate 21.
[0040] The second portion 31b is fixed to the first conductive portion 43 in a state in which at least a portion of the first portion 31a overlaps with the first recess 41 when viewed from the X direction. The second portion 31b is connected to the first conductive portion 43 and is electrically connected to the wiring pattern of the substrate 21 via the first conductive portion 43.
[0041] In this embodiment, a conductive first joint portion 51 is provided inside the first recess 41. The first joint portion 51 is, for example, solder. In this embodiment, the second portion 31b of the first lead 31 is fixed to the first conductive portion 43 by the first joint portion 51. In this embodiment, the inside of the first recess 41 is filled with the first joint portion 51. A part of the first joint portion 51 contacts the second portion 31b of the first lead 31 from the side opposite to the first conductive portion 43.
[0042] Similarly, the third portion 32a of the second lead 32 protrudes from the component body 30 toward the second recess 42. The tip of the third portion 32a is located inside the second recess 42. The fourth portion 32b of the second lead 32 is bent from the third portion 32a in the -Z direction inside the second recess 42. The fourth portion 32b extends linearly in the Z direction inside the second recess 42 so as to follow the inner surface of the second recess 42. The fourth portion 32b is cylindrical and extends in the Z direction. The peripheral surface 32bs of the fourth portion 32b faces the arc portion 42a of the second recess 42. The tip of the fourth portion 32b extends, for example, further toward the -Z direction side than the second surface 21b of the substrate 21.
[0043] The fourth portion 32b is fixed to the second conductive portion 44 in a state in which at least a portion of the third portion 32a overlaps with the second recess 42 when viewed from the X direction. The fourth portion 32b is connected to the second conductive portion 44 and is electrically connected to the wiring pattern of the substrate 21 via the second conductive portion 44.
[0044] In this embodiment, a conductive second joint portion 52 is provided inside the second recess 42. The second joint portion 52 is, for example, solder. In this embodiment, the fourth portion 32b of the second lead 32 is fixed to the second conductive portion 44 by the second joint portion 52. In this embodiment, the inside of the second recess 42 is filled with the second joint portion 52. A part of the second joint portion 52 contacts the fourth portion 32b of the second lead 32 from the side opposite to the second conductive portion 44.
[0045] <3. Structure of the case> Next, the structure of the housing 10 will be described. FIG. 7 is a cross-sectional view of the semiconductor memory device 1 shown in FIG. 1 taken along line F7-F7. In this embodiment, the first main wall 11 of the housing 10 has a plurality of recesses 11r. The recesses 11r are arranged at positions corresponding one-to-one to the component bodies 30 of the capacitors 26. When viewed from the Z direction, the recesses 11r overlap with the component bodies 30 of the capacitors 26. The recesses 11r are recessed toward the +Z direction, which is a direction away from the capacitors 26. A part of the component body 30 of the capacitors 26 is arranged inside the recesses 11r and is located on the +Z direction side of a part of the first main wall 11 (for example, the end on the -Z direction side). The recesses 11r are an example of a "first non-flat portion."
[0046] The second main wall 12 of the housing 10 has a plurality of recesses 12r. The plurality of recesses 12r are arranged at positions corresponding one-to-one to the component bodies 30 of the plurality of capacitors 26. When viewed from the Z direction, the recesses 12r overlap the component bodies 30 of the capacitors 26. The recesses 12r are recessed in the -Z direction, which is a direction away from the capacitors 26. A part of the component body 30 of the capacitor 26 is arranged inside the recesses 12r and is located on the -Z direction side of a part of the second main wall 12 (for example, an end on the +Z direction side). The recesses 12r of the second main wall 12 have, for example, the same shape as the recesses 11r of the first main wall 11. When viewed from the Z direction, the recesses 12r of the second main wall 12 overlap the recesses 11r of the first main wall 11. The recesses 12r are an example of a "second non-flat portion."
[0047] A first cushioning material 61 may be disposed between the recess 11r and the component body 30 of the capacitor 26. The first cushioning material 61 is made of, for example, a flexible synthetic resin and has greater elasticity than the first main wall 11. The first cushioning material 61 is sandwiched, for example, between the recess 11r and the component body 30 of the capacitor 26. The first cushioning material 61 prevents an impact input to the first main wall 11 from the outside of the housing 10 from being directly transmitted to the component body 30 of the capacitor 26.
[0048] A second cushioning material 62 may be disposed between the recess 12r and the component body 30 of the capacitor 26. The second cushioning material 62 is made of, for example, a flexible synthetic resin and has greater elasticity than the second main wall 12. The second cushioning material 62 is sandwiched, for example, between the recess 12r and the component body 30 of the capacitor 26. The second cushioning material 62 prevents an impact input to the second main wall 12 from the outside of the housing 10 from being directly transmitted to the component body 30 of the capacitor 26.
[0049] 6, the first main wall 11 does not need to have a recess 11r at a position overlapping with the DRAM 24 and the NAND 25 in the Z direction. The first main wall 11 is spaced apart from the DRAM 24 and the NAND 25. A first space G1 exists between the first main wall 11 and the DRAM 24 and the NAND 25.
[0050] The second main wall 12 does not need to have a recess 12r at a position overlapping with the controller 23 and the NAND 25 in the Z direction. The second main wall 12 is spaced apart from the controller 23 and the NAND 25. A second space G2 exists between the second main wall 12 and the controller 23 and the NAND 25.
[0051] <4. Advantages> As a comparative example, consider a configuration in which the leads of capacitor 26 are bent and inserted into through holes in substrate 21 in order to place component body 30 of capacitor 26 at a position facing third surface 21c of substrate 21. In this case, in order to insert the leads of capacitor 26 into the through holes in substrate 21, the leads of capacitor 26 need to be bent at least three times. Therefore, in the configuration of this comparative example, the task of bending the leads of capacitor 26 becomes complicated. As a result, it becomes difficult to improve the manufacturability of the semiconductor memory device.
[0052] On the other hand, in this embodiment, the substrate 21 has a third surface 21c extending in the Z direction, which is the thickness direction of the substrate 21, a first recess 41 provided on the third surface 21c and extending in the Z direction, and a first conductive portion 43 provided on the inner surface of the first recess 41. The capacitor 26 has a component body 30 that overlaps with the third surface 21c of the substrate 21 when viewed from the X direction, and a first lead 31 protruding from the component body 30. The first lead 31 has a first portion 31a that protrudes from the component body 30 toward the first recess 41, and a second portion 31b that is bent from the first portion 31a and extends along the inner surface of the first recess 41. The second portion 31b is fixed to the first conductive portion 43 with at least a part of the first portion 31a overlapping the first recess 41 when viewed from the X direction.
[0053] According to this configuration, the number of times that first lead 31 of capacitor 26 needs to be bent can be reduced compared to the configuration of the comparative example. For example, first lead 31 of capacitor 26 needs to be bent only once. This simplifies the work of bending first lead 31 of capacitor 26. This can improve the manufacturability of semiconductor memory device 1.
[0054] In this embodiment, the inner surface of the first recess 41 includes an arc portion 41a that is recessed in an arc shape in a direction away from the component body 30 of the capacitor 26 when viewed from the Z direction. The second portion 31b of the first lead 31 is cylindrical extending in the Z direction. The peripheral surface 31bs of the second portion 31b faces the arc portion 41a of the first recess 41. With this configuration, since the curved surfaces are fixed to each other, it is easier to fix the second portion 31b of the first lead 31 to the first conductive portion 43 provided on the inner surface of the first recess 41 compared to when the inner part of the first recess 41 is flat. This makes it possible to further improve manufacturability.
[0055] In this embodiment, a conductive first joint portion 51 is provided inside the first recess 41. The second portion 31b of the first lead 31 is fixed to the first conductive portion 43 by the first joint portion 51. With this configuration, the second portion 31b of the first lead 31 can be fixed inside the first recess 41. This makes it possible to stably fix the first lead 31. Furthermore, compared to a case in which a fixing structure is provided separately from the first recess 41, the board unit 20 can be made more compact.
[0056] In this embodiment, the second portion 31b of the first lead 31 has a cylindrical shape extending in the Z direction. The depth S of the first recess 41 in the X direction is greater than the diameter Db of the second portion 31b of the first lead 31. A part of the first joint portion 51 contacts the second portion 31b of the first lead 31 from the side opposite to the first conductive portion 43. With this configuration, the second portion 31b of the first lead 31 can be fixed more stably inside the first recess 41.
[0057] In this embodiment, the center C of the component body 30 in the Z direction overlaps with the third surface 21c of the substrate 21 when viewed from the X direction. With this configuration, it is easier to make the housing 10 thinner than when the center C of the component body 30 in the Z direction does not overlap with the third surface 21c of the substrate 21.
[0058] In this embodiment, the first main wall 11 of the housing 10 has a recess 11r recessed in a direction away from the component body 30 at a position overlapping with the component body 30 when viewed from the Z direction. The second main wall 12 of the housing 10 has a recess 12r recessed in a direction away from the component body 30 at a position overlapping with the component body 30 when viewed from the Z direction. With this configuration, it is possible to reduce the thickness of the housing 10 while avoiding interference between the first main wall 11 and the second main wall 12 and the component body 30.
[0059] In this embodiment, a first buffer material 61 is disposed between the recess 11r and the component body 30, and a second buffer material 62 is disposed between the recess 12r and the component body 30. With this configuration, it is possible to improve the impact resistance of the semiconductor memory device 1.
[0060] <5. Modifications> Next, modified examples of the first embodiment will be described. Note that the configurations of each modified example other than those described below are the same as those of the first embodiment. These configurations can also improve manufacturability, as in the first embodiment.
[0061] <5.1 First modified example> FIG. 8 is a partially exploded perspective view of the semiconductor memory device 1A of the first modified example. In this modified example, the substrate 21 has a notch 21f instead of the opening 21h. The notch 21f is provided at the end of the substrate 21 in the -X direction. The notch 21f is surrounded by the substrate 21 in the +X direction, +Y direction, and -Y direction, and is open in the -X direction. The notch 21f penetrates the substrate 21 in the Z direction. In this embodiment, the component body 30 of the capacitor 26 is disposed in the notch 21f. The notch 21f is another example of a "space portion".
[0062] <5.2 Second modified example> FIG. 9 is a cross-sectional view showing a semiconductor memory device 1B of a second modification. FIG. 9 is a cross-sectional view showing a cross section of the semiconductor memory device 1B corresponding to a cross section along line F7-F7 of the semiconductor memory device 1 shown in FIG. 1. In this modification, the first main wall 11 of the housing 10 has a plurality of openings 11h instead of the plurality of recesses 11r. The plurality of openings 11h are arranged at positions corresponding one-to-one to the component bodies 30 of the plurality of capacitors 26. When viewed from the Z direction, the openings 11h overlap with the component bodies 30 of the capacitors 26. The openings 11h open in the +Z direction, which is a direction away from the capacitors 26. The openings 11h penetrate the first main wall 11 in the Z direction. For example, a part of the component body 30 of the capacitor 26 is arranged inside the openings 11h and is located on the +Z direction side of a part (for example, an end on the -Z direction side) of the first main wall 11. The openings 11h are another example of a "first non-flat portion". A cover 71 may be attached to the surface of the first main wall 11. The cover 71 has a size large enough to cover the multiple openings 11h, and closes the multiple openings 11h.
[0063] The second main wall 12 of the housing 10 has a plurality of openings 12h instead of the plurality of recesses 12r. The plurality of openings 12h are arranged at positions corresponding one-to-one to the component bodies 30 of the plurality of capacitors 26. When viewed from the Z direction, the openings 12h overlap with the component bodies 30 of the capacitors 26. The openings 12h open in the -Z direction, which is a direction away from the capacitors 26. The openings 12h penetrate the second main wall 12 in the Z direction. For example, a part of the component body 30 of the capacitor 26 is arranged inside the openings 12h and is located on the -Z direction side of a part of the second main wall 12 (for example, an end on the +Z direction side). The openings 12h of the second main wall 12 have the same shape as the openings 11h of the first main wall 11, for example. When viewed from the Z direction, the openings 12h of the second main wall 12 overlap with the openings 11h of the first main wall 11. The openings 12h are another example of a "second non-flat portion". In this modified example, a cover 72 may be attached to the surface of the second main wall 12. The cover 72 has a size large enough to cover the multiple openings 12h, and closes the multiple openings 12h.
[0064] <5.3 Third Modification> 10 is a partially exploded perspective view of a semiconductor memory device 1C according to a third modification. In this modification, the plurality of capacitors 26 includes a plurality of capacitors 26A and a plurality of capacitors 26B.
[0065] The multiple capacitors 26A are arranged on the +X direction side with respect to the multiple capacitors 26B. The multiple capacitors 26A are arranged side by side in the Y direction. The first lead 31 and the second lead 32 of the capacitor 26A protrude from the component body 30 of the capacitor 26A on the +X direction side. The first lead 31 and the second lead 32 of the capacitor 26A are inserted into a first recess 41 and a second recess 42 provided on the +X direction side of the opening 21h.
[0066] On the other hand, the multiple capacitors 26B are arranged between the multiple capacitors 26A and the first side wall 13 of the housing 10 in the X direction. The multiple capacitors 26B are arranged side by side in the Y direction. The first lead 31 and the second lead 32 of the capacitor 26B protrude from the component body 30 of the capacitor 26B toward the -X direction side. The first lead 31 and the second lead 32 of the capacitor 26B are inserted into a first recess 41 and a second recess 42 provided on the -X direction side of the opening 21h. Note that a gap of a distance (e.g., 2 mm) required for opening the pressure valve 30p is provided between the capacitors 26A and 26B arranged side by side in the X direction.
[0067] The multiple recesses 11r provided in the first main wall 11 include multiple recesses 11rA and multiple recesses 11rB. The multiple recesses 11rA are arranged at positions corresponding one-to-one to the multiple capacitors 26A. When viewed from the Z direction, the recess 11rA overlaps with the component body 30 of the capacitor 26A. A part of the component body 30 of the capacitor 26A is arranged inside the recess 11rA and is located on the +Z direction side of a part of the first main wall 11 (for example, an end on the -Z direction side).
[0068] The recesses 11rB are arranged at positions corresponding one-to-one to the capacitors 26B. When viewed from the Z direction, the recesses 11rB overlap with the component body 30 of the capacitor 26B. A part of the component body 30 of the capacitor 26B is arranged inside the recess 11rB and is located on the +Z direction side of a part of the first main wall 11 (for example, the end on the -Z direction side).
[0069] The multiple recesses 12r provided in the second main wall 12 include multiple recesses 12rA and multiple recesses 12rB. The multiple recesses 12rA are arranged at positions corresponding one-to-one to the multiple capacitors 26A. When viewed from the Z direction, the recess 12rA overlaps with the component body 30 of the capacitor 26A. A part of the component body 30 of the capacitor 26A is arranged inside the recess 12rA and is located on the -Z direction side of a part of the second main wall 12 (for example, an end on the +Z direction side).
[0070] The multiple recesses 12rB are arranged at positions corresponding one-to-one to the multiple capacitors 26B. When viewed from the Z direction, the recesses 12rB overlap with the component body 30 of the capacitor 26B. A part of the component body 30 of the capacitor 26B is arranged inside the recess 12rB and is located on the -Z direction side of a part of the second main wall 12 (for example, an end on the +Z direction side).
[0071] FIG. 11 is a cross-sectional view taken along line F11-F11 of the semiconductor memory device 1C shown in FIG. 10. In this modification, the first main wall 11 has a thick portion 11n between the recesses 11rA and 11rB. The thick portion 11n is a portion that is thicker than the portion of the first main wall 11 where the recesses 11rA or 11rB are provided. The thick portion 11n extends in the Y direction, for example, with a constant thickness (see FIG. 10). In this modification, the thick portion 11n forms a beam extending in the Y direction between the recesses 11rA and 11rB.
[0072] Similarly, the second main wall 12 has a thick portion 12n between the recess 12rA and the recess 12rB. The thick portion 12n is a portion that is thicker than the portion of the second main wall 12 where the recess 12rA or the recess 12rB is provided. The thick portion 12n extends in the Y direction, for example, while maintaining a constant thickness (see FIG. 10). In this modification, the thick portion 12n forms a beam extending in the Y direction between the recess 12rA and the recess 12rB.
[0073] Second embodiment Next, a second embodiment will be described. This embodiment differs from the first embodiment in that a support component 80 is provided to support the capacitor 26. Note that the configuration other than that described below is the same as that of the first embodiment.
[0074] 12 and 13 are perspective views showing a board unit 20D. FIG. 14 is a perspective view showing a partially exploded board unit 20D of the second embodiment. In this embodiment, the board unit 20D has a support component 80 in addition to the configuration of the board unit 20 described in the first embodiment. The support component 80 is attached to the board 21 and supports the capacitor 26. In this embodiment, the support component 80 is disposed between the capacitor 26 and the third surface 21c of the board 21 in the X direction.
[0075] 15 is a diagram showing a support component 80. The support component 80 has, for example, a first base portion 81, a second base portion 82, a third base portion 83, and a plurality of support portions 84.
[0076] The first base portion 81 contacts the first surface 21a of the substrate 21. The first base portion 81 has a fixing portion F and is fixed to the first surface 21a of the substrate 21. The fixing portion F includes, for example, a pad 81p provided on the surface of the first base portion 81 on the -Z direction side. In this case, the first surface 21a of the substrate 21 has a pad 21p at a position corresponding to the pad 81p. A joint portion 91 such as solder is provided between the pad 21p and the pad 81p. The joint portion 91 joins the pad 21p and the pad 81p. This causes the support component 80 to be fixed to the substrate 21. Note that the fixing portion F that fixes the support component 80 to the substrate 21 is not limited to the above example. For example, the fixing portion F may be a fastening member (for example, a screw) that fixes the first base portion 81 to the substrate 21.
[0077] The second base portion 82 extends in the -Z direction from an end portion on the -X direction side of the first base portion 81. The second base portion 82 is disposed between the component body 30 of the capacitor 26 and the third surface 21c of the substrate 21 in the X direction. For example, the second base portion 82 is sandwiched between the component body 30 of the capacitor 26 and the third surface 21c of the substrate 21. This determines the position of the component body 30 in the X direction.
[0078] The second base 82 has an insertion portion 82a at a position overlapping the first lead 31 or the second lead 32 when viewed from the X direction. The insertion portion 82a penetrates the second base 82 in the X direction, and the first lead 31 or the second lead 32 is passed through the insertion portion 82a. The insertion portion 82a extends in the -Z direction so as to follow the second portion 31b of the first lead 31 or the fourth portion 32b of the second lead. In this embodiment, the insertion portion 82a is provided continuously from the second base 82 to the third base 83. The insertion portion 82a reaches, for example, an end face of the third base 83 on the -Z direction side (see FIG. 13). Therefore, the insertion portion 82a can pass the first portion 31a and the second portion 31b of the first lead 31 (or the third portion 32a and the fourth portion 32b of the second lead 32) in the X direction.
[0079] The third base portion 83 protrudes in the +X direction from the end portion on the -Z direction side of the second base portion 82. The third base portion 83 contacts the second surface 21b of the substrate 21. The third base portion 83 contacts the substrate 21 from the side opposite to the first base portion 81. Note that, instead of / in addition to providing the fixing portion F as described above, the support component 80 may be fixed to the substrate 21 by sandwiching the substrate 21 between the first base portion 81 and the third base portion 83.
[0080] The multiple support parts 84 protrude from the second base part 82 in the -X direction. The support parts 84 are, for example, cylindrical extending in the X direction. When viewed from the X direction, the multiple support parts 84 are arranged separately around the component body 30. For example, two support parts 84A and 84B included in the multiple support parts 84 are arranged on the +Z direction side with respect to the center C of the component body 30 in the Z direction. The two support parts 84A and 84B are arranged separately on both sides of the component body 30 in the Y direction and contact the peripheral surface 30c of the component body 30 (see FIG. 12). The two support parts 84C and 84D included in the multiple support parts 84 are arranged on the -Z direction side with respect to the center C of the component body 30 in the Z direction. The two support parts 84C and 84D are arranged separately on both sides of the component body 30 in the Y direction and contact the peripheral surface 30c of the component body 30 (see FIG. 13). The component body 30 is disposed between the multiple support portions 84 and is supported by the multiple support portions 84. This determines the position of the component body 30 in the Y direction and the Z direction.
[0081] For example, support component 80 may be attached to substrate 21 before being attached to capacitor 26. In this case, capacitor 26 is attached to support component 80 and substrate 21 with support component 80 attached to substrate 21. Alternatively, support component 80 may be attached to capacitor 26 before being attached to substrate 21. In this case, capacitor 26 and support component 80 are attached to substrate 21 with capacitor 26 and support component 80 integrated together.
[0082] According to this configuration, as in the first embodiment, manufacturability can be improved. In this embodiment, a support component 80 is provided that is attached to the substrate 21 and supports the capacitor 26. The support component 80 has a first base portion 81 that contacts the first surface 21a of the substrate 21, and a support portion 84 that supports the component body 30 of the capacitor 26. According to this configuration, the capacitor 26 is more stably held by the support component 80 having the first base portion 81. As a result, the capacitor 26 is less likely to come off the substrate 21 when an impact is applied from the outside, for example. This can improve impact resistance. Instead / in addition to this, when the support component 80 is provided, the capacitor 26 can be easily aligned with the substrate 21. This can further improve manufacturability.
[0083] In this embodiment, the first base portion 81 of the support component 80 is fixed to the first surface 21a of the substrate 21. With this configuration, for example, when an external impact is applied, the capacitor 26 is even less likely to come off the substrate 21. This can further improve the impact resistance.
[0084] In this embodiment, the support component 80 further has a second base portion 82 in contact with the third surface 21c of the substrate 21. With this configuration, the second base portion 82 is in contact with the third surface 21c of the substrate 21, which makes it easier to align the support component 80 and the capacitor 26 in the X direction. This can further improve manufacturability.
[0085] In this embodiment, the second base portion 82 of the support component 80 has an insertion portion 82a that penetrates the second base portion 82 in the X direction and through which the first lead 31 passes. With this configuration, even when the first lead 31 is present, the second base portion 82 of the support component 80 can be easily formed large. This makes it even easier to align the support component 80 and the capacitor 26 in the X direction.
[0086] Some embodiments and modifications have been described above. However, the embodiments and modifications are not limited to the above-described examples. For example, the above-described embodiments and modifications may be realized in combination with each other.
[0087] In the above-described embodiment, the first recess 41 and the second recess 42 are recesses that penetrate the substrate 21 in the Z direction. However, the first recess 41 and the second recess 42 are not limited to the above example, and may be recesses provided in only a portion of the substrate 21 in the Z direction (i.e., recesses that do not penetrate the substrate 21 in the Z direction).
[0088] According to at least one of the embodiments described above, the substrate has a first surface extending in a first direction intersecting the thickness direction of the substrate, a second surface located on the opposite side to the first surface and extending in the first direction, a third surface extending in a second direction, which is the thickness direction of the substrate, spanning the first and second surfaces, a recess provided on the third surface and extending in the second direction, and a conductive portion provided on the inner surface of the recess. The electronic component has a component body that overlaps with the third surface of the substrate when viewed from the first direction, and a lead protruding from the component body. The lead has a first portion that protrudes from the component body toward the recess of the substrate, and a second portion that is bent from the first portion. The second portion is fixed to the conductive portion with at least a part of the first portion overlapping the recess of the substrate when viewed from the first direction. According to such a configuration, it is possible to improve the manufacturability of the semiconductor memory device.
[0089] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]
[0090] Reference Signs List 1, 1A, 1B, 1C...semiconductor memory device, 10...casing, 11...first main wall (first wall), 11r...recess (first non-flat portion), 11h...opening (first non-flat portion), 12...second main wall (second wall), 12r...recess (second non-flat portion), 12h...opening (second non-flat portion), 20, 20D...substrate unit, 21...substrate, 21a...first surface, 21b...second surface, 21c...third surface, 21h...opening (space portion) ), 21f...notch (space portion), 26...capacitor (electronic component), 30...component body, 31...first lead, 31a...first portion, 31b...second portion, 32...second lead, 32a...third portion, 32b...fourth portion, 41...first recess, 42...second recess, 43...first conductive portion, 44...second conductive portion, 80...supporting component, 81...first base, 82...second base, 83...third base, 84...supporting portion.
Claims
1. A substrate; A semiconductor memory provided on the substrate; a controller provided on the substrate and controlling the semiconductor memory; an electronic component electrically connected to the substrate; Equipped with the substrate has a first surface extending in a first direction intersecting a thickness direction of the substrate, a second surface located on the opposite side to the first surface, a third surface extending in a second direction which is the thickness direction of the substrate and spanning the first surface and the second surface, a first depression provided in the third surface and extending in the second direction, and a first conductive portion provided on an inner surface of the first depression; the electronic component has a component body overlapping the third surface when viewed from the first direction, and a first lead protruding from the component body; the first lead has a first portion protruding from the component body toward the first recess and a second portion bent from the first portion and extending along an inner surface of the first recess, and the second portion is fixed to the first conductive portion with at least a part of the first portion overlapping the first recess when viewed from the first direction. Semiconductor memory device.
2. an inner surface of the first recess includes an arc portion that is arcuately recessed in a direction away from the component main body when viewed from the second direction; The second portion has a cylindrical shape extending in the second direction, The circumferential surface of the second portion faces the arc portion.
2. The semiconductor memory device according to claim 1.
3. The semiconductor device further includes a conductive joint provided inside the first recess, The second portion is fixed to the first conductive portion by the joint portion.
3. The semiconductor memory device according to claim 1.
4. The second portion has a cylindrical shape extending in the second direction, a depth of the first recess in the first direction is greater than a diameter of the second portion; a part of the joint portion contacts the second portion from an opposite side to the first conductive portion; 4. The semiconductor memory device according to claim 3.
5. A center of the component body in the second direction overlaps with the third surface when viewed from the first direction.
3. The semiconductor memory device according to claim 1.
6. the substrate further includes a second depression provided at a position different from the first depression on the third surface and extending in the second direction, and a second conductive portion provided on an inner surface of the second depression; The electronic component further includes a second lead protruding from the component body, the second lead has a third portion protruding from the component body toward the second recess and a fourth portion bent from the third portion and extending along an inner surface of the second recess, and the fourth portion is fixed to the second conductive portion with at least a portion of the third portion overlapping the second recess when viewed from the first direction.
3. The semiconductor memory device according to claim 1.
7. the substrate has a space which is an opening or a notch, The component body is disposed in the space.
3. The semiconductor memory device according to claim 1.
8. a support component attached to the substrate and supporting the electronic component; The support component has a first base portion in contact with the first surface and a support portion that supports the component main body.
3. The semiconductor memory device according to claim 1.
9. The first base portion is fixed to the first surface.
9. The semiconductor memory device according to claim 8.
10. The support component further includes a second base portion in contact with the third surface.
9. The semiconductor memory device according to claim 8.
11. the second base portion has an insertion portion penetrating the second base portion in the first direction and through which the first lead is passed; The semiconductor memory device according to claim 10.
12. a housing that houses the board, the semiconductor memory, the controller, and the electronic components; the housing has a first wall facing the substrate from a first side in the second direction and a second wall facing the substrate from a second side opposite to the first side in the second direction, the first wall has a first non-flat portion that is recessed or open in a direction away from the component body at a position that overlaps with the component body when viewed from the second direction, The second wall has a second non-flat portion that is recessed or opened in a direction away from the component body at a position that overlaps with the component body when viewed from the second direction.
3. The semiconductor memory device according to claim 1.
13. a first cushioning material disposed between the first non-flat portion and the component body and having greater elasticity than the first wall; a second cushioning material disposed between the second non-flat portion and the component body and having greater elasticity than the second wall; The semiconductor memory device according to claim 12 , further comprising:
Citation Information
Patent Citations
Semiconductor storage device
US20220087072A1