Gate driver circuit, motor drive device using the same, and electronic device

Abstract

To restrain through-current and ringing caused by reverse recovery current of a flywheel diode.SOLUTION: A first current source CS1 is configured to generate a first current Ix that can be switched between a first current amount Ia and a second current amount Ib less than the first current amount Ia. A first current mirror circuit CM1 has an input node to which the first current source CS1 is connected, and is configured to fold back the first current Ix and supply it to the gate of a power transistor MH. An on-fixing switch SW2 is connected between the gate of the power transistor MH and a high level line 412 in which a high voltage VH corresponding to the high level of the gate voltage of the power transistor MH is generated. A control circuit 210 is configured to control the on-fixing switch SW2 and the first current source CS1.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a gate driver circuit. [Background technology]

[0002] Half-bridge circuits, H-bridge circuits, and three-phase bridge circuits (hereinafter collectively referred to as bridge circuits) that use power transistors are widely used in motor driver circuits, DC / DC converters, power conversion devices, and the like.

[0003] 1 is a circuit diagram of a bridge circuit 10. The bridge circuit 10 includes an upper arm 12 and a lower arm 14 that are connected in series between a power supply terminal and a ground terminal. The upper arm 12 includes a high-side transistor MH and a flywheel diode Di that are connected in parallel. The lower arm 14 includes a low-side transistor ML and a flywheel diode Di that are connected in parallel. An inductor (coil) L1, which serves as a load, is connected to the output terminal of the bridge circuit 10.

[0004] The bridge circuit 10 can take a state φ1 in which both the high-side transistor MH and the low-side transistor ML are off (high impedance state), a state φ2 in which the high-side transistor MH is on and the low-side transistor ML is off (high output state), and a state φ3 in which the high-side transistor MH is off and the low-side transistor ML is on (low output state). OUT is discharged (flowing to the right in the figure), and the bridge circuit 10 is in a current source state where the current I OUT In the figure, there is a current sink state in which the current flows to the left. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2018-82575 A

[0006] [overview] As a result of examining the bridge circuit of FIG. 1, the present inventors have come to recognize the following problem.

[0007] Consider a transition from a high impedance state φ1 to a high output state φ2 in the current source state. In state φ1, the output current I OUT is supplied to the load via the flywheel diode Di of the lower arm 14 (current source). OUT -V F It is. F is the forward voltage of the flywheel diode Di.

[0008] In state φ2, the output current I OUT flows through the high-side transistor MH. A reverse recovery current I rc Therefore, the high-side transistor MH has an output current I OUT and reverse recovery current I rc When a through current flows, the output voltage V of the bridge circuit 10 OUT This causes instability and ringing, which is undesirable as it can lead to unwanted radiation.

[0009] The present disclosure has been made in consideration of the above problems, and an exemplary purpose of an embodiment of the present disclosure is to provide a gate driver circuit capable of suppressing shoot-through current and ringing caused by reverse recovery current of an opposite-side flywheel diode.

[0010] An embodiment of the present disclosure relates to a gate driver circuit for driving an N-type power transistor constituting a switching circuit. The gate driver circuit includes a turn-on circuit configured to source a current to a gate of the power transistor, a turn-off circuit configured to sink a current from the gate of the power transistor, and a control circuit for controlling the turn-on circuit and the turn-off circuit. The turn-on circuit includes a first current source configured to generate a first current switchable between a first current amount and a second current amount less than the first current amount, a first current mirror circuit having an input node connected to the first current source and configured to fold back the first current and supply it to the gate of the power transistor, and a fixed-on switch connected between the gate of the power transistor and a high-level line generating a high voltage corresponding to a high level of the gate voltage of the power transistor. The control circuit is configured to control the fixed on switch and the first current source, and in response to an instruction to turn on the power transistor, the control circuit is configured to: (i) set the first current to a first current amount and turn off the fixed on switch in a first period, (ii) set the first current to a second current amount and turn off the fixed on switch in a second period, and (iii) turn on the fixed on switch in a third period.

[0011] Any combination of the above components, and mutual substitution of the components and expressions of the present disclosure between methods, devices, systems, etc. are also valid aspects of the present invention. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a circuit diagram of a bridge circuit. [Diagram 2] FIG. 2 is a circuit diagram of a switching circuit according to an embodiment. [Diagram 3] FIG. 3 is a circuit diagram of a gate driver circuit according to the embodiment. [Figure 4] FIG. 4 is an operational waveform diagram of the gate driver circuit of FIG. [Diagram 5]FIG. 5 is a circuit diagram of a drive circuit including a gate driver circuit. [Figure 6] FIG. 6 is a circuit diagram showing a configuration example of the turn-on circuit. [Figure 7] FIG. 7 is a circuit diagram of the drive circuit. [Figure 8] FIG. 8 is an operational waveform diagram of the drive circuit according to sequence modification example 1. In FIG. [Figure 9] FIG. 9 is an operational waveform diagram of the drive circuit according to sequence modification example 2. In FIG. [Figure 10] FIG. 10 is a circuit diagram of a motor drive device including a switching circuit according to an embodiment.

[0013] [Detailed Description] (Overview of the embodiment) A summary of some exemplary embodiments of the present disclosure will be described. This summary is intended to provide a simplified description of some concepts of one or more embodiments for the purpose of providing a basic understanding of the embodiments as a prelude to the detailed description that follows, and is not intended to limit the scope of the invention or disclosure. For convenience, the term "one embodiment" may be used to refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed in this specification.

[0014] This summary is not an exhaustive overview of all possible embodiments, nor is it intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later.

[0015] A gate driver circuit according to one embodiment drives an N-type power transistor constituting a switching circuit. The gate driver circuit includes a turn-on circuit configured to source a current to a gate of the power transistor, a turn-off circuit configured to sink a current from the gate of the power transistor, and a control circuit for controlling the turn-on circuit and the turn-off circuit. The turn-on circuit includes a first current source configured to generate a first current switchable between a first current amount and a second current amount less than the first current amount, a first current mirror circuit having an input node connected to the first current source and configured to mirror the first current and supply it to the gate of the power transistor, and a fixed-on switch connected between the gate of the power transistor and a high-level line generating a high voltage corresponding to a high level of the gate voltage of the power transistor. The control circuit is configured to control the fixed on switch and the first current source, and in response to an instruction to turn on the power transistor, the control circuit is configured to: (i) set the first current to a first current amount and turn off the fixed on switch in a first period, (ii) set the first current to a second current amount and turn off the fixed on switch in a second period, and (iii) turn on the fixed on switch in a third period.

[0016] According to this aspect, a first period is set to a period immediately before the power transistor is turned on, and a drive current of a first current amount is supplied to the gate of the power transistor to raise the gate voltage. Then, during a second period after the power transistor is turned on and during which a reverse recovery current may flow through the flywheel diode of the opposite arm, the drive current supplied to the gate of the power transistor is reduced to slowly turn on the power transistor while keeping the on-resistance of the power transistor large. This makes it possible to suppress shoot-through current and ringing caused by the reverse recovery current of the flywheel diode of the opposite arm. Next, during a third period during which the reverse recovery current is less likely to flow, the amount of current supplied to the gate is increased more than that of the second period, thereby shortening the turn-on time of the power transistor and reducing power consumption. Furthermore, during both the first and second periods, the first current mirror circuit operates and the amount of input current of the first current mirror circuit is switched, so that the current supplied to the gate changes slowly when switching to the second period. This makes it possible to further reduce power consumption.

[0017] In one embodiment, the current supplied to the gate of the power transistor in the third period may be greater than the current supplied to the gate of the power transistor in the first and second periods. After the influence of the reverse recovery characteristic of the flywheel diode of the opposite arm becomes small, the amount of current supplied to the gate of the power transistor can be increased to reduce the on-resistance of the power transistor in a short time, and the efficiency of the bridge circuit can be improved.

[0018] In one embodiment, the fixed-on switch includes multiple transistors arranged on multiple paths in parallel, and the number of transistors that are in operation may be variable. The impedance of the fixed-on switch is adjustable according to the number of transistors that are on.

[0019] In one embodiment, the control circuit may turn on some of the multiple transistors during the first period, thereby increasing the rate at which the gate voltage of the power transistor rises during the first period and shortening the turn-on time.

[0020] In one embodiment, the control circuit may turn on all of the transistors in a fourth period following the third period. This allows the power transistor to be fixed in an on state. Also, a switch for fixing the power transistor in an on state may be used as a turn-on circuit.

[0021] In one embodiment, the control circuit may further include a first enable switch connected between the output node of the first current mirror circuit and the gate of the power transistor. Depending on the state of the first enable switch, it becomes possible to switch between enable and disable of the first current mirror circuit, and by disabling the first current mirror circuit, it is possible to reduce power consumption.

[0022] In one embodiment, the control circuit may turn on the first enabling switch in the first period and the second period, and turn off the first enabling switch in a fourth period following the third period.

[0023] In one embodiment, the control circuit may turn on the first enable switch in the third period. When transitioning from the second period to the third period, the first current mirror circuit continues to operate, so that discontinuity in the current generated by the current mirror circuit can be suppressed.

[0024] In one embodiment, the control circuit may turn off the first enabling switch in the third period.

[0025] In one embodiment, the control circuit may turn on the fixed-on switch in a fourth period following the third period.

[0026] In one embodiment, the first current mirror circuit may further have a second output node. The turn-off circuit may include a second current mirror circuit having an input node connected to the second output node of the first current mirror circuit and an output node, a second enable switch connected between the output node of the second current mirror circuit and the gate of the power transistor, and a fixed-off switch connected between the gate of the power transistor and a low level line generating a low voltage corresponding to a low level of the gate voltage of the power transistor.

[0027] In one embodiment, the first current source may include an output node, a first constant current circuit connected to the output node, a first switch and a second constant current circuit connected in series between the output node and ground, and a second switch and a third constant current circuit connected in series between the output of the second constant current circuit and ground. Since the current generated by the first constant current circuit is always supplied to the first current mirror circuit, the operating point of the first current mirror circuit when the first enabling switch is off can be maintained close to the operating point during operation when the first enabling switch is on. This allows the first current mirror circuit to start operating quickly when the first enabling switch is switched from off to on.

[0028] In one embodiment, the gate driver circuit may further include a first sensor that compares the gate-source voltage of the power transistor with a first threshold voltage. The control circuit may transition to the second period in response to an output change of the first sensor in the first period. By monitoring the gate-source voltage of the power transistor, the magnitude of the drive current can be changed in conjunction with the transition of the power transistor from an off state to an on state. The first threshold voltage may be equal to, higher than, or lower than the gate threshold voltage of the MOSFET.

[0029] In one embodiment, the first sensor may be shared with a high-side off sensor that detects when the high-side transistor is turned off. This allows the drive current to be reduced before the high-side transistor is turned on. Also, an increase in the circuit area can be suppressed.

[0030] In one embodiment, the gate driver circuit may further include a second sensor that compares the output voltage of the switching circuit with a second threshold voltage. The control circuit may transition to a third period in response to a change in the output of the second sensor in the second period. By monitoring the output voltage, it is possible to detect that the effect of the reverse recovery characteristic of the flywheel diode of the opposite arm has become smaller.

[0031] In one embodiment, the gate driver circuit may further include a third sensor that compares the output voltage of the switching circuit with a third threshold voltage. The control circuit may transition to the fourth period in response to a change in the output of the third sensor during the third period.

[0032] In one embodiment, the gate driver circuit may be monolithically integrated on a single semiconductor substrate. "Monolithic integration" includes cases where all of the circuit components are formed on a semiconductor substrate, and cases where the main components of the circuit are monolithically integrated, and some resistors, capacitors, etc. may be provided outside the semiconductor substrate for adjusting the circuit constants. By integrating the circuit on a single chip, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.

[0033] A motor drive circuit according to one embodiment includes a bridge circuit including a high-side transistor and a low-side transistor, a high-side driver which is any of the gate driver circuits described above that drives the high-side transistor as a power transistor, and a low-side driver which is any of the gate driver circuits described above that drives the low-side transistor as a power transistor.

[0034] An electronic device according to an embodiment includes a motor and the above-described motor drive device that drives the motor.

[0035] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing are given the same reference numerals, and duplicated descriptions will be omitted as appropriate. In addition, the embodiments are illustrative and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0036] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0037] Similarly, "a state in which component C is provided between components A and B" includes not only the case in which components A and C, or components B and C, are directly connected to each other, but also the case in which they are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the functions or effects achieved by their combination.

[0038] 2 is a circuit diagram of a switching circuit 100 according to an embodiment. The switching circuit 100 includes a bridge circuit 110 and a drive circuit 200. Although only the configuration of one phase of the switching circuit 100 is shown here, the switching circuit 100 may be a three-phase circuit or an H-bridge circuit.

[0039] The bridge circuit 110 includes an upper arm 112 provided between a power supply line (input line) 102 and an output terminal (output line) 104, and a lower arm 114 provided between the output line 104 and a ground line 106. The upper arm 112 includes a high-side transistor MH and a flywheel diode (freewheel diode) Di connected in parallel. The lower arm 114 includes a low-side transistor ML and a flywheel diode Di connected in parallel. In this embodiment, the high-side transistor MH and the low-side transistor ML are N-channel MOSFETs, and their respective body diodes also function as the flywheel diode Di.

[0040] The drive circuit 200 controls the upper arm 112 and the lower arm 114 of the bridge circuit 110. The drive circuit 200 switches between three states: a high impedance state φ1 in which the upper arm 112 and the lower arm 114 are both off, a high output state φ2 in which the upper arm 112 is on and the lower arm 114 is off, and a low output state φ3 in which the upper arm 112 is off and the lower arm 114 is on. The output current I OUT The direction of current I from the output line 104 of the bridge circuit 110 to the load, the inductor L1, is taken as positive, and the opposite direction is taken as negative. OUT is positive (current source), and the output current I OUT In this case, there are states φ1B to φ3B in which the input is negative (current sink).

[0041] The drive circuit 200 is a functional IC that includes a control circuit 210, a high-side driver circuit 220, and a low-side driver circuit 260, and is integrated on a single semiconductor substrate. The control circuit 210 selects one of states φ1 to φ3 according to the load state of the bridge circuit 110, and generates control signals HGCTL and LGCTL according to each of the states φ1 to φ3. In state φ1, the high-side control signal HGCTL and the low-side control signal LGCTL are both at an off level (for example, low). In state φ2, the high-side control signal HGCTL is at an on level (for example, high), and the low-side control signal LGCTL is at an off level. In state φ3, the high-side control signal HGCTL is at an off level, and the low-side control signal LGCTL is at an on level.

[0042] The high-side driver circuit 220 receives a high-side control signal HGCTL at an input node IN, and an output node OUT is connected to the gate of the high-side transistor MH via a high-side gate pin HG. When the high-side control signal HGCTL transitions from an off level to an on level, the high-side driver circuit 220 supplies a driving current I HG_ON and supplies the gate-source voltage V of the high-side transistor MH. GS When the high-side control signal HGCTL transitions from an ON level to an OFF level, the high-side driver circuit 220 supplies a driving current I HG_OFF Pull out the gate-source voltage V GS This causes the high-side transistor MH to turn off.

[0043] The high-side driver circuit 220 can select a number of operation modes when the high-side transistor MH is turned on, one of which is referred to as a first mode. In the first mode, the high-side driver circuit 220 controls the drive current I HG_ON is changed in multiple stages.

[0044] In the first mode, the high-side driver circuit 220 controls a first current amount I 1 The driving current I HG_ON During a second period T2 following the first period T1, a first current amount I 1 The second current I is smaller 2 The driving current I HG_ON Then, in a third period T3 following the second period T2, the first current amount I 1 and the second current I 2 The third current I is greater than 3 The driving current I HG_ON Output.

[0045] The high-side driver circuit 220 is configured to be operable in a second mode in addition to the first mode. In the second mode, the driving current I HG_ON The waveform of the driving current I HG_ON The second current amount I 2 The constant amount Ic is greater than the first current amount I 1 ~3rd current amount I 3 The number of the above-mentioned components may be more than one of the above.

[0046] The low-side driver circuit 260 receives a low-side control signal LGCTL at an input node IN, and an output node OUT is connected to the gate of the low-side transistor ML via a low-side gate pin LG. When the low-side control signal LGCTL transitions from an off level (for example, low) to an on level (high), the low-side driver circuit 260 supplies a driving current I LG_ON and supplies the gate-source voltage V of the low-side transistor ML. GSWhen the low-side control signal LGCTL transitions from an ON level to an OFF level, the low-side driver circuit 260 supplies a driving current I LG_OFF Pull out the gate-source voltage V GS , turning off the low-side transistor ML.

[0047] Like the high-side driver circuit 220, the low-side driver circuit 260 is configured to be switchable between a first mode and a second mode.

[0048] In the first mode, the low-side driver circuit 260 controls the driving current I LG_ON is changed in multiple stages.

[0049] In the first mode, the low-side driver circuit 260 outputs a fourth current amount I 4 The driving current I LG_ON During a fifth period T5 following the fourth period T4, a fourth current amount I 4 The fifth current I is smaller 5 The driving current I LG_ON Then, in a sixth period T6 following the fifth period T5, a fourth current amount I 4 and the fifth current I 5 More than 6th current I 6 The driving current I LG_ON Output.

[0050] In the second mode, the driving current I LG_ON The waveform of the driving current I LG_ON The fifth current amount I 5 The constant amount Id is greater than the fourth current amount I4 ~6th current amount I 6 The number of the above-mentioned components may be more than one of the above.

[0051] The above is the configuration of the switching circuit 100. Next, the operation will be described.

[0052] First, we will explain the operation of the high-side driver circuit 220. The high-side driver circuit 220 operates in a first mode when a reverse recovery current of the flywheel diode of the lower arm 114 may occur, and operates in a second mode when a reverse recovery current of the flywheel diode of the lower arm 114 does not occur.

[0053] Specifically, in the high-side driver circuit 220, the high-side transistor MH and the low-side transistor ML are off, and a current I OUT When the high-side transistor MH is turned on (source rise) from the state φ1A in which the current is sourced, the device operates in the first mode.

[0054] In addition, in the high-side driver circuit 220, the high-side transistor MH is off and the low-side transistor ML is on, and a current I OUT The input current flows through the high-side transistor MH and the high-side transistor MH is turned on (sink rise). This causes the input current to flow through the high-side transistor MH. The input current flows through the high-side transistor MH and the high-side transistor MH is turned on (sink rise). This causes the input current to flow through the high-side transistor MH and the high-side transistor MH to turn on (sink rise).

[0055] 3 is a circuit diagram of a gate driver circuit 400 according to an embodiment. Here, the gate driver circuit 400 is the high-side driver circuit 220 in FIG. 2, and drives the high-side transistor MH that forms the upper arm.

[0056] The turn-on circuit 410 supplies an on-current I to the gate of the high-side transistor MH, which is an N-type power transistor. HG_ON The turn-off circuit 420 is configured to source a current I from the gate of the high-side transistor MH. HG_OFF The device is configured to sink the

[0057] The turn-on circuit 410 includes a first current source CS1, a first current mirror circuit CM1, a first enable switch SW1, and a fixed-on switch SW2.

[0058] The first current source CS1 outputs a first current Ix in an ON state. The first current source CS1 is configured to be able to switch the amount of the first current Ix between a first current amount Ia and a second current amount Ib that is smaller than the first current amount Ia.

[0059] In the off state, the first current source CS1 may set the first current Ix to completely zero, but is preferably configured to output a minute amount of current Ic.

[0060] The first current mirror circuit CM1 has a first current source CS1 connected to an input node in. The first current mirror circuit CM1 folds back the first current Ix and outputs it from a first output node out1. The first enable switch SW1 is provided between the first output node out1 of the first current mirror circuit CM1 and the gate of the high-side transistor MH (i.e., the high-side gate pin HG).

[0061] The fixed-on switch SW2 is connected between the gate of the high-side transistor MH and a high voltage V H The high voltage V Hmay be a bootstrap voltage generated by a bootstrap circuit or may be generated by a charge pump circuit. The on-fixed switch SW2 includes a plurality of transistors MP1 to MPn provided on a plurality of n (n≧2) parallel paths between the high level line 412 and the gate of the high side transistor MH. The plurality of transistors MP1 to MPn can be individually controlled to be turned on and off, and therefore the impedance of the on-fixed switch SW2 is controllable. A state in which all of the plurality of transistors MP1 to MPn are off corresponds to the off state of the on-fixed switch SW2. A state in which at least one of the plurality of transistors MP1 to MPn is on corresponds to the on state of the on-fixed switch SW2. A state in which all of the plurality of transistors MP1 to MPn are on is called a full on state of the on-fixed switch SW2.

[0062] The sizes of the multiple transistors MP1 to MPn may all be equal or may be binary weighted. The size of a transistor is the gate width / gate length (W / L).

[0063] The control circuit 210 generates a control signal HGCTL that indicates the states of the turn-on circuit 410 and the turn-off circuit 420. Specifically, the control circuit 210 is configured to control, for the turn-on circuit 410, the first current source CS1, the first enable switch SW1, and the fixed-on switch SW2.

[0064] In the first mode, the control circuit 210 operates in the following sequence in response to an instruction to turn on the high-side transistor MH.

[0065] (i) First Period T1 The first current source CS1 is turned on. The first current Ix of the first current source CS1 is a first current amount Ia. The first enable switch SW1 is turned on, and the fixed on switch SW2 is turned off.

[0066] In the first period T1, a first current I 1The current I HG_ON When the mirror ratio of the first current mirror circuit CM1 is α, the first current amount I 1 is expressed by the following formula: I 1 = Ia × α

[0067] (ii) Second Period T2 The first current Ix is reduced to the second current amount Ib while the first current source CS1 is kept on. The first enable switch SW1 is kept on, and the fixed on switch SW2 is kept off.

[0068] In the second period T2, a second current I 2 The current I HG_ON The second current I 2 is expressed by the following formula: I 2 =Ib×α Ib <Iaであるから、I 2 1 It becomes.

[0069] (iii) Third Period T3 The first current source CS1 is on, the first current Ix is maintained at the second current amount Ib, and the first enable switch SW1 is on. The fixed-on switch SW2 is switched on. In the third period T3, at least one of the transistors MP1 to MPn constituting the fixed-on switch SW2 is turned on.

[0070] In the third period T3, a third current I 3 The current I HG_ON The transistor that is turned on in the third period T3 is I 3 >I 1 is selected to satisfy

[0071] More preferably, the transistors that are turned on during the third period T3 are selected so that the transistors that are turned on operate in the saturation region.

[0072] ​(iv) 4th period T4 The first current source CS1 and the first enable switch SW1 are turned off, and the on-fixed switch SW2 is turned on. The on-fixed switch SW2 turns on all the transistors MP1 to MPn.

[0073] 4 is an operation waveform diagram of the gate driver circuit 400 of FIG. 3. The control signal CTRL is a logic signal that indicates the state of the bridge circuit 110. The current I MH is the current flowing through the high-side transistor MH, and the current I ML indicates the current flowing through the low-side transistor ML. The current flowing from the drain to the source is considered positive. V LG is the gate voltage (gate-source voltage) of the low-side transistor ML. V HG is the gate voltage of the high-side transistor MH, and V OUT indicates the output voltage. V HG and V OUT The potential difference is the gate-source voltage of the high-side transistor MH.

[0074] time t 0 Before this, the control signal CTRL is at a low level, the high-side transistor MH is off, the low-side transistor ML is on, and the output voltage V OUT is set to low voltage (0V).

[0075] Figure 4 shows the current source mode operation. 0 In front of the low-side transistor ML, a negative current I ML is flowing.

[0076] time t 0 At this time, the control signal CTRL transitions to a high level. As a result, the low-side driver circuit 260 controls the gate voltage V LG , turning off the low-side transistor ML.

[0077] time t 1 , the gate voltage V of the low-side transistor MLLG When the voltage Vth becomes lower than the fourth threshold voltage Vth4, the high-side driver circuit 220 becomes active. In the first period T1, the turn-on circuit 410 supplies a first current amount I 1 The current I HG_ON is supplied to the gate of the high-side transistor MH.

[0078] And at time t 2 The gate-source voltage V of the high-side transistor MH HG -V OUT When the first threshold voltage Vth1 is exceeded, the second period T2 begins. In the second period T2, the turn-on circuit 410 supplies a second current I 2 The current I HG_ON to the gate of the high-side transistor MH. 2 is the first current I 1 Less than.

[0079] And at time t 3 to the output voltage V OUT When the second threshold voltage Vth2 is exceeded, the third period T3 begins. In the third period T3, the fixed-on switch SW2 is turned on, and the turn-on circuit 410 supplies a third current amount I 3 The current I HG_ON to the gate of the high-side transistor MH. 3 is the first current I 1 and the second current I 2 In the third period T3, the drain-source voltage V DS (=V H -V HG ) is about 9V to 10V, and the device is operating in the saturation region. In the saturation region, the drain current does not depend on the drain-source voltage, so the third current amount I 3 It has the advantage that it is easy to control.

[0080] And at time t 4 to the output voltage V OUT is the input voltage V INWhen the third threshold voltage Vth3, which is set to be in the vicinity of , is exceeded, the process moves to the fourth period T4, and the on-fixed switch SW2 is in the full-on state. When the on-fixed switch SW2 is in the full-on state, the gate voltage V HG is fixed to a high level voltage, and the high-side transistor MH is strongly fixed to the on state.

[0081] The operation of the switching circuit 100 has been described above.

[0082] According to the switching circuit 100, a first current amount I is supplied to the gate of the high-side transistor MH during a first period T1 until the high-side transistor MH is turned on. 1 The driving current I HG_ON and gate voltage V HG Then, during a second period T2 during which a reverse recovery current can flow through the flywheel diode of the lower arm after the high-side transistor MH is turned on, the driving current I HG_ON The second current I 2 By decreasing the ON resistance of the high-side transistor MH to 1, the high-side transistor MH is turned on gradually while maintaining a large ON resistance. This makes it possible to suppress shoot-through current and ringing caused by the reverse recovery current of the flywheel diode in the arm opposite to the upper arm that is the driving target of the drive circuit 200, i.e., the lower arm.

[0083] Next, in the third period T3 in which the reverse recovery current is unlikely to flow, the drive current I HG_ON The third current amount I is greater than the second period T2. 3 , the turn-on time of the high-side transistor MH can be shortened, and power consumption can be reduced.

[0084] Furthermore, in both the first period T1 and the second period T2, the first current mirror circuit CM1 operates to change the amount of the input current Ix of the first current mirror circuit CM1. Therefore, when switching from the first period T1 to the second period T2, the driving current IHG_ON is the first current I 1 to the second current I 2 This allows for further reduction in power consumption.

[0085] Furthermore, in the third period T3, the driving current I HG_ON is the first current amount I 1 This makes it possible to reduce the on-resistance of the high-side transistor MH in a short time, thereby further improving the efficiency of the bridge circuit.

[0086] Next, a configuration example of the turn-off circuit 420 will be described.

[0087] 5 is a circuit diagram of the drive circuit 200A including a gate driver circuit 400A. The gate driver circuit 400A includes a turn-on circuit 410A and a turn-off circuit 420A.

[0088] The basic configuration of the turn-on circuit 410A is similar to that of FIG. 3, and includes a first current source CS1, a first current mirror circuit CM1, a first enable switch SW1, and a fixed-on switch SW2.

[0089] The first current mirror circuit CM1 has a second output node out2. The first current mirror circuit CM1 mirrors the current Ix and supplies a current Ix' to the turn-off circuit 420A.

[0090] The turn-off circuit 420A includes a second current mirror circuit CM2, a second enable switch SW3, and a fixed-off switch SW4.

[0091] The input node in of the second current mirror circuit CM2 is connected to the second output node out2 of the first current mirror circuit CM1. The second current mirror circuit CM2 reflects the current Ix'. The second enable switch SW3 is provided between the output node out of the second current mirror circuit CM2 and the gate of the high-side transistor MH.

[0092] The off-fixed switch SW4 is connected between the gate and source of the high-side transistor MH. The off-fixed switch SW4 is configured similarly to the on-fixed switch SW2. Specifically, it includes a plurality of transistors MN1 to MNn provided on a plurality of n (n≧2) parallel paths between the gate and source of the high-side transistor MH. The plurality of transistors MN1 to MNn can be individually controlled to be turned on and off, and therefore the impedance of the off-fixed switch SW4 is controllable. A state in which all of the plurality of transistors MN1 to MNn are off corresponds to the off state of the off-fixed switch SW4. A state in which at least one of the plurality of transistors MN1 to MNn is on corresponds to the on state of the off-fixed switch SW4. A state in which all of the plurality of transistors MN1 to MNn are on is called a full on state of the off-fixed switch SW4. The sizes of the plurality of transistors MN1 to MNn may all be equal, or may be weighted in binary.

[0093] The second enable switch SW3 and the fixed-off switch SW4 of the turn-off circuit 420 are controlled in response to a control signal HGCTL generated by the control circuit 210.

[0094] According to this turn-off circuit 420A, when turning off the high-side transistor MH, the drive current I HG_OFF The drive current I HG_ON Similarly, it can be changed in stages.

[0095] Next, a more specific example of the configuration of the turn-on circuit 410 will be described.

[0096] 6 is a circuit diagram showing a configuration example of the turn-on circuit 410. The first current source CS1 includes a first constant current circuit CCS1, a second constant current circuit CCS2, a third constant current circuit CCS3, a first switch SW7, and a second switch SW8.

[0097] The first constant current circuit CCS1 is connected to the output node of the first current source CS1. The first switch SW7 and the second constant current circuit CCS2 are connected in series between the output node and ground. The second switch SW8 and the third constant current circuit CCS3 are connected in series between the output of the second constant current circuit CCS2 and ground.

[0098] When the first current source CS1 is in the off state, the first switch SW7 is off. When the first current source CS1 is in the on state, the first switch SW7 and the second switch SW8 are on during the first period T1. During the second period T2, the first switch SW7 is on and the second switch SW8 is off.

[0099] In the off state, the first current source CS1 continues to output the output current of the first constant current circuit CCS1 as a minute amount of current Ix. This makes it possible to suppress the fluctuation of the operating point of the first current mirror circuit CM1 and to increase the operating speed of the first current mirror circuit CM1. This makes it possible to improve the responsiveness of the turn-on circuit 410.

[0100] 7 is a circuit diagram of the drive circuit 200. The drive circuit 200 may include a first sensor 202, a second sensor 204, a third sensor 206, and a low-side off sensor 208.

[0101] The low-side off sensor 208 detects the turn-off of the low-side transistor ML. The low-side off sensor 208 compares the gate-source voltage of the low-side transistor ML with a fourth threshold voltage Vth4. When the control circuit 210 detects the turn-off of the low-side transistor ML based on the output of the low-side off sensor 208, the control circuit 210 transitions to the first period t1.

[0102] The first sensor 202 detects the gate-source voltage V GS is compared with a first threshold voltage Vth1. The first threshold voltage Vth1 is the threshold voltage V GS(th) You can decide based on that.

[0103] The drive circuit 200 is often provided with a high-side off sensor that detects when the high-side transistor MH is turned off. The output of the high-side off sensor is referenced by the control circuit 210. The control circuit 210 monitors the output of the high-side off sensor, and after the high-side transistor MH is definitely turned off, transitions the low-side control signal LGCTL to the on level. This makes it possible to prevent the high-side transistor MH and the low-side transistor ML from being turned on simultaneously, thereby preventing a shoot-through current.

[0104] When the driving circuit 200 includes a high-side off sensor, the first sensor 202 can be shared with the high-side off sensor, thereby reducing the circuit area.

[0105] In the first period T1, when the output of the first sensor 202 changes, that is, when the gate-source voltage V GS When the first threshold voltage Vth1 exceeds the threshold voltage Vth1, the period transitions to the second period T2. GS(th) If it is set lower, the high-side driver circuit 220 can be shifted to the second period T2 before the high-side transistor MH is turned on. If the response delay is large, the high-side driver circuit 220 shifts to the second period T2 simultaneously with the turn-on or slightly later.

[0106] Gate-source voltage V of high-side transistor MH GS By monitoring the drive current I HG_ON The size of can be changed.

[0107] The second sensor 204 detects the output voltage V OUT The high-side driver circuit 220 compares the output voltage V with the second threshold voltage Vth2. In response to the output change of the second sensor 204 in the second period T2, the high-side driver circuit 220 transitions to the third period T3.OUT By monitoring this, it is possible to detect that the influence of the reverse recovery characteristic of the flywheel diode Di of the lower arm 114 has become smaller.

[0108] The drive circuit 200 has an output voltage V OUT To detect the completion of a low-to-high transition of the output voltage V OUT is the input voltage V IN In some cases, a sensor (voltage monitoring circuit) that compares the threshold voltage with a threshold voltage that is a predetermined voltage width lower may be provided. In this case, the voltage monitoring circuit may be used as the second sensor 204 to prevent an increase in the circuit area.

[0109] The third sensor 206 outputs an output voltage V OUT , the input voltage V IN The control circuit 210 compares the output of the third sensor 206 with a third threshold voltage Vth3 determined to be in the vicinity of V OUT When exceeds Vth3, the fourth period T4 begins.

[0110] Next, a description will be given of the configuration and operation of the low-side driver circuit 260. The low-side driver circuit 260 can be configured in the same manner as the high-side driver circuit 220.

[0111] The low-side driver circuit 260 operates in a first mode in a situation where a reverse recovery current of the flywheel diode of the upper arm 112 may occur, and operates in a second mode in a situation where a reverse recovery current of the flywheel diode of the upper arm 112 does not occur.

[0112] Specifically, in the low-side driver circuit 260, the high-side transistor MH and the low-side transistor ML are off, and a current I OUT In a situation where the low-side transistor ML is turned on from a state φ1B in which the current is being sinked (sink fall), the inverter operates in the first mode.

[0113] In addition, in the low-side driver circuit 260, the high-side transistor MH is on and the low-side transistor ML is off, and a current I OUT In the situation where the low-side transistor ML is turned on from the sourcing state (source fall), the device operates in the second mode.

[0114] Next, a modified example of the sequence of the driving circuit 200 will be described.

[0115] (Sequence Variation 1) In sequence modification example 1, the control circuit 210 turns on some of the transistors MP1 to MPn that configure the fixed on switch SW2 in the first period T1. The rest is the same as in the embodiment.

[0116] 8 is an operational waveform diagram of the drive circuit 200 according to sequence modification 1. The upper part of FIG. 8 shows a voltage waveform in sequence modification 1. The lower part of FIG. 8 shows a drive current I HG_ON For comparison, the drive current I HG_ON is shown by a dashed line.

[0117] In sequence modification example 1, in the first period T1, the fixed-on switch SW2 is turned on, so that the driving current I HG_ON ' current I 1 4. As a result, the gate voltage V HG The rate of increase in the temperature T2 increases, and the time t 2 In other words, the turn-on time of the high-side transistor MH can be shortened compared to the operation in FIG.

[0118] (Sequence Variation 2) In sequence modification example 2, the control circuit 210 sets the fixed-on switch SW2 to a full-on state in the third period T3. The rest is the same as in the embodiment.

[0119] 9 is an operational waveform diagram of the drive circuit 200 according to sequence modification 2. The upper part of FIG. 9 shows a voltage waveform in sequence modification 2. The lower part of FIG. 8 shows a drive current I HG_ON " is shown by a solid line. CM1 is the drive current I HG_ON ” is supplied from the first current mirror circuit CM1. In the third period T3, the fixed-on switch SW2 is fully turned on, so that the driving current I HG_ON can be further increased, thereby shortening the turn-on time.

[0120] (Sequence Variation 3) Sequence modification example 3 is a combination of sequence modification examples 1 and 2. That is, the control circuit 210 turns on a part of the transistors MP1 to MPn constituting the on-fixed switch SW2 in the first period T1. The control circuit 210 turns on the on-fixed switch SW2 in the third period T3. The rest is the same as the embodiment.

[0121] (Sequence Variation 4) In the embodiment or sequence modifications 1 to 3, the first enable switch SW1 may be turned off in the third period T3.

[0122] (Application) Next, we will explain the applications of the switching circuit 100. The switching circuit 100 can be suitably used in a drive circuit for a motor.

[0123] 10 is a circuit diagram of a motor driving device 300 including a switching circuit 100 according to an embodiment. The motor driving device 300 drives a three-phase motor 302, which is a load, and controls the rotation state.

[0124] Motor driving device 300 includes a bridge circuit 110 and a driving circuit 200. Bridge circuit 110 is a three-phase inverter and has U-phase, V-phase, and W-phase legs, and each phase leg has an upper arm and a lower arm.

[0125] The drive circuit 200 includes a control circuit 210, high-side driver circuits 220U to 220W, and low-side driver circuits 260U to 260W. The control circuit 210 generates control signals indicating the states of the six arms that constitute the bridge circuit 110 based on the state of a three-phase motor 302, which is a load.

[0126] The high-side driver circuits 220U to 220W are configured with the architecture of the above-mentioned high-side driver circuit 220. The low-side driver circuits 260U to 260W are configured with the architecture of the above-mentioned low-side driver circuit 260.

[0127] Although a three-phase motor is used as an example here, a single-phase motor may also be used, in which case the bridge circuit 110 becomes an H-bridge circuit.

[0128] Next, applications of the motor drive device 300 will be described. The motor drive device 300 can be used to control the spindle motor of a hard disk, or the lens drive motor of an imaging device. Alternatively, the motor drive device 300 can be used to drive a printer head drive motor, or a paper feed motor. Alternatively, the motor drive device 300 can be used to drive a motor in an electric vehicle, a hybrid vehicle, or the like.

[0129] The embodiments are merely examples, and it will be understood by those skilled in the art that various modifications are possible in the combination of each component and each processing step, and that such modifications are also within the scope of the present disclosure or the present invention. Such modifications will be described below.

[0130] (Variation 1) In the embodiment, the bridge circuit 110 is configured with discrete components, but this is not a limitation, and the bridge circuit 110 may be integrated into the drive circuit 200.

[0131] (Variation 2) The upper arm 112 and the lower arm 114 may be configured with an IGBT (Insulated Gate Bipolar Transistor).

[0132] (Variation 3) In the embodiment, both the high-side driver circuit 220 and the low-side driver circuit 260 are capable of selecting a plurality of modes, but only one of them may be configured to be mode controllable.

[0133] (Variation 4) In the embodiment, the first current mirror circuit CM1 can be switched between enabled and disabled by the first enable switch SW1, but the present disclosure is not limited thereto. For example, the first enable switch SW1 may be connected between the gate and source of the PMOS transistor constituting the first current mirror circuit CM1, and the first current mirror circuit CM1 may be disabled by turning on the first enable switch SW1. Alternatively, the first enable switch SW1 may be omitted. The same applies to the second enable switch SW3.

[0134] (Variation 5) The application of the switching circuit 100 is not limited to the motor drive device 300. For example, the switching circuit 100 can be suitably used in switching regulators (DC / DC converters), various power conversion devices (inverters and converters), inverters for lighting discharge lamps, digital audio amplifiers, etc. Therefore, the switching circuit 100 can be used in consumer devices including electronic devices and home appliances, automobiles and in-vehicle parts, industrial vehicles and industrial machines.

[0135] The embodiments described using specific terms merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted in the embodiments without departing from the spirit of the present invention as defined in the claims.

[0136] (Additional Note) The present specification discloses the following techniques:

[0137] (Item 1) A gate driver circuit for driving an N-type power transistor constituting a switching circuit, a turn-on circuit configured to source a current to a gate of the power transistor; a turn-off circuit configured to sink current from the gate of the power transistor; a control circuit for controlling the turn-on circuit and the turn-off circuit; Equipped with The turn-on circuit includes: a first current source configured to generate a first current switchable between a first current amount and a second current amount less than the first current amount; a first current mirror circuit having an input node connected to the first current source and configured to mirror the first current and supply it to the gate of the power transistor; a fixed-on switch connected between a gate of the power transistor and a high level line generating a high voltage corresponding to a high level of a gate voltage of the power transistor; Including, the control circuit is configured to control the fixed-on switch and the first current source; The control circuit, in response to an instruction to turn on the power transistor, (i) during a first period, the first current is set to the first current amount, and the fixed on switch is turned off; (ii) during a second period, the first current is set to the second current amount, and the fixed on switch is turned off; (iii) a gate driver circuit configured to turn on the fixed-on switch in a third period.

[0138] (Item 2) 2. The gate driver circuit of item 1, wherein a current supplied to the gate of the power transistor in the third period is greater than a current supplied to the gate of the power transistor in the first period and the second period.

[0139] (Item 3) 3. The gate driver circuit according to item 1 or 2, wherein the fixed-on switch includes a plurality of transistors provided on a plurality of paths in parallel, and the number of operating transistors is variable.

[0140] (Item 4) 4. The gate driver circuit of claim 3, wherein the control circuit turns on some of the plurality of transistors during the first period.

[0141] (Item 5) 5. The gate driver circuit of claim 3, wherein the control circuit turns on all of the plurality of transistors in a fourth period following the third period.

[0142] (Item 6) 6. The gate driver circuit of any one of items 1 to 5, further comprising a first enable switch connected between an output node of the first current mirror circuit and the gate of the power transistor.

[0143] (Item 7) 7. The gate driver circuit of item 6, wherein the control circuit turns on the first enable switch in the first period and the second period, and turns off the first enable switch in a fourth period following the third period.

[0144] (Item 8) 8. The gate driver circuit of claim 6, wherein the control circuit turns on the first enable switch during the third period.

[0145] (Item 9) 8. The gate driver circuit of claim 6, wherein the control circuit turns off the first enable switch during the third period.

[0146] (Item 10) 10. The gate driver circuit according to any one of items 1 to 9, wherein the control circuit turns on the fixed on switch in a fourth period following the third period.

[0147] (Item 11) the first current mirror circuit further has a second output node; The turn-off circuit includes: a second current mirror circuit having an input node connected to the second output node of the first current mirror circuit, and an output node; a second enable switch connected between the output node of the second current mirror circuit and the gate of the power transistor; a fixed-off switch connected between a gate of the power transistor and a low level line generating a low voltage corresponding to a low level of a gate voltage of the power transistor; 11. A gate driver circuit according to any one of items 1 to 10, comprising:

[0148] (Item 12) The first current source is An output node; a first constant current circuit connected to the output node; a first switch and a second constant current circuit connected in series between the output node and ground; a second switch and a third constant current circuit connected in series between the output of the second constant current circuit and the ground; 12. The gate driver circuit of any one of items 1 to 11, comprising:

[0149] (Item 13) a first sensor for comparing a gate-source voltage of the power transistor with a first threshold voltage; 13. The gate driver circuit of any one of items 1 to 12, wherein the control circuit transitions to the second period in response to a change in the output of the first sensor in the first period.

[0150] (Item 14) a second sensor for comparing the output voltage of the switching circuit to a second threshold voltage; 14. The gate driver circuit of any one of items 1 to 13, wherein the control circuit transitions to the third period in response to a change in the output of the second sensor in the second period.

[0151] (Item 15) a third sensor for comparing an output voltage of the switching circuit with a third threshold voltage; 8. The gate driver circuit of claim 5, wherein the control circuit transitions to the fourth period in response to a change in the output of the third sensor during the third period.

[0152] (Item 16) 16. A gate driver circuit according to any one of items 1 to 15, monolithically integrated on a single semiconductor substrate.

[0153] (Item 17) a bridge circuit including a high-side transistor and a low-side transistor; 17. A high-side driver, which is a gate driver circuit according to any one of items 1 to 16, for driving the high-side transistor as the power transistor; 17. A low-side driver, which is a gate driver circuit according to any one of items 1 to 16, for driving the low-side transistor as the power transistor; A motor drive device comprising:

[0154] (Item 18) A motor; Item 18: A motor driving device according to item 17 for driving the motor; An electronic device comprising: [Explanation of symbols]

[0155] 100 Switching Circuits 102 Power Line 104 Output Line 106 Ground Line 110 Bridge Circuit 112 Upper Arm 114 Lower Arm MH High Side Transistor ML Low Side Transistor Di Flywheel Diode 200 Drive circuit 202 First Sensor 204 Second Sensor 206 3rd Sensor 208 Low side off sensor 210 Control circuit 220 High-side driver circuit 260 Low-side driver circuit 300 Motor drive unit 302 Three-phase motor 400 Gate driver circuit 410 Turn-on circuit 412 High Level Line CS1 1st current source CS2 2nd current source CM1 First current mirror circuit SW1 First enable switch SW2 Fixed on switch SW3 Second enable switch SW4 Fixed off switch 420 Turn-off circuit 422 High Sideline CM3 3rd current mirror circuit CM4 4th current mirror circuit CCS1 1st constant current circuit CCS2 2nd constant current circuit CCS3 3rd constant current circuit CCS4 4th constant current circuit CCS5 5th constant current circuit SW7 1st switch SW8 Second switch SW9 9th switch

Claims

1. A gate driver circuit for driving an N-type power transistor constituting a switching circuit, a turn-on circuit configured to source a current to a gate of the power transistor; a turn-off circuit configured to sink current from the gate of the power transistor; a control circuit for controlling the turn-on circuit and the turn-off circuit; Equipped with The turn-on circuit includes: a first current source configured to generate a first current switchable between a first current amount and a second current amount less than the first current amount; a first current mirror circuit having an input node to which the first current source is connected and configured to mirror back the first current and supply it to the gate of the power transistor; a fixed-on switch connected between a gate of the power transistor and a high level line generating a high voltage corresponding to a high level of a gate voltage of the power transistor; Including, the control circuit is configured to control the fixed-on switch and the first current source; The control circuit, in response to an instruction to turn on the power transistor, (i) during a first period, the first current is set to the first current amount, and the fixed on switch is turned off; (ii) during a second period, the first current is set to the second current amount, and the fixed on switch is turned off; (iii) a gate driver circuit configured to turn on the fixed-on switch in a third period.

2. 2. The gate driver circuit according to claim 1, wherein a current supplied to the gate of the power transistor in the third period is greater than a current supplied to the gate of the power transistor in the first period and the second period.

3. 3. The gate driver circuit according to claim 1, wherein the fixed-on switch includes a plurality of transistors provided on a plurality of paths connected in parallel, and the number of operating transistors is variable.

4. The gate driver circuit according to claim 3 , wherein the control circuit turns on some of the plurality of transistors during the first period.

5. The gate driver circuit according to claim 3 , wherein the control circuit turns on all of the plurality of transistors in a fourth period following the third period.

6. 3. The gate driver circuit of claim 1, further comprising a first enable switch connected between an output node of the first current mirror circuit and the gate of the power transistor.

7. The gate driver circuit according to claim 6 , wherein the control circuit turns on the first enable switch in the first period and the second period, and turns off the first enable switch in a fourth period following the third period.

8. The gate driver circuit according to claim 6 , wherein the control circuit turns on the first enable switch during the third period.

9. The gate driver circuit according to claim 6 , wherein the control circuit turns off the first enable switch during the third period.

10. The gate driver circuit according to claim 1 , wherein the control circuit turns on the fixed-on switch in a fourth period following the third period.

11. the first current mirror circuit further has a second output node; The turn-off circuit includes: a second current mirror circuit having an input node connected to the second output node of the first current mirror circuit, and an output node; a second enable switch connected between the output node of the second current mirror circuit and the gate of the power transistor; a fixed-off switch connected between a gate of the power transistor and a low level line generating a low voltage corresponding to a low level of a gate voltage of the power transistor; 3. A gate driver circuit as claimed in claim 1 or 2, comprising:

12. The first current source is An output node; a first constant current circuit connected to the output node; a first switch and a second constant current circuit connected in series between the output node and ground; a second switch and a third constant current circuit connected in series between the output of the second constant current circuit and the ground; 3. A gate driver circuit as claimed in claim 1 or 2, comprising:

13. a first sensor for comparing a gate-source voltage of the power transistor with a first threshold voltage; 3. The gate driver circuit according to claim 1, wherein the control circuit transitions to the second period in response to a change in the output of the first sensor during the first period.

14. a second sensor for comparing the output voltage of the switching circuit to a second threshold voltage; 3. The gate driver circuit according to claim 1, wherein the control circuit transitions to the third period in response to a change in the output of the second sensor during the second period.

15. a third sensor for comparing the output voltage of the switching circuit with a third threshold voltage; The gate driver circuit according to claim 5 , wherein the control circuit transitions to the fourth period in response to a change in the output of the third sensor during the third period.

16. 3. The gate driver circuit according to claim 1, wherein the gate driver circuit is monolithically integrated on a single semiconductor substrate.

17. a bridge circuit including a high-side transistor and a low-side transistor; a high-side driver that is a gate driver circuit according to claim 1 or 2, which drives the high-side transistor as the power transistor; a low-side driver that is a gate driver circuit according to claim 1 or 2, which drives the low-side transistor as the power transistor; A motor drive device comprising:

18. A motor; A motor drive device according to claim 17 for driving the motor; An electronic device comprising:

Images