Semiconductor drive device

Abstract

To solve the problem that recovery surge voltage of a semiconductor element of a pair arm cannot be suppressed when a semiconductor element of one of upper / lower arms is switched from an off state to an on state.SOLUTION: A semiconductor drive device includes: a gate drive circuit for outputting a driving signal to a gate terminal of each semiconductor element constituting upper / lower arms of an inverter circuit; and a source potential change circuit for changing source potential of each semiconductor element. When the semiconductor element of one of the upper / lower arms is switched from an off state to an on state, the source potential change circuit changes source potential of the semiconductor element of the other arm. First potential which is source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from the off state to the on state is set to be higher than second potential which is source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the on state.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor driving device. [Background technology]

[0002] In an inverter circuit in which semiconductor elements are configured in upper and lower arms, high speed and low loss are required during switching of the semiconductor elements. Generally, when a semiconductor element in one of the upper and lower arms is switched from an off state to an on state, a recovery surge voltage is generated in the semiconductor element in the opposing arm. If a high gate resistor is placed on the gate side of the semiconductor element to suppress this recovery surge voltage, this causes a decrease in the switching speed of the semiconductor element. Furthermore, the recovery surge voltage leads to switching loss in the semiconductor element. For this reason, there is a demand to suppress the surge voltage within an allowable voltage while increasing the switching speed.

[0003] Patent Document 1 discloses a technology in which a semiconductor device has an inverter circuit having upper and lower arm switch elements, a drive circuit, and a control circuit, the drive circuit having a circuit for driving a gate electrode of the switch element to a source potential and a circuit for driving the gate electrode of the switch element to a negative potential, a capacitor is connected in series between the output node of the circuit for driving to the negative potential and the switch element, and the control circuit controls the voltage of the gate electrode of the switch element to be the same as the source potential immediately before the switch element changes from an off state to an on state. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2012-249399 A Summary of the Invention [Problem to be solved by the invention]

[0005] In the technique described in Patent Document 1, when a semiconductor element in one of the upper and lower arms is switched from an OFF state to an ON state, the recovery surge voltage of the semiconductor element in the opposing arm cannot be suppressed. [Means for solving the problem]

[0006] A semiconductor drive device according to the present invention comprises a gate drive circuit that outputs drive signals to the gate terminals of each semiconductor element that constitutes the upper and lower arms of an inverter circuit, and a source potential change circuit that changes the source potential of each of the semiconductor elements, wherein when the semiconductor element of one of the upper and lower arms is switched from an off state to an on state, the source potential change circuit changes the source potential of the semiconductor element of the other arm, and a first potential, which is the source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from an off state to an on state, is set higher than a second potential, which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the on state. Effect of the Invention

[0007] According to the present invention, when the semiconductor element of one of the upper and lower arms is switched from the OFF state to the ON state, the recovery surge voltage of the semiconductor element of the opposing arm can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] 1 is a circuit configuration diagram showing a semiconductor driving device according to a first embodiment. [Diagram 2] FIG. 2 is a circuit configuration diagram of a gate drive circuit according to the first embodiment. [Diagram 3] 1A and 1B are circuit configuration diagrams of a source potential changing circuit according to a first embodiment. [Figure 4] 13A to 13J are time charts showing when a semiconductor element of a semiconductor driving device is turned on. [Diagram 5] 13A to 13F are time charts showing when a semiconductor element of a semiconductor driving device is turned off. [Figure 6] 1 is a graph showing switching losses when a semiconductor element is turned on. [Figure 7] FIG. 11 is a circuit configuration diagram showing a semiconductor driving device according to a second embodiment. [Figure 8] 13A and 13B are circuit configuration diagrams of a first potential variable circuit according to a second embodiment. [Figure 9] 6A and 6B are graphs showing an example in which a first potential is changed in response to a current of a semiconductor element. [Figure 10] 11 is a graph showing an example in which a first potential is changed depending on the temperature of a semiconductor element. [Figure 11] 6A and 6B are graphs showing an example in which the first potential is changed depending on the voltage of a semiconductor element. [Figure 12] FIG. 13 is a circuit configuration diagram showing a semiconductor driving device according to a third embodiment. [Figure 13] FIG. 13 is a circuit configuration diagram of a potential difference suppression circuit according to a third embodiment. [Figure 14] 13A to 13C are time charts showing when a semiconductor element of a semiconductor driving device according to a third embodiment is turned on. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0010] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0011] [First embodiment] FIG. 1 is a circuit configuration diagram showing a semiconductor driving device 100 according to a first embodiment of the present invention, and shows an example in which the semiconductor driving device 100 is applied to a part of an inverter circuit. The semiconductor driving device 100 includes gate driving circuits 11 and 21, and source potential changing circuits 12 and 22. The inverter circuit includes semiconductor elements T1 and T2 which configure upper and lower arms for one phase.

[0012] The upper arm semiconductor element T2 and the lower arm semiconductor element T1 are power semiconductor elements such as IGBT, Si-MOSFET, GaN-HEMT, etc. In addition, in Fig. 1, an example is shown in which MOSFETs are used for the semiconductor elements T1 and T2. When the semiconductor elements T1 and T2 are MOSFETs, a freewheeling diode is connected in inverse parallel.

[0013] The inverter circuit drives, for example, an electric motor mounted on an electric vehicle. The electric motor has a three-phase coil, and the inverter circuit has upper and lower arms for three phases to apply a predetermined current pattern to the three-phase coil. Figure 1 shows the upper and lower arms for one phase.

[0014] The semiconductor elements T1 and T2 are provided with a high-voltage side terminal for the main circuit (a collector terminal for an IGBT, or drain terminals D11 and D21 for a MOSFET), a low-voltage side terminal for the main circuit (an emitter terminal for an IGBT, or source terminals S11 and S21 for a MOSFET), and a control terminal (gate terminals G11 and G21).

[0015] The main circuit high voltage side terminal on the upper arm side is connected to the positive terminal of a DC voltage source 2 such as a battery via a positive wiring. The main circuit low voltage side terminal on the lower arm side is connected to the negative terminal of the DC voltage source 2 via a negative wiring. The main circuit low voltage side terminal (source terminal S21) of semiconductor element T2 and the main circuit high voltage side terminal (drain terminal D11) of semiconductor element T1 are connected, and the connection point becomes an output terminal and is connected to a load 3. The load 3 is, for example, one phase of a winding of an electric motor.

[0016] In FIG. 1, an example is shown in which both ends of the upper and lower arms are connected to the positive and negative wiring from the DC voltage source 2. However, it is also possible to have a DC or AC voltage source and a power supply circuit that converts the voltage from this voltage source into a predetermined DC voltage, and to connect both ends of the upper and lower arms to the positive and negative wiring that are the output from this power supply circuit. Also, smoothing capacitors may be connected between the positive and negative wiring from the DC voltage source 2 and between the positive and negative wiring from the power supply circuit.

[0017] The gate terminal G11 and the source terminal S11 of the semiconductor element T1 are connected to a gate drive circuit 11 that outputs a drive signal to the semiconductor element T1. The gate terminal G21 and the source terminal S21 of the semiconductor element T2 are connected to a gate drive circuit 21 that outputs a drive signal to the semiconductor element T2.

[0018] The gate drive circuits 11, 21 are connected to a control circuit 4. The control circuit 4 is composed of, for example, a microcomputer. The control circuit 4 outputs control signals C11, C21 to the gate drive circuits 11, 21 based on a drive command input from a higher-level control device (not shown), and individually controls the on / off of the semiconductor elements T1, T2. As a result, the DC power of the DC voltage source 2 is converted to AC power and output to a load 3 such as a motor. The gate drive circuits 11, 21 will be described in detail later, but voltage detection signals Va, Vb (see FIG. 2) are input from the gate drive circuits 11, 21 to the control circuit 4.

[0019] A source terminal S11 of the semiconductor element T1 is connected to a source potential changing circuit 12, and a source terminal S21 of the semiconductor element T2 is connected to a source potential changing circuit 22. The source potential changing circuits 12, 22 will be described in detail later, but they change the source potential in response to control signals C11, C12 from the control circuit 4. Specifically, when a semiconductor element in one of the upper and lower arms is switched from an OFF state to an ON state, the source potential of the semiconductor element in the other arm is changed to a higher potential.

[0020] 2 is a circuit configuration diagram of the gate drive circuit 11 according to the first embodiment. The gate drive circuit 21 has a similar circuit configuration. Moreover, each of the gate drive circuits in the upper and lower arms for three phases of the inverter circuit also has a similar circuit configuration.

[0021] The gate drive circuit 11 includes switching elements M1 and M2. An example will be described in which the switching element M1 is an N-type MOSFET and the switching element M2 is a P-type MOSFET.

[0022] A positive power supply V1 of the gate drive circuit 11 is connected to a source terminal S1 of the switching element M1. The positive power supply V1 is, for example, a voltage supplied from a positive wiring of the DC voltage source 2. A drain terminal D1 of the switching element M1 is connected to a gate terminal G11 of the semiconductor element T1 via a series circuit of an on-gate resistor R1 and a backflow prevention diode Di1. An output voltage of the source potential change circuit 12 is connected to a source terminal S2 of the switching element M2 and the source terminal S11 of the semiconductor element T1. A drain terminal D2 of the switching element M2 is connected to a gate terminal G11 of the semiconductor element T1 via a series circuit of an off-gate resistor R2 and a backflow prevention diode Di2. Note that the backflow prevention diodes Di1 and Di2 may be omitted. In this case, the on-gate resistor R1 and the off-gate resistor R2 are connected to the gate terminal G21.

[0023] A control signal C11 from the control circuit 4 is connected to the gate terminal G1 of the switching element M1 and the gate terminal G2 of the switching element M2. Moreover, the comparator N1 compares the voltage at the drain terminal D1 of the switching element M1 with the on-voltage Von, and when the drain voltage exceeds the on-voltage Von, outputs a voltage detection signal Va to the control circuit 4. The comparator N2 compares the voltage at the drain terminal D2 of the switching element M2 with the off-voltage Voff, and when the drain voltage drops below the off-voltage Voff, outputs a voltage detection signal Vb to the control circuit 4. The on-voltage Von and the off-voltage Voff are preset to arbitrary values ​​according to the characteristics of the switching elements M1 and M2. Note that, although an example has been shown in which the control signal C11 and the control signal C12 are output from the control circuit 4, the control signal C12 may be output from another control circuit (not shown).

[0024] Figures 3(A) and 3(B) are circuit configuration diagrams of the source potential change circuit 12 according to the first embodiment. Figure 3(A) is an example of the source potential change circuit 12, and Figure 3(B) is a modified example of the source potential change circuit 12. The source potential change circuit 22 also has a similar circuit configuration. Furthermore, each of the source potential change circuits in the upper and lower arms for three phases of the inverter circuit also has a similar circuit configuration.

[0025] In FIG. 3A, a case will be described in which the switching element M3 is an N-type MOSFET and the switching element M4 is a P-type MOSFET. 3A, a power supply of the first potential VSS1 is connected to a source terminal S3 of the switching element M3. A drain terminal D3 of the switching element M3 is connected to a drain terminal D4 of the switching element M4. A source terminal S4 of the switching element M4 is connected to a power supply of the second potential VSS2. A connection point between the drain terminal D3 of the switching element M3 and the drain terminal D4 of the switching element M4 is connected to the output side of the source potential change circuit 12, that is, to the source terminal S2 of the switching element M2 and the source terminal S11 of the semiconductor element T1. A control signal C12 from the control circuit 4 is connected to a gate terminal G3 of the switching element M3 and a gate terminal G4 of the switching element M4.

[0026] When a high signal is input as the control signal C12, the switching element M3 turns on and the first potential VSS1 is output to the output side. When a low signal is input as the control signal C12, the switching element M4 turns on and the second potential VSS2 is output to the output side. The first potential VSS1 is a higher voltage than the second potential VSS2.

[0027] In the modification shown in Fig. 3(B), the switching elements M3 and M4 are P-type MOSFETs. A control signal C12 is input to the gate terminal G3 of the switching element M3 via a non-inverting circuit I3. A control signal C12 is input to the gate terminal G4 of the switching element M4 via an inverting circuit I4. The other configurations are the same as those in the example shown in Fig. 3(A).

[0028] When a high signal is input as the control signal C12, the switching element M3 is turned on via the non-inverting circuit I3, and the first potential VSS1 is output to the output side. When a low signal is input as the control signal C12, the switching element M4 is turned on via the inverting circuit I4, and the second potential VSS2 is output to the output side.

[0029] In this way, when the semiconductor element of one of the upper and lower arms is switched from an OFF state to an ON state, the source potential change circuit 12 changes the source potential of the semiconductor element of the other arm. Specifically, a first potential which is the source potential of the semiconductor element of the other arm when the semiconductor element of one arm is switched from an OFF state to an ON state is set higher than a second potential which is the source potential of the semiconductor element of the other arm before the semiconductor element of one arm is switched to the ON state.

[0030] 4(A) to 4(J) are time charts showing an example of the operation of the semiconductor driving device 100. The time charts show waveforms when the semiconductor element T2 is turned on, with the solid lines showing the case where this embodiment is applied and the dashed lines showing a comparative example where this embodiment is not applied.

[0031] Figure 4(A) shows a control signal C12 for changing the source voltage of semiconductor element T1, Figure 4(B) shows a control signal C11 for turning on semiconductor element T2, Figure 4(C) shows the voltage Vgs between the gate and source of semiconductor element T1, Figure 4(D) shows the voltage Vgs between the gate and source of semiconductor element T2, Figure 4(E) shows the voltage Vds between the drain and source of semiconductor element T1, Figure 4(F) shows the voltage Vds between the drain and source of semiconductor element T2, Figure 4(G) shows the current Ids between the drain and source of semiconductor element T1, Figure 4(H) shows the current Ids between the drain and source of semiconductor element T2, Figure 4(I) shows the switching loss Sw1 of semiconductor element T1, and Figure 4(J) shows the switching loss Sw2 of semiconductor element T2.

[0032] The following description will be given with reference to FIGS. At time t0, as shown in Fig. 4(B), a control signal C11 for switching the semiconductor element T2 from OFF to ON is input from the control circuit 4 to the gate drive circuit 21. Based on this, the switching element M1 of the gate drive circuit 21, which has the same configuration as the gate drive circuit 11 shown in Fig. 2, is turned ON. Then, the gate-source capacitance of the semiconductor element T2 is charged via the positive-side power supply V1, the switching element M1, the diode Di1, and the on-gate resistor R1, and the gate-source voltage of the semiconductor element T2 starts to increase as shown in Fig. 4(D).

[0033] 4A, a High signal is input to the source potential change circuit 12 as the control signal C12 for changing the source voltage of the semiconductor element T1. As a result, in the source potential change circuit 12 shown in FIG 3A, the switching element M3 is turned on and the switching element M4 is turned off, thereby outputting the first potential VSS1. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the first potential VSS1 which is higher than the second potential VSS2.

[0034] At time t1, when the gate-source voltage Vgs of the semiconductor element T2 exceeds the threshold voltage Vth, the drain-source current Ids of the semiconductor element T2 shown in Fig. 1 starts to increase as shown in Fig. 4(H), and the drain-source current Ids of the semiconductor element T1 starts to decrease as shown in Fig. 4(G). Also, the drain-source voltage Vds of the semiconductor element T2 shown in Fig. 1 starts to decrease as shown in Fig. 4(F).

[0035] At time t2, as shown in FIG. 4(E), the drain-source voltage Vds of the semiconductor element T1 starts to increase, and then a recovery surge voltage occurs. As the drain-source voltage Vds changes, the gate-source voltage Vgs of the semiconductor element T1 starts to increase, as shown in FIG. 4(C). At this time, the drain-source current Ids of the semiconductor element T1 flows in the reverse direction according to the value of the gate-source voltage Vgs, as shown in FIG. 4(G). This current can suppress the drain-source voltage Vds of the semiconductor element T1, as shown in FIG. 4(E). In a comparative example to which this embodiment is not applied, as shown in FIG. 4(C), the gate-source voltage Vgs is low at time t2, so the drain-source current Ids of the semiconductor element T1 is small, and the recovery surge voltage of the drain-source voltage Vds is large. In contrast, in this embodiment, as shown in FIG. 4(C), the gate-source voltage Vgs is high at time t2, so the drain-source current Ids of the semiconductor element T1 is large, and the recovery surge voltage of the drain-source voltage Vds can be reduced.

[0036] At time t3, the turn-on operation of the semiconductor element T2 ends, and the gate-source voltage Vgs of the semiconductor element T2 starts to rise again, as shown in FIG. 4(D). At time t4, as shown in Fig. 4(D), it is detected that the gate-source voltage Vgs of the semiconductor element T2 has increased to a desired value. Specifically, at time t4, when the voltage of the drain terminal D1 of the switching element M1, i.e., the gate-source voltage Vgs of the semiconductor element T2, exceeds the on-voltage Von, the comparator N1 shown in Fig. 2 outputs a voltage detection signal Va to the control circuit 4.

[0037] The control circuit 4 receives the voltage detection signal Va and outputs a Low signal to the source potential change circuit 12 as the control signal C12 for changing the source voltage, as shown in FIG. 4(A). As a result, in the source potential change circuit 12, the switching element M3 shown in FIG. 2 is turned off and the switching element M4 is turned on, so that the second potential VSS2 is output. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2 lower than the first potential VSS1. Note that, although an example in which the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2 has been described, the potential is not limited to the second potential VSS2, and may be changed to a potential lower than the first potential VSS1. In this way, the source potential change circuit 12 lowers the source potential of the semiconductor element of one arm after the turn-on operation of the semiconductor element of one arm is completed.

[0038] The switching loss Sw1 of the semiconductor element T1 is the integrated total of the drain-source voltage Vds of the semiconductor element T1 and the drain-source current Ids of the semiconductor element T1, and occurs between time t2 and time t3 as shown in Fig. 4(I). On the other hand, the switching loss Sw2 of the semiconductor element T2 is the integrated total of the drain-source voltage Vds of the semiconductor element T2 and the drain-source current Ids of the semiconductor element T2, and occurs between time t1 and time t3 as shown in Fig. 4(J).

[0039] In this way, the source potential change circuits 12, 22 change the source potential of the semiconductor element of one of the upper and lower arms when the semiconductor element of the other arm is switched from an off state to an on state, and a first potential VSS1, which is the source potential of the semiconductor element of the other arm when the semiconductor element of one arm is switched from an off state to an on state, is set higher than a second potential VSS2, which is the source potential of the semiconductor element of the other arm before the semiconductor element of one arm is switched to the on state.

[0040] In this embodiment, the recovery surge voltage can be reduced, and therefore the switching loss can be reduced. Specifically, the switching loss Sw2, which is the time integral value of the current Ids of the semiconductor element T2, is smaller than that of the comparative example. Here, the switching loss Sw1 of the semiconductor element T1 increases, but it is in the latter half of the turn-on operation and is smaller than the switching loss Sw2 of the semiconductor element T2. That is, this embodiment can reduce the switching loss at turn-on more than the comparative example.

[0041] In the comparative example, since the recovery surge voltage was large, it was necessary to increase the on-gate resistance R1 shown in Fig. 1 in order to suppress the drain-source voltage of the semiconductor element T2 below the allowable voltage. In this embodiment, since the recovery surge voltage can be suppressed, it is possible to reduce the on-gate resistance R1. This makes it possible to increase the switching speed of the semiconductor elements T1 and T2.

[0042] 5(A) to 5(F) are time charts showing an example of the operation of the semiconductor driving device 100. The time charts show waveforms when the semiconductor element T2 is turned off, with the solid lines showing the case where this embodiment is applied and the dashed lines showing a comparative example where this embodiment is not applied.

[0043] Figure 5(A) shows a control signal C12 for changing the source voltage of semiconductor element T1, Figure 5(B) shows a control signal C11 for turning off semiconductor element T2, Figure 5(C) shows the voltage Vgs between the gate and source of semiconductor element T1, Figure 5(D) shows the voltage Vgs between the gate and source of semiconductor element T2, Figure 5(E) shows the voltage Vds between the drain and source of semiconductor element T2, and Figure 5(F) shows the current Ids between the drain and source of semiconductor element T2.

[0044] The following description will be given with reference to FIGS. At time t0, as shown in Fig. 5(B), a control signal C11 for switching the semiconductor element T2 from on to off is input from the control circuit 4 to the gate drive circuit 21. Based on this, the switching element M2 of the gate drive circuit 21, which has the same configuration as the gate drive circuit 11 shown in Fig. 2, is turned on. Then, the gate-source capacitance of the semiconductor element T2 is discharged via the switching element M2, the diode Di2, and the off-gate resistor R2, and the gate-source voltage Vgs of the semiconductor element T2 starts to decrease as shown in Fig. 5(D).

[0045] 5(A), a High signal is input as a control signal C12 for changing the source voltage of the semiconductor element T1 to the source potential change circuit 12. As a result, in the source potential change circuit 12 shown in FIG 3(A), the switching element M3 is turned on and the switching element M4 is turned off, so that the first potential VSS1 is output.

[0046] At time t1, as shown in FIG. 5E, the drain-source voltage Vds of the semiconductor element T2 starts to decrease. Accordingly, as shown in FIG. 5C, the gate-source voltage Vgs of the semiconductor element T1 also starts to decrease. In the comparative example, a negative voltage is applied from a state in which the source potential of the semiconductor element T1 is low, so that an excessive negative voltage may be applied between the gate and source of the semiconductor element T1, and in that case, the voltage tolerance Vfh between the gate and source of the semiconductor element T1 may be exceeded. On the other hand, in this embodiment, a negative voltage is applied from a state in which the source potential of the semiconductor element T1 is high, so that an excessive negative voltage is prevented from being applied to the gate-source voltage Vgs of the semiconductor element T1, and the semiconductor element T1 can be operated without exceeding the gate-source voltage tolerance Vfh.

[0047] At time t2, as shown in Fig. 5(E), when the drain-source voltage Vds of the semiconductor element T2 approaches the turn-off voltage, the gate-source voltage Vgs stops decreasing and then starts to increase as shown in Fig. 5(C). Also, as shown in Fig. 5(F), the drain-source current Ids of the semiconductor element T2 starts to increase.

[0048] At time t3, the turn-on operation of the semiconductor element T2 ends, and the gate-source voltage Vgs of the semiconductor element T2 further decreases as shown in Fig. 5(D). Also, the drain-source current Ids of the semiconductor element T2 increases as shown in Fig. 5(F).

[0049] At time t4, as shown in Fig. 5(D), it is detected that the gate-source voltage Vgs of the semiconductor element T2 has decreased to a desired value. Specifically, at time t4, the comparator N2 shown in Fig. 2 outputs a voltage detection signal Vb to the control circuit 4 when the voltage of the drain terminal D2 of the switching element M2, i.e., the gate-source voltage Vgs of the semiconductor element T2, falls below the off-voltage Voff.

[0050] The control circuit 4 receives the voltage detection signal Vb and outputs a Low signal to the source potential change circuit 12 as the control signal C12 for changing the source voltage, as shown in Fig. 5(A). As a result, the switching element M3 shown in Fig. 2 is turned off and the switching element M4 is turned on, thereby outputting the second potential VSS2. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2 lower than the first potential VSS1. In this way, the source potential change circuit 12 lowers the source potential of the semiconductor element of one arm after the turn-off operation of the semiconductor element of one arm is completed.

[0051] As described above, the first potential VSS1, which is the source potential of the semiconductor element of one arm when the semiconductor element of the other arm is switched from an on state to an off state, is set higher than the second potential VSS2, which is the source potential of the semiconductor element of the other arm before the semiconductor element of one arm is switched to the off state.

[0052] 6 is a graph showing switching loss when a semiconductor element is turned on, where the vertical axis shows switching loss (MJ: megajoules), bar graph A shows the comparative example, and bar graph B shows this embodiment.

[0053] As described with reference to FIG. 4, in the comparative example, the recovery surge voltage of the drain-source voltage Vds of the semiconductor element T2 becomes large, and as shown by the bar graph A in FIG. 6, the switching loss Sw2 at turn-on increases.

[0054] On the other hand, in this embodiment, the recovery surge voltage of the drain-source voltage Vds of the semiconductor element T2 can be reduced, and the switching loss Sw2 at turn-on can be reduced as shown in bar graph B of Fig. 6. However, since the drain-source current Ids of the semiconductor element T1 increases, the switching loss Swl increases as shown in Fig. 4(I). However, as shown in Fig. 6, the total value of the switching loss Swl of the semiconductor element T1 and the switching loss Sw2 of the semiconductor element T2 can be significantly reduced compared to the comparative example.

[0055] According to the first embodiment, when a semiconductor element of one of the upper and lower arms is switched from an OFF state to an ON state, the recovery surge voltage of the semiconductor element of the opposing arm can be suppressed. Since the recovery surge voltage can be suppressed, the resistance value of the gate resistor can be reduced and the recovery surge voltage can be kept within an allowable range even if the switching speed of the semiconductor element is increased.

[0056] [Second embodiment] FIG. 7 is a circuit diagram showing a semiconductor driving device 100 according to a second embodiment of the present invention, and similar to FIG. 1, shows an example in which the semiconductor driving device 100 is applied to upper and lower arms of one phase that are part of an inverter circuit.

[0057] The second embodiment shown in Fig. 7 includes first potential variable circuits 13, 23, current detection units 14, 24, temperature detection units 15, 25, and voltage detection units 16, 26, as compared with the first embodiment shown in Fig. 1. The other configurations are the same as in Fig. 1, and the same parts are denoted by the same reference numerals and will be described briefly.

[0058] The current detection units 14 and 24 measure the drain-source current Ids of the semiconductor elements T1 and T2 to detect the current of the semiconductor elements T1 and T2. The temperature detection units 15 and 25 are disposed near the semiconductor elements T1 and T2 to detect the temperatures of the semiconductor elements T1 and T2. The voltage detection units 16 and 26 measure the drain-source voltage Vds of the semiconductor elements T1 and T2 to detect the voltage of the semiconductor elements T1 and T2.

[0059] The current, temperature, and voltage detected by the current detection units 14, 24, the temperature detection units 15, 25, and the voltage detection units 16, 26 are input to the control circuit 4. The control circuit 4 outputs control signals C13, C23 to the first potential variable circuits 13, 23 in accordance with the detected current, temperature, and voltage. The first potential variable circuits 13, 23 receive the control signals C13, C23, change the first potential VSS1 to an arbitrary value, and output it to the source potential change circuits 12, 22. Then, the source potential change circuits 12, 22 change the source potential of each semiconductor element T1, T2 using the first potential VSS1 changed by the first potential variable circuits 13, 23.

[0060] Figures 8(A) and 8(B) are circuit configuration diagrams of the first potential variable circuit 13 according to the second embodiment. Figure 8(A) is an example of the first potential variable circuit 13, and Figure 8(B) is a modified example of the first potential variable circuit 13. The first potential variable circuit 23 also has a similar circuit configuration. Furthermore, each of the first potential variable circuits in the upper and lower arms for three phases of the inverter circuit also has a similar circuit configuration.

[0061] As shown in Fig. 8(A), a switching element M5 and a switching element M6 are connected in series between a positive power supply V1 and a negative power supply V2, and a first potential VSS1 is output from a connection point between the switching element M5 and the switching element M6 via an inductor L13. A capacitor C10 is connected between the output line of the first potential VSS1 and the power supply line of the negative power supply V2. The voltage of the power supply line of the negative power supply V2 is output as a second potential VSS2. The positive power supply V1 is, for example, a voltage supplied from a positive wiring. The negative power supply V2 is, for example, a voltage supplied from a negative wiring.

[0062] The switching elements M5 and M6 are alternately turned on and off by a control signal C13 from the control circuit 4, and the first potential VSS1 is made variable according to the ratio of the time that the switching element M5 is on (duty ratio). Specifically, the first potential VSS1 is changed by the control signal C13 according to the detected current, temperature, and voltage.

[0063] 8(B), in a modification of the first potential variable circuit 13, a variable resistor R3 and a resistor R4 are connected in series between the output line of the first potential VSS1 and the second potential VSS2, and a capacitor C10 is further connected between the output line of the first potential VSS1 and the second potential VSS2. A positive power supply V1 is connected to the input side of the voltage adjustment circuit Rv, and an output line of the first potential VSS1 is connected to the output side, and the voltage applied to the variable resistor R3 is input as a reference voltage for the voltage adjustment circuit Rv.

[0064] The resistance value of the variable resistor R3 is made variable by a control signal C13 from the control circuit 4. The voltage adjustment circuit Rv adjusts the first potential VSS1 based on the voltage applied to the variable resistor R3. Specifically, the first potential VSS1 is changed by the control signal C13 according to the detected current, temperature, and voltage.

[0065] 9A and 9B are graphs showing an example in which the first potential VSS1 is changed in response to the current Ids of the semiconductor element. The control circuit 4 changes the control signal C13 to the first potential variable circuit 13 based on the drain-source current Ids of the semiconductor element T1 detected by the current detection unit 14. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected current Ids.

[0066] As shown in Fig. 9(A), the first potential VSS1 is changed so that the first potential VSS1 decreases as the detected current Ids increases. Note that the first potential VSS1 to be changed may be changed within a range provided with a maximum value VSS1_max and a minimum value VSS1_min. The value of the first potential VSS1 is not limited to being changed linearly as shown in Fig. 9(A), and may be changed, for example, by a discrete value as shown in Fig. 9(B).

[0067] By changing the first potential VSS1 in this way, when the current Ids is small, the turn-on time of the semiconductor element T1 is short and the gate-source voltage Vgs is unlikely to rise, so by increasing the first potential VSS1, the effect of suppressing the recovery surge voltage can be enhanced. On the other hand, when the current Ids is large, the turn-on time is long and the gate-source voltage Vgs of the semiconductor element T1 is likely to rise, so by decreasing the first potential VSS1, the effect of suppressing the recovery surge voltage can be enhanced.

[0068] FIG. 10 is a graph showing an example of changing the first potential VSS1 depending on the temperature Tj of the semiconductor element according to the second embodiment. The control circuit 4 changes the control signal C13 to the first potential variable circuit 13 based on the temperature Tj of the semiconductor element T1 detected by the temperature detection unit 15. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected temperature Tj.

[0069] 10, the first potential variable circuit 13 changes the first potential VSS1 to a low value when the temperature Tj of the semiconductor element T1 detected by the temperature detection unit 15 is high. Note that a maximum value VSS1_max and a minimum value VSS1_min may be set for the changed first potential VSS1, and the first potential VSS1 may be changed within this range. Also, the value of the first potential VSS1 is not limited to a linear change as shown in FIG. 10, and may be changed by a discrete value or the like.

[0070] Generally, the higher the temperature Tj of the semiconductor element T1, the lower the threshold voltage of the semiconductor element T1. However, the first potential variable circuit 13 can prevent the drain-source current Ids from becoming excessive by changing the first potential VSS1 lower as the temperature Tj increases.

[0071] 11A and 11B are graphs showing an example in which the first potential VSS1 is changed according to the voltage Vds of the semiconductor element according to the second embodiment. The control circuit 4 changes the control signal C13 to the first potential variable circuit 13 based on the drain-source voltage Vds of the semiconductor element T1 detected by the voltage detection unit 16. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected voltage Vds.

[0072] The first potential variable circuit 13 has a noise suppression mode and a loss suppression mode as modes for changing the first potential VSS1. In the noise suppression mode, the first potential VSS1 is changed to a higher value regardless of the voltage Vds detected by the voltage detection unit 16, and in the loss reduction mode, the lower the voltage Vds detected by the voltage detection unit 16, the lower the first potential VSS1 is changed to a lower value.

[0073] In the example shown in Fig. 11(A), in the noise suppression mode, the first potential VSS1 is changed to its maximum value VSS1_max, and in the loss reduction mode, as shown in Fig. 11(B), the higher the voltage Vds of the semiconductor element T1, the higher the first potential VSS1 is changed to. Note that the first potential VSS1 to be changed may be set to a maximum value VSS1_max or a minimum value VSS1_min, and may be changed within this range. The loss suppression mode and the noise suppression mode are selected in advance according to, for example, a request from the destination of the semiconductor driving device 100, etc.

[0074] In the noise suppression mode, the first potential VSS1 is increased to a maximum value VSS1_max, so that the gate-source voltage Vgs increases when the semiconductor element T1 is turned on, and the recovery surge voltage is suppressed in any voltage region.

[0075] On the other hand, in the loss reduction mode, by changing the first potential VSS1 according to the drain-source voltage Vds, when the drain-source voltage Vds is low, the recovery loss can be suppressed within a range in which the recovery surge voltage does not exceed the allowable voltage. Also, when the drain-source voltage Vds is high, the recovery surge voltage can be suppressed by increasing the first potential VSS1 so as to suppress the recovery surge voltage.

[0076] According to the second embodiment, when a semiconductor element of one of the upper and lower arms is switched from an off state to an on state, the first potential is changed according to the current, temperature, and voltage of the semiconductor element, thereby making it possible to more effectively suppress the recovery surge voltage of the semiconductor element of the opposing arm.

[0077] [Third embodiment] FIG. 12 is a circuit configuration diagram showing a semiconductor driver 100 according to a third embodiment of the present invention, and shows an example in which the device is applied to upper and lower arms for one phase that are part of an inverter circuit, similar to FIG.

[0078] The third embodiment shown in Fig. 12 differs from the first embodiment shown in Fig. 1 in that the upper and lower arms of the inverter circuit are configured in two parallel connections and includes potential difference suppression circuits 17 and 27. The other configuration is the same as in Fig. 1, and the same parts are denoted by the same reference numerals and their description will be simplified.

[0079] As shown in Fig. 12, the upper and lower arms for one phase are provided with upper arm semiconductor elements T2a, T2b and lower arm semiconductor elements T1a, T1b in two parallel configurations. A potential difference suppression circuit 27 is provided to suppress a potential difference in a first potential between the semiconductor elements T2a, T2b of the upper arm configured in two parallel configurations. Similarly, a potential difference suppression circuit 17 is provided to suppress a potential difference in a first potential between the semiconductor elements T1a, T1b of the lower arm. Note that, although an example in which the upper and lower arms are configured in two parallel configurations will be described, the same applies to a case in which the upper and lower arms are configured in three or more parallel configurations.

[0080] The first potential VSS1 changed by the source potential change circuits 12, 22 is input to the potential difference suppression circuits 17, 27. The potential difference suppression circuit 17 is connected to the source terminals S1a, S1b of the semiconductor elements T1a, T1b, and the potential difference suppression circuit 27 is connected to the source terminals S2a, S2b of the semiconductor elements T2a, T2b.

[0081] In general, the electrical wiring from the source potential change circuit 12 to the semiconductor elements T1a and T1b may be different, and the potentials of the source terminals S1a and S1b may be different between the semiconductor elements T1a and T1b. Similarly, the electrical wiring from the source potential change circuit 22 to the semiconductor elements T2a and T2b may be different, and the potentials of the source terminals S1a and S1b may be different between the semiconductor elements T2a and T2b. If the potentials of the source terminals are different, an imbalance occurs in the drain-source current Ids, and a difference occurs in the recovery surge voltage between the semiconductor elements T1a and T1b, or between the semiconductor elements T2a and T2b. To solve this problem, in this embodiment, potential difference suppression circuits 17 and 27 are provided to suppress the potential difference of the first potential VSS1 between the semiconductor elements of the upper and lower arms configured in two parallel configurations.

[0082] 13 is a circuit configuration diagram of a potential difference suppression circuit 27 according to the third embodiment. The potential difference suppression circuit 17 also has a similar circuit configuration. 13, the potential difference suppression circuit 27 has diodes D2a, D2a' and D2b, D2b' connected in parallel in the forward and reverse directions, which are provided in the branch paths from the source potential change circuit 22. The voltage of the first potential VSS1 from the source potential change circuit 22 is connected to the source terminal S2a of the semiconductor element T2a via the diodes D2a, D2a' connected in parallel in the forward and reverse directions. Similarly, the voltage of the first potential VSS1 from the source potential change circuit 22 is connected to the source terminal S2b of the semiconductor element T2b via the diodes D2b, D2b' connected in parallel in the forward and reverse directions.

[0083] Here, when the potential of the source terminal S2b of the semiconductor element T2b is higher than the potential of the source terminal S2a of the semiconductor element T2a, a diode is selected in which the forward voltage of the forward diode D2a connected to the source side of the semiconductor element T2a is higher than the forward voltage of the forward diode D2b connected to the source side of the semiconductor element T2b. As a result, the voltage drop of the forward diode D2a suppresses the potential difference between the semiconductor elements T2a and T2b. Note that the potential difference suppression circuit 27 may be realized by other circuit configurations as long as the voltage difference between the gates and sources of the semiconductor elements, i.e., the potential difference of the first potential VSS1, is suppressed.

[0084] 14(A) to 14(C) are time charts for explaining the operation of the semiconductor driving device 100 according to the third embodiment. The time charts show waveforms when the semiconductor elements T1a and T1b are turned on, with the dashed line indicating the semiconductor element T1a and the solid line indicating the semiconductor element T1b.

[0085] If the potential difference is not suppressed, a difference may occur in the voltage Vgs between the gate and source of the semiconductor element T1a and the semiconductor element T1b, as shown in FIG. 14(A). Therefore, an imbalance occurs in the current Ids between the drain and source of the semiconductor element T1a and the semiconductor element T1b, as shown in FIG. 14(B). Then, a difference occurs in the recovery surge voltage of the semiconductor element T1a and the semiconductor element T1b, as shown in FIG. 14(C), and the difference in the switching loss Sw increases. In contrast, if the potential difference suppression circuit 27 is applied, the difference in the voltage Vgs shown in FIG. 14(A) is suppressed, and the imbalance in the current Ids shown in FIG. 14(B) is eliminated. Then, the difference in the switching loss Sw shown in FIG. 14(C) can be suppressed.

[0086] According to the third embodiment, when multiple semiconductor elements constituting one of the upper and lower arms are switched from an off state to an on state, the recovery surge voltage of multiple semiconductor elements in the opposing arm can be suppressed by changing the first potential by suppressing the potential difference of the first potential between the multiple semiconductor elements.

[0087] According to the embodiment described above, the following advantageous effects can be obtained. (1) The semiconductor drive device 100 includes gate drive circuits 11, 21 that output drive signals to gate terminals G11, G21 of the semiconductor elements T1, T2 constituting the upper and lower arms of the inverter circuit, and source potential change circuits 12, 22 that change the source potential of the semiconductor elements T1, T2, and when the semiconductor elements T1, T2 of one of the upper and lower arms are switched from an OFF state to an ON state, the source potential change circuits 12, 22 change the source potential of the semiconductor elements of the other arm, and a first potential VSS1 that is the source potential of the semiconductor elements T1, T2 of the other arm when the semiconductor elements T1, T2 of the one arm are switched from an OFF state to an ON state is set higher than a second potential VSS2 that is the source potential of the semiconductor elements T1, T2 of the other arm before the semiconductor elements T1, T2 of the one arm are switched to an ON state. This makes it possible to suppress the recovery surge voltage of the semiconductor element of the opposite arm when the semiconductor elements of one of the upper and lower arms are switched from an OFF state to an ON state.

[0088] The present invention is not limited to the above-described embodiment, and other forms that are conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention as long as they do not impair the characteristics of the present invention. In addition, the above-described embodiments and modifications may be appropriately combined. [Explanation of symbols]

[0089] 11, 21...gate drive circuit, 12, 22...source potential change circuit, 13, 23...first potential variable circuit, 14, 24...current detection section, 15, 25...temperature detection section, 16, 26...voltage detection section, 17, 27...potential difference suppression circuit, 100...semiconductor drive device, T1, T2...semiconductor element, D1, D11, D21...drain terminal, G1 1, G21...Gate terminal, S11, S21...Source terminal, C11, C12, C21, C22...Control signal, M1, M2, M3, M4...Switching elements, Di1, Di2, D2a, D2a', D2b, D2b'...Diodes, R1...On-gate resistor, R2...Off-gate resistor, VSS1...First potential, VSS2...Second potential.

Claims

1. a gate drive circuit that outputs a drive signal to a gate terminal of each of the semiconductor elements constituting the upper and lower arms of the inverter circuit, and a source potential change circuit that changes a source potential of each of the semiconductor elements; the source potential change circuit changes a source potential of the semiconductor element of one of the upper and lower arms when switching the semiconductor element of the other arm from an off state to an on state, A semiconductor driving device in which a first potential, which is the source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from an off state to an on state, is set higher than a second potential, which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the on state.

2. 2. The semiconductor driving device according to claim 1, The source potential change circuit lowers the source potential of the semiconductor element of the one arm after a turn-on operation of the semiconductor element of the one arm is completed.

3. In the device according to claim 1 or 2, A semiconductor driving device in which a first potential, which is the source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from an on state to an off state, is set higher than a second potential, which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the off state.

4. 4. The semiconductor driving device according to claim 3, The source potential change circuit lowers the source potential of the semiconductor element of the one arm after a turn-off operation of the semiconductor element of the one arm is completed.

5. 2. The semiconductor driving device according to claim 1, a first potential variable circuit that changes the first potential to an arbitrary value; The source potential change circuit changes the source potential of each of the semiconductor elements using the first potential changed by the first potential variable circuit.

6. 6. The semiconductor driving device according to claim 5, a current detection unit that detects a current of the semiconductor element, The first potential variable circuit is a semiconductor driving device that changes the first potential in response to the current detected by the current detection unit.

7. 6. The semiconductor driving device according to claim 5, a temperature detection unit for detecting a temperature of the semiconductor element, The first potential variable circuit changes the first potential in response to the temperature detected by the temperature detection unit.

8. 8. The semiconductor driving device according to claim 7, The first potential variable circuit changes the first potential to a low value when the temperature detected by the temperature detection unit is high.

9. 6. The semiconductor driving device according to claim 5, a voltage detection unit for detecting a voltage of the semiconductor element; The first potential variable circuit changes the first potential in response to the voltage detected by the voltage detection unit.

10. 10. The semiconductor driving device according to claim 9, the first potential variable circuit has a noise suppression mode and a loss suppression mode as modes for changing the first potential, A semiconductor driving device in which, in the noise suppression mode, the first potential is changed to a higher value regardless of the voltage detected by the voltage detection unit, and, in the loss reduction mode, the lower the voltage detected by the voltage detection unit, the lower the first potential is changed to a lower value.

11. 2. The semiconductor driving device according to claim 1, the source potential change circuit inputs a drive signal to a gate terminal of each of the semiconductor elements constituting the upper and lower arms of the inverter circuit in two or more parallel configurations; the source potential change circuit, when switching each of the semiconductor elements of one arm of the upper and lower arms configured in two or more parallel configurations from an OFF state to an ON state, changes a source potential of each of the semiconductor elements of the other arm to the first potential, a semiconductor driving device including a potential difference suppressing circuit that suppresses a potential difference of the first potential between each of the semiconductor elements of the upper and lower arms configured in parallel of two or more;

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