Semiconductor module

Abstract

To provide a semiconductor module that can improve the adhesion between an encapsulating resin and a lead frame without degrading solderability and provide highly reliable products.SOLUTION: A semiconductor module comprises a laminate substrate 5 with a semiconductor element 1, a lead frame 10 electrically connecting the semiconductor element 1 and a conductive plate 3 on the laminate substrate 5, and a sealing resin 8 encapsulating a sealed member containing the semiconductor element 1, the lead frame 10 and the laminate substrate 5. The lead frame 10 consists of a Cu layer 30 and an Al layer 31, and the Cu layer 30 is provided on the semiconductor element 1 side and the Al layer 31 is provided on the sealing resin 8 side.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] This disclosure relates to semiconductor modules. [Background technology]

[0002] Conventionally, a power module has been known that includes a lead frame having a conductor plate made of Cu or a Cu alloy and an Al film formed on at least one surface of the conductor plate opposite to the other surface on which a semiconductor element is mounted (see Patent Document 1 below). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-134222 A Summary of the Invention [Problem to be solved by the invention]

[0004] Conventional semiconductor modules have an issue in which differences in the coefficient of linear thermal expansion cause thermal stress between the Cu (copper) lead frame and the sealing resin, resulting in resin peeling.

[0005] The purpose of this disclosure is to provide a semiconductor module that can improve adhesion between the sealing resin and the lead frame without reducing solder jointability, thereby providing a highly reliable product, in order to resolve the problems associated with the conventional technology described above. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems and achieve the object of the present disclosure, the semiconductor module according to this disclosure has the following features. The semiconductor module includes a laminated substrate on which a semiconductor element is mounted, a lead frame electrically connected to the semiconductor element, and a sealing resin that seals a sealed member including the semiconductor element, the lead frame, and the laminated substrate. The lead frame is composed of a Cu layer and an Al layer, and the Cu layer is provided on the semiconductor element side and the Al layer is provided on the sealing resin side.

[0007] According to the above disclosure, it is possible to improve the adhesion between the sealing resin and the lead frame without reducing the bond between the lead frame and the solder, thereby improving the power cycle resistance and providing a highly reliable product. Effect of the Invention

[0008] The semiconductor module according to the present disclosure has the advantage that it is possible to improve the adhesion between the sealing resin and the lead frame without deteriorating the solder joint property, thereby providing a highly reliable product. [Brief description of the drawings]

[0009] [Figure 1] 1 is a cross-sectional view showing a structure of a semiconductor module according to an embodiment; [Diagram 2] 2 is a cross-sectional view showing a structure of a joint between a semiconductor chip and a lead frame of a semiconductor module according to an embodiment; [Diagram 3] 6 is a cross-sectional view (part 1) showing another structure of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. FIG. [Figure 4] 11 is a cross-sectional view (part 2) showing another structure of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. FIG. [Diagram 5] 11 is a cross-sectional view (part 3) showing another structure of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. FIG. [Figure 6]11 is a cross-sectional view (part 4) showing another structure of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. FIG. [Figure 7] 1 is a cross-sectional view showing a structure of a joint between a semiconductor chip and a lead frame of a conventional semiconductor module. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] <Overview of the embodiment of the present disclosure> In order to solve the above-mentioned problems and achieve the object of the present disclosure, the semiconductor module according to this disclosure has the following features. The semiconductor module includes a laminated substrate on which a semiconductor element is mounted, a lead frame electrically connected to the semiconductor element, and a sealing resin that seals a sealed member including the semiconductor element, the lead frame, and the laminated substrate. The lead frame is composed of a Cu layer and an Al layer, and the Cu layer is provided on the semiconductor element side and the Al layer is provided on the sealing resin side.

[0011] According to the above disclosure, it is possible to improve the adhesion between the sealing resin and the lead frame without reducing the bond between the lead frame and the solder, thereby improving the power cycle resistance and providing a highly reliable product.

[0012] In addition, the semiconductor module according to this disclosure is characterized in that, in the above disclosure, the Al layer has a thickness of 10% to 50% of the film thickness of the lead frame.

[0013] According to the above disclosure, the adhesion between the lead frame and the epoxy resin can be improved by 65% ​​compared to the existing lead frame.

[0014] In addition, the semiconductor module according to this disclosure is characterized in that, in the above disclosure, the Al layer is provided with an oxide film on a surface thereof.

[0015] According to the above disclosure, the adhesion between the lead frame and the epoxy resin can be improved by 76% compared to the existing lead frame, and further the module reliability can be improved by 40%.

[0016] In addition, the semiconductor module according to this disclosure is characterized in that, in the above disclosure, the oxide film has a film thickness of 5 μm or more and 10 μm or less.

[0017] According to the above disclosure, it is possible to prevent the oxide film itself from becoming brittle, resulting in reduced adhesion and reduced module reliability.

[0018] In addition, the semiconductor module according to this disclosure, in the above disclosure, is characterized in that the oxide film has a barrier layer of 80 nm or more and a pore diameter of 15 nm or less.

[0019] According to the above disclosure, the oxide film is formed more densely, so that the module reliability can be further improved.

[0020] Moreover, the semiconductor module according to this disclosure is characterized in that, in the above disclosure, the Al layer covers the bent portion of the lead frame on the sealing resin side, and the tip of the lead frame is exposed.

[0021] The semiconductor module according to this disclosure is characterized in that, in the above disclosure, the Al layer covers 30% to 80% of the lead frame including the bent portion on the sealing resin side.

[0022] According to the above disclosure, the module reliability can be improved compared to the case where an Al layer is provided on the entire surface of the lead frame.

[0023] In addition, the semiconductor module according to the present disclosure is characterized in that, in the above disclosure, the sealing resin is an epoxy resin.

[0024] <Foundational knowledge of this disclosure> First, the problems of the conventional semiconductor module will be described. The conventional semiconductor module includes a semiconductor chip, a laminated substrate, a case, a heat dissipation base, and a lead frame. The semiconductor chip is a power semiconductor chip such as a MOSFET, an IGBT, or a diode, and is bonded to the laminated substrate with a bonding layer such as solder. A laminated substrate is a substrate in which a first conductive plate such as copper is provided on the front surface of an insulating substrate such as a ceramic substrate, and a second conductive plate such as copper is provided on the back surface. The laminated substrate is bonded to the heat dissipation base with a bonding layer such as solder. In the case of a MOSFET, a source electrode pad is formed on the front surface of the semiconductor chip as a power terminal electrode pad (current supply terminal). Then, a conductive connection member such as a lead frame or a metal wire is disposed as an output terminal from the power terminal electrode pad. A case is bonded to the semiconductor module, and a lid is attached with a metal terminal penetrating through the case and protruding to the outside. The case is filled with a sealing resin that insulates and protects the laminated substrate and the semiconductor chip on the substrate.

[0025] 7 is a cross-sectional view showing the structure of a joint between a semiconductor chip and a lead frame of a conventional semiconductor module. When the conductive connecting member is a lead frame, the lead frame 110 is joined to the semiconductor chip 101 by a joint layer such as solder 124, and is sealed with sealing resin 108.

[0026] In this case, due to the difference in the coefficient of linear thermal expansion between the copper lead frame 110 and the sealing resin 108, thermal stress is generated between the lead frame 110 and the sealing resin 108, causing the sealing resin 108 to peel off from the lead frame 110. In particular, since the adhesion between the solder 124 and the sealing resin 108 is weak, there is a problem that peeling occurs at the resin peeling portion 132 between the lead frame 110 and the sealing resin 108 at the starting point of the solder 124 under the lead frame 110.

[0027] Furthermore, peeling also occurs between the lead frame 110 and the sealing resin 108 at the bent portion on the front side (sealing resin side) of the lead frame 110. The lead frame 110 having the bent portion expands and contracts due to thermal cycles, and is subjected to bending stress particularly at the joint with the electrodes, etc. Therefore, when the sealing resin 108 peels off from the lead frame 110, the lead frame 110 fixed by the sealing resin 108 becomes easily movable due to thermal stress, and the joint layer such as the solder 124 is subjected to tensile stress, etc. from the lead frame 110, and is easily susceptible to cracks, etc. (deterioration of the joint between the lead frame and the solder). In other words, since lead frame 110 deforms not only in the planar direction but also in the vertical direction as shown by deformation direction 135 in FIG. 7, as the number of power cycles increases, stress is applied to solder 124 under lead frame 110, causing cracks 133 to form in solder 124, and stress is applied to the power terminal electrode pad under lead frame 110, causing gate destruction 134, etc., thereby destroying semiconductor chip 101 and shortening the lifespan of semiconductor module 150.

[0028] Preferred embodiments of a semiconductor module according to the present disclosure will be described in detail below with reference to the accompanying drawings. However, the present disclosure is not limited to the embodiments described below.

[0029] (Embodiment) A semiconductor module according to an embodiment for solving the above-mentioned problems will be described below. FIG. 1 is a cross-sectional view showing the configuration of the semiconductor module according to the embodiment. In the semiconductor module 50, a first conductive plate 3 made of copper is arranged on one surface of an insulating substrate 2, and a second conductive plate 4 made of copper or the like is arranged on the other surface, the back surface, to form a laminated substrate 5. A plurality of semiconductor chips 1 are mounted on the front surface of the first conductive plate 3 of the laminated substrate 5 via a second bonding layer 24 made of solder or a sintered material. The first conductive plate 3 is formed in a predetermined circuit pattern on the front surface (first main surface) of the insulating substrate 2. The second conductive plate 4 on the back surface of the laminated substrate 5 is bonded to the front surface of a heat dissipation base 26 by a third bonding layer 25 made of solder or a sintered material or the like. The second conductive plate 4 may be a metal foil formed on the entire back surface of the insulating substrate 2.

[0030] Metal terminals (not shown) for extracting signals to the outside are bonded to the inside of the case 7. Furthermore, a lead frame 10, which is a conductive connection part, is attached to the front surface (e.g., source electrode pad) of the semiconductor chip 1 via a first bonding layer 23 made of solder or sintered material. Furthermore, the inside of the case 7 is filled with sealing resin 8. Note that the configuration of the semiconductor module 50 shown in the figure is one example, and the present disclosure is not limited to this configuration. For example, a module structure without the case 7 is also possible.

[0031] (Semiconductor chip 1) The semiconductor chip 1 is a power chip such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor) or an SBD (Schottky Barrier Diode), and the semiconductor substrate may be a device using Si, SiC or GaN. The present disclosure is particularly effective for SiC chips and GaN chips that have high power and a high Young's modulus. The number of semiconductor chips 1 mounted may be one or more.

[0032] (Laminated substrate 5) The laminated substrate 5 can be composed of an insulating substrate 2, a first conductive plate 3 formed in a predetermined shape on one of its main surfaces, and a second conductive plate 4 formed on the other main surface. The insulating substrate 2 can be made of a material having excellent electrical insulation and thermal conductivity. Examples of the material for the insulating substrate 2 include Al2O3, AlN, and SiN. In particular, for high-voltage applications, a material having both electrical insulation and thermal conductivity is preferable, and AlN and SiN can be used, but are not limited to these. The first conductive plate 3 and the second conductive plate 4 can be made of Cu (copper) or a Cu alloy, which has excellent workability. Note that a Cu alloy is an alloy containing 80% or more of Cu. Among such conductive plates made of Cu or a Cu alloy, a conductive plate that is not in contact with the semiconductor chip 1 may be referred to as a back copper foil or a back conductive plate. Methods for disposing a conductive plate on the insulating substrate 2 include a direct copper bonding method and an active metal brazing method. Furthermore, the surface of the conductive substrate may be plated with Ni (nickel) or the like to form a Ni or Ni alloy layer.

[0033] (Heat dissipation base 26) The heat dissipation base 26 is a heat dissipation plate having, for example, a substantially rectangular planar shape made of metal such as Cu or Al having excellent thermal conductivity, and is also referred to as a metal substrate. The surface of the heat dissipation base 26 may be covered with a Ni film or Ni alloy film having an anti-corrosive effect. The rear surface of the heat dissipation base 26 may be joined to a cooling base section (not shown). The heat dissipation base 26 conducts heat generated in the semiconductor chip 1 and transmitted through the laminated substrate 5 to the heat dissipation fin section. The heat dissipation fin section has a plurality of heat dissipation fins and dissipates the heat conducted from the heat dissipation base 26. The heat dissipation base 26 itself may be a cooling device such as a heat dissipation fin section.

[0034] (First bonding layer 23, second bonding layer 24, third bonding layer 25) The first bonding layer 23, the second bonding layer 24, and the third bonding layer 25 can be formed using lead-free solder. For example, Sn-Sb, Sn-Cu, Sn-Ag, Sn-Sb-Ag, etc. can be used, but are not limited to these. Also, each bonding layer can be formed using a connecting material for sintered materials (a bonding material containing nanosilver particles) containing minute metal particles such as nanosilver particles. The materials and compositions of the respective bonding layers may be the same or different.

[0035] (Lead frame 10) The lead frame 10 is a conductive wiring that electrically connects the upper electrode of the semiconductor chip 1 to the first conductive plate 3 of the laminated substrate 5 and the take-out terminal, etc., via a first bonding layer 23 (bonding portion) such as solder. It is plate-shaped and has a bonding portion with the upper electrode and the take-out terminal, etc., a rising portion extending upward from the bonding portion, and a wiring portion connecting the rising portions, and has a bent portion between the bonding portion and the rising portion and between the rising portion and the wiring portion. The thickness of the plate is preferably 0.2 mm to 1.0 mm. In the embodiment, a surface metal layer is formed on the copper (Cu) layer on the sealing resin 8 side. As the surface metal layer, a metal that can generate a stable oxide film layer and has low electrical resistance is preferable. Specifically, it is aluminum (Al), titanium (Ti), or magnesium (Mg). In consideration of electrical resistance, etc., Al is preferable as the surface metal layer. It may contain less than 10% of other metals. The Cu material of the Cu layer may be Cu containing inevitable impurities other than Cu, or a Cu alloy containing 80 mass % or more of Cu. Since the surface metal layer has good adhesion to epoxy resin, by providing the surface metal layer on the sealing resin 8 side, it is possible to improve the adhesion to the sealing resin 8 without reducing the adhesion to the first bonding layer 23. This improves the power cycle resistance and improves the life of the semiconductor module 50.

[0036] FIG. 2 is a cross-sectional view showing the structure of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. FIG. 2 shows a case where the surface metal layer is an Al layer 31, and the lead frame 10 is a clad material in which Cu (copper) and aluminum (Al) are bonded together. The lead frame 10 is composed of a Cu layer 30 and an Al layer 31, and the Cu layer 30 is provided on the semiconductor chip 1 (first bonding layer 23) side and the Al layer 31 is provided on the sealing resin 8 side. This makes it possible to improve the adhesion between the sealing resin 8 and the lead frame 10 without reducing the bonding between the lead frame 10 and the first bonding layer 23, and to provide a highly reliable product. The lead frame 10 may be made of Cu plated on one side instead of a clad material. The lead frame 10 on the first conductive plate 3 of the laminated substrate 5 may also be a clad material in which Cu and Al are bonded together as in FIG. 2. However, this is not necessarily required because less heat is generated on the first conductive plate 3 than on the semiconductor chip 1.

[0037] Here, it is presumed that high adhesion can be obtained because the natural oxide film of Al is denser than that of Cu, and the OH groups on the surface of the Al oxide film form hydrogen bonds with polar groups such as OH groups, NH groups, and carbonyl groups in the epoxy resin.

[0038] In addition, although details will be described in the following Examples 10 to 12, it is preferable that the Al layer 31 is formed so as to cover the bent portion on the front side of the lead frame 10. On the back side of the lead frame 10, the adhesion between the Cu layer 30 and the sealing resin 8 remains the same, but since the Al layer 31 has a high adhesion to the sealing resin 8, the peeling progress at the resin peeling portion 32 is slowed down, and deformation during thermal stress can be suppressed. The Al layer 31 may be formed on the back side of the lead frame 10. However, since Al does not have good adhesion to the first bonding layer 23 such as solder or a bonding material containing nano-silver particles, it is preferable that the bonding surface is the Cu layer 30. Note that, if the first bonding layer 23 is formed so as to wrap around the side surface of the Cu layer 30 of the lead frame 10, the adhesion between the first bonding layer 23 and the lead frame 10 is improved, which is preferable.

[0039] As will be described in detail in Examples 1 to 5 below, since Al has a larger linear expansion coefficient than Cu, it is better for the Al layer 31 to be thin in terms of thermal stress, and it is preferable for the ratio of the Al layer 31 to the Cu layer 30 to be 10% or more and 50% or less.

[0040] Furthermore, Al forms a stable oxide film by surface treatment, and has better adhesion to the sealing resin 8 than Cu. Details will be described in Examples 6 to 9 below, but the oxide film is preferably surface-treated by anodizing, which can selectively oxidize only Al. By performing anodizing, a porous Al2O3 layer is formed only on the Al, and an oxide film that is stronger and more stable than a natural oxide film can be formed. Furthermore, the thickness of the oxide film is preferably 5 μm or more and 20 μm or less.

[0041] Anodizing is, for example, an electrochemical method using Al as the anode, in a sulfuric acid electrolyte (sulfuric acid anodizing) or in an oxalic acid electrolyte (oxalic acid anodizing), to form a porous Al2O3 layer on the surface of Al. Oxalic acid anodizing is more preferable because it can thicken the barrier layer and reduce the pore size, forming a denser oxide film. In this case, the barrier layer is 80 nm or more, and the pore size is 15 nm or less. Here, the oxide film formed by anodizing consists of a barrier layer on the surface side and a porous bolus layer on the barrier layer, and the pore size is the diameter of the pore in the bolus layer.

[0042] (Case 7) The lower end of the case 7 made of resin or the like is bonded to the periphery of the heat dissipation base 26. The case 7 is in the shape of a substantially rectangular cylinder and surrounds the periphery of the front surface of the heat dissipation base 26. A box-shaped recess is formed with the front surface of the heat dissipation base 26 as the bottom surface and the inner wall of the case 7 perpendicular to the front surface of the heat dissipation base 26 as the side wall. The semiconductor chip 1, which is wired with a wiring member such as a lead frame 10, the laminated substrate 5, and wiring member parts are stored inside this recess. The material of the case 7 may be, for example, a thermoplastic resin such as polyphenylene sulfide (PPS) or polybutylene terephthalate (PBT), or a thermosetting resin such as a phenolic resin. The semiconductor module 50 may be formed by molding the semiconductor chip 1, the laminated substrate 5, and the like with a sealing resin 8 without including the case 7.

[0043] (Sealing resin 8) The sealing resin 8 is used in a sealing resin layer that seals the member to be sealed, and is provided in contact with the member to be sealed, and mainly covers the periphery of the semiconductor chip 1, the laminated substrate 5, the lead frame 10, etc. The sealing resin 8 can be composed of a thermosetting resin composition, and is preferably composed of a highly heat-resistant thermosetting resin composition. The thermosetting resin composition contains a thermosetting resin base material, and may optionally contain an inorganic filler, a curing agent, a curing accelerator, and necessary additives. The thermosetting resin composition constituting the sealing resin 8 may or may not contain a fluorine-based silane coupling agent, but it is preferable that it does not contain one. This is because the glass transition temperature (Tg) of the sealing resin 8 may be lowered.

[0044] The thermosetting resin base is not particularly limited, and examples thereof include epoxy resin, phenolic resin, maleimide resin, etc. Among them, epoxy resin having at least two epoxy groups in one molecule is particularly preferred because of its high dimensional stability, water resistance, chemical resistance, and electrical insulation. Specifically, it is preferred to use aliphatic epoxy resin, alicyclic epoxy resin, or a mixture thereof.

[0045] The thermosetting resin composition according to the present embodiment may contain an inorganic filler as an optional component. The inorganic filler may be a metal oxide or a metal nitride, and examples thereof include fused silica (fused silicon oxide), silica (silicon oxide), alumina (aluminum oxide), aluminum hydroxide, titania (titanium oxide), zirconia (zirconium oxide), aluminum nitride, talc, clay, mica, glass fiber, and the like, but are not limited thereto. These inorganic fillers can increase the thermal conductivity of the cured product and reduce the thermal expansion coefficient. These inorganic fillers may be used alone, or two or more types may be mixed and used. These inorganic fillers may be microfillers or nanofillers, and two or more types of inorganic fillers having different particle sizes and / or types may be mixed and used.

[0046] The thermosetting resin composition may contain a curing agent as an optional component in addition to the thermosetting resin base, or in addition to the thermosetting resin base and the inorganic filler. The curing agent is not particularly limited as long as it reacts with the thermosetting resin base, preferably the epoxy resin base, and can be cured, but it is preferable to use an acid anhydride-based curing agent. Examples of the acid anhydride-based curing agent include aromatic acid anhydrides, specifically phthalic anhydride, pyromellitic anhydride, trimellitic anhydride, etc. Alternatively, cyclic aliphatic acid anhydrides, specifically tetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, hexahydrophthalic anhydride, methylhexahydrophthalic anhydride, methylnadic anhydride, etc., or aliphatic acid anhydrides, specifically succinic anhydride, polyadipic anhydride, polysebacic anhydride, polyazelaic anhydride, etc., can be mentioned. When a bisphenol A type epoxy resin is used alone or a mixture of a bisphenol A type epoxy resin and the high heat resistant epoxy resin exemplified above is used as the thermosetting resin base, it may be preferable not to use a curing agent because this improves heat resistance.

[0047] The thermosetting resin composition may further contain, as an optional component, a curing accelerator, such as imidazole or a derivative thereof, a tertiary amine, a boric acid ester, a Lewis acid, an organometallic compound, or an organic acid metal salt.

[0048] The thermosetting resin composition may also contain optional additives to the extent that the properties of the composition are not impaired. Examples of additives include, but are not limited to, flame retardants, pigments for coloring the resin, and plasticizers and silicone elastomers for improving crack resistance. These optional components and the amounts of them added can be appropriately determined by those skilled in the art according to the specifications required for the semiconductor device and / or the encapsulant.

[0049] (Method of manufacturing a semiconductor module according to an embodiment) Next, a method for manufacturing the semiconductor module according to the embodiment will be described. First, the heat dissipation base 26 and the multilayer substrate 5 are bonded to each other by the third bonding layer 25, and the multilayer substrate 5 and the semiconductor chip 1 are bonded to each other by the second bonding layer 24.

[0050] Thereafter, the case 7 is attached to the heat dissipation base 26, and then the lead frame 10 is joined. Next, a thermosetting resin composition constituting the sealing resin 8 is injected into the case 7 and heat cured. Next, the sealing resin 8 is filled into the case 7, and the sealing resin 8 is temporarily cured at 100 to 120°C for 10 to 120 minutes, and then fully cured at about 175 to 185°C for 1 to 2 hours to form the sealing resin 8.

[0051] As described above, according to the semiconductor module of the embodiment, the lead frame is composed of a Cu layer and an Al layer, with the Cu layer on the semiconductor chip side and the Al layer on the sealing resin side. This makes it possible to improve the adhesion between the sealing resin and the lead frame without reducing the bond between the lead frame and the solder, thereby improving the power cycle resistance and providing a highly reliable product.

[0052] (Example) The present disclosure will be described in more detail below with reference to examples of the present disclosure. However, the present disclosure is not limited to the scope of the following examples. Table 1 shows examples in which the ratio of the Al layer 31 (surface metal layer) to the plate thickness of the lead frame 10 (Al layer 31 thickness / (Cu layer 30 thickness+Al layer 31 thickness)) is changed. Table 2 shows examples in which the surface treatment of the Al layer 31 is changed. Table 3 shows examples in which the position of the Al layer 31 on the Cu layer 30 is changed.

[0053] [Table 1]

[0054] In Table 1, Examples 1 to 5 are examples in which the total plate thickness t of the lead frame 10 is 0.5 mm, an Al layer 31 is provided, and the ratio of the Al layer 31 (surface metal layer) to the plate thickness of the lead frame 10 is changed, and Comparative Example 1 is an existing example in which the plate thickness t of the lead frame 10 is 0.5 mm and an Al layer 31 is not provided. The shape of the lead frame 10 in Examples 1 to 5 is the shape in FIG. 2, and the shape of the lead frame 110 in Comparative Example 1 is the shape in FIG. 7. The adhesion was evaluated by a pudding test, and the module reliability was evaluated by a power cycle test. The evaluation values ​​and the ratios in which Comparative Example 1 is set to 1 are shown for each.

[0055] From Examples 1 to 5 in Table 1, by making 10% to 50% of the plate thickness of the lead frame 10 the Al layer 31, it was possible to improve adhesion to the epoxy resin by 65% ​​compared to Comparative Example 1. Also, by making 10% to 40% of the plate thickness of the lead frame 10 the Al layer 31, it was possible to improve module reliability by 30%. For this reason, the ratio of the thickness of the Al layer 31 (surface metal layer) to the plate thickness of the lead frame 10 is preferably 10% to 50%, and more preferably 10% to 40%.

[0056] When the Al layer 31 was made 50% thicker or more, the module reliability was slightly reduced. This is presumably because the difference in the linear expansion coefficient between Cu and Al made the lead frame 10 more susceptible to convex deformation, and larger stress was applied to the electrodes and bonding parts (first bonding layer 23). In addition, although the case where the plate thickness t of the lead frame 10 was 0.5 mm was shown, the same results were obtained when the total plate thickness t of the lead frame 10 was 1 mm.

[0057] [Table 2]

[0058] In Table 2, Examples 6, 7, and 9 are examples in which an oxide film is formed on the surface of the Al layer 31 by sulfuric acid anodizing, and the treatment time is changed to change the oxide film thickness. Example 8 is an example in which an oxide film is formed on the surface of the Al layer 31 by oxalic acid anodizing. Comparative Example 1 and Example 2 are the same as Comparative Example 1 and Example 2 in Table 1. The oxide film in Example 2 is a natural oxide film formed by leaving it indoors.

[0059] From Examples 6 to 8 in Table 2, it was possible to form a dense oxide film by performing anodizing treatment on the lead frame 10, improving adhesion with the epoxy resin by 76%, and further improving module reliability by about 40%. Also, from Examples 7 and 8 in Table 2, it was possible to form a denser oxide film with oxalic acid anodizing treatment than with sulfuric acid anodizing treatment, thereby further improving module reliability.

[0060] Furthermore, when the oxide film thickness is increased to 24 μm as in Example 9 in Table 2, the oxide film itself becomes slightly more brittle, and it is presumed that the adhesion is reduced and the module reliability is also reduced, compared to Examples 6 to 8, in which the oxide film thickness is 5 μm or more and 20 μm or less. For this reason, it is preferable that the oxide film formed by anodizing has a thickness of 5 μm or more and 20 μm or less.

[0061] [Table 3]

[0062] In Table 3, Examples 10 to 13 are examples in which the position of the Al layer 31 on the Cu layer 30 is changed. Figs. 3 to 6 are cross-sectional views showing other structures of the joint between the semiconductor chip and the lead frame of the semiconductor module according to the embodiment. Figs. 3 to 6 correspond to the shapes of the lead frame 10 in Examples 10 to 13, respectively. Comparative Example 1 and Example 2 are the same as Comparative Example 1 and Example 2 in Table 1. Fig. 2 corresponds to the shape of the lead frame 10 in Example 2, and Fig. 7 corresponds to the shape of the lead frame 110 in Comparative Example 1.

[0063] From Examples 10 to 13 in Table 3, the module reliability was slightly better when the Al layer 31 was formed to cover the bent portion and expose the tip portion than in Example 2 in which the Al layer 31 was provided on the entire surface of the lead frame 10. For this reason, it is preferable that the Al layer 31 covers 30% to 80% of the lead frame 10, including at least the bent portion near the semiconductor chip. When the Al layer 31 is formed on the entire surface of the lead frame 10 having a bent portion on the semiconductor chip 1 as shown in Figures 2 to 6, the module reliability is improved compared to the conventional case, but the module reliability was better when the Al layer 31 was partially provided because thermal stress increases at the electrode and the solder joint under the rising portion of the lead frame 10. One of the factors that is considered to be the deformation of the lead frame 10 due to the difference in the linear expansion coefficients of Al and Cu.

[0064] The details of the printing test and the power cycle test carried out in the examples are described below. In the printing test, a Cu / Al plate of 10 mm x 10 mm, which imitates the joint of a lead frame, was used as the substrate for the printing test. On this substrate, an epoxy resin composition usable as a sealing material was molded to have a bottom diameter of 3.6 mm, a top diameter of 3.0 mm, and a height of 3.0 mm, and a thermal curing reaction was carried out at 100 to 180°C for 3 hours to prepare a test piece of the epoxy resin cured material molded on the substrate.

[0065] The measurements were carried out as follows. A force gauge (load measuring device: Imada ZTA-1000N) was used to measure the shear strength. The measurement conditions were that the epoxy resin cured material was pressed parallel to the adhesive surface at a speed (strain rate) of 0.2 mm / s, and the strength (force) at which the interface between the epoxy resin cured material / resin composite substrate peeled off and broke was taken as the adhesion strength.

[0066] In the power cycle test, the sealing resin was as follows. The main epoxy resin is ME-276 epoxy resin (manufactured by Pelnox Co., Ltd.) Hardener: Acid anhydride MV-138 (manufactured by Pelnox Co., Ltd.) Mixing ratio: 121 parts by weight added to 100 parts by weight of epoxy resin base Inorganic filler: Fibrous silica with an average particle size of 10 μm (manufactured by Nippon Electric Glass Co., Ltd.) Mixing ratio: 270 parts by weight added when the total weight of the epoxy resin base agent and hardener is 100 parts by weight.

[0067] The power cycle test was performed at 40 to 175°C (ΔTj = 135°C), with one cycle consisting of 2 seconds of power operation and 9 seconds of rest, and the number of cycles until the electrical characteristics reached an abnormal value (a 20% change from the initial value) was investigated. Specifically, power was applied so that the chip temperature rose from 40°C to 175°C.

[0068] The present disclosure may be modified in various ways without departing from the spirit of the present disclosure, and in each of the above-described embodiments, for example, the dimensions of each part and the impurity concentration are set in various ways according to the required specifications, etc. Also, each of the above-described embodiments may be applied to wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) in addition to silicon as the semiconductor. [Industrial Applicability]

[0069] INDUSTRIAL APPLICABILITY As described above, the semiconductor module according to the present disclosure is useful as a power semiconductor module used in power conversion devices such as inverters, power supply devices for various industrial machines, igniters for automobiles, and the like. [Explanation of symbols]

[0070] 1, 101 Semiconductor chip 2. Insulating substrate 3 First conductive plate 4 Second conductive plate 5. Laminated substrate 7 Cases 8, 108 Sealing resin 10, 110 Lead frame 23 First bonding layer 24 Second bonding layer 25 Third bonding layer 26 Heat dissipation base (cooler) 30 Cu layer 31 Aluminum layer 32, 132 Resin peeling part 50 Semiconductor Module 124 Solder 133 Solder crack 134 Gate Destruction etc. 135 Deformation Direction

Claims

1. A laminated substrate having a semiconductor element mounted thereon; a lead frame electrically connected to the semiconductor element; a sealing resin that seals a member to be sealed, the member including the semiconductor element, the lead frame, and the laminated substrate; Equipped with The lead frame is made up of a Cu layer and an Al layer, and the Cu layer is provided on the semiconductor element side and the Al layer is provided on the sealing resin side.

2. 2. The semiconductor module according to claim 1, wherein the thickness of the Al layer is 10% to 50% of the thickness of the lead frame.

3. 2. The semiconductor module according to claim 1, wherein the aluminum layer has an oxide film formed on a surface thereof.

4. 4. The semiconductor module according to claim 3, wherein the oxide film has a thickness of 5 [mu]m or more and 10 [mu]m or less.

5. 4. The semiconductor module according to claim 3, wherein the oxide film has a barrier layer having a thickness of 80 nm or more and a pore diameter of 15 nm or less.

6. 2. The semiconductor module according to claim 1, wherein the Al layer covers a bent portion of the lead frame on the sealing resin side, and leaves a tip of the lead frame exposed.

7. 7. The semiconductor module according to claim 6, wherein the Al layer covers 30% to 80% of the lead frame including the bent portion on the sealing resin side.

8. 8. The semiconductor module according to claim 1, wherein the sealing resin is an epoxy resin.

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