Etching method and etching apparatus
By circulating oxygen radiation or ozone in a vacuum container and forming a modified layer using plasma, the problem of inaccurate etching control of SiCO film in three-dimensional semiconductor equipment is solved, and uniform and precise etching of SiCO film is achieved.
Patent Information
- Application Number
- JP2024154748
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-28
- Filing Date
- 2024-09-09
- Publication Date
- 2025-04-09
- Estimated Expiration
- 2044-09-09
AI Technical Summary
In semiconductor devices that manufacture three-dimensional structures, the prior art is difficult to achieve uniform and precise anisotropic plasma etching of SiCO low-k films, especially in the control of the etching amount and avoiding pattern falls and tiny gap residues caused by surface tension of chemical liquids.
A redirectional dry etching method is adopted to achieve uniform and precise etching of SiCO film by circulating oxygen radiation or ozone to the surface of the carbon silicide film in a process chamber within a vacuum container to oxidize its surface, and then using plasma to form a modified layer and de-therm the modified layer by thermal dissolution.
High-precision control and uniform etching of SiCO film in the substrate plane and depth direction are realized, and the problems of inaccurate etching control and uneven pattern in the prior art are solved.
Smart Images

Figure 2025058947000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an etching method and an etching apparatus for a SiCO (low-k) film. [Background technology]
[0002] In the field of semiconductor devices, the demand for lower power consumption and increased memory capacity has led to further miniaturization and three-dimensionalization of device structures in both logic and memory devices. For example, in logic devices, FinFETs (FinFETs) are approaching their miniaturization limits, so device manufacturers are developing Gate-All-Around (GAA) devices. In addition, in the case of memory devices, 3D NAND flash memory has already become mainstream, and 3D DRAM development is also being vigorously pursued.
[0003] 3D devices have a more three-dimensional and complex structure than 2D devices, and their manufacture often involves not only vertical (anisotropic) etching, which etches perpendicular to the wafer surface, but also isotropic etching, which allows etching in the lateral direction to the wafer surface.
[0004] Isotropic etching was conventionally performed by wet processing using chemicals, but with the progress of miniaturization, problems such as pattern collapse due to the surface tension of the chemicals and etching residues in fine gaps have become apparent. Therefore, in isotropic etching, there is a growing trend to replace the conventional wet processing using chemicals with dry processing that does not use chemicals.
[0005] Patent Document 1 discloses, as an example of isotropic dry etching of a silicon oxide film, a processing method in which the silicon oxide surface is modified using HF gas and NH3 gas, and then the substrate is heated to desorb and remove the modified layer, thereby removing the silicon oxide film.
[0006] Also, Non-Patent Document 1 discloses, as an isotropic dry etching method for a silicon oxide film, a processing method in which the surface is modified with CF4 / NH3 plasma, and then the modified layer is removed to remove the silicon oxide film. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] JP 2020-4837 A [Non-patent literature]
[0008] [Non-Patent Document 1] Journal of Vacuum Science and Technology A, 38 022604 (2020). Summary of the Invention [Problem to be solved by the invention]
[0009] For example, in processing around the gates of FinFETs and Gate-All-Around (GAA) devices, it is expected that a technology will be required to etch SiCO films, which are a type of low-k material, isotropically and uniformly across the substrate and in the depth direction with atomic layer-level controllability.
[0010] As an example, Figure 1 shows isotropic processing of a SiCO film 1 in a next-generation GAA device. The SiCO film 1 is deposited to cover a Si nanosheet 2, a SiGe sacrificial layer 3, and a CMOS gate 4. Under these gate structures is a silicon oxide film layer or a silicon substrate. In this etching process, it is required to etch the SiCO film 1 isotropically and to control the amount of etching precisely and uniformly over the entire surface of the three-dimensional structure (within the substrate surface and in the depth direction).
[0011] In conventional wet processing, it is difficult to precisely control the amount of etching, and problems include pattern collapse due to the surface tension of the chemical solution and etching residue in minute gaps. In addition, in spontaneous etching using reactive radicals, the etching rate of the SiCO film differs between the top and bottom of the pattern due to the rate-limiting supply of radicals, making it difficult to process the SiCO film uniformly over the pattern.
[0012] Furthermore, in the method disclosed in Patent Document 1, it has been confirmed that, as the number of cycles of the etching process increases, the silicon oxide film (SiO2) is etched, whereas the SiCO film is not etched, as shown in Figure 2. Also, the isotropic atomic layer etching method for silicon oxide film disclosed in Non-Patent Document 1 has a problem in that the etching rate of the SiCO film is extremely small.
[0013] The present invention has been made in consideration of the above problems in the prior art, and has an object to provide an isotropic etching method and etching apparatus capable of controlling the amount of etching with high precision. [Means for solving the problem]
[0014] An etching method according to one embodiment of the present invention is an etching method for etching a SiCO film formed on a wafer, which repeats the steps of supplying oxygen radicals or ozone to a wafer placed on a wafer stage in a processing chamber inside a vacuum vessel to oxidize the surface of the SiCO film, supplying reactive radicals to the wafer using plasma to form a modified layer from the oxidized layer on the surface of the SiCO film, and desorbing and removing the modified layer.
[0015] In addition, an etching processing apparatus according to another embodiment of the present invention includes a vacuum vessel having therein a processing chamber and a plasma source provided above the processing chamber, a wafer stage provided in the processing chamber on which a wafer having a SiCO film formed thereon is placed, a first mass flow controller for supplying a processing gas used for the plasma processing to the plasma source, a heating device for heating the wafer, and a control unit for controlling the etching processing of the SiCO film, and the control unit repeatedly executes the steps of: introducing an oxygen-containing gas, the supply flow rate of which is adjusted by the first mass flow controller, into the plasma source, generating plasma in the plasma source, thereby supplying the generated oxygen radicals or ozone to the wafer, thereby oxidizing the surface of the SiCO film; introducing a CF4 and NH3-containing gas, the supply flow rate of which is adjusted by the first mass flow controller, into the plasma source, generating plasma in the plasma source, thereby supplying the generated reactive radicals to the wafer, thereby forming a modified layer on the surface of the SiCO film; and heating the wafer by the heating device to detach and remove the modified layer. Effect of the Invention
[0016] In isotropic dry etching of a SiCO film, it is possible to realize highly accurate control of the etching amount and uniform processing in the wafer surface and in the depth direction. Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiment. [Brief description of the drawings]
[0017] [Figure 1] FIG. 1 is a schematic diagram of an isotropic etching step of a SiCO film in the manufacturing process of a GAA device. [Diagram 2] FIG. 1 is a diagram showing an experimental result of the relationship between the amount of etching and the number of cycles when a SiO 2 film and a SiCO film are etched using the method shown in Patent Document 1. [Diagram 3] 1 is a schematic diagram of an etching process procedure according to the present embodiment. [Figure 4] FIG. 13 is a diagram showing the dependence of the etching amount on the number of cycles in the etching method of the present embodiment. [Diagram 5]FIG. 4 is a diagram showing the surface oxidation time dependency of the etching rate in the etching method of the present embodiment. [Figure 6] FIG. 4 is a diagram showing the surface modification time dependence of the etching rate in the etching method of the present embodiment. [Figure 7] FIG. 1 is a schematic diagram of an etching processing apparatus. [Figure 8] 3 is a time sequence of the etching method of the present embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0019] The etching procedure of this embodiment is outlined in FIG. 3. In the first step, a gas containing oxygen is introduced into a vacuum vessel, a plasma device generates plasma inside the vacuum vessel, oxygen radicals or ozone are generated, and an oxide layer 5 is formed on the surface of the SiCO film 1. In the second step, the gas containing oxygen remaining in the gas phase is evacuated. In the third step, a gas containing CF4 and NH3 is introduced into the vacuum vessel, a plasma device generates plasma inside the vacuum vessel, reactive radicals are generated, and the oxide layer 5 is modified into a layer (surface modification layer) 6 of a compound containing nitrogen, hydrogen, silicon, fluorine, carbon, and oxygen. In the fourth step, the gas remaining in the gas phase is evacuated. In the fifth step, thermal energy is applied to the wafer to thermally decompose the surface modification layer 6 into volatile molecules, which are then desorbed to etch the SiCO film 1. Then, in the sixth step, the wafer is cooled to the temperature at the time of surface oxidation. By repeating the first to sixth steps, the etching amount is finally controlled to a desired value.
[0020] Figure 4 shows the dependence of the etching amount of the SiCO film 1 on the number of cycles when steps 1 to 6 are repeated. The results are shown for cases with and without a surface oxidation step. It can be seen that the etching amount of the SiCO film increases with an increase in the number of cycles. It can also be seen that the etching amount increases by about eight times by adding the surface oxidation step. Next, Figure 5 shows the dependence of the etching rate (etching amount per cycle) on the surface oxidation time. At this time, the surface modification time is fixed at 150 s. It can be seen that the increase in the etching rate saturates with the increase in the oxidation time, and the saturation time is 10 s. Furthermore, Figure 6 shows the dependence of the etching rate on the surface modification time. At this time, the surface oxidation time is fixed at 30 s. It can be seen that the increase in the etching rate saturates with the increase in the surface modification time, and the saturation time is about 30 s to 60 s.
[0021] From the results shown in Figures 5 and 6, it was demonstrated that the etching process of this embodiment is an atomic layer etching (ALE) process with self-limiting properties. By using this etching process, it is possible to control the etching amount with high precision and achieve uniform processing in the wafer surface and depth direction in isotropic dry etching of a SiCO film.
[0022] The overall configuration of the etching processing apparatus will be outlined with reference to Figure 7. The processing chamber 7 is composed of a base chamber (vacuum vessel) 11, in which a wafer stage 9 for placing a wafer 8 is installed. A plasma source (ICP plasma source) using the ICP (Inductively Coupled Plasma) discharge method is installed above the processing chamber 7. The ICP plasma source is used to clean the inner walls of the chamber with plasma and to generate reactive gases with plasma.
[0023] A cylindrical discharge tube 12 constituting an ICP plasma source is installed above the processing chamber 7, and an ICP coil 20 is installed outside the discharge tube 12. A high-frequency power source 21 for generating plasma is connected to the ICP coil 20 via a matching device 22. The high-frequency power from the high-frequency power source 21 uses a frequency band of several tens of MHz, such as 13.56 MHz. A top plate 25 is installed above the discharge tube 12. A gas dispersion plate 24 and a shower plate 23 are installed below the top plate 25, and processing gas is introduced into the discharge tube 12 via the gas dispersion plate 24 and the shower plate 23. The discharge tube 12 and the high-frequency power source 21 constitute a plasma source.
[0024] The supply flow rate of the processing gas is adjusted by a mass flow controller 50 installed for each type of gas. In addition, a gas distributor 51 is installed downstream of the mass flow controller 50, and the flow rate and composition of the gas supplied to the center of the discharge tube 12 and the gas supplied to the outer periphery are independently controlled. This allows detailed control of the spatial distribution of the partial pressure of the processing gas. Note that although Fig. 7 shows an example in which Ar, N2, CHF3, CF4, SF6, O2, NF3, HF, Cl2, BCl3, NH3, H2, CH2F2, CH3F, and CH3OH are used as the processing gas, other gases may be used.
[0025] An exhaust mechanism 15 is connected to the bottom of the processing chamber 7 via a vacuum exhaust pipe 16 in order to reduce the pressure in the processing chamber 7. The exhaust mechanism 15 is configured, for example, by a turbo molecular pump, a mechanical booster pump, or a dry pump, but is not limited to these. In addition, in order to adjust the pressure in the processing chamber 7, a pressure adjustment mechanism 14 is installed in the vacuum exhaust pipe 16 connected to the exhaust mechanism 15.
[0026] An IR lamp unit for heating the wafer 8 is installed above the wafer stage 9. The IR lamp unit includes an IR lamp 60, a reflector 61 for reflecting IR light, and an IR light transmitting window 72. Here, the IR lamp 60 uses circular (circular shaped) IR lamps 60-1, 60-2, and 60-3.
[0027] The IR lamp 60 emits light (herein referred to as IR light) mainly ranging from visible light to infrared light. In this example, three circles of IR lamps 60-1, 60-2, and 60-3 are arranged concentrically, but two circles, or four or more circles may be used. A reflector 61 is installed above the IR lamp 60 to reflect the IR light downward (toward the wafer placement direction).
[0028] An IR lamp power supply 73 is connected to the IR lamp 60, and a high frequency cut filter 74 is installed on the way thereto to prevent high frequency power noise from flowing into the IR lamp power supply 73. The IR lamp power supply 73 is also provided with a function for independently controlling the power supplied to the IR lamps 60-1 to 60-3, so that the radial distribution of the amount of heat applied to the wafer 8 can be adjusted (some of the wiring is not shown).
[0029] A flow path 27 is formed in the center of the IR lamp unit. A slit plate 26 with multiple holes is installed in this flow path 27 to block ions and electrons generated in the plasma and to transmit only neutral gases and neutral radicals for irradiation onto the wafer 8.
[0030] The wafer stage 9 has a flow path 39 for a coolant for cooling the stage formed therein, and a chiller 38 circulates and supplies the coolant via the flow path 39. In addition, in order to fix the wafer 8 by electrostatic adsorption, a plate-shaped electrode plate 30 is embedded in the stage and a DC power supply 31 is connected to it.
[0031] In order to efficiently cool the wafer 8, helium (He) gas with a flow rate adjusted by a mass flow controller 55 can be supplied between the back surface of the wafer 8 and the wafer stage 9. In order to prevent the back surface of the wafer from being scratched when the wafer 8 is heated and cooled while being adsorbed, the surface of the wafer stage 9 (the surface on which the wafer 8 is placed) is coated with a resin such as polyimide. Furthermore, a thermocouple 70 for measuring the stage temperature is installed inside the wafer stage 9, and this thermocouple is connected to a thermocouple thermometer 71.
[0032] The etching process of this embodiment will be described with reference to FIG. 8. The sequence of FIG. 8 is controlled by a control unit 80 of the etching processing apparatus. The control unit 80 is connected to the power supply, mechanism, and controller of the etching processing apparatus via a control line 81, and controls them to execute a predetermined sequence. First, a wafer 8 is transferred to the processing chamber 7 through a transfer port (not shown) provided in the processing chamber 7, and then the wafer 8 is fixed to a wafer stage 9 by electrostatic adsorption by power supply from a DC power source 31, and He gas for cooling the wafer is supplied to the back surface of the wafer 8. The pressure of the He gas is, for example, 1 kPa or 2 kPa.
[0033] Next, Ar gas for diluting the etching gas is supplied to the processing chamber 7 via the mass flow controller 50, the gas distributor 51, and the shower plate 23. The flow rate of the Ar gas is, for example, 0.5 L, 1 L, or 2 L. Thereafter, the dilution Ar gas continues to flow until etching is completed.
[0034] In the first step, a gas containing oxygen molecules is introduced into the processing chamber 7, and the high frequency power supply 21 is turned on to form a plasma in the discharge region 13, generating oxygen radicals or ozone. For example, the gas flow rate when oxygen gas is used is 0.5 L, 1 L, or 2 L. The power supplied to the high frequency power supply 21 is, for example, 1000 W, 1500 W, or 2000 W. The total pressure of the dilution Ar gas and oxygen gas is, for example, 50 Pa, 100 Pa, 200 Pa, or 300 Pa. These reactive species generated in the plasma are supplied to the processing chamber 7 through the flow path 27 and the slit plate 26, and are adsorbed on the surface of the wafer 8. These reactive species react with the surface of the SiCO film 1 to form an oxide layer 5 containing silicon, carbon, oxygen, and hydrogen on the surface of the SiCO film 1. Thereafter, the high frequency power supply 21 is turned off to stop the plasma generation and stop the supply of reactive species.
[0035] In the second step, the gas containing oxygen molecules remaining in the gas phase is evacuated to prepare for gas supply in the next third step.
[0036] In the third step, a gas containing CF4 molecules and NH3 molecules is introduced into the processing chamber 7, and the high frequency power supply 21 is turned on to form a plasma in the discharge region 13 and generate reactive radicals. The flow rate of the CF4 gas is, for example, 0.05 L, 0.1 L, 0.2 L, or 0.3 L, and the flow rate of the NH3 gas is, for example, 0.1 L, 0.2 L, 0.3 L, 0.4 L, or 0.5 L. The total pressure of the dilution gas, CF4 gas, and NH3 gas is, for example, 50 Pa, 100 Pa, 200 Pa, or 300 Pa. The reactive radicals generated in the plasma are supplied to the processing chamber 7 through the flow path 27 and the slit plate 26, and are adsorbed on the surface of the oxide layer 5. The reactive radicals react with the oxide layer 5, and the oxide layer forms a layer (surface modification layer) 6 of a compound containing nitrogen, hydrogen, silicon, fluorine, carbon, and oxygen. In order to suppress the spontaneous formation and desorption of the surface modification layer 6, the surface temperature during the radical irradiation needs to be kept below 80°C. Thereafter, the high frequency power supply 21 is turned off to stop the plasma generation and the supply of reactive radicals is stopped.
[0037] In the fourth step, the gas containing the CF4 molecules and NH3 molecules remaining in the gas phase is evacuated to prepare for the next fifth step.
[0038] In the fifth step, the wafer is heated by the IR lamps 60 to thermally decompose and desorb the surface modification layer 6 formed on the film surface, thereby etching (removing) the SiCO film 1. The wafer temperature at this time is also desirably 100°C or higher. To increase the heating efficiency of the IR lamps 60, the supply of He gas to the back surface of the wafer 8 is stopped prior to this process. Note that in order to suppress damage to the semiconductor device due to the heat load, the maximum wafer temperature is desirably 350°C or lower.
[0039] In the sixth step, He gas for cooling the wafer is supplied to the rear surface of the wafer 8 to cool the wafer, and the wafer temperature is returned to the temperature of the wafer stage 9.
[0040] By repeating the first to sixth steps, the amount of etching is finally controlled to a desired value.
[0041] As described with reference to FIGS. 5 and 6, in the etching process of this embodiment, the etching rate is saturated with respect to the surface oxidation time and the surface modification time, so that uniform etching can be performed within the wafer and in the depth direction.
[0042] In this embodiment, an example is shown in which IR lamps 60 are used to heat the wafer, but the heating method is not limited to this. For example, a method of heating the wafer stage or a method of transporting the wafer separately to an apparatus that only performs heating and performing a heat treatment thereon may also be used.
[0043] Furthermore, the present invention is not limited to the above-described embodiments, and various modifications are included. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the configurations described. Furthermore, it is possible to replace a part of the configuration in one embodiment with the configuration in another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is also possible to add, delete, or replace a part of the configuration in each embodiment with another configuration. [Explanation of symbols]
[0044] 1: SiCO film, 2: Si nanosheet, 3: SiGe sacrificial layer, 4: CMOS gate, 5: oxide layer, 6: surface modification layer, 7: treatment chamber, 8: wafer, 9: wafer stage, 11: base chamber, 12: discharge tube, 13: discharge area, 14: pressure adjustment mechanism, 15: exhaust mechanism, 16: vacuum exhaust piping, 20: ICP coil, 21: high frequency power supply, 22: matching machine, 23: shower plate, 24: gas dispersion plate, 25: top plate, 26: slit plate, 27: flow path, 30: electrode plate, 31: DC power supply, 38: chiller, 39: flow path, 50: mass flow controller, 51: gas distributor, 55: mass flow controller, 60: IR lamp, 61: reflector, 70: thermocouple, 71: thermocouple thermometer, 72: IR light transmission window, 73: IR lamp power supply, 74: high frequency cut filter, 80: control unit, 81: control line.
Claims
1. An etching method for etching a SiCO film formed on a wafer, comprising the steps of: a first step of supplying oxygen radicals or ozone to the wafer placed on a wafer stage in a processing chamber inside a vacuum vessel to oxidize a surface of the SiCO film; a second step of supplying reactive radicals to the wafer using plasma to form a modified layer from the oxide layer on the surface of the SiCO film; and a third step of heating the wafer to remove the modified layer, The etching method comprises repeating the first to third steps.
2. In claim 1, an etching method for forming the modified layer on the surface of the SiCO film while supplying helium gas between the wafer and the wafer stage;
3. In claim 1, The etching method, wherein the modified layer is a layer of a compound containing nitrogen, hydrogen, silicon, fluorine, oxygen and carbon.
4. In claim 1, CF inside the vacuum vessel 4 and NH 3 and generating plasma inside the vacuum chamber to generate the reactive radicals.
5. In claim 1, An etching method for heating the wafer by irradiating the wafer from above with light mainly in the visible to infrared light range.
6. a vacuum vessel including a processing chamber and a plasma source disposed above the processing chamber; a wafer stage provided in the processing chamber and on which a wafer having a SiCO film formed thereon is placed; a first mass flow controller for supplying a process gas to the plasma source; a heating device for heating the wafer; a control unit for controlling the etching process of the SiCO film, The control unit controls a process of introducing an oxygen-containing gas, the supply flow rate of which is adjusted by the first mass flow controller, into the plasma source, and generating plasma in the plasma source to supply oxygen radicals or ozone to the wafer, thereby oxidizing the surface of the SiCO film; and 4 and NH 3 a gas containing the compound of formula (I) into the plasma source, and a plasma is generated in the plasma source, thereby supplying the generated reactive radicals to the wafer to form a modified layer on the surface of the SiCO film, and a process of heating the wafer with the heating device to desorb and remove the modified layer.
7. In claim 6, a second mass flow controller for supplying helium gas between the wafer and the wafer stage; the control unit introduces the helium gas, the supply flow rate of which is adjusted by the second mass flow controller, between the wafer and the wafer stage in the process of forming the modified layer on the surface of the SiCO film.
8. In claim 6, The modified layer is a layer of a compound containing nitrogen, hydrogen, silicon, fluorine, oxygen and carbon.
9. In claim 6, The heating device is an etching processing apparatus having a lamp that irradiates the wafer from above with light mainly in the visible to infrared light range.
Citation Information
Patent Citations
Apparatus and method for surface treating substrates using activated reactive gases
JP2008513606A
Manufacturing method of semiconductor device
JP2010021296A
Method and apparatus for removing polymer from a substrate
JP2011517368A
Etching processing method and etching processing device
JP2023043845A
Apparatus and method for removal of oxide and carbon from semiconductor films in single processing chamber
JP2023085394A