Carbon-based deposits used for critical dimension control and formation of protective layers during etching of high aspect ratio features

Abstract

To provide a method for fabricating deep features with very high aspect ratios and tight critical dimension control (CD).SOLUTION: A method for manufacturing a semiconductor substrate includes a step 102 of vertically etching a feature having sidewalls and a depth in one or more layers formed on a semiconductor substrate, and a step 108 of depositing an amorphous carbon liner on the sidewalls of the feature. The step 102 and a step optionally including the step 108 are repeated until the vertically etched feature reaches a desired depth. With each repetition of the step 102, the feature is vertically etched deeper into one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each repetition of the optional step 108, the amorphous carbon liner deposited on the sidewalls of the feature is replenished.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Application No. 62 / 819,936, entitled "CARBON BASED LINER FOR CRITICAL DIMENSION CONTROL DURING HIGH ASPECT RATIO FEATURE ETCHES", filed March 18, 2019, U.S. Provisional Application No. 62 / 856,595, entitled "CARBON BASED LINER FOR CRITICAL DIMENSION CONTROL DURING HIGH ASPECT RATIO FEATURE ETCHES", filed June 3, 2019, and U.S. Provisional Application No. 62 / 961,061, entitled "CARBON BASED DEPOSITIONS USED FOR CRITICAL DIMENSION CONTROL DURING HIGH ASPECT RATIO FEATURE ETCHES AND FOR FORMING PROTECTIVE LAYERS", filed January 14, 2020. Each of these priority applications is incorporated herein by reference for all purposes.

[0002] Technical Field This application relates to semiconductors, and more particularly to a process for fabricating high aspect ratio features with tight critical dimension ("CD") control by using plasma enhanced chemical vapor deposition (PECVD) to deposit a highly etch resistant amorphous carbon film on the sidewalls of the features. The invention also relates to various techniques that prevent excess amorphous carbon liner material from depositing in the holes and sidewalls that define the feature to prevent or at least delay the occurrence of a "pinch-off" condition, thereby allowing the etch to deepen the feature for a longer period before the sidewall amorphous carbon film is depleted while maintaining tight CD control. This application also relates to the use of amorphous carbon as a sacrificial material used to protect vertically etched features during subsequent processing steps to fabricate other features. [Background technology]

[0003] The fabrication of certain semiconductor devices often involves vertical etching of features into layers or layer stacks of various materials, which may include, but are not limited to, silicon nitride, silicon oxide, polysilicon, boron-doped oxide, and / or other oxides.

[0004] In general, features that are vertically etched into a single layer or layer stack can vary widely in shape. Common features typically include, but are not limited to, cylinders, holes, trenches, slits, and other geometric or non-geometric shapes.

[0005] The aspect ratio of a given vertical etched feature is defined by its depth divided by its width. For example, a high aspect ratio cylinder is characterized by a small diameter (i.e., width) compared to its great depth. A high aspect ratio trench is similarly defined as having a great depth and a narrow width between its sidewalls.

[0006] In certain types of semiconductor devices, the fabrication of features with high aspect ratios is important. For example, in 3D NAND memory devices, it is desirable to fabricate cylinders, trenches, and other features with very high aspect ratios that span the depth of multiple stacked layers on the device. However, current manufacturing processes make it difficult to fabricate features with very high aspect ratios.

[0007] During deep vertical etching, the sidewalls of the feature are inevitably etched. This lateral etching increases the width of the feature, decreases the aspect ratio, and distorts and / or bows the sidewalls. The degree of lateral etching, distortion, and / or bowing is characterized by the critical dimension (or "CD") measurement of the feature.

[0008] It is known to use lateral etch barriers or "liners" on the sidewalls of features to improve CD measurements. These sidewall liners are typically either metal-based materials (e.g., tungsten carbide, or "WC") or carbon-based polymers that act as a barrier to mitigate lateral etching during vertical etching. While these liners work to some extent, they have several drawbacks. If the liner material is highly resistant to fluorine, chlorine, and / or bromine-based etching chemistries, the liner material may interact with the vertical etching process resulting in multiple negative outcomes. These negative outcomes include undesirable uneven and rough vertical grooves in the sidewalls caused by striations and kinks, uneven and inwardly recessed profiles, and irregularities in the hole above the plane of the layer or layer stack in which the feature is vertically etched. If the liner material is not highly resistant to the etching chemistries, the protection against bowing may be insufficient or inadequate.

[0009] The above problem is problematic for several reasons. First, due to the curvature, in some cases the insulation between features may be insufficient, resulting in electrical shorts. Second, to avoid the possibility of electrical shorts, it is prudent to place the features farther apart from each other than typically desired. This results in a lower density of certain semiconductor devices than is possible for a given process technology. Third, surface irregularities at the sidewall entry holes and at the bottom of the features result in poor contact surfaces, making it more difficult to deposit other films within the features.

[0010] Thus, conventional metal-based or carbon-based polymer liners are inadequate when pushing the limits of vertical etching of high aspect ratio features. Next generation process technologies require new processes for fabricating deep features in semiconductor structures with very high aspect ratios and tight critical dimension (CD) control. Summary of the Invention

[0011] This application relates to semiconductor processes for fabricating deep features with very high aspect ratios and tight critical dimension control (CD).

[0012] In one non-exclusive embodiment, the present invention relates to a method of manufacturing a semiconductor substrate, comprising: (a) vertically etching a feature having a sidewall and a depth in one or more layers formed on the semiconductor substrate; and (b) depositing an amorphous carbon liner on the sidewall of the feature.

[0013] The present invention further relates, in certain non-exclusive embodiments, to repeating (a) and, optionally, (b) until the feature reaches a desired depth. With each iteration of (a), the amorphous carbon liner is deposited on the sidewall of the feature. Horizontal The feature is vertically etched deeper into one or more layers while resisting the etch. With each iteration of optional (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished.

[0014] The use of an amorphous carbon liner is advantageous for several reasons. Amorphous carbon is highly resistant to the fluorine, chlorine, and / or bromine chemistries that are commonly used for vertical etching of features. The presence of the amorphous carbon liner on the sidewalls significantly reduces or eliminates lateral etching. In addition, the deposition process can be easily controlled. This means that the amorphous carbon liner can be tailored to meet certain desired specifications, such as material thickness, uniformity, composition, and compatibility. As a result: (1) Lateral etching is minimized during the vertical etching to prevent sidewall curvature and / or surface irregularities of holes on the top surface of one or more layers that define the feature. (2) The problems of striations, kinks, uneven and rough vertical surfaces, grooves, and other surface irregularities in the sidewalls are reduced or completely eliminated. (3) It can achieve high density, deep features with very high aspect ratios and tight CD control that are suitable for next generation process technologies and semiconductor devices.

[0015] In certain optional embodiments, other etches may also be performed. For example, after a vertical etch to nominally form or deepen a feature, a conformal etch may be performed at or near the top of the vertically etched feature in order to form a more desirable CD profile. After the deposition step, an optional etchback may also be performed to remove any incidental deposition of amorphous carbon that may occur in the openings and / or sidewalls of the vertical features.

[0016] In yet another embodiment, the etching of the amorphous carbon material deposited in the holes defining the feature and in the upper regions of the sidewalls of the feature is performed at least partially simultaneously with the deposition of the amorphous carbon material used to form a liner on the sidewalls of the feature. By performing the simultaneous etching, the "pinch-off" caused by excess amorphous carbon material collecting in the openings defining the feature during deposition is delayed or completely prevented. In addition, the simultaneous etching results in a more uniform thickness of the sidewall liner from top to bottom. The more uniform thickness allows the subsequent etching to deepen the feature to be extended for a longer time before the liner runs out while still maintaining tight CD control.

[0017] In yet another embodiment, a mask is patterned to define the opening of a feature formed in a semiconductor substrate, and excess deposition material is removed from the opening, again to prevent a pinch-off condition. In this embodiment, the semiconductor substrate is fabricated by (a) vertically etching a feature in the semiconductor substrate having an opening, sidewalls, and a depth, (b) depositing a liner material on the sidewalls of the feature, and (c) performing a mask shaping etch of the carbon mask used to pattern or define the opening of the feature. The mask shaping etch (i) "softly" shapes the carbon mask near the opening of the feature and (ii) removes excess deposition of liner material that may have collected at the opening of the feature. Both of these facilitate subsequent iterations of (a) and (b) that may be performed to deepen the feature and increase its aspect ratio.

[0018] In a non-exclusive embodiment, (a), (b), and (c) are repeated two or more times until the feature reaches the desired depth. In yet another non-exclusive embodiment, the mask is shaped to taper from a wide width to a narrow width in a direction toward the feature. In yet another embodiment, amorphous carbon is used as a liner material for the sidewalls of the feature.

[0019] By shaping the mask and removing unwanted material from the openings, at least the following advantages are realized: (1) the wide openings defined by the tapered mask allow deposition material and etchant chemistry to flow and diffuse more easily downward into the depth of the feature, and (2) the "pinch-off" condition caused by excess deposition material in the openings is reduced or completely eliminated.

[0020] By shaping the mask, removing excess material from the openings, and using an amorphous carbon liner, lateral etching is minimized during the vertical etch, reducing striations, kinks, uneven and rough vertical surfaces, bows, grooves, and other surface irregularities on the feature sidewalls and / or openings. As a result, high density, very deep features with very high aspect ratios and tight CD control can be fabricated.

[0021] In yet other embodiments, deposition of amorphous carbon can be used as a sacrificial protective material after vertical etched features with very high aspect ratios and tight critical dimension control (CD) are fabricated. In certain types of semiconductor substrates, such as 3D NAND devices, other structures, thin films, and / or layers can be fabricated on top of already fabricated vertical etched features. By partially or completely filling the vertical etched features, they can be protected during fabrication of overlying films, layers, and / or features. In various embodiments, non-conformal amorphous carbon material can be deposited on the sidewalls of the features, the openings defining the features can be filled with "plugs" of amorphous carbon, or the entire feature can be covered with amorphous carbon. Once deposited, the amorphous carbon can be etched back and / or completely removed using chemical etching, for example, using oxygen, hydrogen, or fluorine-based etches.

[0022] In yet another embodiment, the deposition and etching described above are performed in a single substrate processing tool that has the capability to perform both deposition and etching. In alternative embodiments, deposition and etching can be performed in a single tool having separate deposition and etch processing chambers, or in two separate deposition and etch tools. In the latter two embodiments, the substrate must be transferred between the different processing chambers.

[0023] In yet additional embodiments, deposition of amorphous carbon and etching back of the deposited amorphous carbon occur substantially simultaneously in the same processing chamber. In various embodiments, deposition of amorphous carbon is accomplished by introducing one or more carbon-containing precursors into the processing chamber and then generating a plasma in the chamber. Such carbon-containing precursors include, but are not limited to, hydrocarbons, such as propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemistries. The simultaneous etching is preferably, but not required to be, a chemical etch. In a non-exclusive embodiment, etching is performed by simultaneously introducing an etchant gas, such as nitrous oxide (N2O), carbon dioxide (CO2), hydrogen (H2), sulfur hexafluoride (SF6), oxygen (O2), or other oxygen-containing species, or combinations thereof, into the processing chamber during deposition. Other diluents, such as inert gases, including but not limited to nitrogen (N2), helium (He), and / or argon (Ar), may also be introduced into the chamber to control the deposition rate of the amorphous carbon. For example, the deposition rate can be minimized by using a relatively high concentration level of the diluent. The deposition rate can be increased by reducing or completely eliminating the diluent. Thus, higher concentration levels of the diluent are used in situations where minimal or no deposition is desired, such as during simultaneous deposition and etching to form vertical etch features with high aspect ratios and tight CD dimensions. In contrast, less diluent or even no diluent is used when the goal is to increase the deposition rate of the amorphous carbon, such as when forming sacrificial plugs and / or forming sacrificial non-conformal amorphous carbon on sidewalls. Thus, by adjusting the concentration level of the diluent, such as an inert gas, including but not limited to nitrogen (N2), helium (He), and / or argon (Ar), the deposition rate of the amorphous carbon can be controlled to serve a wide variety of different purposes.

[0024] The present application and its advantages may best be understood by referring to the following description taken in conjunction with the accompanying drawings. [Brief description of the drawings]

[0025] [Figure 1] FIG. 1 is a flow diagram illustrating process steps for fabricating one or more features on a semiconductor substrate in accordance with a non-exclusive embodiment of the present invention.

[0026] [Diagram 2] FIG. 2 illustrates several iterations of (a) vertical etching followed by (b) amorphous carbon liner deposition during the fabrication of one or more features on a semiconductor substrate in accordance with a non-exclusive embodiment of the present invention.

[0027] [Diagram 3] FIG. 3 illustrates an iterative process of (a) vertical etching and (b) deposition of an amorphous carbon liner using separate etching and plasma-enhanced chemical vapor deposition (PECVD) tools in accordance with a non-exclusive embodiment of the present invention.

[0028] [Figure 4] FIG. 4 illustrates an iterative process of (a) etching and (b) depositing an amorphous carbon liner in situ within a single tool, according to a non-exclusive embodiment of the present invention.

[0029] [Diagram 5] FIG. 5 is a diagram of an exemplary PECVD tool that can be used to deposit (b) an amorphous carbon liner, in accordance with a non-exclusive embodiment of the present invention.

[0030] [Figure 6] FIG. 6 is a flow diagram illustrating process steps for fabricating one or more features on a semiconductor substrate in accordance with another non-exclusive embodiment of the present invention.

[0031] [Figure 7A]FIG. 7A shows the feature prior to simultaneous etching and deposition of an amorphous carbon material onto the liner of the sidewalls of the etched feature in accordance with a non-exclusive embodiment of the present invention. [Figure 7B] FIG. 7B shows the feature after simultaneous etching and deposition of an amorphous carbon material onto the liner of the sidewalls of the etched feature in accordance with a non-exclusive embodiment of the present invention.

[0032] [Figure 8] FIG. 8 is a flow diagram for fabricating very high aspect ratio features with tight critical dimension ("CD") control in accordance with a non-exclusive embodiment of the present invention.

[0033] [Figure 9] FIG. 9 is a flow diagram illustrating process steps for forming openings that define features formed in a semiconductor substrate, in accordance with a non-exclusive embodiment of the present invention.

[0034] [Figure 10A] FIG. 10A illustrates an exemplary semiconductor substrate having a number of features formed therein, in accordance with a non-exclusive embodiment of the present invention.

[0035] [Figure 10B] FIG. 10B shows prior to etching to form the opening of the feature, according to a non-exclusive embodiment of the present invention. [Figure 10C] FIG. 10C shows after etching to form the opening of the feature, according to a non-exclusive embodiment of the present invention.

[0036] [Figure 11] FIG. 11 illustrates an exemplary vertical etched feature with very high aspect ratio and very tight CD control fabricated in a semiconductor substrate in accordance with a non-exclusive embodiment of the present invention.

[0037] [Figure 12]FIG. 12 illustrates a protective sacrificial layer and plug for protecting an exemplary vertical etched feature during subsequent processing, in accordance with a non-exclusive embodiment of the present invention. [Figure 13] FIG. 13 illustrates a protective sacrificial layer and plug for protecting an exemplary vertical etched feature during subsequent processing, in accordance with a non-exclusive embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0038] In the drawings, like reference numerals may be used to denote like structural elements. It should also be understood that the depictions in the drawings are schematic and not necessarily to scale.

[0039] The present application will now be described in detail with reference to several non-exclusive embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one skilled in the art that the present disclosure may be practiced without some or all of these specific details. In other instances, well-known process steps and / or structures have not been described in detail in order to avoid unnecessarily obscuring the present disclosure.

[0040] This application relates to semiconductor processes for fabricating deep features with very high aspect ratios and tight critical dimension control (CD). In one non-exclusive embodiment, the invention is directed to a method of fabricating a semiconductor substrate, comprising: (a) vertically etching a feature having sidewalls and a depth in one or more layers formed on the semiconductor substrate; and (b) depositing an amorphous carbon liner on the sidewalls of the feature.

[0041] The invention further relates, in a non-exclusive embodiment, to repeating (a) and optionally (b) until the vertically etched feature reaches a desired depth. With each repetition of (a), the feature is vertically etched deeper into one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional repetition of (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished.

[0042] Process Flow Diagram Referring to FIG. 1, there is shown a flow diagram 100 illustrating the repetition of processing steps (a) and (b) defined above to fabricate one or more vertical etched features in one or more layers formed on a semiconductor substrate.

[0043] In a first step 102, a nominal or "starter" vertical etch is performed to create one or more features on a semiconductor substrate.

[0044] In step 104, the nominal vertical etch is stopped. In a non-exclusive embodiment, the depth of the nominal vertical etch is in the range of 3-4 micrometers. It should be understood that this range is merely exemplary. Deeper or shallower nominal vertical etches may be performed.

[0045] In optional step 106, a conformal etch is performed. The purpose of the conformal etch is to open and / or control the CD of one or more holes that define one or more vertical features etched into the semiconductor substrate. Opening and / or controlling the CD of the hole prevents the top sidewall region of the feature from closing off, a condition known as "capping." If a given hole is closed off or too small, it may become clogged and the top of the feature may be "capped" with polymeric material during the subsequent vertical etch. Also, by opening and / or controlling the CD of the hole of the feature 14, the subsequent deposition of amorphous carbon tends to be more conformal. The conformal etch may be performed using a number of different chemistries, including but not limited to oxygen (O2), nitrous oxide (N2O), carbon dioxide (CO2), hydrogen (H2), and / or any other inert gas, or any mixture thereof.

[0046] In step 108, an amorphous carbon liner is deposited on the sidewalls of the one or more features, extending approximately from the top to the bottom depth of the opening of the one or more features. In various embodiments, the thickness of the amorphous carbon liner ranges from 5 to 500 angstroms. It should be understood that this range is merely exemplary. The amorphous carbon liner can be thin or thick.

[0047] In optional step 110, the deposited amorphous carbon liner is "densified." Making the amorphous carbon liner more dense increases its useful life before it needs to be replenished. Densification of the amorphous carbon liner can be achieved by compressing the amorphous carbon liner, purging hydrogen from the amorphous carbon liner, or a combination of both. For example, the amorphous carbon liner can be compressed and hydrogen removed by exposing the semiconductor substrate to a radio frequency (RF) plasma with inert plasma chemistries (e.g., argon, dinitrogen, helium, etc.), or to a hydrogen plasma, both of which result in densification.

[0048] In another optional step 112, an etchback is performed to remove excess amorphous carbon that may (i) be deposited on the plane of one or more layers around or adjacent to holes that define one or more features, and (ii) be deposited on the sidewalls of one or more features. Removing these excess deposits avoids a "pinch-off" condition that may partially or completely block or close the width of a given feature. When pinch-off occurs, it may prevent the chemistry of a subsequent vertical etch from reaching the depth of the feature, inhibiting vertical etching. Additionally, the ability to remove excess deposition material from the sidewalls typically results in a final feature with improved CD distribution width. The etchback may be performed using a number of different chemistries, including, but not limited to, oxygen (O2), nitrous oxide (N2O), carbon dioxide (CO2), hydrogen (H2), nitrogen (N2), or any mixture or combination thereof.

[0049] In step 114, it is determined whether the feature has been vertically etched to its desired depth. If yes, the process described above is complete. If no, steps 102-112 above are repeated, including vertical etch start step 102 and stop step 104, and any of optional steps 106-112.

[0050] For each iteration of the vertical etching step 102, several factors may be considered before stopping the vertical etching in step 104. One important factor is the condition of the amorphous carbon liner. Although amorphous carbon is generally highly resistant to fluorine, chlorine, and / or bromine, it is not completely impermeable to these etching chemistries. Factors such as the thickness of the amorphous carbon liner, the ratio of the lateral etch rate of the amorphous carbon liner to the rate at which the feature is vertically etched, and other criteria can all be used to determine when to stop the vertical etching and when to replenish the amorphous carbon liner. Very deep features (e.g., 4 micrometers or deeper) may require multiple iterations of (a) vertical etching and (b) deposition.

[0051] Note that step 108 is listed as "optional." As a general rule, the amorphous carbon liner is most often deposited after an initial nominal vertical etch. In this way, the sidewalls of one or more features undergo minimal lateral etching during the subsequent vertical etching step (a). At some point, after one or more iterative vertical etches (a), the feature reaches the desired vertical depth. When this occurs, replenishing the amorphous carbon liner may be unnecessary or undesirable. In that case, deposition step 108 may be optionally skipped.

[0052] Semiconductor substrate having vertically etched features - Patents.com Referring to Figure 2, several iterations of (a) vertical etching followed by (b) an amorphous carbon deposition liner are shown during the fabrication of one or more features on an exemplary semiconductor substrate. The fabrication of features on a semiconductor device generally follows the steps outlined above with respect to the flow diagram of Figure 1. In this particular example, three iterations of (a) and (b) are performed to reach the desired depth of the feature.

[0053] A semiconductor substrate 10 includes one or more layers 12. A nominal or "starter" vertical etch produces two features 14 defined by depth 16 and sidewalls 18, as shown. For clarity, a vertical etch is In most cases Substrate 10 and / or optional layer 12 of It is intended to be broadly construed to include any etching in depth, however, it should be understood that in any particular vertical etch, some etching in the horizontal direction may also occur.

[0054] In a subsequent first deposition, an amorphous carbon liner 20 is formed on the sidewalls 18 of the feature 14. The amorphous carbon liner 20 typically extends to or near the bottom of the depth 16 of the feature 14.

[0055] The substrate 10 then undergoes a second vertical etch to extend the depth 16 of the feature 14. Due to the second vertical etch, the amorphous carbon liner 20 no longer extends to the bottom depth 16 of the feature 14.

[0056] In the second deposition, the amorphous carbon liner 20 is replenished, extending near or to the bottom of the depth 16 of the feature 14 defined by the second vertical etch.

[0057] In a third iteration, feature 14 is again vertically etched. In this particular example, the depth 16 after the third vertical etch has reached the desired or target depth. Therefore, no vertical etch iteration is necessary in this example.

[0058] An optional third deposition again replenishes the amorphous carbon liner 20. Note that this step is optional and may not be implemented as described above.

[0059] 2, any of the optional steps may be implemented, including conformal etching 106, densification step 110, and / or etch back 112. In some embodiments, these steps may be performed for every iteration of (a) and (b). In other embodiments, these steps may be performed for some but not all of the iterations (a) and / or (b).

[0060] It is noted that in the second and third iterations, the amorphous carbon liner 20 is shown thicker after refill (b) compared to immediately after each vertical etch (a). It should be understood that the figures are merely illustrative and not drawn to scale. The thickness of the amorphous carbon liner 20 is typically in the range of a few angstroms, and a to-scale drawing is not warranted.

[0061] Only three iterations of (a) vertical etch and (b) deposition are described and illustrated. It should be understood that any number of iterations may be used. In some cases, fewer iterations are required to reach the desired depth 16 of the feature 14, while in other cases, more iterations are required.

[0062] Determining the number of repetitions of (a) and (b) required for a given feature 14 depends on a wide variety of factors. Such factors may include, but are not limited to, the desired depth of the feature, the thickness of the deposited amorphous carbon liner 20, the critical dimension (CD) tolerance of the feature 14, the desired aspect ratio of the feature 14, when the amorphous carbon liner 20 needs to be replenished, and / or any combination thereof. It should be understood that this list of factors is not exhaustive and other factors may also be considered.

[0063] For simplicity, only one layer 12 is shown. It should be understood that layer 12 may include multiple stacked layers. The individual layers 12 of the semiconductor substrate 10 may vary widely. Such layers may be silicon nitride, silicon oxide, polysilicon, oxide, Boron-doped oxides such as Doped Oxide 、 These may include, but are not limited to, various spin-on glass materials, such as PSG and BPSG, or any other type of material or layer formed on a semiconductor substrate, including those currently known or used and those that may be discovered or used in the future. Thus, it should be understood that this list of materials is not exhaustive and that features 14 may be vertically etched into other layers of any type of material other than those specifically listed herein.

[0064] It should also be understood that features 14 can take on a wide variety of shapes, including, but not limited to, cylinders, holes, trenches, slits, geometric shapes, non-geometric shapes, or almost any other shape that may be fabricated on a semiconductor substrate, such as semiconductor substrate 10.

[0065] It should also be noted that in some embodiments, the amorphous carbon liner 20 deposited on the sidewalls 18 of the vertically etched features 14 may be removed during subsequent processing steps of the semiconductor substrate 10. For example, the amorphous carbon liner 20 may be removed during an "ashing" step, which is typically an isotropic etching step.

[0066] Substrate Processing Tools As detailed above, the above-described process includes (a) depositing features 14 on one side of semiconductor substrate 10; The above The process involves at least two process steps, including (a) vertically etching into layer 12, and (b) depositing an amorphous carbon liner 20 on sidewalls 18 of feature 14. In various embodiments, these two processes (a) and (b) can be accomplished in separate etching and deposition tools, or alternatively, in a tool capable of performing both (a) and (b) in situ.

[0067] Figure 3FIG. 50 depicts the iterative processing steps of (a) vertical etching and (b) deposition of an amorphous carbon liner 20 using two separate tools.

[0068] In this embodiment, a separate plasma etching tool 52 is used to etch one The above One or more vertical etching steps (a) of features 14 are performed in layer 12. One or more iterations of (b) deposition of an amorphous carbon liner 20 are performed using a separate deposition tool, such as a plasma-enhanced chemical vapor deposition tool (PECVD) 54.

[0069] The circular arrows 56, 58 are intended to indicate the iterative nature of the process described above. In other words, after the semiconductor substrate 10 is vertically etched, it is removed from the tool 52 and transferred to the PECVD tool 54. After deposition of the amorphous carbon liner 20, the semiconductor substrate 10 is then transferred back to the etching tool 52. The above process may be repeated multiple times until the feature 14 reaches its desired final depth 16, as described above. In various embodiments, commercially available tools may be used, such as Kiyo or Flex etching tools and / or Altus or Reliant deposition tools, both of which are commercially offered by the assignee of the present application.

[0070] Figure 4 Referring to FIG. 60, there is shown a representation of a single PECVD tool 62 capable of performing both (a) vertical etching on a semiconductor substrate 10 and (b) deposition of an amorphous carbon liner 20 in situ. In this embodiment, the repetitive steps of (a) and (b) are performed in one tool as indicated by arrows 64 and 66, eliminating the need to transport the semiconductor substrate 10 between multiple tools. By using a single tool 62, the throughput for processing multiple substrates 10 can be increased compared to using multiple tools.

[0071] A tool capable of performing both (a) and (b) can be implemented by either (1) modifying an existing etch tool, (2) modifying a plasma-enhanced chemical vapor deposition (PECVD) tool, or (3) designing and building a new tool from scratch.

[0072] The steps of densifying the amorphous carbon liner 20 and / or the above-mentioned optional steps of etch-back and conformal etching may be performed using tools 52, 54, and / or 62 It is further noted that the present invention can be implemented in either

[0073] Exemplary PECVD Tool Figure 5 1 is a diagram of an exemplary PECVD tool 70 that can be used to deposit an amorphous carbon liner 20 onto a sidewall 18 of a feature 14 of a semiconductor substrate 10 in accordance with a non-exclusive embodiment of the present invention.

[0074] CVD tool 70 includes a processing chamber 72 , a showerhead 74 , a substrate holder 76 for holding and positioning the semiconductor substrate 10 being processed, a radio frequency (RF) generator 80 , and a system controller 82 .

[0075] In operation, reactive gases are supplied into the process chamber 72 through the showerhead 74. Within the showerhead 74, the gases are distributed into the chamber 72 through one or more plenums (not shown) into a region generally above the surface of the semiconductor substrate 10 being processed. An RF potential generated by an RF generator 80 is applied to an electrode (not shown) on the showerhead 74. (The RF potential may optionally be applied through an electrode, not shown, provided on the substrate holder 76.) The RF potential creates a plasma 84 within the process chamber 72. Within the plasma 84, energized electrons ionize or dissociate (i.e., "crack") reactive gases to create chemically reactive radicals. As these radicals react, a thin film is deposited and formed on the semiconductor substrate 10, including the amorphous carbon liner 20 described herein.

[0076] The plasma 84 in the chamber 72 may be capacitively or inductively powered.

[0077] In various embodiments, RF generator 80 may be a single RF generator or multiple RF generators capable of generating high, medium, and / or low RF frequencies. For example, for high frequencies, RF generator 80 may generate frequencies in the range of 2-100 MHz, preferably 13.56 MHz or 27 MHz. For low frequencies generated, the range is 50 KHz-2 MHz, preferably 350-600 KHz.

[0078] A system controller 82 is used to control the overall operation of the PECVD tool 70 and the process conditions during deposition, post-deposition, and / or other process operations. The controller 82 is typically implemented using system control software or Computer Code The present invention includes one or more non-transitory computer-readable media devices for storing the code, and one or more processors for executing the code. The term "non-transitory computer-readable media" is generally used to refer to storage devices such as main memory, secondary memory, removable storage, and media such as hard disks, flash memory, disk drive memory, CD-ROMs and other forms of persistent memory, and is a form of persistent memory and should not be interpreted to cover transient objects such as carrier waves or signals. The processor may include a CPU or computer, multiple CPUs or computers, analog and / or digital input / output connections, motor controller boards, etc.

[0079] In certain embodiments, a controller 82 running or executing system software or code controls all or at least most of the activities of the tool 70, including control of the timing of processing operations, the frequency and power of operation of the RF generator 80, the pressure within the processing chamber 72, the flow rates, concentrations and temperatures of gases into the process chamber 72 and their relative mixtures, the temperature of the semiconductor substrate 10 supported by the substrate holder 76, and the like.

[0080] Controller 82 may also include a user interface (not shown), which may include a display screen, a graphical software display that indicates operating parameters and / or process conditions of tool 70, and user input devices, such as a pointing device, keyboard, touch screen, microphone, etc., that allow a human operator to interface with tool 70.

[0081] Information transferred between the system controller 82 and the various components of the tool 70 may be in the form of signals, such as electronic, electromagnetic, optical, or other signals, that can be sent and / or received over communication links that transmit signals and may be implemented using wire or cable, fiber optics, telephone lines, cellular phone links, radio frequency links, and / or other communications channels.

[0082] It should also be noted that the PECVD tool may be modified to perform various etching steps, including the vertical etch of feature 14, and possibly optional etch-back and conformal etches.

[0083] Deposition of amorphous carbon liner A wide variety of process flows can be used, either in dedicated PECVD tools and / or dual purpose etch and PECVD tools, to deposit the amorphous carbon liner 20 on the sidewalls 18 of the features 14. Such process flows involve defining the temperature ranges, pressure ranges, methods of powering the plasma in the processing chamber, control of gas flow rates into the processing chamber, and the actual precursors and other chemicals actually used in the processing chamber.

[0084] In Table 1 provided below, illustrative examples and / or ranges are provided for each of the parameters listed above. Using these examples and / or ranges, an amorphous carbon liner 20 can be deposited on the sidewalls 18 of the feature 14 using a PECVD process. [Table 1]

[0085] The information provided in the above table should not be construed as limiting in any way. To the contrary, it should be understood that the various ranges, examples, and factors used to define a given deposition duration are merely illustrative. Other ranges, examples, and factors can be used as needed in the deposition of the amorphous carbon liner 20 to meet particular design objectives and process parameters.

[0086] Amorphous Carbon The amorphous carbon deposited to form the liner 20 on the sidewall 18 of the feature 14 is preferably free reactive carbon with little or no crystalline structure. π bondwith hydrogen. Amorphous carbon is often abbreviated as "aC" for general amorphous carbon, "HAC" for hydrogenated amorphous carbon, and "ta-C" for tetrahedral amorphous carbon, sometimes called diamond-like carbon. In the context of the present application, any of these types of amorphous carbon may be used to define the liner 20 on the sidewall 18 of the feature 14.

[0087] As used herein, the properties of the amorphous carbon liner 20 vary depending on the parameters used during deposition. The primary method for characterizing amorphous carbon is to characterize the sp 2 Hybrid bonds and sp 3 The ratio of hybrid bonds is based on the ratio of sp 2 Diamond is made up of pure sp 3 It is composed of hybrid bonds. 3 Materials with many hybrid bonds are sp 3 It is referred to as tetrahedral amorphous carbon due to the tetrahedral shape formed by the hybrid bonds, or as diamond-like carbon (due to the similarity of many physical properties to diamond). In addition, the amount or extent of hydrogen in the amorphous carbon liner 20 can be easily measured using spectroscopic techniques, such as Rutherford backscattering spectroscopy (RBS). The ability to detect the level of hydrogen is particularly beneficial when performing steps to densify the amorphous carbon liner 20 as described above.

[0088] Feature characteristics / dimensions By using the repetitive two-step process (a) and (b) described herein, semiconductor substrates with deep etch features, very high aspect ratios, and very tight CD control can be realized. For example, features 14 having depths of 4 micrometers or more, aspect ratios of (50:1) or more, and tight CDs in the range of 80-100 nanometers, or 150 nanometers or less, can be realized. It should be understood that these characteristics are merely exemplary. Features 14 can be fabricated with deeper or shallower vertical depths, larger or smaller aspect ratios, and / or tighter or less tight CD measurements. In principle, however, as semiconductor manufacturing techniques improve and the demand for ever denser semiconductor devices continues, features 14 with deeper depths, higher aspect ratios, and even tighter CD measurements may be realized using the subject matter described herein.

[0089] Simultaneous deposition and etching As discussed above, pinch-off of the opening defining feature 14 can be problematic for at least two reasons, including (1) possibly preventing etchant chemicals from reaching the depth of the feature when etching the feature to deepen it, and (2) possibly preventing amorphous carbon from depositing on sidewalls 18 of feature 14 when forming and / or refilling liner 20. Thus, avoiding pinch-off conditions is advantageous because it (3) allows liner 20 to be more uniform in thickness from top to bottom, which in turn allows (4) subsequent etching to deepen feature 14 to continue for a longer period of time before liner 20 is depleted while maintaining tight CD control than would otherwise be possible.

[0090] 6, a flow diagram 200 is shown depicting a process flow according to another non-exclusive embodiment for fabricating features 14 on a semiconductor substrate. In this embodiment, steps 102, 104, and optional steps 106, 110, 112, and decision step 114 are essentially the same as previously described. Thus, for the sake of brevity, a repeated description of these steps will not be provided herein.

[0091] Step 208 differs from step 108 described above in that while deposition of liner 20 is occurring, the amorphous carbon material deposited in the opening and top regions of feature 14 is simultaneously etched. By performing the simultaneous etch, a pinch-off condition during deposition is completely prevented or at least delayed. As a result, the opening defining feature 14 remains open either for the entire duration of deposition or for a longer time than pinch-off would otherwise occur, thereby preventing or delaying clogging of the opening with excess amorphous carbon material. As a result, the liner 20 on the sidewall 18 is more uniform in thickness from the top to the bottom of feature 14 (compared to if the simultaneous etch was not performed). With a more uniform liner 20, the subsequent etch to deepen feature 14 can continue for a longer time before liner 20 is depleted while maintaining tight CD control.

[0092] As used herein, the term "concurrently" should be interpreted broadly. In various embodiments, concurrently can mean that etching is performed for the entire duration of deposition. In other embodiments, concurrently means that etching is performed for only a portion or fraction of the time that deposition is performed.

[0093] Step 208 is implemented by introducing an etchant gas into the process chamber 72 while deposition is in progress. As previously described, deposition of the amorphous carbon liner 20 on the sidewalls is performed by introducing a carbon-containing reactant (e.g., a hydrocarbon such as propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemistries) into the process chamber and controlling the temperature range, pressure range, plasma source, etc., as previously described. At least partially simultaneously, an etchant chemistry such as oxygen (O2), nitrous oxide (N2O), carbon dioxide (CO2), hydrogen (H2), and / or any other inert gas, or any mixture or combination thereof, is also introduced into the chamber. Thus, as amorphous carbon is deposited to form the liner 20 on the sidewalls 18 of the feature 14, the etchant simultaneously functions to remove excess deposits of amorphous carbon from collecting in the opening and top regions of the feature 14. As a result, a pinch-off condition is avoided entirely or at least delayed to prevent full or partial blocking of the opening for a longer period of time than would occur in the absence of the simultaneous etch, which in various embodiments may occur during the entire liner deposition, or during a portion of the simultaneous etch, or during a portion of the simultaneous etch.

[0094] In non-exclusive embodiments, the etching is preferably localized to the opening of the feature 14, which may be several micrometers or more deep, and only to a depth of a few hundred nanometers (e.g., 50-400 nanometers). During deposition of the amorphous carbon, several factors or parameters in the process chamber 72 can be managed to control the rate and depth of the simultaneous etching. For example, (1) the power of the plasma in the process chamber can be set relatively low. This means that it is sufficient to break down the etchant chemical into radicals. For example, if the etchant chemical is carbon dioxide (CO2), the power need only be sufficient to break down the carbon dioxide into carbon monoxide (CO) radicals and oxygen (O) radicals. In various embodiments, the power can range from about 25 watts to 1 Kw. (2) Certain radicals, such as monooxygen (O), have a nuclear structure that promotes bonding with other elements. As a result, the radicals have a relatively short lifetime. This effectively means that the radicals have limited ability to diffuse down into the depth of the feature 14 and etch the amorphous carbon on the liner 20 to a depth of more than a few hundred nanometers. (3) By controlling the pressure in the chamber to a relatively high range (e.g., in the range of 50 millitorr to 10 torr), the reactive ions have a relatively low ion angle distribution function ("IADF"). As a result, the majority of the ions will come into contact with the amorphous carbon at or near the opening and top region of the sidewall 18 of the feature 14, while very few reactive ions have the ability to diffuse down into the depth of the feature 14 to a depth of more than a few hundred nanometers (e.g., 400 nanometers). (4) The etching is primarily chemical, which means that when radicals such as monooxygen (O) or carbon monoxide (CO) come into contact with the amorphous carbon liner 20, they react immediately rather than bouncing off the sidewall and diffusing deeper into the feature.

[0095] Each of the above factors contributes to limiting the etch depth. In different circumstances, the etch depth may vary depending generally on the critical dimension of a given feature 14. For example, features 14 with relatively small critical dimensions (e.g., 50 nanometers) tend to have smaller etch depths because radicals are much more likely to contact and react with the surface compared to features 14 with larger critical dimensions. Features 14 with larger critical dimensions have a greater chance of reaching deeper levels before at least some radicals contact the amorphous carbon on the liner 20. Thus, the larger the critical dimension of a given feature 14, the deeper the etch may generally be.

[0096] The etch rate is also highly controllable or "tunable." etching By controlling the flow rates of the chemicals, the radical concentration in the chamber can be generally managed. Thus, if a fast etch is desired at the opening and top regions of the feature, more etchant chemical is introduced into the processing chamber. Conversely, a slower and more careful etching is desired. etching If speed is desired, less etchant chemical is introduced. In various embodiments, flow rates may range from 50 standard cubic centimeters per minute (SCCM) to 15 standard liters per minute (SLM). Note that these flow rates are merely exemplary. Higher or lower flow rates may also be used.

[0097] Regardless of the rate, simultaneous etching creates by-products that are typically removed by applying a vacuum pump to the process chamber 72.

[0098] In one non-exclusive embodiment, most or all of the process flow depicted in FIG. 6 is performed in the processing chamber 72 of the substrate processing tool 70, the operation of which is controlled by the system controller 82. In other embodiments, various steps of the process flow of FIG. 6 are performed in different process tools and / or process chambers. For example, steps 102 / 104 can be performed in one process chamber, while step 208 described herein is performed in another process chamber. The two process chambers can be included in either two separate tools, or in a single tool having two chambers. In either case, the substrate being processed needs to be transferred between the two chambers.

[0099] Simultaneous etching during deposition of the amorphous carbon liner 20 has several advantages. By preserving the opening and preventing the liner 20 from becoming too thick in the upper regions of the sidewalls 18, the subsequent etching step 102 to deepen the feature can be extended while maintaining tight CD control. In addition, the optional step 112 of performing a non-simultaneous etch is required less frequently. For example, instead of performing step 112 after every deposition step, step 112 can be performed after every second or third deposition step.

[0100] With reference to Figures 7A and 7B, a feature 14 having an amorphous carbon liner 20 is shown. In Figure 7A, no simultaneous etching has been performed. As a result, the amorphous carbon liner 20 is non-uniform in thickness and the opening defining the recess 14 is partially closed. In contrast, Figure 7B shows a similar feature 14 in which a simultaneous etching has been performed. As is evident from a comparison of the two features, in the example of Figure 7B, the opening is larger and the thickness of the amorphous carbon liner 20 is more uniform.

[0101] Thus, the "co-flow" of deposition precursor and etchant chemistries provides several advantages: the etch prevents or reduces the growth of amorphous carbon material in the opening and top regions of the liner 20 of a given feature 14, while still allowing the same liner to be deposited deeper within the feature 14. The net result is that feature The thickness uniformity of the liner 20 from the top to the bottom of the feature is improved because the thickness of the liner 20 is increased by approximately 100% before pinch-off occurs at the opening and / or upper region of the feature. 14 This means that the liner 20 in the lower region can be thicker so that subsequent etching to deepen the feature 14 can be performed for a longer time before the liner 20 is depleted and needs to be replenished.

[0102] Mask forming and removal of pinched-off material In yet another embodiment, steps can be performed to shape the mask used to define the feature 14 and remove excess pinch-off material that may have accumulated in the opening defined by the mask. In this embodiment, a carbon mask is formed and patterned on a semiconductor substrate. The feature 14 is then fabricated as described above by (a) performing a starter or nominal etch using the mask to define the feature 14, (b) depositing an amorphous carbon liner 20 on the sidewalls 18 of the feature, and repeating (a) and (b) as necessary until the desired depth and critical dimension is achieved. This embodiment introduces an additional step (c) which involves performing a mask shaping etch of the carbon mask to define the opening of the feature. In a preferred but not required embodiment, (a), (b), and (c) are repeated two or more times until the feature reaches the desired depth. The purpose of each iteration of the mask shaping etch (c) is to (i) remove excess deposits of liner material that have collected in the opening of the feature defined by the carbon mask, and (ii) shape the carbon mask in the vicinity of the opening of the feature. The use of (i) and (ii) facilitates subsequent iterations of vertical etching (a) and sidewall liner deposition (b).

[0103] Process Flow Diagram 8, a flow diagram 300 is shown illustrating one or more processing steps (a), (b), and (c) for fabricating a vertical feature 14 on a semiconductor substrate. Steps 102, 104, 106, 108, 110, and decision step 114 are essentially the same as previously described. Therefore, for the sake of brevity, the description of these steps will not be repeated herein.

[0104] In step 302, a mask etch for feature 14 is performed to (i) remove excess deposits of amorphous carbon material that may have collected or otherwise deposited in the openings of the mask defining the feature during liner deposition step 108, and (ii) shape the carbon mask that defines the openings of the feature.

[0105] By performing (i) and (ii), subsequent iterations of vertical etching (a) at step 102 and sidewall liner deposition (b) at step 108 are more effective because etchant and deposition materials are not hindered from accessing the sidewalls and depth of the feature. Further details of non-exclusive embodiments of masked etching are described below with reference to FIG.

[0106] In step 114, it is determined whether the feature has been vertically etched to its desired depth. If yes, the above-described process is complete. If no, the above steps 102, 104, and 302, and possibly optional steps 106, 108, and 110 are repeated.

[0107] Mask Etching Step As described above, a mask etch step 302 is performed to (i) remove excess deposits of liner material that may have collected in the feature openings, and (ii) shape a carbon mask near the feature openings. Shaping the mask and removing the unwanted deposits allows for the etchant chemistry and deposition to be more efficiently performed in subsequent iterations of (a) and (b). material The ion implantation process allows the ion implanter to more easily penetrate into the feature and reach its depth, resulting in features with high aspect ratios and tight CD control.

[0108] Figure 9 shows Figure 83 is a flow diagram showing the individual steps of the mask etch step 302 of FIG. 3. Step 302 is performed while the deposition step 108 is ongoing. As the sidewall deposition is ongoing, two separate queries are performed in parallel.

[0109] First, in decision 306, it is determined whether the liner 20 on the sidewall 18 of the feature 14 has been deposited to a desired thickness.

[0110] Second, in decision 308, it is also determined whether the amount or degree of "pinch-off" caused by excess deposition of liner material that may have collected at the opening of feature 14 has exceeded a threshold. In various embodiments, the threshold may be defined as partial (e.g., a defined percentage) or complete blockage of the opening.

[0111] If the liner 20 reaches the desired thickness without the pinch-off material exceeding the threshold, control returns to decision step 114 of FIG.

[0112] Conversely, if the pinch-off of material exceeds a threshold before the desired thickness of the liner 20 is reached, a mask etch is performed.

[0113] In step 310, a mask etch is performed to repair pinch-off conditions that partially or completely occlude or close the openings that define the features 14. Also, shaping or tapering the mask better encourages both sidewall deposition material and etchant chemistry in subsequent iterations to flow to the depth of a given feature 14. According to various embodiments, the mask etch may be performed using a number of different chemistries, including, but not limited to, nitrous oxide (N2O), carbon dioxide (CO2), oxygen (O2), hydrogen (H2), or any mixture or combination thereof.

[0114] In decision 312, it is determined whether the desired amount of pinch-off material has been removed and / or whether the desired shape of the mask has been achieved. If no, step 310 continues. If yes, control returns to step 302.

[0115] In various non-exclusive embodiments, the amount of material removed may range from about 2 to 50 nanometers. Additionally, the desired shape of the mask is typically tapered, meaning that the opening in the mask is wider at the top and narrows toward the opening of feature 14.

[0116] Thus, the flow diagram of Figure 9 defines a secondary control loop that is embedded within the main control loop shown in Figure 8. In other words, one or more iterations of the main control loop of Figure 8 may be performed, and for any given iteration of the main control loop, one or more iterations of the secondary loop may be performed.

[0117] Exemplary semiconductor substrate having mask shaping 10A, an exemplary semiconductor substrate 10 is shown having one (or more) layers 42 (for simplicity, only a single layer is shown). In addition, a plurality of features 14 are etched into the layer (or more) formed on the substrate 10. As is well known in the semiconductor art, the features 14 are etched by forming a mask (not shown) over the layer 42, patterning the mask layer to expose the areas to be etched, and then exposing the substrate to an etchant chemical in either a wet or dry etching process. The exposure to the etchant removes or etches a portion of the underlying layer 42 resulting in the etched features 14, while the unexposed areas that remain covered by the mask are not etched.

[0118] 10B and 10C show before and after the mask etch step 302, respectively.

[0119] 10B, an exemplary feature 14 is shown. The feature 14 is characterized by a liner 20 formed on the sidewalls 18 of the feature 14, a mask 350 that defines an opening 352 in the feature 14, and "excess pinch-off" material 354 formed at and immediately beneath the opening 352.

[0120] FIG. 10C shows the same feature 14 after the mask etch step 302. As can be seen, the pinch-off material 354 has been substantially removed from the vicinity of the opening 352. In addition, the shape of the mask 350 tapers from a wide width to a narrow width in the direction toward the feature 14. By tapering the mask 350 and removing the excess pinch-off material 354, the opening defining the feature is largely unobstructed, allowing both the etchant chemical and the amorphous carbon to freely enter and diffuse downward into the feature 14. As a result, subsequent iterations replenish the liner 20, making the thickness more uniform. This means that subsequent etches can be performed for a longer time, allowing the etchant chemical to reach and etch deeper into the feature 14 before needing to replenish the liner 20. Both of these provide tighter CD control.

[0121] In various embodiments, the liner 20 deposition on the sidewall is amorphous carbon or any of the other carbon-containing materials or films described above, and the mask 350 is an ashable hard mask such as amorphous carbon or other mask materials such as a metal-doped carbon mask, a pure metal mask, and / or a polymer mask.

[0122] Mask forming and pinch-off removal etching In Table 2 provided below, example values ​​and / or ranges are provided for a number of parameters that may be implemented in a processing chamber of a tool performing mask etching. Using these values ​​and / or ranges, an etching process may be used to shape the mask 350 as well as remove excess deposition material in the openings 352 of features defined by the mask. [Table 2]

[0123] With the process parameters defined above, chemistries are used that allow for a "gentle" etch of carbon in a highly controlled manner. By generating a relatively low power plasma, oxygen and / or other radicals (e.g., carbon or nitrogen) form volatile etchants that react with the carbon of the liner 20 at the top or opening of the feature 14. At high RF, the ion energy impinging on the surface of the mask 350 is relatively low, resulting in a relatively slow etch rate. Thus, the etch is dominated by chemical etching. Most of the radicals react immediately upon contact with the pinched-off material, producing etch by-products that are pumped out of the process chamber. Because the radicals have low energy and tend to react immediately with the pinched-off material or the material of the liner 20 directly below the opening 352 (e.g., at a depth of 400 nanometers or less), relatively few radicals can diffuse downward to the depth of the feature. As a result, the majority of the liner 20 remains intact and is largely unaffected by the etch to shape the mask 350 and remove the pinched-off material 354 from the openings 352. Additionally, by using the chemistries listed above, the etch tends to be anisotropic. As a result, the etch gently tapers the mask 350 and removes excess deposition material from the openings 352, but does not generally penetrate to the depth of the feature 14 itself. As a result, the liner 20 on the sidewalls of the feature 14 remains substantially intact and is largely unaffected by the mask etch.

[0124] Etch and / or Deposition Tool Embodiments In various non-exclusive embodiments, most or all of the process flow steps illustrated in Figures 1, 6, 8, and / or 9 may be performed in a single substrate processing tool capable of performing both deposition and etch operations. For example, the etch and deposition steps of the above figures may be implemented in a processing chamber 72 of a substrate processing tool 70 shown in Figure 5 and controlled by a system controller 82.

[0125] In other embodiments, the various steps of Figures 1, 6, 8, and / or 9 may be performed in different process tools and / or process chambers. deposition The steps can be performed in one process chamber while the etching step can be performed in a different processing chamber. The two process chambers can be contained in either two separate tools or in a single tool with two chambers. In either case, the substrate being processed needs to be transferred between the two chambers.

[0126] Post vertical etching protection layer The vertical etch feature 14 is formed by etching the interleaved oxide 、 Nitride Layer and It is well suited for fabricating 3D NAND structures in alternating layers of materials, such as polysilicon layers (sometimes referred to as "ONO" or "OPO" structures). As previously mentioned, the ability to repeat steps (a) and (b) as described above typically results in features 14 having very high aspect ratios and very tight CD control.

[0127] 11, a diagram 400 is shown after the feature 14 has been vertically etched. The etch feature 14 is further characterized by sidewalls 18 that extend to a depth 16. In this non-exclusive embodiment, the feature 14 is etched into one or more layers 12 formed on a semiconductor substrate 10. For simplicity, the individual layers 12 formed on the substrate are not shown, but may be a stacked "ONO" structure or any other structure of stacked layers, as discussed above.

[0128] By using the semiconductor processes described herein, features 14 that are very deep, have very high aspect ratios, and very tight CDs can be fabricated with current semiconductor process technology. As these processing techniques improve in the future, features 14 that are even deeper, have even higher aspect ratios, and have even tighter CD control can be achieved using the same or similar iterative steps (a) and (b) as described herein.

[0129] Once one or more features 14 have been fabricated, the substrate typically undergoes further processing, which may include multiple steps, such as fabricating additional features 14 stacked over the existing features 14, forming one or more insulating films over the features 14, forming one or more conductive films over the features 14, fabricating vias or contacts on or adjacent to the features 14, fabricating transistors or other circuit components on the features 14, or fabricating any other features and / or components commonly used on semiconductor substrates. Often, these subsequent steps may be detrimental or otherwise damaging to the underlying features 14.

[0130] In non-exclusive embodiments, additional processing steps may be performed to cover and protect the feature 14. These steps typically involve either depositing a layer over the feature 14, or forming a "plug" in the recess defined by the feature 14, or completely filling the entire feature 14. Either approach protects the feature 14 during subsequent processing steps. In non-exclusive embodiments, the layer and / or plug is typically sacrificial. This means that the layer or plug is deposited first to protect the feature 14 during subsequent processing, but is eventually removed after the overlying structure, film, layer, etc. is fabricated. In other embodiments, the layer and / or plug may be non-sacrificial.

[0131] 12, a diagram 410 is shown depicting an exemplary feature 14 protected by a layer 412. In the course of depositing layer 412, material is also deposited within the depth of feature 14. As a result, a plug 414 is formed in the top region of 14, while material 416 is formed on sidewalls 18 of the feature. Material 416 on sidewalls 18 is typically non-conformal, because the deposition is not uniform across the top of the feature. Thick , which means that there is a tendency for the thickness to taper gradually towards the depth 16 of the feature 14.

[0132] 13, a diagram 420 is provided depicting a plug 414 recessed into a feature 14 and non-conformal material 416 on the sidewall 18 of the feature 14. As will be described in more detail below, this embodiment is achieved by performing an etch to remove layer 412 from the structure of FIG.

[0133] In some situations, the sacrificial layer 412 may be desired or used, while in other situations, only the plug 414 is desired or used. As a general rule, the party manufacturing the semiconductor substrate, or the end customer, will decide which option to use.

[0134] In a non-exclusive embodiment, the layer 412, the plug 414, and the non-conformal material 416 on the sidewall 18 is amorphous carbon.

[0135] In various embodiments, the amorphous carbon is deposited in either (1) a simultaneous deposition and etch similar to those described in Tables 1 and 2 above, or (2) a separate deposition step as described in Table 1, followed by a separate chemical etch back step as described in Table 2 above.

[0136] Simultaneous deposition and etching of amorphous carbon As taught above, the process parameters listed in Table 1 above are suitable for depositing amorphous carbon, whether performed alone or with a co-etch. A very similar process, with some modifications, can be utilized for amorphous carbon deposition of the protective layer 412, plug 414, and non-conformal amorphous carbon material 416 formed on the sidewall 18 of the feature 14, as shown in Figures 12 and 13.

[0137] In one embodiment, deposition of amorphous carbon forming layer 412, plug 414, and non-conformal material 416 on sidewall 18 occurs simultaneously with etching of the deposited amorphous carbon. As described above, deposition of amorphous carbon is achieved by introducing one or more carbon-containing precursors and then generating a plasma in the chamber using parameters similar to those set forth in Table 1. Such carbon-containing precursors include, but are not limited to, hydrocarbons such as propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemistries.

[0138] The simultaneous etching is preferably, but not required to be, a chemical etch. In a non-exclusive embodiment, the etching is performed by simultaneously introducing an etchant gas, such as nitrous oxide (NO), carbon dioxide (CO), hydrogen (H), sulfur hexafluoride (SF), oxygen (O), other oxygen-containing species, or combinations thereof, into the processing chamber during deposition. The chemical etch is performed simultaneously using parameters similar to those listed in Table 2 above.

[0139] The deposition rate of amorphous carbon is controlled at least in part by adjusting the concentration level of a particular diluent introduced into the chamber during co-deposition and etching. Such diluents may include, but are not limited to, inert gases such as nitrogen (N2), helium (He), and / or argon (Ar). For example, the deposition rate can be minimized by using a relatively high concentration level of diluent. The deposition rate can be increased by reducing or completely eliminating the diluent. Thus, higher concentration levels of diluent are desirable in situations where minimal or no deposition is desired, such as during co-deposition and etching to form vertical etch features with high aspect ratios and tight CD dimensions (e.g., the embodiment of FIG. 6). In contrast, less diluent or no diluent is desirable when the goal is to increase the deposition rate of amorphous carbon, such as when forming sacrificial plugs and / or forming sacrificial non-conformal amorphous carbon on sidewalls. Thus, by adjusting the concentration level of a diluent, such as an inert gas, including but not limited to nitrogen (N2), helium (He), and / or argon (Ar), the deposition rate of amorphous carbon can be controlled to serve a wide variety of different purposes.

[0140] For layer 412, plug 414, and non-conformal material 416 on sidewall 18, the objective is to deposit amorphous carbon (i) in a relatively thick layer, (ii) quickly, and (iii) in a relatively thick layer. iii) on the sidewalls 18 of the etch feature 14 with some degree of non-conformality. Applicant has discovered that these objectives can be readily achieved by reducing or completely eliminating inert gases, such as helium, nitrogen, and / or argon, in the plasma. In other words, by eliminating or adjusting the levels of these inert gases in the process chamber to be less diluted, or controlled to be less diluted, the deposition rate of amorphous carbon can be controlled to achieve the three objectives (i) through (iii) above when forming the layer 412, the plug 414, and the non-conformal material 416 on the sidewalls 18. It is further noted that deposition occurs despite the fact that etchant gases (e.g., N2O, CO2, H2, SF6, and / or O2) are simultaneously flowing into the process chamber, and deposition is primarily controlled by the concentration level of the diluent. By controlling the diluent at low concentration levels, the deposition rate can be controlled to exceed the chemical etch rate to deposit amorphous carbon and accomplish the three objectives (i) to (iii) identified above.

[0141] As discussed above, some degree of non-conformality is generally desired for the deposition of amorphous carbon material 416 on sidewall 18. If the deposition rate is too low and / or too slow, the deposited amorphous carbon material 416 may be conformal (i.e., of uniform thickness) and fill all or most of recess 14. To avoid this problem, the amount of inert gas introduced into the processing chamber may be adjusted as necessary to achieve the desired non-conformity in addition to depositing amorphous carbon material to form plug 414 and / or layer 412.

[0142] As previously mentioned, either the embodiment of Figure 12 or Figure 13 may be desired or used. In situations where the embodiment of Figure 12 is used, typically no or minimal additional steps are required once deposition of amorphous carbon is completed for layer 412, plug 414, and non-conformal material 416 on sidewall 18.

[0143] In contrast, if the embodiment of FIG. 13 is preferred, a further etch is typically required to selectively remove some of the deposited amorphous carbon. In a non-exclusive embodiment, an oxygen or hydrogen or fluorine based etch may be performed in situ in the same processing chamber in which the deposition of layer 412, plug 414, and material 416 was performed. In such an embodiment, the amorphous carbon containing chemicals, such as propylene or acetylene, are reduced or completely removed from the processing chamber while the oxygen or hydrogen or fluorine based chemicals are introduced into the chamber. As this transition occurs, the chamber changes from a "deposition" dominated chamber to an "etch" dominated chamber. In various embodiments, a number of different oxygen based chemicals may be used, including, but not limited to, nitrous oxide (N2O), carbon dioxide (CO2), oxygen (O2), hydrogen (H2), sulfur hexafluoride (SF6), and the like. The etch is performed using many of the process parameters shown in Table 2 above, with certain parameters adjusted as needed. For example, the precursors used can be limited to only those containing oxygen, the plasma wattage can be adjusted so that the etching is predominantly chemical, and the duration can be adjusted as needed until a desired amount of amorphous carbon material is removed from layer 412 and / or plug 414.

[0144] The embodiment of Figure 13 is achieved by etching the structure shown in the embodiment of Figure 12. In other words, etching is performed until layer 412 is etched away and a portion of plug 414 is etched away as well. In this configuration, an opening or recess is provided directly above plug 414. However, due to the presence of plug 414, the underlying etched feature 14 is protected.

[0145] Separate amorphous carbon deposition and etching steps In an alternative embodiment, amorphous carbon deposition forming layer 412, plug 414, and non-conformal material 416 on sidewall 18 can be performed in a first deposition step. Again, by controlling the concentration level of the diluent, the deposition rate can be controlled as needed to accomplish objectives (i) through (iii) defined above. Once deposition is complete, a separate etching step can be performed. The parameters used for both deposition and etching can be similar to those contained in Tables 1 and 2, respectively. The etching described above can be performed at a different location than where the amorphous carbon deposition was performed. Second In this latter embodiment, the semiconductor substrate 10 needs to be transferred between the processing chambers, which may be located in the same tool or in different tools.

[0146] Advantages of amorphous carbon The use of amorphous carbon has several advantages. As discussed above, the deposition of amorphous carbon is easy to control. For example, the thickness of layer 412 can be deposited to almost any desired dimension. Also, the deposition of amorphous carbon that forms material 416 on the sidewalls can also be controlled to be non-conformal. This is generally preferred in this application over a conformal layer that may fill the entire feature 14. Because the objective is to "plug" the feature 14, it is not necessary to fill the entire feature with protective material, which may be problematic when attempting to remove it later. Thus, while a non-conformal etch is typically preferred, it is by no means a requirement.

[0147] Another advantage realized by using amorphous carbon is that the material is "ashable," meaning that it can be easily removed. As described in more detail below, amorphous carbon can be easily removed with a gentle oxygen-based etch. In an oxygen-based etch, the amorphous carbon is essentially chemically removed in a very controlled manner, allowing, for example, removal of layer 412 while leaving plug 414 (e.g., as shown in FIG. 13). Also, the oxygen-based etch is very gentle, resulting in little or no damage to the vertical etched feature 14. By comparison, if other protective materials or layers, such as boron, were used, a very harsh and / or aggressive etch would be required for removal. Also, ion bombardment assistance may be required. In any case, the use of a non-amorphous carbon material, such as boron, would significantly increase the likelihood of damage to the etched feature 14 and / or surrounding features and / or film layers.

[0148] During subsequent processing steps used to fabricate additional thin films and / or stack structures, very high processing temperature ranges are often used, often exceeding 800° C. Yet another advantage of amorphous carbon is its ability to withstand and maintain high temperatures of 800° C. and above.

[0149] Although only a few embodiments have been described in detail, it should be understood that the present application may be embodied in many other forms without departing from the spirit or scope of the disclosure provided herein. Thus, the present embodiments should be considered as illustrative and not restrictive, and should not be limited to the details set forth herein, but may be modified within the scope of the appended claims and their equivalents. The present invention can be realized, for example, in the following manner. Application example 1: 1. A method for manufacturing a semiconductor substrate, comprising: (a) vertically etching a feature having sidewalls and a depth in one or more layers formed on the semiconductor substrate; (b) depositing an amorphous carbon liner on the sidewalls of the feature. Application example 2: The method of Application Example 1, further comprising repeating (a), wherein with each repetition of (a), the depth of the feature is vertically etched deeper into the one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. Application example 3: The method of application example 2, further comprising repeating (b), wherein each repetition of (b) replenishes the amorphous carbon liner deposited on the sidewall of the feature. Application example 4: The method of Example 2, further comprising repeating (a) and optionally (b) until the depth of the feature vertically etched into the one or more layers reaches a desired depth; with each iteration of (a), the depth of the feature is vertically etched deeper into the one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature; The method of claim 1, wherein during each said repetition of optional (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished. Application example 5: The method of application example 4, further comprising: determining the number of iterations of (a) required to vertically etch the feature to the desired depth by: (i) the desired depth of the feature; (ii) the thickness of the amorphous carbon liner as deposited; (iii) the critical dimension (CD) tolerance of said feature; (iv) a desired aspect ratio of the feature; (v) the need to replenish amorphous carbon, or (vi) any combination of (i) to (v); and determining based on one of the following factors: Application example 6: The method of application example 1, further comprising densifying the amorphous carbon liner after depositing the amorphous carbon liner on the sidewall of the feature. Example 7: The method of application example 6, wherein the densification of the amorphous carbon liner comprises: (i) compressing the amorphous carbon liner; (ii) purging hydrogen from the amorphous carbon liner; or (iii) Both (i) and (ii); The method further comprises one of: Application example 8: The method of application example 6, wherein the densification of the amorphous carbon liner comprises: (i) exposing the amorphous carbon liner to an inert gas plasma; (ii) exposing the amorphous carbon liner to a hydrogen plasma; or (iii) Both (i) and (ii); The method further comprises one of: Example 9: The method of Application Example 1, further comprising performing conformal etching to define the features and open or shape holes formed in the one or more layers formed on the semiconductor substrate. Example 10: The method according to Application Example 1, (i) incidental deposits of amorphous carbon occurring on the plane of said one or more layers adjacent to said feature; (ii) a thicker region of the amorphous carbon liner formed on the sidewall of the feature compared to a thinner region; or (iii) Both (i) and (ii); performing an etch-back etch to etch back one of. Example 11: The method of application example 1, further comprising depositing the amorphous carbon liner on the sidewalls of the feature using a plasma-enhanced chemical vapor deposition (PECVD) tool. Application example 12: The method of example 11, further comprising using a hydrocarbon precursor in the PECVD tool when depositing the amorphous carbon liner on the sidewalls of the feature. Application example 13: The method of Example 11, further comprising controlling one or more of the following process parameters in a processing chamber of the PECVD tool when depositing the amorphous carbon liner, the process parameters being: (i) a temperature in the range of -60°C to 700°C; (ii) pressures in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of precursors and other chemicals into the processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); A method comprising: Example 14: The method according to Application Example 1, performing (a) in a first etching tool; and (b) is performed in a second PECVD tool; The method further comprises: Application example 15: The method of application example 1, further comprising forming (a) and (b) in situ within a single semiconductor processing tool. Application example 16: A semiconductor substrate, With the substrate; one or more layers formed on the substrate; a vertical etched feature etched into the one or more layers formed on the substrate, the vertical etched feature being characterized by a sidewall and a depth, the vertical etched feature being at least partially vertically etched with an amorphous carbon liner on the sidewall of the vertical etched feature; A semiconductor substrate comprising: Example 17: 17. The semiconductor substrate of claim 16, wherein the vertical etched features include: (i) Cylinder; (ii) trenches; (iii) slits; (iv) Geometric shape; or (v) non-geometric shapes; One of these is the semiconductor substrate. Application example 18: 17. The semiconductor substrate of claim 16, wherein each of the one or more layers comprises: (i) silicon nitride; (ii) silicon oxide; (iii) polysilicon; (iv) an oxide; or (v) boron-doped oxide; a semiconductor substrate comprising one of: Example 19: 17. The semiconductor substrate of claim 16, wherein the vertically etched features have a depth of 4 micrometers or more. Example 20: The semiconductor of application example 16, wherein the vertically etched features are characterized by an aspect ratio of 50:1 or greater. Example 21: The semiconductor of application example 16, wherein the vertically etched features are characterized by a critical dimension (CD) of less than 150 nanometers. Example 22: The semiconductor substrate of application example 16, wherein the semiconductor substrate is a 3D memory integrated circuit. Application example 23: 17. The semiconductor substrate of claim 16, wherein the amorphous carbon liner on the sidewalls of the vertical etched features is removed during a subsequent processing step. Application 24: 1. A tool for manufacturing a semiconductor substrate, the tool including a controller configured to control deposition of an amorphous carbon liner on sidewalls of a feature having a vertical etched depth into one or more layers formed on the semiconductor substrate in a process chamber. Example 25: The tool of application example 24, wherein the controller is further configured to control two or more repetitions of the deposition in the processing chamber to replenish the amorphous carbon liner following one or more etching repetitions to increase the depth of the vertically etched features into the one or more layers formed on the semiconductor substrate. Example 26: 25. The tool of claim 24, wherein the controller is further configured to control operation of the tool to optionally perform one or more repetitions of the deposition of an amorphous carbon layer on the sidewalls of the etched features following one or more vertical etches to deepen the features; and The one or more vertical etches are performed in a separate substrate processing tool. Example 27: 25. The tool of claim 24, wherein the controller is further configured to control operation of the tool to (a) perform one or more repetitions of the vertical etching of the feature into the one or more layers formed on the semiconductor substrate, and (b) optionally perform one or more repetitions of the deposition of an amorphous carbon layer on the sidewalls of the feature; With each iteration of (a), the amorphous carbon liner is at least partially consumed while resisting lateral etching of the sidewalls of the feature, while the depth of the feature is vertically etched deeper into the one or more layers; A tool wherein during each said iteration of optional (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished. Example 28: 28. The tool of claim 27, wherein the controller determines the number of iterations of (a) required to vertically etch the feature to a desired depth by: (i) the desired depth of the feature; (ii) the thickness of the amorphous carbon liner as deposited; (iii) the critical dimension (CD) tolerance of said feature; (iv) a desired aspect ratio of the feature; (v) the need to replenish amorphous carbon; or (vi) any combination of (i) to (v); The tool is further configured to verify based on one of the factors. Example 29: The tool of application example 24, wherein the controller is further configured to promote densification of the amorphous carbon liner after depositing the amorphous carbon liner on the sidewall of the feature. Example 30: 30. The tool of application example 29, wherein the controller: (i) compressing the amorphous carbon liner; (ii) purging hydrogen from the amorphous carbon liner; or (iii) Both (i) and (ii); a step of: promoting one of the steps of: Example 31: The tool of application example 24, wherein the controller is further configured to promote conformal etching to open or shape holes defining the features vertically etched into the one or more layers formed on the semiconductor substrate. Example 32: The tool of application example 24, wherein the controller: (i) incidental deposition of amorphous carbon within openings defining said features vertically etched into said one or more layers formed on said semiconductor substrate; (ii) a thicker region of the amorphous carbon liner formed on the sidewall of the feature compared to a thinner region; or (iii) Both (i) and (ii); the tool being further configured to promote an etch-back etch to etch back one of the Application 33: The tool of application example 24, which is a plasma-enhanced chemical vapor deposition (PECVD) tool having a processing chamber. Example 34: The tool of application example 33, wherein a hydrocarbon precursor is used in the processing chamber when depositing the amorphous carbon liner on the sidewalls of the feature. Application 35: 25. The tool of claim 24, wherein when depositing the amorphous carbon liner, the controller further controls one or more of the following process parameters in the processing chamber, the process parameters being: (i) a temperature in the range of -60°C to 700°C; (ii) pressures in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of a precursor containing carbon and other chemicals into the processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); Including, tools. Example 36: 1. A tool for manufacturing a semiconductor substrate, the tool including a controller, the controller controlling at least partially simultaneous (i) depositing an amorphous carbon material that forms a liner on sidewalls of vertically etched features into one or more layers on the semiconductor substrate; and (ii) etching the amorphous carbon material into holes defining the feature and onto upper regions of the sidewalls of the feature; A tool configured to facilitate. Example 37: 37. The tool of claim 36, wherein the controller is further configured to control the at least partially simultaneous deposition and etching such that the amorphous carbon material forming the liner is of a more uniform thickness from a bottom of the vertically etched feature to an upper region of the sidewall of the feature; The more uniform thickness is in comparison to a non-uniformity of the liner if the etching was not performed. Application 38: The tool of Application Example 36, wherein the controller is further configured to control the at least partially simultaneous deposition and etching such that the occurrence of "pinch-off" of excess amorphous carbon material within an opening defining the feature etched in the one or more layers is delayed or prevented by the at least partially simultaneous etching during the deposition, where pinch-off is defined as complete or partial blockage of the opening. Example 39: The tool of application example 36, wherein the controller is further configured to flow a deposition precursor and an etchant chemical into the processing chamber in parallel flows during the at least partially simultaneous deposition and etching. Example 40: 40. The tool of example 39, wherein the deposition precursor is one of propylene, acetylene, methane, toluene, or another hydrocarbon. Example 41: 40. The tool of claim 39, wherein the etchant chemical is carbon dioxide (CO 2 ), hydrogen (H 2 ), nitrous oxide (N 2 O), or oxygen (O 2 ), including one of the tools. Example 42: The tool of application example 36, wherein the etching of the upper region of the sidewall of the feature is dependent on a critical dimension measurement of the feature. Example 43: The tool of application example 42, wherein the upper region of the sidewall is defined as a depth of 400 nanometers or less relative to a hole defining the vertical etched feature. Example 44: The tool of Application Example 36, wherein the controller is further configured to control process parameters in a processing chamber in which the at least partially simultaneous deposition and etching occurs, and wherein the control of the process parameters ensures that the etching is substantially chemical etching. Example 45: The tool of application example 36, wherein the controller is further configured to control a rate of the simultaneous etching by controlling a flow rate of an etchant chemical into a processing chamber in which the simultaneous etching is performed. Example 46: The tool of application example 45, wherein the flow rate is in the range of 50 standard cubic centimeters per minute (SCCM) to 15 standard liters per minute (SLM). Example 47: The tool of example 36, further comprising controlling one or more process parameters in a processing chamber of the tool where the simultaneous etching occurs, the process parameters including: (i) a temperature in the range of -60°C to 700°C; (ii) pressures in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of a carbon containing precursor into the processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); Including, tools. Example 48: 1. A method for manufacturing a semiconductor substrate, comprising: (i) depositing a liner-forming amorphous carbon material on sidewalls of vertically etched features in one or more layers on the semiconductor substrate; and (ii) etching excess deposits of the amorphous carbon material that are deposited within holes defining the feature and on upper regions of the sidewalls of the feature during deposition of the amorphous carbon material; at least partially simultaneously performing Example 49: The method of Example 48, further comprising controlling the at least partially simultaneous deposition and etching such that the amorphous carbon material forming the liner has a more uniform thickness from a bottom of the vertically etched feature to the top region of the sidewall of the feature, the more uniform thickness being compared to a non-uniformity in thickness of the liner if the etching is not performed. Application example 50: The method of Application Example 48, further comprising controlling the at least partially simultaneous deposition and etching such that the at least partially simultaneous etching during deposition delays or prevents the occurrence of "pinch-off" of excess amorphous carbon material within the opening defining the feature, where pinch-off is defined as complete or partial blocking of the opening. Example 51: The method of Example 48, further comprising controlling a parallel flow of deposition precursor and etchant chemicals into the processing chamber during the simultaneous deposition and etching. Example 52: The method of application example 48, (a) performing an etching of the semiconductor substrate to form the features; and (b) simultaneously etching, at least partially, during said depositing of said amorphous carbon material subsequent to said etching of said semiconductor substrate to form said features; The method further comprises: Application example 53: The method of Example 52, further comprising repeating (a) and (b) two or more times until the feature is etched to a desired depth. Application example 54: 1. A method for manufacturing a semiconductor substrate, comprising: (a) vertically etching a feature having an opening, a sidewall, and a depth in one or more layers formed on the semiconductor substrate; (b) depositing a liner material on the sidewalls of the feature; (c) performing an etching of a carbon mask used to define the opening of the feature, the etching comprising: (i) removing excess deposits of the liner material that have collected in the openings of the features defined by the carbon mask; (ii) molding the carbon mask adjacent the opening of the feature; A method comprising: Application example 55: The method of Example 54, further comprising repeating (a), (b), and (c) two or more times until the feature reaches a desired depth within the one or more layers formed on the semiconductor substrate. Application example 56: The method of Example 54, further comprising performing (b) and (c) in the same chamber of a substrate processing tool. Example 57: The method of application example 54, wherein the forming of the carbon mask comprises: The method further comprising tapering the opening from a wider width to a narrower width in a direction towards the feature. Application example 58: 55. The method of claim 54, wherein performing the etching further comprises: generating a mask etch plasma in a process chamber containing the semiconductor substrate; and controlling the plasma in the processing chamber to control an etch rate of the carbon mask while substantially preventing etching of the liner material deposited on the sidewalls of the feature; The method further comprises: Example 59: The method of example 58, wherein controlling the plasma comprises controlling a parameter in the process chamber, i.e. RF frequency; the duration of said etching; or Wattage level; The method further comprising controlling one or more of: Application Example 60: 59. The method of claim 58, wherein generating the plasma comprises: Carbon Dioxide (CO 2 ) or nitrous oxide (N 2 O) into the processing chamber; providing radio frequency (RF) power into the processing chamber, the RF power comprising: Approximately 13.56MHz, Less than 60MHz, or Over 400KHz, having a frequency selected from one of: The method further comprises: Example 61: 59. The method of claim 58, wherein generating the plasma comprises: Carbon Dioxide (CO 2 ) or nitrous oxide (N 2 O) into the processing chamber; providing an energy level to the processing chamber, the energy level comprising: About 100 watts, Less than 1 kilowatt, or Over 25 watts and The method further comprises: Application Example 62: The method of Example 54, wherein depositing the liner material further comprises depositing an amorphous carbon liner on the sidewalls of the feature using a hydrocarbon precursor. Application Example 63: The method of application example 54, wherein (a), (b), and (c) are each performed by the same substrate processing tool. Example 64: 1. A substrate processing tool comprising: a processing chamber; a substrate holder for holding a substrate within the processing chamber; A controller for controlling operation of the substrate processing tool during processing of the substrate, the controller comprising: (a) (i) depositing a carbon liner on sidewalls of features (i) etched into the substrate and (ii) defined by openings in a carbon mask; (b) etching the carbon mask, (iii) shaping the carbon mask, and (iv) removing the incidental carbon liner deposited material from the opening; The substrate processing tool is configured to control the substrate processing tool such that Application Example 65: A substrate processing tool according to application example 64, wherein the etching of the carbon mask is performed to shape the carbon mask so as to taper from a wide width to a narrow width in a direction towards the feature. Example 66: The substrate processing tool of application example 64, wherein the processor is further configured to control an etching environment in the processing chamber such that the carbon mask and the opening are etched while the carbon liner on the sidewalls of the feature is not substantially etched. Example 67: The substrate processing tool of application example 64, wherein the controller is further configured to repeat (a) and (b), each of the iterations being performed in anticipation of a subsequent etch to deepen the feature. Application Example 68: The substrate processing tool of application example 64, wherein (b) results in the carbon liner on the sidewall of the feature becoming more conformal after a subsequent iteration of (a). Example 69: A substrate processing tool according to Application Example 64, wherein the controller is further configured to perform the etching of the carbon mask for a predetermined period of time, the predetermined period being in the range of approximately 5 seconds to 300 seconds. Application Example 70: The substrate processing tool of application example 64, wherein the controller is further configured to perform the etching of the carbon mask until a predetermined amount of mask material is removed, the predetermined amount of mask material being in the range of approximately 2 to 50 nanometers. Example 71: 65. The substrate processing tool of claim 64, wherein the controller is further configured to control a radio frequency (RF) in the processing chamber when performing the etching of the carbon mask, the RF being: (c)400kHz or more; (d) 60MHz or less; (d) Approximately 13.56MHz; 1. A substrate processing tool comprising: Example 72: The substrate processing tool of application example 64, wherein the controller is further configured to control wattage in the processing chamber when performing the etching of the carbon mask, the wattage being in the range of 25 watts to 1 kilowatt. Application 73: 65. The substrate processing tool of claim 64, wherein the etching comprises: Carbon Dioxide (CO 2 ); Nitrous oxide (N 2 O); or any mixture or combination thereof; A substrate processing tool, the substrate processing tool being implemented using a chemical comprising one of: Application 74: 65. The substrate processing tool of claim 64, wherein the features etched into the substrate include: (c) within the substrate processing tool; or (d) a separate substrate etching tool; The substrate processing tool is etched in either Application Example 75: The substrate processing tool of application example 64, wherein the carbon liner is an amorphous carbon liner. Application Example 76: 1. A method comprising: Fabricating a vertical feature having an opening, a sidewall, and a depth in one or more layers formed on a substrate; depositing amorphous carbon on the sidewalls of the vertical feature and within the opening, the amorphous carbon deposited within the opening forming an amorphous carbon plug within the opening of the vertical feature; A method for providing the above. Application Example 77: The method of example 76, further comprising depositing the amorphous carbon on the sidewalls of the vertical feature such that the amorphous carbon is thinner near the depth of the vertical feature and thicker near the opening of the vertical feature. Application Example 78: The method of Example 76, further comprising depositing additional amorphous carbon on the amorphous carbon plug formed within the opening of the vertical feature and on a surface region of the one or more layers surrounding the vertical feature. Application 79: The method of example 78, further comprising etching back the additional amorphous carbon deposited on the plug to form a recess on the plug. Example 80: 77. The method of example 76, wherein the vertical features form a 3D NAND structure, and the amorphous carbon deposited on the sidewalls to form the amorphous carbon plug serves to protect the 3D NAND structure during subsequent processing of the substrate. Example 81: The method of Example 76, wherein the amorphous carbon deposited on the sidewalls to form the plug is sacrificial, the method further comprising removing the amorphous carbon deposited on the sidewalls of the vertical feature and the amorphous carbon that forms the plug. Example 82: 1. A method performed in a substrate processing chamber, the method comprising: fabricating a vertical feature formed on a substrate in the processing chamber, the vertical feature having an opening, a sidewall, and a predetermined depth; depositing an amorphous carbon material on the substrate in the processing chamber, the amorphous carbon material being deposited on the sidewalls of the feature and forming a plug in the opening of the vertical feature; The method includes: Application example 83: 83. The method of example 82, wherein producing the vertical features comprises: (a) vertically etching the feature; (b) depositing an amorphous carbon layer on the sidewalls of the feature; (c) repeating (a) and optionally (b) one or more times until the vertical feature reaches a predetermined depth; wherein deposition of the amorphous carbon layer in each of the repetitions of (b) mitigates lateral etching of the feature in a subsequent repetition of (a). Example 84: The method of Example 83, wherein depositing the amorphous carbon layer on the sidewalls of the feature during the repetition of (b) further includes generating a first plasma in the processing chamber containing a first hydrocarbon precursor and an inert gas, wherein an amount of the inert gas at least partially controls a deposition rate of the amorphous carbon layer on the sidewalls of the vertically etched feature. Application example 85: 85. The method of claim 84, wherein the deposition of the amorphous carbon material further comprises generating a second plasma in the process chamber, the second plasma comprising a second hydrocarbon precursor, and wherein the amorphous carbon material is deposited faster in the second plasma compared to in the first plasma due to no inert gas or less inert gas being used in the second plasma compared to the first plasma. Application Example 86: The method of example 85, further comprising chemically etching back the amorphous carbon material in the processing chamber such that a recess is formed above the plug. Application Example 87: 87. The method of claim 86, wherein the chemical etch back comprises: removing some or all of the second hydrocarbon precursor from the processing chamber; introducing an oxygen-based chemical into the processing chamber; chemically etching the amorphous carbon material using the oxygen-based chemistry; The method further comprises: Application Example 88: The method of example 87, wherein the processing chamber transitions from a deposition dominated chamber to a chemical etching dominated chamber as the second hydrocarbon precursor is removed and replaced with the oxygen-based chemical. Example 89: The method of Example 85, wherein the first hydrocarbon precursor and the second hydrocarbon precursor are either the same or different, and each is selected from the group including propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemicals. Example 90: 1. A method for forming an amorphous carbon film on a substrate in a processing chamber, comprising: depositing the amorphous carbon film on the substrate by generating a plasma in the process chamber while introducing a flow of a carbon-containing precursor into the process chamber; simultaneously performing a chemical etching of the deposited amorphous carbon film; The method includes: Example 91: The method of Example 90, further comprising controlling a deposition rate of amorphous carbon forming the amorphous carbon film by adjusting a concentration level of an inert gas in the processing chamber, wherein a high concentration level of the inert gas reduces the deposition rate and a lower concentration level of, or removal of, the inert gas from the processing chamber increases the deposition rate. Example 92: The method of Example 90, wherein the carbon-containing precursor comprises one of propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemicals. Example 93: The method of example 90, wherein the chemical etching is performed using nitrous oxide (N 2 O), carbon dioxide (CO 2 ), hydrogen (H 2 ), sulfur hexafluoride (SF 6 ), oxygen (O 2 ), other oxygen-containing species, or a combination thereof. Example 94: The method of Example 91, wherein the inert gas is nitrogen (N 2 ), helium (He), argon (Ar), or a combination thereof. Application example 95: The method of Example 90, wherein the amorphous carbon film is (a) formed on a sidewall of a vertical feature etched into the substrate; (b) the amorphous carbon film is formed in an opening defining the vertical feature, the deposited amorphous carbon film forming a "plug" in the opening, the amorphous carbon film; (c) both (a) and (b); This method is one of the methods.

Claims

1. 1. A method for manufacturing a semiconductor substrate, comprising: (a) vertically etching a feature having sidewalls and a depth in one or more layers formed on the semiconductor substrate; (b) depositing an amorphous carbon liner on the sidewalls of the feature.

2. 10. The method of claim 1, further comprising repeating (a), wherein with each iteration of (a), the depth of the feature is vertically etched deeper into the one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature.

3. 3. The method of claim 2, further comprising repeating (b), wherein each said repetition of (b) replenishes the amorphous carbon liner deposited on the sidewalls of the feature.

4. 3. The method of claim 2, further comprising repeating (a) and optionally (b) until the depth of the feature vertically etched into the one or more layers reaches a desired depth; with each iteration of (a), the depth of the feature is vertically etched deeper into the one or more layers while the amorphous carbon liner resists lateral etching of the sidewalls of the feature; The method of claim 1, wherein during each said repetition of optional (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished.

5. 5. The method of claim 4, wherein the number of iterations of (a) required to vertically etch the feature to the desired depth is determined by: (i) the desired depth of the feature; (ii) the thickness of the amorphous carbon liner as deposited; (iii) the critical dimension (CD) tolerance of said feature; (iv) a desired aspect ratio of the feature; (v) the need to replenish amorphous carbon, or (vi) any combination of (i) to (v); and determining based on one of the following factors:

6. 10. The method of claim 1, further comprising densifying the amorphous carbon liner after depositing the amorphous carbon liner on the sidewalls of the feature.

7. 7. The method of claim 6, wherein the densification of the amorphous carbon liner comprises: (i) compressing the amorphous carbon liner; (ii) purging hydrogen from the amorphous carbon liner; or (iii) both (i) and (ii); The method further comprising one of:

8. 7. The method of claim 6, wherein the densification of the amorphous carbon liner comprises: (i) exposing the amorphous carbon liner to an inert gas plasma; (ii) exposing the amorphous carbon liner to a hydrogen plasma; or (iii) both (i) and (ii); The method further comprising one of:

9. 10. The method of claim 1, further comprising performing a conformal etch to define the features and open or shape holes formed in the one or more layers formed on the semiconductor substrate.

10. 2. The method of claim 1 , (i) incidental deposits of amorphous carbon occurring on the planes of the one or more layers adjacent to the feature; (ii) a thicker region of the amorphous carbon liner formed on the sidewall of the feature compared to a thinner region; or (iii) both (i) and (ii); performing an etch-back etch to etch back one of.

11. 10. The method of claim 1, further comprising depositing the amorphous carbon liner on the sidewalls of the feature using a plasma enhanced chemical vapor deposition (PECVD) tool.

12. 12. The method of claim 11, further comprising using a hydrocarbon precursor in the PECVD tool when depositing the amorphous carbon liner on the sidewalls of the feature.

13. 12. The method of claim 11, further comprising controlling one or more of the following process parameters in a processing chamber of the PECVD tool when depositing the amorphous carbon liner, the process parameters comprising: (i) a temperature in the range of −60° C. to 700° C.; (ii) a pressure in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of precursors and other chemicals into the processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); A method comprising:

14. 2. The method of claim 1 , performing (a) in a first etching tool; and performing (b) in a second PECVD tool; The method further comprises:

15. 10. The method of claim 1, further comprising forming (a) and (b) in situ within a single semiconductor processing tool.

16. A semiconductor substrate, A substrate; one or more layers formed on the substrate; a vertical etched feature etched into the one or more layers formed on the substrate, the vertical etched feature being characterized by a sidewall and a depth, the vertical etched feature being at least partially vertically etched with an amorphous carbon liner on the sidewall of the vertical etched feature; A semiconductor substrate comprising:

17. 17. The semiconductor substrate of claim 16, wherein the vertical etched features include: (i) Cylinder; (ii) trench; (iii) slits; (iv) a geometric shape; or (v) non-geometric shapes; A semiconductor substrate is one of these.

18. 17. The semiconductor substrate of claim 16, wherein each of the one or more layers comprises: (i) silicon nitride; (ii) silicon oxide; (iii) polysilicon; (iv) an oxide; or (v) boron doped oxide; A semiconductor substrate comprising one of:

19. 17. The semiconductor substrate of claim 16, wherein the vertically etched features have a depth of 4 micrometers or greater.

20. 20. The semiconductor of claim 16, wherein the vertical etched features are characterized by an aspect ratio of 50:1 or greater.

21. 20. The semiconductor of claim 16, wherein the vertical etched features are characterized by a critical dimension (CD) of less than 150 nanometers.

22. 20. The semiconductor substrate of claim 16, wherein the semiconductor substrate is a 3D memory integrated circuit.

23. 20. The semiconductor substrate of claim 16, wherein the amorphous carbon liner on the sidewalls of the vertical etched features is removed during a subsequent processing step.

24. 1. A tool for manufacturing a semiconductor substrate, the tool including a controller configured to control deposition of an amorphous carbon liner on sidewalls of a feature having a vertical etched depth into one or more layers formed on the semiconductor substrate in a process chamber.

25. 25. The tool of claim 24, wherein the controller is further configured to control two or more iterations of the deposition in the processing chamber to replenish the amorphous carbon liner following one or more iterations of etching to increase the depth of the vertically etched features into the one or more layers formed on the semiconductor substrate.

26. 25. The tool of claim 24, wherein the controller is further configured to control operation of the tool to optionally perform one or more vertical etches to deepen the features followed by one or more iterations of the deposition of an amorphous carbon layer on the sidewalls of the etched features; The one or more vertical etches are performed in a separate substrate processing tool.

27. 25. The tool of claim 24, wherein the controller is further configured to control operation of the tool to: (a) perform one or more repetitions of the vertical etching of the feature into the one or more layers formed on the semiconductor substrate; and (b) optionally perform one or more repetitions of the deposition of an amorphous carbon layer on the sidewalls of the feature; With each iteration of (a), the amorphous carbon liner is at least partially consumed while resisting lateral etching of the sidewalls of the feature, while the depth of the feature is vertically etched deeper into the one or more layers; wherein during each said iteration of optional (b), the amorphous carbon liner deposited on the sidewalls of the feature is replenished.

28. 28. The tool of claim 27, wherein the controller determines the number of iterations of (a) required to vertically etch the feature to a desired depth by: (i) the desired depth of the feature; (ii) the thickness of the amorphous carbon liner as deposited; (iii) the critical dimension (CD) tolerance of said feature; (iv) a desired aspect ratio of the feature; (v) the need to replenish amorphous carbon; or (vi) any combination of (i) to (v); The tool is further configured to verify based on one of the factors:

29. 25. The tool of claim 24, wherein the controller is further configured to promote densification of the amorphous carbon liner after depositing the amorphous carbon liner on the sidewall of the feature.

30. 30. The tool of claim 29, wherein the controller: (i) compressing the amorphous carbon liner; (ii) purging hydrogen from the amorphous carbon liner; or (iii) both (i) and (ii); a step of: promoting one of the steps of:

31. 25. The tool of claim 24, wherein the controller is further configured to facilitate conformal etching to open or shape holes defining the vertically etched features into the one or more layers formed on the semiconductor substrate.

32. 25. The tool of claim 24, wherein the controller: (i) incidental deposition of amorphous carbon within openings defining the features vertically etched into the one or more layers formed on the semiconductor substrate; (ii) a thicker region of the amorphous carbon liner formed on the sidewall of the feature compared to a thinner region; or (iii) both (i) and (ii); the tool being further configured to facilitate an etch-back etch to etch back one of the

33. 25. The tool of claim 24, wherein the tool is a plasma enhanced chemical vapor deposition (PECVD) tool having a processing chamber.

34. 34. The tool of claim 33, wherein a hydrocarbon precursor is used in the processing chamber when depositing the amorphous carbon liner on the sidewalls of the feature.

35. 25. The tool of claim 24, further comprising: when depositing the amorphous carbon liner, the controller controls one or more of the following process parameters in the processing chamber, the process parameters being: (i) a temperature in the range of −60° C. to 700° C.; (ii) a pressure in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of a precursor containing carbon and other chemicals into said processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); Including, tools.

36. 1. A tool for manufacturing a semiconductor substrate, the tool including a controller, the controller controlling at least partially simultaneous (i) depositing an amorphous carbon material that forms a liner on the sidewalls of vertically etched features into one or more layers on the semiconductor substrate; and (ii) etching the amorphous carbon material deposited within holes defining the feature and on upper regions of the sidewalls of the feature; A tool configured to facilitate.

37. 37. The tool of claim 36, wherein the controller is further configured to control the at least partially simultaneous deposition and etching such that the amorphous carbon material forming the liner is of a more uniform thickness from a bottom of the vertically etched feature to the top region of the sidewall of the feature; The more uniform thickness is in comparison to a non-uniformity of the liner if the etching was not performed.

38. 37. The tool of claim 36, wherein the controller is further configured to control the at least partially simultaneous deposition and etching such that the at least partially simultaneous etching during the deposition delays or prevents the occurrence of "pinch-off" of excess amorphous carbon material in openings defining the features etched in the one or more layers, where pinch-off is defined as complete or partial blockage of the opening.

39. 37. The tool of claim 36, wherein the controller is further configured to flow a deposition precursor and an etchant chemical into a processing chamber in co-flow during the at least partially simultaneous deposition and etching.

40. 40. The tool of claim 39, wherein the deposition precursor is one of propylene, acetylene, methane, toluene, or another hydrocarbon.

41. 40. The tool of claim 39, wherein the etchant chemical is carbon dioxide (CO 2 ), hydrogen (H 2 ), nitrous oxide (N 2 O), or oxygen (O 2 ), a tool including one of the following:

42. 37. The tool of claim 36, wherein the etching of the upper region of the sidewall of the feature is dependent on a critical dimension measurement of the feature.

43. 43. The tool of claim 42, wherein the upper region of the sidewall is defined as a depth of 400 nanometers or less relative to a hole defining the vertical etched feature.

44. 37. The tool of claim 36, wherein the controller is further configured to control process parameters in a processing chamber in which the at least partially simultaneous deposition and etching occurs, the control of the process parameters ensuring that the etching is a substantially chemical etch.

45. 37. The tool of claim 36, wherein the controller is further configured to control a rate of the simultaneous etches by controlling a flow rate of an etchant chemical into a process chamber in which the simultaneous etches are performed.

46. 46. ​​The tool of claim 45, wherein the flow rate is in the range of 50 standard cubic centimeters per minute (SCCM) to 15 standard liters per minute (SLM).

47. 37. The tool of claim 36, further comprising controlling one or more process parameters in a processing chamber of the tool in which the simultaneous etching occurs, the process parameters including: (i) a temperature in the range of −60° C. to 700° C.; (ii) a pressure in the range of 50 millitorr to 10 torr; (iii) capacitively or inductively powering a plasma in the processing chamber; or (iv) controlling the flow rate of a carbon containing precursor into the processing chamber within the range of 0.1 to 10 standard liters per minute (SLM); Including, tools.

48. 1. A method for manufacturing a semiconductor substrate, comprising: (i) depositing a liner-forming amorphous carbon material on sidewalls of vertically etched features in one or more layers on the semiconductor substrate; and (ii) etching excess deposits of the amorphous carbon material that are deposited within holes defining the feature and on upper regions of the sidewalls of the feature during deposition of the amorphous carbon material; at least partially simultaneously performing

49. 49. The method of claim 48, further comprising controlling the at least partially simultaneous deposition and etching such that the amorphous carbon material forming the liner is more uniform in thickness from a bottom of the vertically etched feature to the top region of the sidewall of the feature, said more uniform thickness compared to a non-uniformity in thickness of the liner if the etching was not performed.

50. 49. The method of claim 48, further comprising controlling the at least partially simultaneous deposition and etching such that the at least partially simultaneous etching during the deposition retards or prevents the occurrence of "pinch-off" of excess amorphous carbon material within an opening defining the feature, where pinch-off is defined as a complete or partial blockage of the opening.

51. 49. The method of claim 48, further comprising controlling a parallel flow of deposition precursor and etchant chemicals into a processing chamber during said simultaneous deposition and etching.

52. 49. The method of claim 48, (a) performing an etching of the semiconductor substrate to form the features; and (b) simultaneously etching, at least partially, during said depositing of said amorphous carbon material subsequent to said etching of said semiconductor substrate to form said features; The method further comprises:

53. 53. The method of claim 52, further comprising repeating (a) and (b) two or more times until the feature is etched to a desired depth.

54. 1. A method for manufacturing a semiconductor substrate, comprising: (a) vertically etching a feature having an opening, a sidewall, and a depth in one or more layers formed on the semiconductor substrate; (b) depositing a liner material on the sidewalls of the feature; (c) performing an etch of a carbon mask used to define the opening of the feature, the etch comprising: (i) removing excess deposits of the liner material that have collected in the openings of the features defined by the carbon mask; (ii) molding the carbon mask adjacent the opening of the feature; A method comprising:

55. 55. The method of claim 54, further comprising repeating (a), (b), and (c) two or more times until the feature reaches a desired depth within the one or more layers formed on the semiconductor substrate.

56. 55. The method of claim 54, further comprising performing (b) and (c) in the same chamber of a substrate processing tool.

57. 55. The method of claim 54, wherein forming the carbon mask comprises: The method further comprising tapering the opening from a wider width to a narrower width in a direction towards the feature.

58. 55. The method of claim 54, wherein performing the etching comprises: generating a mask etch plasma in a process chamber containing the semiconductor substrate; and controlling the plasma in the processing chamber to control an etch rate of the carbon mask while substantially preventing etching of the liner material deposited on the sidewalls of the feature; The method further comprises:

59. 59. The method of claim 58, wherein controlling the plasma comprises controlling a parameter in the process chamber: RF frequency; the duration of the etch; or Wattage level; The method further comprising controlling one or more of:

60. 59. The method of claim 58, wherein generating the plasma comprises: Carbon Dioxide (CO 2 ) or nitrous oxide (N 2 O) into the processing chamber; providing radio frequency (RF) power into the processing chamber, the RF power comprising: Approximately 13.56MHz, Less than 60 MHz, or Over 400KHz, having a frequency selected from one of: The method further comprises:

61. 59. The method of claim 58, wherein generating the plasma comprises: Carbon Dioxide (CO 2 ) or nitrous oxide (N 2 O) into the processing chamber; providing an energy level to the processing chamber, the energy level comprising: About 100 watts, Less than 1 kilowatt, or More than 25 watts and The method further comprises:

62. 55. The method of claim 54, wherein depositing the liner material further comprises depositing an amorphous carbon liner on the sidewalls of the feature using a hydrocarbon precursor.

63. 55. The method of claim 54, wherein (a), (b), and (c) are each performed by the same substrate processing tool.

64. 1. A substrate processing tool comprising: A processing chamber; a substrate holder for holding a substrate within the processing chamber; A controller for controlling operation of the substrate processing tool during processing of the substrate, the controller comprising: (a) (i) depositing a carbon liner on sidewalls of features (i) etched into the substrate and (ii) defined by openings in a carbon mask; (b) etching the carbon mask, (iii) shaping the carbon mask, and (iv) removing the incidental carbon liner deposited material from the opening; The substrate processing tool is configured to control the substrate processing tool such that

65. 65. A substrate processing tool according to claim 64, wherein the etching of the carbon mask is performed to shape the carbon mask so as to taper from a wider width to a narrower width in a direction towards the feature.

66. 65. The substrate processing tool of claim 64, wherein the processor is further configured to control an etching environment in the processing chamber such that the carbon mask and the opening are etched while the carbon liner on the sidewalls of the feature is substantially not etched.

67. 65. The substrate processing tool of claim 64, wherein the controller is further configured to repeat (a) and (b), each of the iterations being performed in anticipation of a subsequent etch to deepen the feature.

68. 65. The substrate processing tool of claim 64, wherein (b) results in the carbon liner on the sidewalls of the feature becoming more conformal after a subsequent iteration of (a).

69. 65. The substrate processing tool of claim 64, wherein the controller is further configured to perform the etching of the carbon mask for a predetermined period of time, the predetermined period of time being in a range of approximately 5 seconds to 300 seconds.

70. 65. The substrate processing tool of claim 64, wherein the controller is further configured to perform the etching of the carbon mask until a predetermined amount of mask material is removed, the predetermined amount of mask material being in a range of approximately 2 to 50 nanometers.

71. 65. The substrate processing tool of claim 64, wherein the controller is further configured to control a radio frequency (RF) in the processing chamber when performing the etching of the carbon mask, the RF comprising: (c) 400kHz or more; (d) 60MHz or less; (d) Approximately 13.56MHz; A substrate processing tool comprising:

72. 65. The substrate processing tool of claim 64, wherein the controller is further configured to control a wattage in the processing chamber when performing the etching of the carbon mask, the wattage being in the range of 25 watts to 1 kilowatt.

73. 65. The substrate processing tool of claim 64, wherein the etching comprises: Carbon Dioxide (CO 2 ). Nitrous oxide (N 2 O); or Any mixture or combination thereof; A substrate processing tool implemented using a chemistry comprising one of:

74. 65. The substrate processing tool of claim 64, wherein the features etched into the substrate comprise: (c) within the substrate processing tool; or (d) a separate substrate etching tool; The substrate processing tool is etched in either

75. 65. The substrate processing tool of claim 64, wherein the carbon liner is an amorphous carbon liner.

76. 1. A method comprising: Fabricating a vertical feature having an opening, a sidewall, and a depth in one or more layers formed on a substrate; depositing amorphous carbon on the sidewalls of the vertical feature and within the opening, the amorphous carbon deposited within the opening forming an amorphous carbon plug within the opening of the vertical feature; A method for providing the above.

77. 77. The method of claim 76, further comprising depositing the amorphous carbon on the sidewalls of the vertical feature such that the amorphous carbon is thinner near the depth of the vertical feature and thicker near the opening of the vertical feature.

78. 77. The method of claim 76, further comprising depositing additional amorphous carbon on the amorphous carbon plug formed within the opening of the vertical feature and on a surface region of the one or more layers surrounding the vertical feature.

79. 80. The method of claim 78, further comprising etching back the additional amorphous carbon deposited on the plug to form a recess on the plug.

80. 77. The method of claim 76, wherein the vertical features form a 3D NAND structure, and the amorphous carbon deposited on the sidewalls to form the amorphous carbon plug serves to protect the 3D NAND structure during subsequent processing of the substrate.

81. 77. The method of claim 76, wherein the amorphous carbon deposited on the sidewalls forming the plug is sacrificial, the method further comprising removing the amorphous carbon deposited on the sidewalls of the vertical feature and the amorphous carbon forming the plug.

82. 1. A method performed in a substrate processing chamber, the method comprising: fabricating a vertical feature formed on a substrate in the processing chamber, the vertical feature having an opening, a sidewall, and a predetermined depth; depositing an amorphous carbon material on the substrate in the processing chamber, the amorphous carbon material being deposited on the sidewalls of the feature and forming a plug in the opening of the vertical feature; The method includes:

83. 83. The method of claim 82, wherein fabricating the vertical features comprises: (a) vertically etching the feature; (b) depositing an amorphous carbon layer on the sidewalls of the feature; (c) repeating (a) and optionally (b) one or more times until the vertical feature reaches a predetermined depth; the deposition of the amorphous carbon layer in each of the repetitions of (b) mitigates lateral etching of the feature in a subsequent repetition of (a).

84. 84. The method of claim 83, wherein depositing the amorphous carbon layer on the sidewalls of the feature during the repetition of (b) further comprises generating a first plasma in the processing chamber containing a first hydrocarbon precursor and an inert gas, an amount of the inert gas at least partially controlling a deposition rate of the amorphous carbon layer on the sidewalls of the vertically etched feature.

85. 85. The method of claim 84, wherein the depositing of the amorphous carbon material further comprises generating a second plasma in the process chamber, the second plasma comprising a second hydrocarbon precursor, and wherein the amorphous carbon material is deposited faster in the second plasma compared to in the first plasma due to no inert gas or less inert gas being used in the second plasma compared to the first plasma.

86. 86. The method of claim 85, further comprising performing a chemical etch back of the amorphous carbon material in the processing chamber such that a recess is formed above the plug.

87. 87. The method of claim 86, wherein the chemical etch back comprises: removing some or all of the second hydrocarbon precursor from the processing chamber; introducing an oxygen-based chemical into the processing chamber; chemically etching the amorphous carbon material using the oxygen-based chemistry; The method further comprises:

88. 90. The method of claim 87, wherein as the second hydrocarbon precursor is removed and replaced with the oxygen-based chemistry, the processing chamber transitions from a deposition dominated chamber to a chemical etching dominated chamber.

89. 86. The method of claim 85, wherein the first hydrocarbon precursor and the second hydrocarbon precursor are either the same or different, and each is selected from the group including propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemicals.

90. 1. A method for forming an amorphous carbon film on a substrate in a processing chamber, comprising: depositing the amorphous carbon film on the substrate by generating a plasma in the process chamber while introducing a flow of a carbon-containing precursor into the process chamber; simultaneously performing a chemical etching of the deposited amorphous carbon film; The method includes:

91. 91. The method of claim 90, further comprising controlling a deposition rate of amorphous carbon forming the amorphous carbon film by adjusting a concentration level of an inert gas in the processing chamber, wherein a high concentration level of the inert gas reduces the deposition rate and a lower concentration level of, or removal of, the inert gas from the processing chamber increases the deposition rate.

92. 91. The method of claim 90, wherein the carbon-containing precursor comprises one of propylene, acetylene, methane, toluene, and / or other hydrocarbon (CxHy) chemicals.

93. 91. The method of claim 90, wherein the chemical etching is performed using nitrous oxide (N 2 O, carbon dioxide (CO 2 ), hydrogen (H 2 ), sulfur hexafluoride (SF 6 ), oxygen (O 2 ), other oxygen-containing species, or a combination thereof.

94. 92. The method of claim 91, wherein the inert gas is nitrogen (N 2 ), helium (He), argon (Ar), or a combination thereof.

95. 91. The method of claim 90, wherein the amorphous carbon film comprises: (a) formed on a sidewall of a vertical feature etched into the substrate; (b) the amorphous carbon film is formed in an opening defining the vertical feature, the deposited amorphous carbon film forming a "plug" within the opening, the amorphous carbon film; (c) both (a) and (b); The method is one of the above.

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