Circuit board and electronic element package

Abstract

To provide a circuit board capable of preventing occurrence of a defect due to a flux residue under a surface-mounted electronic element.SOLUTION: A circuit board includes: an insulation layer including a first region provided so as to mount an electronic element on one surface and a second region adjacent to the first region; a connection pad disposed in the first region; and a solder resist layer that covers one surface of the insulation layer and opened so as to expose the connection pad. At least part of the solder resist layer extends from the second region to the first region, and part of the insulation layer is exposed from the solder resist layer in the first region.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to circuit boards and electronic device packages. [Background technology]

[0002] Surface mount technology is a technology that mounts electronic elements such as capacitors and inductors on the surface of a package substrate, and has the advantage of being advantageous in improving the electrical performance and miniaturization of electronic element packages. Recently, there has been an increasing demand for surface mounting of passive elements with a three-terminal structure, which has evolved from the existing two-terminal structure, in order to improve packaging performance.

[0003] Surface-mounted electronic devices are vulnerable to external physical and chemical shocks, so their physical and electrical reliability must be ensured through a molding process in which a filler such as epoxy resin is used to fill any empty spaces.

[0004] Mold voids, a major defect that can occur during the molding process, are difficult to determine from appearance and can have a fatal effect on packaging reliability. Due to structural changes in passive elements, problems with the filling of the mold can occur under surface mounted elements, and improvements are needed to address this issue. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-110081 A Summary of the Invention [Problem to be solved by the invention]

[0006] The object of the present invention is to provide a circuit board and an electronic device package that can secure a sufficient distance between the circuit board and the mounted device on the surface of the circuit board, improve the cleaning ability of the bottom of the mounted electronic device during the surface mounting process, and prevent defects caused by flux residue.

[0007] However, the problem to be solved by the present invention is not limited to the above problem, and can be variously expanded within the scope of the technical ideas included in the present invention. [Means for solving the problem]

[0008] In order to achieve the above-mentioned object, a circuit board according to one embodiment of the present invention includes an insulating layer including a first region on one side for mounting an electronic element and a second region adjacent to the first region, a connection pad arranged in the first region, and a solder resist layer covering the one side of the insulating layer and having an opening to expose the connection pad, at least a portion of the solder resist layer extending from the second region to the first region, and a portion of the insulating layer being exposed from the solder resist layer in the first region.

[0009] The solder resist layer may include a first portion located in the first region and a second portion located in the second region, the first portion being located adjacent to one edge of the connection pad. The solder resist layer may include a first portion located in the first region and a second portion located in the second region, and the first portion may be arranged to at least partially overlap the connection pad along a first direction perpendicular to the surface of the insulating layer. The solder resist layer has a first opening that is opened to expose at least a portion of the connection pad and a second opening that is opened to expose a portion of the insulating layer in the first region, and the first opening and the second opening can be integrally connected. The solder resist layer may have a first portion located in the first region and a second portion located in the second region, a first opening opened to expose at least a portion of the connection pad, and a second opening opened to expose a portion of the insulating layer in the first region, and the first opening and the second opening may be separated from each other by the first portion. The first portion may extend along an edge of the second opening.

[0010] A circuit board according to another aspect of the present invention made to achieve the above-mentioned object includes an insulating layer including a first region arranged on one surface for mounting an electronic element and a second region adjacent to the first region, a connection pad arranged in the first region, and a solder resist layer covering the one surface of the insulating layer and having an opening to expose the connection pad, wherein, in a thickness along a first direction perpendicular to the one surface of the insulating layer, a first portion of the solder resist layer covering the first region is thicker than a second portion of the solder resist layer covering the second region.

[0011] The electronic device may include a body and an electrode portion disposed on the body and electrically connected to the connection pad, and at least a portion of the first portion may be positioned to overlap the connection pad along the first direction. The solder resist layer may have an opening that is opened to expose a portion of the insulating layer in the first region, and the connection pads may be provided in a plurality of locations spaced apart with the openings therebetween, and the first portion may be located between the plurality of connection pads. The first portion may be disposed to overlap one corner of the first region along the first direction. The first portion may be located in the first region and spaced apart from the connection pad. The solder resist layer may have a first opening that is opened to expose at least a portion of the connection pad, and a second opening that is opened to expose a portion of the insulating layer in the first region. The first opening and the second opening may be connected together. The first opening and the second opening may be separated from each other by the first portion. A plurality of the second openings may be provided, and the first portion may be located between the plurality of second openings. The first portion may extend along an edge of the second opening. The solder resist layer may include a first solder resist layer located on the one surface of the insulating layer, and a second solder resist layer disposed on the first solder resist layer so as to protrude from the first solder resist layer in the first direction. In a plane parallel to the one surface of the insulating layer, the planar area of ​​the second solder resist layer may be smaller than the planar area of ​​the first solder resist layer.

[0012] In order to achieve the above-mentioned object, an electronic element package according to one embodiment of the present invention includes an insulating layer having a first region and a second region separated from each other on one side, an electronic element mounted in the first region, a connection pad arranged on the first region, and a solder resist layer covering the one side of the insulating layer, having an opening to expose the connection pad, and arranged to support the electronic element.

[0013] The solder resist layer may include a first portion disposed to overlap the electronic element in a first direction perpendicular to the surface of the insulating layer and supporting the electronic element. In terms of height from the surface of the insulating layer along the first direction, the height of the lower surface of the electronic element may be the same as the height of the upper surface of the first portion, or may be higher than the height of the upper surface of the first portion. The first portion may include a portion in direct contact with the electronic element. The substrate may further include a connecting portion arranged to connect the electronic element and the connection pad to each other, and at least a portion of the connecting portion may be located between the electronic element and the solder resist layer along a first direction perpendicular to the surface of the insulating layer. The connection pad may be embedded in the insulating layer and one surface of the connection pad may be exposed from the insulating layer. The solder resist layer may have a first opening that is opened to expose at least a portion of the connection pad, and a second opening that is opened to expose a portion of the insulating layer in the first region. The first opening and the second opening may be connected together. The first opening and the second opening may be separated from each other by the first portion. A plurality of the second openings may be provided, and the first portion may be located between the plurality of second openings. The electronic element may include a body and an electrode portion disposed on the body and electrically connected to the connection pad, and the solder resist layer may include a first solder resist layer located on the one surface of the insulating layer, and a second solder resist layer disposed on the first solder resist layer to protrude from the first solder resist layer in a first direction perpendicular to the one surface of the insulating layer. The second solder resist layer may be located at both opposing ends of the electrode portion. The electrode portions may be provided in a plurality of locations so as to be arranged opposite each other in a second direction perpendicular to the first direction, and the second solder resist layer may be positioned at inner ends of the electrode portions along the second direction. The electrode portions may be provided in a plurality of positions facing each other in a second direction perpendicular to the first direction, and the second solder resist layer may be positioned between the plurality of electrode portions. The second solder resist layer may be located between the body of the electronic component and the first solder resist layer along the first direction. Effect of the Invention

[0014] According to the circuit board and electronic device package of the present invention, a sufficient distance can be secured between the circuit board and the mounted device on the surface of the circuit board, the cleaning ability of the bottom of the mounted electronic device during the surface mounting process can be improved, and the occurrence of defects due to flux residue can be prevented.

[0015] In addition, the circuit board and electronic device package according to the present invention can prevent mold voids from occurring under the surface mount device during the molding process, and can suppress physical and electrical interference between the surface mount device and the circuit board. [Brief description of the drawings]

[0016] [Figure 1] 1 is a cross-sectional view illustrating an electronic device package according to an embodiment; [Diagram 2] FIG. 2 is a plan view illustrating a circuit board according to an embodiment. [Diagram 3] 1 is a cross-sectional view illustrating a portion of an electronic device package according to an embodiment. [Figure 4] FIG. 11 is a cross-sectional view showing a portion of an electronic element package according to a modified example. [Diagram 5] FIG. 11 is a plan view illustrating a circuit board according to another embodiment. [Figure 6] 11 is a cross-sectional view illustrating a portion of an electronic device package according to another embodiment. [Figure 7] 11 is a cross-sectional view illustrating an electronic device package according to another embodiment of the present invention; [Figure 8] FIG. 11 is a plan view illustrating a circuit board according to another embodiment of the present invention. [Figure 9] 11 is a cross-sectional view showing a portion of an electronic device package according to still another embodiment. [Figure 10] 11 is a cross-sectional view illustrating an electronic device package according to another embodiment of the present invention; [Figure 11] FIG. 13 is a plan view illustrating a circuit board according to still another embodiment. [Figure 12] 13 is a cross-sectional view illustrating a portion of an electronic device package according to still another embodiment. [Figure 13] 11 is a cross-sectional view illustrating an electronic device package according to another embodiment. [Figure 14] FIG. 11 is a plan view illustrating a circuit board according to another embodiment. [Figure 15] 11 is a cross-sectional view showing a portion of an electronic device package according to another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings so that a person having ordinary skill in the art to which the present invention pertains can easily carry out the present invention. In the drawings, in order to clearly explain the present invention, parts unnecessary for the explanation are omitted, and the same reference numerals are used for the same or similar components throughout the specification. In addition, in the drawings, some components are exaggerated, omitted, or shown in a schematic manner, and the size of each component does not fully reflect the actual size.

[0018] The drawings are merely intended to facilitate understanding of the embodiments disclosed in this specification, and the drawings are not intended to limit the technical ideas disclosed in this specification, and it should be understood that the drawings include all modifications, equivalents, and alternatives included in the idea and technical scope of the present invention.

[0019] Terms including ordinal numbers such as first, second, etc. are used to describe various components, but the components are not limited to the terms. The terms are used only to distinguish one component from another.

[0020] In addition, when a part such as a layer, film, region, or plate is said to be "above" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when a part is said to be "directly above" another part, it means that there is no other part in between. In addition, being "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "above" the direction opposite to gravity.

[0021] Throughout the specification, the terms "comprise" or "have" are intended to specify the presence of any feature, number, step, operation, component, part, or combination thereof described in the specification, but do not preclude the presence or additional possibility of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. Thus, when a part is said to "comprise" a certain component, this does not exclude other components, and means that it can further include other components, unless specifically stated to the contrary.

[0022] Also, throughout the specification, a reference to "in a plane" means when the subject part is viewed from above, and a reference to "in cross section" means when the subject part is cut vertically and viewed from the side.

[0023] Throughout the specification, when a part is said to be "coupled" to another part, this includes not only "directly or physically coupled" but also "indirectly or non-contactingly coupled" with another element between them.

[0024] Furthermore, throughout the specification, the term "connected" does not only mean that two or more components are directly connected, but also that two or more components are indirectly connected via other components, or that they are not only physically connected but also electrically connected, or that they are referred to by different names depending on their location or function but are integrated.

[0025] FIG. 1 is a cross-sectional view showing an electronic element package according to one embodiment, FIG. 2 is a plan view showing a circuit board according to one embodiment, FIG. 3 is a cross-sectional view showing a portion of an electronic element package according to one embodiment, and FIG. 4 is a cross-sectional view showing a portion of an electronic element package according to a modified example.

[0026] Fig. 2 is a plan view of part A in Fig. 1, excluding electronic elements, as viewed from above. Fig. 3 is a cross-sectional view taken along line III-III' in Fig. 2, showing an electronic element disposed on a circuit board according to an embodiment. Fig. 4 is a cross-sectional view taken along line III-III' in Fig. 2, showing an electronic element disposed on a circuit board according to a modified example.

[0027] 1, an electronic device package 10A according to an embodiment includes a circuit board 100A, a first electronic device 20 and a second electronic device 11 mounted on one side of the circuit board 100A. The electronic device package 10A according to the embodiment includes a first connection 12 connecting the first electronic device 20 to the circuit board 100A, a second connection 13 connecting the second electronic device 11 to the circuit board 100A, and a third connection 14 connecting the circuit board 100A to the outside. The electronic device package 10A according to the embodiment also includes a third electronic device 15 mounted on the other side of the circuit board 100A.

[0028] The first electronic component 20 is mounted on one surface of the insulating layer 110 of the circuit board 100A. The first electronic component 20 may be a chip-type passive component, such as, but not limited to, a chip-type inductor or a chip-type capacitor.

[0029] The first electronic component 20 includes a body 22 and an electrode unit 21 disposed on the body 22 and electrically connected to the circuit board 100A. Although the electrode unit 21 is shown to be disposed on both sides of the body 22 in FIG. 1, the present invention is not limited thereto, and a single electrode unit 21 may be disposed on the body 22, or three or more electrode units 21 may be disposed. The body 22 includes a dielectric material. The body 22 includes a plurality of surfaces facing each other. The electrode unit 21 of the first electronic component 20 includes a metal material such as copper (Cu) or aluminum (Al). The electrode unit 21 is electrically connected to the circuit board 100A through the first connection unit 12.

[0030] The second electronic element 11 is an integrated circuit (IC) die in which hundreds to millions of elements are integrated into one chip. For example, the second electronic element 11 may be a processor chip such as a central processor (e.g., CPU), a graphic processor (e.g., GPU), a field programmable gate array (FPGA), a digital signal processor, an encryption processor, a microprocessor, or a microcontroller, specifically an application processor (AP), but is not limited thereto. In addition, the second electronic element 11 may be a memory such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), or a flash memory, or a logic such as an analog-digital converter or an application-specific IC (ASIC). If necessary, the second electronic element 11 may be a chip-type passive component, for example, a chip-type inductor or a chip-type capacitor. The second electronic element 11 is electrically connected to the circuit board 100A through the second connection part 13. The second electronic element 11 is attached to one side of the circuit board 100A by an adhesive film, if necessary.

[0031] The third electronic element 15 may be a chip-type passive element, such as, but not limited to, a chip-type inductor or a chip-type capacitor, and may be an integrated circuit (IC) die in which hundreds to millions of elements are integrated into one chip. The third electronic element 15 is electrically connected to the circuit board 100A.

[0032] The first connecting portion 12 is disposed inside the first opening 211 of the solder resist layer 200 of the circuit board 100A. The first connecting portion 12 electrically connects the exposed first wiring layer 121 and the first electronic element 20. The first connecting portion 12 electrically connects the exposed first wiring layer 121 and the electrode portion 21 of the first electronic element 20. The first connecting portion 12 physically and / or electrically connects the first electronic element 20, which is surface-mounted on the circuit board 100A, to the circuit board 100A. The first connecting portion 12 is formed of tin (Sn) or an alloy containing tin (Sn), for example, solder, but is not limited thereto. The first connecting portion 12 is disposed between the electrode portion 21 of the first electronic element 20 and the first wiring layer 121. The first connecting portion 12 is disposed between the electrode portion 21 of the first electronic element 20 and the connection pad 1211. The electrode portion 21 is electrically connected to the connection pad 1211. At least a portion of the first connection portion 12 is located between the first electronic component 20 and the solder resist layer 200 along a first direction perpendicular to one surface of the insulating layer 110.

[0033] The second connecting portion 13 is disposed inside another opening of the solder resist layer 200 of the circuit board 100A. The second connecting portion 13 electrically connects the exposed first wiring layer 121 and the second electronic element 11. The second connecting portion 13 physically and / or electrically connects the second electronic element 11, which is surface-mounted on the circuit board 100A, and the circuit board 100A. The second connecting portion 13 is formed of tin (Sn) or an alloy containing tin (Sn), for example, solder, but is not limited thereto. For example, the second connecting portion 13 is ball-shaped, but is not limited thereto, and may be in the shape of a land, a pin, a pillar-shaped metal post, or the like.

[0034] The third connecting parts 14 are electrically connected to the exposed second wiring layer 122. The third connecting parts 14 physically and / or electrically connect the circuit board 100A to the outside. For example, the circuit board 100A is thereby mounted on a main board of an electronic device or other BGA boards. The third connecting parts 14 are each formed of tin (Sn) or an alloy containing tin (Sn), such as, but not limited to, solder. For example, the third connecting parts 14 are ball-shaped, but are not limited to this, and may be in the shape of a land, a pin, or a pillar-shaped metal post.

[0035] The circuit board 100A according to an embodiment will be described in more detail below.

[0036] 1, the circuit board 100A according to the embodiment includes an insulating layer 110, first and second wiring layers 121 and 122 located on one and the other sides of the insulating layer 110, and a third wiring layer 123 located between the first wiring layer 121 and the second wiring layer 122 and embedded in the insulating layer 110. The circuit board 100A according to the embodiment also includes a first via layer 131 that penetrates at least a portion of the insulating layer 110 and is connected to the first wiring layer 121, and a second via layer 132 that penetrates at least a portion of the insulating layer 110 and is connected to the second wiring layer 122.

[0037] The insulating layer 110 includes a plurality of insulating layers 111, 112. As an example, the insulating layer 110 includes first and second insulating layers 111, 112.

[0038] The insulating layers 111 and 112 may be made of an insulating material, such as a thermosetting resin, such as an epoxy resin, or a thermoplastic resin, such as a polyimide. In addition, these resins may contain an inorganic filler, such as silica, and a reinforcing material, such as glass fiber. For example, prepreg and ABF (Ajinomoto Build-up Film) may be used, but are not limited to these. Meanwhile, ABF may be provided in the form of RCC (Resin Coated Copper), but are not limited to these. If necessary, a photosensitive material, such as PIE (Photo Imageable Dielectric), may be used.

[0039] Referring to FIG. 1, insulating layer 110 is shown as being composed of two layers, including first and second insulating layers 111, 112, however, insulating layer 110 may be composed of a single layer or may include more layers.

[0040] The circuit board 100A according to this embodiment includes a plurality of wiring layers 121, 122, and 123. The plurality of wiring layers 121, 122, and 123 include first to third wiring layers 121, 122, and 123. Each of the first to third wiring layers 121, 122, and 123 is disposed at least one of inside and outside the insulating layer 110.

[0041] The wiring layers 121, 122, and 123 transmit signals inside the circuit board 100A. Metallic materials can be used as the material of the wiring layers 121, 122, and 123. Metallic materials include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and alloys thereof. The wiring layers 121, 122, and 123 perform various functions according to their design, such as a ground pattern, a power pattern, and a signal pattern. These patterns have a line, plane, or pad shape, respectively. The wiring layer located on the outermost layer among the multiple wiring layers 121, 122, and 123 functions as a pad for connection to other boards or components.

[0042] The multiple wiring layers 121, 122, and 123 are formed by plating processes such as AP (Additive Process), SAP (Semi AP), MSAP (Modified SAP), and TT (Tenting).

[0043] The first wiring layer 121 is disposed on the first insulating layer 111. For example, the circuit board 100A according to one embodiment is manufactured by an ETS (Embedded Trace Substrate) method. The insulating layer 110 has one surface and another surface facing each other, and in this case, the first wiring layer 121 is disposed embedded in one surface side of the insulating layer 110. That is, the first wiring layer 121 is embedded from one surface of the insulating layer 110.

[0044] The first wiring layer 121 includes a portion embedded in one surface of the insulating layer 110 so that an upper surface thereof is exposed. The first wiring layer 121 includes a connection pad 1211 embedded in one surface of the insulating layer 110 so that an upper surface thereof is exposed. The connection pad 1211 is embedded in the insulating layer 110 so that one surface thereof is exposed from the insulating layer 110. The first wiring layer 121 includes a plurality of connection pads 1211.

[0045] The second wiring layer 122 is located on the other surface of the insulating layer 110. The second wiring layer 122 is disposed so as to protrude from the other surface of the insulating layer 110. The second wiring layer 122 is located on the second insulating layer 112. The second wiring layer 122 functions as a pad for connection to another board or component.

[0046] The third wiring layer 123 is located on one surface of the first insulating layer 111. The third wiring layer 123 is embedded in the second insulating layer 112. Referring to FIG 1, the third wiring layer 123 is shown to be located between the first wiring layer 121 and the second wiring layer 122, but this is merely an example, and the third wiring layer 123 may not be located, and multiple wiring layers may be present.

[0047] Referring to FIG. 1, first to third wiring layers 121, 122, and 123 are shown, but this is not limited to this, and more wiring layers than those shown in the figure may be arranged, or fewer wiring layers may be arranged.

[0048] The circuit board 100A according to one embodiment includes a first via layer 131 penetrating the first insulating layer 111 and electrically connecting the first and third wiring layers 121, 123, and a second via layer 132 penetrating the second insulating layer 112 and electrically connecting the second and third wiring layers 122, 123. Each of the via layers includes a plurality of vias having a plurality of via holes filled with a conductor.

[0049] The via layers 131 and 132 may be made of metal, such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof. The via layers 131 and 132 may include signal vias, ground vias, power vias, and the like, depending on the design. The vias of the via layers 131 and 132 may be via holes completely filled with metal, or may be via holes with metal formed along the walls thereof. The via layers 131 and 132 also include a seed layer, which is an electroless plating layer formed by a plating process, such as AP, SAP, MSAP, or TT, and an electrolytic plating layer formed based on the seed layer. Each of the vias of the first and second via layers 131 and 132 has a tapered shape in which the width of one side is smaller than the width of the other side.

[0050] On the other hand, although FIG. 1 shows the multiple via layers as having two layers, the first and second via layers 131 and 132, depending on the configuration of the insulating layer 110 and the design of the wiring layer, the via layer may be composed of a single layer or may have more layers.

[0051] The circuit board 100A according to one embodiment includes a solder resist layer 200. The solder resist layer 200 protects the internal components from external physical and chemical damage.

[0052] The solder resist layer 200 has at least one first opening 211. The solder resist layer 200 covers one surface of the insulating layer 110, and is opened to expose at least a part of the connection pad 1211. The at least one first opening 211 of the solder resist layer 200 exposes at least a part of the first wiring layer 121. At least a part of the connection pad 1211 is exposed from the solder resist layer 200 through the first opening 211 of the solder resist layer 200. The solder resist layer 200 contains a photosensitive resin material.

[0053] The circuit board 100A according to one embodiment includes a protective layer 140. The protective layer 140 protects the internal components from external physical and chemical damage, etc. The protective layer 140 may be a solder resist layer. The protective layer 140 has at least one opening. The protective layer 140 covers the other surface of the insulating layer 110 and is opened to expose the second wiring layer 122. Each of the at least one openings in the protective layer 140 exposes at least a portion of the second wiring layer 122. The protective layer 140 may include a photosensitive resin material.

[0054] The solder resist layer 200 of the circuit board 100A according to one embodiment will be described in more detail below with reference to FIGS.

[0055] 2 and 3, an insulating layer 110 includes a first region 1101 and a second region 1102 that are separated from each other on one surface. The first region 1101 is provided to mount a first electronic component 20. The second region 1102 is adjacent to the first region 1101.

[0056] For example, the first region 1101 refers to a region on one surface of the insulating layer 110 where the insulating layer 110 and the first electronic component 20 overlap in a first direction perpendicular to the one surface of the insulating layer 110. The first electronic component 20 is mounted in the first region 1101. The second region 1102 refers to a region where the first electronic component 20 is not mounted. The second region 1102 is connected to the first region 1101. The second region 1102 includes a portion surrounding the first region 1101.

[0057] A connection pad 1211 is disposed in the first region 1101. At least a portion of the connection pad 1211 is exposed from the insulating layer 110 in the first region 1101.

[0058] At least one connection pad 1211 is located on the first region 1101 of the insulating layer 110. The connection pad 1211 is disposed at a position corresponding to a portion where the electrode unit 21 of the first electronic element 20 overlaps with the first region 1101. As an example, when the electrode units 21 are located on both sides of the first region 1101, the connection pads 1211 are located on both sides of the first region 1101.

[0059] In the first region 1101, there is a portion where neither the connection pads 1211 nor the solder resist layer 200 is disposed on the insulating layer 110. Therefore, in the first region 1101, a part of one surface of the insulating layer 110 is exposed from the solder resist layer 200.

[0060] A portion of the solder resist layer 200 is located on the second region 1102. At least a portion of the solder resist layer 200 extends from the second region 1102 to the first region 1101. In other words, the solder resist layer 200 includes a first portion 200a located in the first region 1101 and a second portion 200b located in the second region 1102. The first portion 200a covers a portion of the first region 1101. The second portion 200b covers at least a portion of the second region 1102.

[0061] A first portion 200a of the solder resist layer 200 is located on the first region 1101. The first portion 200a overlaps the first electronic element 20 along the first direction. The first portion 200a is located so as to overlap a corner portion of the first electronic element 20. The first portion 200a is disposed so as to at least partially overlap the connection pad 1211 along the first direction. The first portion 200a is located on the connection pad 1211.

[0062] The solder resist layer 200 is disposed to support the first component 20. The first portion 200a is disposed to support the first component 20. The first connecting portion 12 is located between the first portion 200a and the first component 20 along the first direction. There is a portion along the first direction where the first component 20, the first connecting portion 12, and the first portion 200a are sequentially located. Referring to FIG. 3, in terms of height from one surface of the insulating layer 110 along the first direction, the lower surface of the first component 20 is higher than the upper surface of the first portion 200a. The first portion 200a contacts the first connecting portion 12.

[0063] 4, the first portion 200a of the circuit board 100A according to the modified example includes a portion in direct contact with the first component 20. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first component 20 is the same as the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connector 12.

[0064] The first portion 200a is located adjacent to one edge of the connection pad 1211. The first portion 200a is located along one edge of the connection pad 1211. The first portion 200a extends along one edge of the connection pad 1211 located in the first region 1101. The first portion 200a is located between the first electronic element 20 and the connection pad 1211 along the first direction. The first portion 200a is located between the electrode portion 21 of the first electronic element 20 and the connection pad 1211 along the first direction.

[0065] The second direction is perpendicular to the first direction and parallel to the direction in which the multiple electrode portions 21 of the first electronic element 20 face each other. The third direction is perpendicular to the first direction and the second direction. The first portion 200a has a shape in which a part of the second portion 200b extends in the third direction. The first portion 200a has a shape in which a part of the second portion 200b located in the edge region of the connection pad 1211 along the third direction extends in the third direction. The first portion 200a extends from the second portion 200b to the inside of the electrode portion 21 of the first electronic element 20. The first portion 200a is located adjacent to the outer end of the electrode portion 21 along the second direction.

[0066] The solder resist layer 200 has a second opening 212 that exposes the insulating layer 110 from the solder resist layer 200. The second opening 212 is opened to expose a part of one surface of the insulating layer 110 in the first region 1101. The second opening 212 is surrounded by the solder resist layer 200 and one surface of the connection pad 1211. The second opening 212 is integrally connected to the first opening 211.

[0067] A plurality of first portions 200a are provided in the first region 1101. The plurality of first portions 200a are arranged to face each other in the third direction. The plurality of first portions 200a are located adjacent to both ends of the electrode portion 21 along the third direction, respectively.

[0068] Hereinafter, a solder resist layer 200 of a circuit board 100B according to another embodiment will be described with reference to FIG. 1 as well as FIG. 5 and FIG.

[0069] FIG. 5 is a plan view showing a schematic diagram of a circuit board according to another embodiment, and FIG. 6 is a cross-sectional view showing a part of an electronic device package according to another embodiment.

[0070] Fig. 5 is a plan view of part A in Fig. 1, excluding electronic components, as viewed from above. Fig. 6 is a cross-sectional view taken along line VI-VI' in Fig. 5, showing a state in which electronic components are arranged on a circuit board according to another embodiment.

[0071] 5 and 6, the circuit board 100B according to the other embodiment is different from the circuit board 100A according to the embodiment of the present invention in that the solder resist layer 200 includes first and second solder resist layers 201 and 202. Therefore, in describing the structure of the circuit board 100B according to the other embodiment, only the configuration changed from the configuration of the circuit board 100A according to the embodiment will be described. The remaining configuration of the electronic device package 10A is the same as that described for the electronic device package 10A according to the embodiment described above.

[0072] A portion of the solder resist layer 200 is located on the second region 1102. At least a portion of the solder resist layer 200 extends from the second region 1102 to the first region 1101. In other words, the solder resist layer 200 includes a first portion 200a located in the first region 1101 and a second portion 200b located in the second region 1102.

[0073] A first portion 200a of the solder resist layer 200 is located on the first region 1101. The first portion 200a overlaps the first electronic element 20 along the first direction. The first portion 200a is located so as to overlap a corner of the first electronic element 20. The first portion 200a is disposed so as to at least partially overlap the connection pad 1211 along the first direction. The first portion 200a is located on the connection pad 1211.

[0074] The solder resist layer 200 is disposed to support the first electronic element 20. The first portion 200a is disposed to support the first electronic element 20. The first connecting portion 12 is located between the first portion 200a and the first electronic element 20 along the first direction. There is a portion along the first direction where the first electronic element 20, the first connecting portion 12, and the first portion 200a are located in sequence. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first electronic element 20 is higher than the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connecting portion 12.

[0075] The first portion 200a may include a portion in direct contact with the first component 20. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first component 20 is the same as the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connector 12.

[0076] The first portion 200a is located adjacent to one edge of the connection pad 1211. The first portion 200a is located along one edge of the connection pad 1211. The first portion 200a extends along one edge of the connection pad 1211 located in the first region 1101. The first portion 200a is located between the first electronic element 20 and the connection pad 1211 along the first direction. The first portion 200a is located between the electrode portion 21 of the first electronic element 20 and the connection pad 1211 along the first direction.

[0077] The second direction is perpendicular to the first direction and parallel to the direction in which the electrode portion 21 of the first electronic element 20 faces. The third direction is perpendicular to the first direction and the second direction. The first portion 200a has a shape in which a part of the second portion 200b extends in the third direction. The first portion 200a has a shape in which a part of the second portion 200b located in the edge region of the connection pad 1211 along the third direction extends in the third direction. The first portion 200a extends from the second portion 200b to the inside of the electrode portion 21 of the first electronic element 20. The first portion 200a is located adjacent to the outer end of the electrode portion 21 along the second direction.

[0078] The solder resist layer 200 has a second opening 212 that exposes the insulating layer 110 from the solder resist layer 200. The second opening 212 is opened to expose a part of one surface of the insulating layer 110 in the first region 1101. The second opening 212 is integrally connected to the first opening 211. In other words, both the connection pad 1211 and the insulating layer 110 are exposed by one opening including the first opening 211 and the second opening 212.

[0079] A plurality of first portions 200a are provided in the first region 1101. The plurality of first portions 200a are arranged to face each other in the third direction. The plurality of first portions 200a are located adjacent to both ends of the electrode portion 21 along the third direction, respectively.

[0080] 5 and 6, the thickness of the first portion 200a of the solder resist layer 200 may be greater than the thickness of the second portion 200b in the first direction. Specifically, the solder resist layer 200 may include a protruding portion that is thicker in the first direction in a region adjacent to the first electronic component 20 than the remaining portion. In other words, the solder resist layer 200 may include a first solder resist layer 201 located on the insulating layer 110, and a second solder resist layer 202 located on the first solder resist layer 201. The second solder resist layer 202 includes at least one solder resist patch. The first solder resist layer 201 is shaped to extend to cover one surface of the insulating layer 110. The first solder resist layer 201 has a first opening 211 exposing at least a portion of the connection pad 1211.

[0081] The second solder resist layer 202 is disposed so as to protrude from the first solder resist layer 201 in the first direction. The second solder resist layer is located between the first electronic element 20 and the first solder resist layer 201 along the first direction. The second solder resist layer 202 is disposed so as to face each other in the third direction. The second solder resist layers 202 are located at both opposing ends of the electrode portion 21 along the third direction. The first connecting portion 12 is located between the first electronic element 20 and the second solder resist layer 202 along the first direction. There is a portion along the first direction where the first electronic element 20, the first connecting portion 12, the second solder resist layer 202, and the first solder resist layer 201 are located in sequence.

[0082] In terms of planar area in a plane parallel to one surface of the insulating layer 110, the planar area of ​​the second solder resist layer 202 is smaller than the planar area of ​​the first solder resist layer 201. The second solder resist layer 202 is made of the same material as the first solder resist layer 201, but is not limited to this and may be made of a different material.

[0083] The first portion 200a includes a part of the first and second solder resist layers 201, 202. The second portion 200b includes another part of the first and second solder resist layers 201, 202.

[0084] At least a portion of the first portion 200a is disposed so as to support the first electronic element 20. At least a portion of the first portion 200a is disposed so as to overlap the first electronic element 20 along the first direction. At least a portion of the first portion 200a is positioned so as to overlap the electrode portion 21 along the first direction. At least a portion of the first portion 200a is disposed so as to at least partially overlap the connection pad 1211 along the first direction.

[0085] The first portion 200a is disposed so as to overlap one corner of the first electronic element 20 along the first direction. In other words, the first portion 200a is disposed so as to overlap one corner of the first region 1101 along the first direction.

[0086] A step portion along the first direction is located at one edge of the first portion 200a along the third direction. However, without being limited thereto, the first solder resist layer 201 and the second solder resist layer 202 constituting the first portion 200a may be disposed to have the same width along the third direction.

[0087] An electronic element package 10B and a circuit board 100C according to another embodiment will be described below with reference to FIGS.

[0088] FIG. 7 is a cross-sectional view illustrating an electronic device package according to another embodiment, FIG. 8 is a plan view illustrating a circuit board according to another embodiment, and FIG. 9 is a cross-sectional view illustrating a portion of an electronic device package according to another embodiment.

[0089] Fig. 8 is a plan view of part A of Fig. 7, excluding electronic components, as viewed from above. Fig. 9 is a cross-sectional view taken along line IX-IX' of Fig. 8, showing a state in which electronic components are arranged on a circuit board according to still another embodiment.

[0090] 7 to 9, the circuit board 100C according to the further embodiment is different from the circuit board 100A according to the embodiment described with reference to Figs. 1 to 3 in the arrangement or shape of the solder resist layer 200. Therefore, in describing the structure of the circuit board 100C according to the further embodiment, only the configuration changed compared to the configuration of the circuit board 100A according to the embodiment will be described. The remaining configuration of the electronic device package 10B is the same as that described for the electronic device package 10A according to the above-mentioned embodiment.

[0091] 7 to 9, an insulating layer 110 includes a first region 1101 and a second region 1102 that are separated from each other on one surface. The insulating layer 110 includes the first region 1101 where a first electronic component 20 is mounted, and the second region 1102 adjacent to the first region 1101.

[0092] For example, the first region 1101 refers to a region on one surface of the insulating layer 110 where the insulating layer 110 and the first electronic component 20 overlap in a first direction perpendicular to the one surface of the insulating layer 110. The first electronic component 20 is mounted in the first region 1101. The second region 1102 refers to a region where the first electronic component 20 is not mounted. The second region 1102 is connected to the first region 1101. The second region 1102 includes a portion surrounding the first region 1101.

[0093] A connection pad 1211 is disposed in the first region 1101. At least a portion of the connection pad 1211 is exposed from the insulating layer 110 in the first region 1101.

[0094] At least one connection pad 1211 is located on the first region 1101 of the insulating layer 110. The connection pad 1211 is disposed at a position corresponding to a portion where the electrode unit 21 of the first electronic element 20 overlaps with the first region 1101. As an example, when the electrode units 21 are located on both sides of the first region 1101, the connection pads 1211 are located on both sides of the first region 1101.

[0095] In the first region 1101, there is a portion where neither the connection pads 1211 nor the solder resist layer 200 is disposed on the insulating layer 110. Therefore, in the first region 1101, a part of one surface of the insulating layer 110 is exposed from the solder resist layer 200.

[0096] A portion of the solder resist layer 200 is located on the second region 1102. At least a portion of the solder resist layer 200 extends from the second region 1102 to the first region 1101. In other words, the solder resist layer 200 includes a first portion 200a located in the first region 1101 and a second portion 200b located in the second region 1102.

[0097] A first portion 200a of the solder resist layer 200 is located on the first region 1101. The first portion 200a overlaps the first electronic element 20 along the first direction. The first portion 200a is located so as to overlap a corner of the first electronic element 20. The first portion 200a is disposed so as to at least partially overlap the connection pad 1211 along the first direction. The first portion 200a is located on the connection pad 1211.

[0098] The solder resist layer 200 is disposed to support the first electronic element 20. The first portion 200a is disposed to support the first electronic element 20. The first connecting portion 12 is located between the first portion 200a and the first electronic element 20 along the first direction. There is a portion along the first direction where the first electronic element 20, the first connecting portion 12, and the first portion 200a are located in sequence. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first electronic element 20 is higher than the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connecting portion 12.

[0099] The first portion 200a may include a portion in direct contact with the first component 20. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first component 20 is the same as the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connector 12.

[0100] The first portion 200a is located adjacent to one edge of the connection pad 1211. The first portion 200a is located along one edge of the connection pad 1211. The first portion 200a extends along one edge of the connection pad 1211 located in the first region 1101. The first portion 200a is located between the first electronic element 20 and the connection pad 1211 along the first direction. The first portion 200a is located between the electrode portion 21 of the first electronic element 20 and the connection pad 1211 along the first direction.

[0101] On a plane parallel to one surface of the insulating layer 110, the first portion 200a is located between the connection pad 1211 and the insulating layer 110 along the second direction. On a plane parallel to one surface of the insulating layer 110, the connection pad 1211 and the insulating layer 110 are located along the second direction with the first portion 200a as a reference. On a plane parallel to one surface of the insulating layer 110, the first portion 200a extends along one edge of a part of one surface of the insulating layer 110 exposed from the solder resist layer 200 in the first region 1101. The first portion 200a extends in a third direction.

[0102] The solder resist layer 200 has a second opening 212 exposing the insulating layer 110 from the solder resist layer 200. The second opening 212 is opened to expose a part of one surface of the insulating layer 110 in the first region 1101. The first portion 200a extends along one edge of the second opening 212. The second opening 212 is separated from the first opening 211 by the first portion 200a. The second opening 212 is located away from the first opening 211.

[0103] The first portion 200a extends along an edge of the connection pad 1211 parallel to the third direction. The first portion 200a extends in the third direction from the second portion 200b adjacent to one end of the connection pad 1211 along the third direction to the second portion 200b adjacent to the other end of the connection pad 1211 along the third direction. The first portion 200a is located adjacent to the second opening 212 of the solder resist layer 200 exposing the insulating layer 110. The first portion 200a is located adjacent to an inner end of the electrode portion 21 along the second direction. The first portion 200a is located on one surface of the first connector 12 in the inner direction of the first electronic element 20.

[0104] A plurality of first portions 200a are provided in the first region 1101. The plurality of first portions 200a are arranged to face each other in the second direction. The plurality of first portions 200a are located inside the first electronic element 20.

[0105] An electronic element package 10C and a circuit board 100D according to still another embodiment will be described below with reference to FIGS.

[0106] FIG. 10 is a cross-sectional view showing a schematic diagram of an electronic element package according to yet another embodiment, FIG. 11 is a plan view showing a schematic diagram of a circuit board according to yet another embodiment, and FIG. 12 is a cross-sectional view showing a portion of an electronic element package according to yet another embodiment.

[0107] Fig. 11 is a plan view of part A in Fig. 10, excluding electronic elements, as viewed from above. Fig. 12 is a cross-sectional view taken along line XII-XII' in Fig. 11, showing a state in which electronic elements are arranged on a circuit board according to still another embodiment.

[0108] 10 to 12, in comparison with the circuit board 100C according to the third embodiment described with reference to Figs. 7 to 9, the circuit board 100D according to the third embodiment includes a solder resist layer 200 including first and second solder resist layers 201 and 202. Therefore, in describing the structure of the circuit board 100D according to the present embodiment, only the configuration changed from the configuration of the circuit board 100C according to the third embodiment described above will be described. The remaining configuration of the electronic device package 10C is the same as that described for the electronic device package 10B according to the third embodiment described above.

[0109] A portion of the solder resist layer 200 is located on the second region 1102. At least a portion of the solder resist layer 200 located in the second region 1102 extends from the second region 1102 to the first region 1101. In other words, the solder resist layer 200 includes a first portion 200a located in the first region 1101 and a second portion 200b located in the second region 1102.

[0110] A first portion 200a of the solder resist layer 200 is located on the first region 1101. The first portion 200a overlaps the first electronic element 20 along the first direction. The first portion 200a is located so as to overlap a corner of the first electronic element 20. The first portion 200a is disposed so as to at least partially overlap the connection pad 1211 along the first direction. The first portion 200a is located on the connection pad 1211.

[0111] The solder resist layer 200 is disposed to support the first electronic element 20. The first portion 200a is disposed to support the first electronic element 20. The first connecting portion 12 is located between the first portion 200a and the first electronic element 20 along the first direction. There is a portion along the first direction where the first electronic element 20, the first connecting portion 12, and the first portion 200a are located in sequence. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first electronic element 20 is higher than the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connecting portion 12.

[0112] The first portion 200a may include a portion in direct contact with the first component 20. In terms of height from one surface of the insulating layer 110 along the first direction, the height of the lower surface of the first component 20 is the same as the height of the upper surface of the first portion 200a. The first portion 200a contacts the first connector 12.

[0113] The first portion 200a is located adjacent to one edge of the connection pad 1211. The first portion 200a is located along one edge of the connection pad 1211. The first portion 200a extends along one edge of the connection pad 1211 located in the first region 1101. The first portion 200a is located between the first electronic element 20 and the connection pad 1211 along the first direction. The first portion 200a is located between the electrode portion 21 of the first electronic element 20 and the connection pad 1211 along the first direction.

[0114] On a plane parallel to one surface of the insulating layer 110, the first portion 200a is located between the connection pad 1211 and the insulating layer 110 along the second direction. On a plane parallel to one surface of the insulating layer 110, the connection pad 1211 and the insulating layer 110 are located along the second direction with the first portion 200a as a reference. On a plane parallel to one surface of the insulating layer 110, the first portion 200a extends along one edge of a part of one surface of the insulating layer 110 exposed from the solder resist layer 200 in the first region 1101. The first portion 200a extends in a third direction.

[0115] The solder resist layer 200 has a second opening 212 exposing the insulating layer 110 from the solder resist layer 200. The second opening 212 is opened to expose a portion of one surface of the insulating layer 110 in the first region 1101. The second opening 212 is separated from the first opening 211 by the first portion 200a. The second opening 212 is located at a distance from the first opening 211. The first portion 200a extends along one edge of the second opening 212.

[0116] A plurality of connection pads 1211 are provided spaced apart with second openings 212 therebetween. The first portion 200a is located between the plurality of connection pads 1211.

[0117] The first portion 200a extends along an edge of the connection pad 1211 parallel to the third direction. The first portion 200a extends in the third direction from the second portion 200b adjacent to one end of the connection pad 1211 along the third direction to the second portion 200b adjacent to the other end of the connection pad 1211 along the third direction. The first portion 200a is located adjacent to the second opening 212 of the solder resist layer 200 exposing the insulating layer 110. The first portion 200a is located adjacent to an inner end of the electrode portion 21 along the second direction. The first portion 200a is located on one surface of the first connector 12 in the inner direction of the first electronic element 20.

[0118] A plurality of first portions 200a are provided in the first region 1101. The plurality of first portions 200a are arranged to face each other in the second direction. The plurality of first portions 200a are located inside the first electronic element 20.

[0119] 10 to 12, the thickness of the first portion 200a of the solder resist layer 200 may be greater than the thickness of the second portion 200b in the first direction. Specifically, the solder resist layer 200 may include a protruding portion that is thicker in the first direction in a region adjacent to the first electronic component 20 than the remaining portion. In other words, the solder resist layer 200 includes a first solder resist layer 201 located on the insulating layer 110, and a second solder resist layer 202 located on the first solder resist layer 201. The second solder resist layer 202 includes at least one solder resist patch. The first solder resist layer 201 has an expanded shape to cover one surface of the insulating layer 110. The first solder resist layer 201 has a first opening 211 that exposes at least a portion of the connection pad 1211 from the first solder resist layer 201.

[0120] The second solder resist layer 202 is disposed so as to protrude from the first solder resist layer 201 in the first direction. The second solder resist layer is located between the first electronic element 20 and the first solder resist layer 201 along the first direction. The second solder resist layer 202 is disposed so as to face in the second direction. The second solder resist layer 202 is located at the inner end of the electrode portion 21 along the second direction. The second solder resist layer 202 is located between the multiple electrode portions 21 facing each other in the second direction.

[0121] Along the first direction, the first connecting portion 12 is located between the first electronic element 20 and the second solder resist layer 202. Along the first direction, there is a portion where the first electronic element 20, the first connecting portion 12, the second solder resist layer 202, and the first solder resist layer 201 are located in sequence.

[0122] In terms of the planar area in a plane parallel to one surface of the insulating layer 110, the planar area of ​​the second solder resist layer 202 is smaller than the planar area of ​​the first solder resist layer 201. The second solder resist layer 202 is made of the same material as the first solder resist layer 201, but is not limited to this and may be made of a different material.

[0123] The first portion 200a includes a part of the first solder resist layer 201 and the second solder resist layer 202. The second portion 200b includes another part of the first solder resist layer 201.

[0124] The first portion 200a is disposed to support the first electronic element 20. The first portion 200a is disposed to overlap the first electronic element 20 along the first direction. At least a portion of the first portion 200a is positioned to overlap the electrode portion 21 along the first direction. At least a portion of the first portion 200a is positioned to overlap the connection pad 1211 along the first direction. At least a portion of the first portion 200a is positioned to overlap the connection pad 1211 along the first direction.

[0125] The first portion 200a is disposed so as to overlap one corner of the first electronic element 20 along the first direction. In other words, the first portion 200a is disposed so as to overlap one corner of the first region 1101 along the first direction.

[0126] The first solder resist layer 201 and the second solder resist layer 202 constituting the first portion 200a are disposed so that they have the same width in the third direction. However, without being limited thereto, the first solder resist layer 201 and the second solder resist layer 202 constituting the first portion 200a may have different widths in the third direction, and a step portion in the first direction is located at one edge of the first portion 200a in the third direction.

[0127] Hereinafter, an electronic element package 10D and a circuit board 100E according to another embodiment will be described with reference to FIGS.

[0128] FIG. 13 is a cross-sectional view showing a schematic diagram of an electronic element package according to another embodiment, FIG. 14 is a plan view showing a schematic diagram of a circuit board according to another embodiment, and FIG. 15 is a cross-sectional view showing a portion of an electronic element package according to another embodiment.

[0129] Fig. 14 is a plan view of part A in Fig. 13, excluding electronic components, as viewed from above. Fig. 15 is a cross-sectional view taken along line XV-XV' in Fig. 14, showing a state in which electronic components are arranged on a circuit board according to another embodiment.

[0130] 13 to 15, the circuit board 100E according to the other embodiment is different from the circuit board 100D according to the further embodiment described with reference to Figs. 10 to 12 in the arrangement or shape of the first and second solder resist layers 201, 202. Therefore, in describing the structure of the circuit board 100E according to the present embodiment, only the configuration changed compared to the configuration of the circuit board 100D according to the further embodiment described above will be described. The remaining configuration of the electronic device package 10D is the same as that described for the electronic device package 10C according to the further embodiment described above.

[0131] A portion of the solder resist layer 200 is located on the second region 1102. At least a portion of the solder resist layer 200 extends from the second region 1102 to the first region 1101. In other words, the solder resist layer 200 includes a first portion 200a located in the first region 1101 and a second portion 200b located in the second region 1102.

[0132] A first portion 200a of the solder resist layer 200 is located on the first region 1101. The first portion 200a overlaps the first electronic component 20 along the first direction. The first portion 200a is located so as to overlap a center portion of the first electronic component 20. The first portion 200a is located so as to overlap the body 22 along the first direction. The first portion 200a is disposed to support the first electronic component 20. The first portion 200a is disposed so as to overlap the first electronic component 20 along the first direction. The first portion 200a is located in the first region 1101, spaced apart from the connection pad 1211. The connection pad 1211 includes a plurality of connection pads, and the first portion 200a is located between the plurality of connection pads.

[0133] The solder resist layer 200 is disposed to support the first component 20. The first portion 200a is disposed to support the first component 20. The first portion 200a includes a portion that directly contacts the first component 20. In terms of height from one surface of the insulating layer 110 along the first direction, the height of a lower surface of the body 22 of the first component 20 is the same as the height of an upper surface of the first portion 200a. The first portion 200a is located away from the first connecting portion 12.

[0134] The first portion 200a is located on the insulating layer 110. The first portion 200a extends along the third direction. The first portion 200a is located between the body 22 of the first electronic element 20 and the insulating layer 110 along the first direction.

[0135] On a plane parallel to one surface of the insulating layer 110, the insulating layer 110 is located at an edge of the first portion 200a facing in the second direction. On a plane parallel to one surface of the insulating layer 110, the insulating layer 110 is located on both sides in the second direction with the first portion 200a as a reference. On a plane parallel to one surface of the insulating layer 110, the first portion 200a extends along an edge of a part of one surface of the insulating layer 110 exposed from the solder resist layer 200 in the first region 1101.

[0136] The solder resist layer 200 has a second opening 212 exposing the insulating layer 110 from the solder resist layer 200. The second opening 212 is opened to expose a part of one surface of the insulating layer 110 in the first region 1101. The second opening 212 is surrounded by the solder resist layer 200 and one surface of the connection pad 1211. The second opening 212 is integrally connected to the first opening 211. The first portion 200a extends along one edge of the second opening 212. A plurality of second openings 212 are provided. The first portion 200a is located between the plurality of second openings 212.

[0137] A plurality of connection pads 1211 are provided spaced apart with second openings 212 therebetween. The first portion 200a is located between the plurality of connection pads 1211.

[0138] The first portion 200a extends in the third direction to connect both side regions of the second portion 200b facing in the third direction to each other. The first portion 200a is positioned adjacent to the second opening 212 of the solder resist layer 200 that exposes the insulating layer 110. The first electronic component 20 includes a plurality of electrode units 21 facing in the second direction. The first portion 200a is positioned between the plurality of electrode units 21 facing in the second direction.

[0139] 14, the first portion 200a is illustrated as a single portion, but is not limited thereto, and a plurality of first portions 200a may be provided to support the body 22 of the first electronic component 20. The plurality of first portions 200a are located between a plurality of electrode parts 21 facing each other in the second direction.

[0140] 13 to 15, the thickness of the first portion 200a of the solder resist layer 200 is greater than the thickness of the second portion 200b in the first direction. Specifically, the solder resist layer 200 includes a protruding portion that is thicker in the first direction in a region adjacent to the first electronic component 20 than the remaining portion. In other words, the solder resist layer 200 includes a first solder resist layer 201 located on the insulating layer 110, and a second solder resist layer 202 located on the first solder resist layer 201. The second solder resist layer 202 includes at least one solder resist patch. The first solder resist layer 201 has an expanded shape to cover one surface of the insulating layer 110. The first solder resist layer 201 has a first opening 211 that exposes at least a portion of the connection pad 1211 from the first solder resist layer 201.

[0141] The second solder resist layer 202 is disposed so as to protrude from the first solder resist layer 201 in the first direction. The second solder resist layer 202 is located between the first electronic element 20 and the first solder resist layer 201 along the first direction. The second solder resist layer 202 is located between the body 22 of the first electronic element 20 and the first solder resist layer 201 along the first direction. The second solder resist layer 202 is disposed so as to be in direct contact with the body 22. The second solder resist layer 202 is located between a plurality of electrode portions 21 facing each other in the second direction.

[0142] In terms of the planar area in a plane parallel to one surface of the insulating layer 110, the planar area of ​​the second solder resist layer 202 is smaller than the planar area of ​​the first solder resist layer 201. The second solder resist layer 202 is made of the same material as the first solder resist layer 201, but is not limited to this and may be made of a different material.

[0143] The first portion 200a includes a part of the first solder resist layer 201 and the second solder resist layer 202. The second portion 200b includes another part of the first solder resist layer 201.

[0144] The first solder resist layer 201 and the second solder resist layer 202 constituting the first portion 200a are disposed so that they have the same width in the third direction. However, without being limited thereto, the first solder resist layer 201 and the second solder resist layer 202 constituting the first portion 200a may have different widths in the third direction, and a step portion in the first direction is located at one edge of the first portion 200a in the third direction.

[0145] According to the circuit board and electronic device package according to the above-mentioned embodiment, the solder resist layer is arranged to support the electronic device, so that a sufficient distance can be secured between the circuit board and the mounted device on the surface of the circuit board, the cleaning ability of the bottom of the mounted electronic device during the surface mounting process can be improved, and defects caused by flux residue can be prevented.In addition, the mold void defects can be prevented from occurring under the surface mounted device during the molding process, and physical and electrical interference effects between the surface mounted device and the circuit board can be suppressed.

[0146] Although the preferred embodiment of the present invention has been described above, the present invention is not limited thereto, and various modifications can be made within the scope of the description and drawings of the invention, which of course also fall within the scope of the present invention. [Explanation of symbols]

[0147] 10A, 10B, 10C, 10D: Electronic device packages 11: Second electronic element 12: 1st connection part 13:Second connection part 14:Third connection part 15: Third electronic element 20: First electronic element 21: Electrode part 22: Body 100A, 100B, 100C, 100D, 100E: Circuit boards 110: Insulating layer 1101:First area 1102:Second area 121: 1st wiring layer 1211: Connection pad 122: 2nd wiring layer 123: 3rd wiring layer 131: First via layer 132: Second via layer 140:Protective layer 200: Solder resist layer 200a: 1st part 200b: 2nd part 201: First solder resist layer 202: Second solder resist layer 211: First opening 212: Second opening

Claims

1. an insulating layer including a first region provided on one surface for mounting an electronic element thereon and a second region adjacent to the first region; A connection pad disposed in the first region; a solder resist layer covering the one surface of the insulating layer and having an opening to expose the connection pad; At least a portion of the solder resist layer extends from the second region to the first region; A circuit board, characterized in that a portion of the insulating layer is exposed from the solder resist layer in the first region.

2. the solder resist layer includes a first portion located in the first region and a second portion located in the second region; 2. The circuit board of claim 1, wherein the first portion is located adjacent one edge of the connection pad.

3. the solder resist layer includes a first portion located in the first region and a second portion located in the second region; The circuit board according to claim 1 , wherein the first portion is disposed to at least partially overlap the connection pad along a first direction perpendicular to the surface of the insulating layer.

4. The solder resist layer is a first opening portion that is opened to expose at least a portion of the connection pad; a second opening portion that is opened so as to expose a portion of the insulating layer in the first region; 2. The circuit board according to claim 1, wherein the first opening and the second opening are integrally connected.

5. The solder resist layer is a first portion located in the first region and a second portion located in the second region; a first opening portion that is opened to expose at least a portion of the connection pad; a second opening portion that is opened so as to expose a portion of the insulating layer in the first region; 2. The circuit board of claim 1, wherein the first opening and the second opening are separated from each other by the first portion.

6. 6. The circuit board according to claim 5, wherein the first portion extends along one edge of the second opening.

7. an insulating layer including a first region provided on one surface for mounting an electronic element thereon and a second region adjacent to the first region; A connection pad disposed in the first region; a solder resist layer covering the one surface of the insulating layer and having an opening to expose the connection pad; A circuit board characterized in that, in a thickness along a first direction perpendicular to the one surface of the insulating layer, a thickness of a first portion of the solder resist layer covering the first region is thicker than a thickness of a second portion of the solder resist layer covering the second region.

8. The electronic device includes a body and an electrode portion disposed on the body and electrically connected to the connection pad, The circuit board according to claim 7 , wherein at least a part of the first portion is positioned to overlap the connection pad along the first direction.

9. the solder resist layer has an opening that is opened so as to expose a portion of the insulating layer in the first region; The connection pads are provided in a plurality and spaced apart relation with the opening therebetween, 8. The circuit board of claim 7, wherein said first portion is located between said plurality of connection pads.

10. The circuit board according to claim 7 , wherein the first portion is disposed to overlap one corner of the first region along the first direction.

11. The circuit board of claim 7 , wherein the first portion is located at a distance from the connection pad in the first region.

12. The solder resist layer is a first opening portion that is opened to expose at least a portion of the connection pad; 8. The circuit board according to claim 7, further comprising: a second opening that is opened so as to expose a portion of the insulating layer in the first region.

13. The circuit board according to claim 12 , wherein the first opening and the second opening are integrally connected.

14. 13. The circuit board of claim 12, wherein the first opening and the second opening are separated from each other by the first portion.

15. The second opening is provided in plurality, The circuit board of claim 12 , wherein the first portion is located between the second openings.

16. The circuit board according to claim 12 , wherein the first portion extends along one edge of the second opening.

17. The solder resist layer is a first solder resist layer located on the one surface of the insulating layer; 8. The circuit board according to claim 7, further comprising: a second solder resist layer disposed on the first solder resist layer so as to protrude from the first solder resist layer in the first direction.

18. 18. The circuit board according to claim 17, wherein the second solder resist layer has a smaller planar area than the first solder resist layer in a plane parallel to the one surface of the insulating layer.

19. an insulating layer including a first region and a second region that are separated from each other on one surface; An electronic element mounted in the first region; A connection pad disposed in the first region; a solder resist layer covering the one surface of the insulating layer, having openings to expose the connection pads, and arranged to support the electronic element.

20. 20. The electronic device package of claim 19, wherein the solder resist layer includes a first portion disposed to overlap the electronic device in a first direction perpendicular to the surface of the insulating layer and to support the electronic device.

21. 21. The electronic element package of claim 20, wherein the height of the lower surface of the electronic element from the one surface of the insulating layer along the first direction is the same as the height of the upper surface of the first portion or is higher than the height of the upper surface of the first portion.

22. The electronic device package of claim 20 , wherein the first portion includes a portion that directly contacts the electronic device.

23. a connecting portion arranged to connect the electronic element and the connection pad to each other; 20. The electronic device package of claim 19, wherein at least a portion of the connection portion is located between the electronic device and the solder resist layer along a first direction perpendicular to the surface of the insulating layer.

24. 20. The electronic device package of claim 19, wherein the connection pad is embedded in the insulating layer and one surface of the connection pad is exposed from the insulating layer.

25. The solder resist layer is a first opening portion that is opened to expose at least a portion of the connection pad; 20. The electronic device package of claim 19, further comprising: a second opening that is opened to expose a portion of the insulating layer in the first region.

26. 26. The electronic device package of claim 25, wherein the first opening and the second opening are integrally connected.

27. 26. The electronic device package of claim 25, wherein the first opening and the second opening are separated from each other by the first portion.

28. The second opening is provided in plurality, 26. The electronic device package of claim 25, wherein the first portion is located between the second openings.

29. The electronic device includes a body and an electrode portion disposed on the body and electrically connected to the connection pad, The solder resist layer is a first solder resist layer located on the one surface of the insulating layer; 20. The electronic device package of claim 19, further comprising: a second solder resist layer disposed on the first solder resist layer to protrude from the first solder resist layer in a first direction perpendicular to the surface of the insulating layer.

30. 30. The electronic device package of claim 29, wherein the second solder resist layer is positioned on both opposing ends of the electrode portion.

31. The electrode portion is provided in a plurality of portions so as to be arranged opposite to each other in a second direction perpendicular to the first direction, 30. The electronic device package of claim 29, wherein the second solder resist layer is located at an inner end of the electrode portion along the second direction.

32. The electrode portion is provided in a plurality of portions so as to be arranged opposite to each other in a second direction perpendicular to the first direction, 30. The electronic device package of claim 29, wherein the second solder resist layer is positioned between the plurality of electrodes.

33. 30. The electronic device package of claim 29, wherein the second solder resist layer is located between the body of the electronic device and the first solder resist layer along the first direction.

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