Liquid crystal display and electroluminescent display device

Abstract

To provide a thin film transistor using an oxide semiconductor, which has controlled threshold voltage, and has high operation speed, relatively simple manufacturing process, and sufficient reliability, and a manufacturing method of the thin film transistor.SOLUTION: Impurities contained in an oxide semiconductor layer which affects carrier density, such as hydrogen atom, and compound containing hydrogen atom such as H2O may be removed. An oxide insulation layer including a number of defects typified by dangling bonds may be formed in contact with the oxide semiconductor layer, and the impurities may be diffused in the oxide insulation layer, so that the impurity concentration of the oxide semiconductor layer may be reduced. The oxide semiconductor layer or the oxide insulation layer in contact with the oxide semiconductor layer may be formed in a deposition chamber with the impurity concentration reduced by performing evacuation with a cryopump.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for forming a film for the semiconductor device. and a method for manufacturing the same. [Background technology]

[0002] Thin-film transistors formed on flat plates such as glass substrates, as typified by liquid crystal display devices. (also called TFT: Thin Film Transistor) is mainly made of amorphous They are made of semiconductor materials such as silicon or polycrystalline silicon. Although silicon-based TFTs have low field-effect mobility, they are compatible with larger glass substrates. On the other hand, TFTs using polycrystalline silicon have high field effect mobility but lack laser power. However, this method requires a crystallization process such as annealing, and is not necessarily suitable for enlarging the area of ​​glass substrates. It has the following characteristics:

[0003] In response to this, a TFT is fabricated using an oxide semiconductor as the semiconductor material, and the TFT is then used as an electronic device. For example, niobium oxide is being used as a semiconductor material in semiconductor devices. We have created TFTs using lead and In-Ga-Zn-O oxide semiconductors, and used them to switch image display devices. Techniques used for etching elements and the like are disclosed in Patent Documents 1 and 2.

[0004] A TFT in which a channel formation region (also called a channel region) is provided in an oxide semiconductor is an amorphous The field effect mobility is higher than that of TFTs using amorphous silicon. The film can be formed at temperatures below 300℃ using methods such as sputtering. The manufacturing process is simpler than that of TFTs using capacitors.

[0005] Using such oxide semiconductors, TFTs are formed on glass substrates, plastic substrates, etc. Liquid crystal display, electroluminescent display (also called EL display) Alternatively, application to display devices such as electronic paper is being considered. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, the characteristics of semiconductor elements manufactured using oxide semiconductors are not yet sufficient. For example, a thin film transistor using an oxide semiconductor layer has a controlled threshold voltage, Fast operating speed, relatively simple manufacturing process, and sufficient reliability are required. The present invention has been made against this technical background.

[0008] Therefore, an object of one embodiment of the present invention is to improve the reliability of a semiconductor element including an oxide semiconductor layer. Specifically, a thin film transistor using an oxide semiconductor with a controlled threshold voltage is provided. Another object of the present invention is to provide a device that operates at a high speed, has a relatively simple manufacturing process, and is sufficiently One of the objectives of the present invention is to provide a thin film transistor including an oxide semiconductor and having high reliability. Let us assume that.

[0009] In addition, the threshold voltage is controlled, the operating speed is fast, the manufacturing process is relatively simple, and the device is sufficiently reliable. The object of the present invention is to provide a method for manufacturing a thin film transistor using an oxide semiconductor. It shall be one. [Means for solving the problem]

[0010] The threshold voltage of a thin-film transistor using an oxide semiconductor is determined by the carrier density in the oxide semiconductor layer. The carrier concentration in the oxide semiconductor layer is affected by the concentration of For example, hydrogen atoms contained in the oxide semiconductor layer are generated. Or, H 2 Compounds containing hydrogen atoms, such as O, and compounds containing carbon atoms are oxide semiconductors. This has the effect of increasing the carrier concentration in the layer.

[0011] As a result, hydrogen atoms and H 2 Compounds containing hydrogen atoms, such as O, and compounds containing carbon atoms A thin film transistor manufactured using an oxide semiconductor layer containing the compound can control a threshold voltage. It is difficult to do so.

[0012] In order to achieve the above object, an impurity that affects the carrier concentration contained in an oxide semiconductor layer, For example, hydrogen atoms and H 2 Excludes compounds containing hydrogen atoms such as O and compounds containing carbon atoms Specifically, the hydrogen concentration in the oxide semiconductor layer of the semiconductor element is set to 1×10 18 cm -3 More than 2×10 20 cm -3 The following would suffice.

[0013] In addition, an oxide insulating layer containing many defects such as dangling bonds is formed in contact with an oxide semiconductor layer. The hydrogen atoms and H2 Compounds containing hydrogen atoms such as O and carbon A compound containing an atom is diffused into the oxide insulating layer, and the impurity concentration in the oxide semiconductor layer is It is sufficient to reduce

[0014] In addition, the oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer is heated by a cryopump. The film may be formed in a film formation chamber that has been evacuated using a gas to reduce the impurity concentration.

[0015] That is, one aspect of the present invention is to form a gate electrode on a substrate, and to form a gate insulator on the gate electrode. a gate insulating film is formed on the gate electrode, and an oxide semiconductor layer is formed on the gate electrode via the gate insulating film; forming a source electrode and a drain electrode in contact with the body layer and having ends overlapping the gate electrode; An oxide insulating layer that covers the oxide semiconductor layer between the source electrode and the drain electrode This is a method for manufacturing a semiconductor device. The substrate is held in a reaction chamber that is kept in a reduced pressure state, and the substrate is The plate is heated to room temperature or a temperature less than 600° C., and hydrogen and A sputtering gas from which moisture has been removed is introduced, and the substrate is sputtered using a target installed in the reaction chamber. A gate insulating layer is formed on the target. and forming an oxide semiconductor layer on a gate insulating layer. This is the method.

[0016] In the method for manufacturing an oxide semiconductor element, a cryopump is used for evacuation. The method for manufacturing an oxide semiconductor element is characterized in that residual moisture is removed by

[0017] In the method for manufacturing an oxide semiconductor element, the metal oxide target is preferably zinc oxide. A method for manufacturing an oxide semiconductor element, characterized in that the oxide semiconductor element contains a metal oxide as a main component. .

[0018] In the method for manufacturing an oxide semiconductor element, the metal oxide target is indium A method for manufacturing an oxide semiconductor element, comprising the step of forming a metal oxide containing gallium and zinc. It is law.

[0019] In one embodiment of the present invention, a gate electrode is formed over a substrate, and a gate insulating film is formed over the gate electrode. forming an oxide semiconductor layer on the gate electrode via a gate insulating film; and forming the oxide semiconductor layer A source electrode and a drain electrode are formed in contact with the gate electrode and have ends overlapping the gate electrode. The oxide semiconductor layer between the source electrode and the drain electrode is covered with an oxide insulating layer. This is a method for fabricating a semiconductor device. The gate insulating film is formed in a heating chamber maintained under reduced pressure. The substrate is heated to a temperature between room temperature and 400°C while removing residual moisture in the heating chamber. The substrate is held in a reaction chamber preheated to 600° C. and maintained under reduced pressure. The reaction chamber is heated to a temperature of less than 100 °C, and the metal oxide mounted in the reaction chamber is heated to remove residual moisture in the reaction chamber. The present invention is characterized in that an oxide semiconductor layer is formed on a gate insulating layer using an oxide semiconductor target. The present invention relates to a method for manufacturing an oxide semiconductor element.

[0020] In the method for manufacturing an oxide semiconductor element, a cryopump is used for evacuation. The method for manufacturing an oxide semiconductor element is characterized in that residual moisture is removed by

[0021] In the method for manufacturing an oxide semiconductor element, the metal oxide target is preferably zinc oxide. A method for manufacturing an oxide semiconductor element, characterized in that the oxide semiconductor element contains a metal oxide as a main component. .

[0022] In the method for producing an oxide semiconductor element, the metal oxide target is indium. Fabrication of an oxide semiconductor element characterized by a metal oxide containing sulphur, gallium and zinc This is the method.

[0023] That is, one aspect of the present invention is a gate electrode on a substrate, a gate insulating film on the gate electrode, An oxide semiconductor layer is disposed on the gate electrode via a gate insulating film, and a gate insulating film is disposed in contact with the oxide semiconductor layer. A source electrode and a drain electrode overlapping the end of the source electrode, and an oxide insulating layer covering the oxide semiconductor layer formed between the electrodes. Note that the hydrogen concentration at the interface between the oxide semiconductor layer and the oxide insulating layer is 5×10 19 c m -3 More than 1×10 22 cm -3 The thin film transistor is characterized in that:

[0024] That is, one embodiment of the present invention is a gate electrode over a substrate; a gate insulating layer over the gate electrode; An oxide semiconductor layer is disposed on a gate electrode via a gate insulating layer, and a gate insulating layer is disposed in contact with the oxide semiconductor layer. A source electrode and a drain electrode overlapping the end of the electrode, and a source electrode and a drain electrode and an oxide insulating layer covering the oxide semiconductor layer formed between the first and second electrodes. In addition, the hydrogen concentration at the interface between the oxide semiconductor layer and the oxide insulating layer was 30 nm away from the interface. The hydrogen concentration of the oxide insulating layer is low in the portion where the oxide insulating layer is heated, and the difference is 5 to 100 times. It is a thin film transistor.

[0025] That is, one aspect of the present invention is a gate electrode on a substrate, a gate insulating film on the gate electrode, An oxide semiconductor layer is disposed on a gate electrode via a gate insulating film, and a gate insulating film is disposed in contact with the oxide semiconductor layer. A source electrode and a drain electrode overlapping the end of the electrode, and a source electrode and a drain electrode and an oxide insulating layer covering the oxide semiconductor layer formed between the first and second electrodes. Note that the hydrogen concentration in the oxide semiconductor layer is 1×10 18 cm -3 More than 2×10 20 c m -3 The thin film transistor is as follows:

[0026] In this specification, B is formed on A, or B is formed on A. If it is explicitly stated that A is directly on top of B, it is limited to that. No. When they are not in direct contact, that is, when there is another object between A and B, Here, A and B are objects (e.g., devices, elements, circuits, wiring, electrodes, terminal, membrane, or layer).

[0027] Therefore, for example, when it is explicitly stated that layer B is formed on or above layer A, In this case, layer B is formed directly on top of layer A, and layer A is formed directly on top of layer B. (For example, layers C and D) are formed, and layer B is formed directly on top of them. The other layer (e.g., layer C or layer D) may be a single layer or It may be multi-layered.

[0028] In this specification, the term "continuous film formation" refers to a series of processes from the first film formation step to the second film formation step. During the process, the atmosphere in which the substrate is placed is always kept clean without coming into contact with contaminated atmosphere such as air. The environment must be controlled in a vacuum or in an inert gas atmosphere (nitrogen or rare gas). By performing continuous film formation, reattachment of moisture and other substances to the cleaned substrate is avoided. The film can be formed in this manner.

[0029] In this specification, the term "light-emitting device" refers to an image display device, a light-emitting device, or a light Also, the light emitting device is connected to a connector, such as FPC (Flexib le printed circuit) or TAB (Tape Automate d Bonding) tape or TCP (Tape Carrier Packag e) is attached to the module, the printed wiring board is attached to the end of the TAB tape or TCP. A module with a COG (Chip On Glass) s) All modules in which an IC (integrated circuit) is directly mounted using this method are included in the light-emitting device. Let us assume that. Effect of the Invention

[0030] According to the present invention, a semiconductor element using a highly reliable oxide semiconductor layer can be provided. In addition, a thin film transistor using an oxide semiconductor and having a controlled threshold voltage can be provided. , an oxide semiconductor having a high operating speed, a relatively simple manufacturing process, and sufficient reliability. A thin film transistor using the above can be provided.

[0031] In addition, the threshold voltage is controlled, the operating speed is fast, the manufacturing process is relatively simple, and the device is sufficiently reliable. According to the present invention, a method for manufacturing a thin film transistor including an oxide semiconductor, which has excellent optical properties, can be provided. [Brief description of the drawings]

[0032] [Figure 1] 1A to 1C are diagrams illustrating a semiconductor element according to an embodiment; [Diagram 2] 2A to 2C are diagrams illustrating a manufacturing process of a semiconductor element according to an embodiment; [Diagram 3] 1A and 1B are diagrams illustrating a film formation apparatus according to an embodiment; [Figure 4] 1A and 1B are diagrams illustrating a film formation apparatus according to an embodiment; [Diagram 5] 1A and 1B are diagrams illustrating a film formation apparatus according to an embodiment; [Figure 6] 1A to 1C are diagrams illustrating the results of SIMS analysis according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the above-mentioned invention can be obtained by the following embodiments. The present invention should not be construed as being limited to the contents described below. The same reference numerals are used in different drawings to indicate the same parts or parts having similar functions. A repeated explanation will be omitted.

[0034] (Embodiment 1) In this embodiment mode, a method for manufacturing a semiconductor element will be described. As an example, a structure of a thin film transistor shown in FIG. 1 and a manufacturing method thereof will be described.

[0035] FIG. 1 shows a cross-sectional view of a thin film transistor 151 according to this embodiment. The gate electrode 111a and the gate wiring layer 111b are provided on the substrate 100. A gate insulating layer 102 is formed on the gate wiring layer 111a and the gate wiring layer 111b. The insulating layer 102 is a laminate of a first gate insulating layer 102a and a second gate insulating layer 102b. The oxide semiconductor layer is formed on the gate electrode 111a via the gate insulating layer 102. The source electrode layer and the drain electrode layer are formed by overlapping the end of the gate electrode 111a. In addition, an oxide insulating layer 107 is formed on the gate electrode layer (115a, 115b). The source electrode layer on the gate electrode 111a and the drain electrode layer (115a, 115b) are sandwiched between the A protective insulating layer 108 is provided over the oxide insulating layer 107 in contact with the oxide semiconductor layer 123. is provided.

[0036] In addition, a contact hole 128 reaching the gate wiring layer 111b is formed in the gate insulating layer 102. The gate wiring layer 111b and the second wiring layer 115c are connected to each other through the contact hole 128. is connected.

[0037] A method for manufacturing the thin film transistor 151 of this embodiment will be described with reference to FIGS. 2(C) and 2(D) will be used. FIG. 2 shows a thin-film transistor according to the present embodiment. 1A to 1C are cross-sectional views showing a method for manufacturing a star.

[0038] First, the glass substrate used for the substrate 100 is susceptible to distortion when the temperature of the subsequent heat treatment is high. It is advisable to use a glass substrate with a melting point of 730°C or higher. Glass materials such as borosilicate glass, aluminoborosilicate glass, and barium borosilicate glass Generally, more barium oxide (BaO) is used than boron oxide. By including B, a more practical heat-resistant glass can be obtained. 2 O 3 More BaO It is preferable to use a glass substrate having a high content of ZnO.

[0039] Instead of the above glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may be used. Alternatively, crystallized glass or the like may be used.

[0040] In addition, the insulating film that serves as the base film is a substrate 100, a gate electrode 111a, and a gate electrode 112, which will be described next. The undercoat film may be provided between the line layers 111b. The undercoat film prevents the diffusion of impurity elements from the substrate 100. The film can be selected from a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film. The insulating film may be formed by a laminate structure of one or more films.

[0041] After forming a conductive film on a substrate 100 having an insulating surface, a first photolithography process is performed. Thus, a first wiring layer including a gate electrode 111a and a gate wiring layer 111b is formed. The end of the formed gate electrode is preferably tapered.

[0042] The resist mask may be formed by an ink-jet method. When the film is formed by the jet method, a photomask is not used, and therefore the manufacturing cost can be reduced.

[0043] The conductive film forming the gate electrode 111a and the gate wiring layer 111b is made of Al, Cr, , Ta, Ti, Mo, W, or an alloy mainly composed of the above elements; In addition to the above metals, copper, nickel, etc. It uses metal materials such as chromium, zinc, or scandium, or alloy materials that contain these as the main components. The light-transmitting conductive film may be formed as a single layer or a stacked layer. A gate electrode can also be formed. As the conductive film having light transmitting properties, a transparent conductive oxide can be used. An example of such a material is a membrane.

[0044] Next, a gate insulating layer 102 and an oxide semiconductor layer 103 are successively formed. In the present embodiment, a gate insulating layer 102 and an oxide semiconductor layer 103 are successively formed by sputtering. Here, the preheating chamber for the substrate to be film-formed and the silicon or silicon oxide (artificial quartz) target are A multi-chamber sputtering system equipped with a target for the oxide semiconductor layer and a is used.

[0045] First, the substrate 1 on which the gate electrode 111a and the gate wiring layer 111b are formed is heated in a preheating chamber. The substrate 100 is preheated to a temperature of 200° C. or higher to remove impurities adsorbed on the substrate 100. An example of such a substance is water.

[0046] In this embodiment, the substrate is preheated to a temperature of 200° C. in a reduced pressure atmosphere.

[0047] Next, an insulating film that will become the gate insulating layer 102 is formed on the gate electrode 111a and the gate wiring layer 1 It is formed so as to cover 11b.

[0048] The gate insulating layer 102 may include an oxide insulating layer in contact with the oxide semiconductor layer. For example, a silicon oxide layer can be used as a single layer. A silicon oxide layer and a silicon oxide layer in contact with the oxide semiconductor layer can be stacked. The film may be doped with phosphorus (P) or boron (B).

[0049] In this embodiment, the first gate insulating layer 102a is formed of silicon nitride by a sputtering method. layer (SiN y (y>0) is formed on the first gate insulating layer 102a, and a second gate insulating layer 102b is formed on the first gate insulating layer 102a. The layer 102b is a silicon oxide layer (SiO x (x>0)) was laminated to form a gate electrode with a thickness of 100 nm. The insulating layer 102 is a thin film.

[0050] Next, an oxide semiconductor layer is formed over the gate insulating layer 102.

[0051] First, the oxide semiconductor layer 103 is formed. The oxide semiconductor layer 103 is made of In-Ga-Zn- O-based film, In-Sn-Zn-O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O, Sn-Al-Zn-O, In-Zn-O, In-Ga-O Oxidation of Sn-Zn-O, Al-Zn-O, In-O, Sn-O, and Zn-O systems The oxide semiconductor layer is grown under a rare gas (typically argon) atmosphere. , in an oxygen atmosphere, or in an atmosphere of rare gas (typically argon) and oxygen. When the sputtering method is used, SiO 2 2% by weight or less The oxide semiconductor layer is formed using a target containing 10% by weight or less of the above-mentioned oxide. The SiOx (x>0) is then added to the glass to be heat-treated for dehydration or dehydrogenation in the subsequent process. During the heating, it is preferable to suppress crystallization of the oxide semiconductor layer.

[0052] Here, a metal oxide target containing In, Ga, and Zn (composition ratio: In 2 O 3 :Ga 2 O 3 :ZnO=1:1:1[mol%], or In:Ga:Zn=1:1 0.5[at.%]) was used, the distance between the substrate and the target was 100 mm, and the pressure was 0 Film formation in an oxygen atmosphere (oxygen flow rate 100%) at .6 Pa and 0.5 kW DC power supply In addition, if a pulsed direct current (DC) power supply is used, dust can be reduced and the film thickness distribution becomes uniform. In this embodiment, the oxide semiconductor layer 103 is preferably made of In-Ga-Zn In-Ga-Zn-O based films were formed by sputtering using an In-O based metal oxide target. do.

[0053] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. By using a metal oxide target with a high filling rate, the film can be formed. The oxide semiconductor layer becomes a dense film.

[0054] Note that oxygen gas, nitrogen, helium, neon, or arsenic gas introduced when the oxide semiconductor layer is formed is It is preferable that the rare gas such as argon does not contain impurities such as water and hydrogen. 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., non- It is desirable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0055] Note that the oxide semiconductor layer 103 preferably has a thickness of 5 nm to 30 nm. The appropriate thickness varies depending on the oxide semiconductor material, and the thickness can be appropriately selected depending on the material. .

[0056] In this embodiment, the oxide semiconductor layer 103 is successively formed on the gate insulating layer 102. The multi-chamber sputtering device used here is a device for depositing silicon or silicon oxide ( The apparatus is provided with a target for an oxide semiconductor layer and a target for an oxide semiconductor layer. The deposition chamber in which the target for the semiconductor layer is provided has a cryopump as an exhaust means. The exhaust means may be a turbo pump with a cold trap added. good.

[0057] The deposition chamber evacuated using a cryopump contains, for example, hydrogen atoms and H 2 Hydrogen atoms such as O Compounds containing oxygen and compounds containing carbon atoms are exhausted, so the oxide film formed in the film formation chamber is The concentration of impurities contained in the semiconductor layer can be reduced.

[0058] In particular, the oxide semiconductor layer suitable for the semiconductor element of one embodiment of this embodiment is SIMS (Secondary Ion Mass Spectrometry) The hydrogen concentration was 1×10 18 cm -3 More than 2×10 20 cm -3 Preferably 2 or less ×10 18 cm -3 5×10 or more 19 cm -3 The oxide semiconductor layer is suppressed as follows.

[0059] The oxide semiconductor layer 103 is formed while the substrate is heated. The temperature is set to 100°C or higher and 600°C or lower, preferably 200°C or higher and 400°C or lower. The oxide semiconductor layer is formed while being heated to reduce the impurity concentration. In addition, damage caused by sputtering is reduced.

[0060] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal conductive films. It is used in such cases.

[0061] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0062] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There is a sputtering apparatus that uses this method.

[0063] In addition, in a film formation method using a sputtering method, a target material and a sputtering gas component are mixed during film formation. Reactive sputtering is a method of forming thin films of compounds by chemically reacting them with each other, and There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0064] Before the oxide semiconductor layer 103 was formed by a sputtering method, argon gas was introduced. Reverse sputtering is performed to generate plasma, and dust adhering to the surface of the gate insulating layer 102 is removed. In reverse sputtering, a voltage is applied using an RF power source in an argon atmosphere. This method applies argon to the substrate to form plasma near the substrate and modify the surface. Instead of the atmosphere, nitrogen, helium, oxygen, etc. may be used. Shown in Figure 2(A).

[0065] Next, the oxide semiconductor layer 103 is processed into an island shape by a second photolithography process. Then, a compound semiconductor layer 113 is formed.

[0066] Note that a resist mask for forming the island-shaped oxide semiconductor layer 113 was formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask is not used. This reduces the manufacturing cost.

[0067] Next, a contact hole 128 is formed in the gate insulating layer 1 by a third photolithography process. In addition, before forming a conductive film in the next step, reverse sputtering is performed to form an oxide semiconductor 3. Remove resist residues and the like adhering to the surfaces of the layer 113 and the gate insulating layer 102. A cross-sectional view at this stage is shown in FIG.

[0068] In this embodiment, the gate insulating layer is selectively formed by the third photolithography process. A contact hole 128 reaching the gate wiring layer 111b is formed by etching. After the oxide semiconductor layer 103 is formed, A resist mask may be formed, and a contact hole reaching the gate electrode 111a may be formed. After the contact holes are formed, the resist mask is removed and another photomask is used. Then, a resist mask is formed over the oxide semiconductor layer 103, and the second oxide semiconductor layer is selectively A step of processing the oxide semiconductor layer 113 into an island shape by etching may be performed.

[0069] Next, a conductive film that will become the source electrode layer and the drain electrode layer of the thin film transistor is formed on the gate insulating film. The gate wiring layer is formed through the insulating layer 102, the oxide semiconductor layer 113, and the contact hole 128. A film is formed on 111b.

[0070] The conductive film is made of an element selected from Ti, Mo, W, Al, Cr, Cu, and Ta, or An alloy containing the above elements as main components or an alloy containing a combination of the above elements is used. The film is not limited to a single layer containing the above-mentioned elements, but may be a laminate of two or more layers. In the embodiment, a titanium film (thickness 100 nm), an aluminum film (thickness 200 nm), and a titanium A three-layer conductive film is formed using a titanium film (thickness 100 nm) and a titanium nitride film (thickness 100 nm). A tan film may also be used.

[0071] When performing heat treatment at 200°C to 600°C, the conductive film must have heat resistance to withstand this heat treatment. For example, aluminum alloys containing elements to prevent hillocks, It is preferable to use a conductive film laminated with a heat-resistant conductive film. Sputtering, vacuum deposition (electron beam deposition, etc.), and arc discharge ion plating Also, conductive nanopastes such as silver, gold, and copper are used for screening. Alternatively, the conductive layer may be formed by discharging the conductive layer using a printing method, an ink jet method, or the like, and then baking the same.

[0072] Next, a resist mask is formed by a fourth photolithography process, and the conductive film is selectively The second wiring layer (115a, 115b) including the source electrode layer and the drain electrode layer is removed by etching. 5b, 115c) are formed (see FIG. 2(C)). Also, as shown in FIG. 2(C), The second wiring layer 115c is directly connected to the gate wiring layer 111b via a contact hole 128. .

[0073] In the fourth photolithography step, the conductive layer in contact with the oxide semiconductor layer is Only the conductive film in contact with the oxide semiconductor layer is selectively removed. In order to achieve this, an alkaline etchant was used, which was ammonia hydrogen peroxide (composition weight ratio: 1:1). When a mixture of hydrogen chloride, ammonia, and water (5:2:2) is used, the metal conductive film can be selectively removed. The oxide semiconductor layer made of an In-Ga-Zn-O-based oxide semiconductor can be left. .

[0074] In addition, depending on the etching conditions, the oxide semiconductor layer The exposed areas of 113 may be etched away, in which case the source and drain electrode layers may be removed. The thickness of the oxide semiconductor layer 113 in the region sandwiched between the electrode layers (region sandwiched between 115a and 115b) The thickness of the oxide semiconductor layer 113 in the region where the source electrode layer overlaps the gate electrode 111a is 2( a ) or the drain electrode layer is thinner than the oxide semiconductor layer in the region overlapping the drain electrode layer. See C).

[0075] In addition, the second wiring layer (115a, 115b, and 115c) including the source electrode layer and the drain electrode layer A resist mask for forming 15c) may be formed by an ink-jet method. When the photomask is formed by the inkjet method, no photomask is used, so the manufacturing cost is reduced. It can be reduced.

[0076] Next, the oxide insulating layer 107 is connected to the gate insulating layer 102 and the oxide semiconductor layer 113 via a second wiring. At this stage, the oxide semiconductor layer 113 is formed on the oxide insulating layer 107. Note that the oxide insulating layer 107 and the oxide insulating layer 111a are formed so as to overlap with each other. The region of the oxide semiconductor layer 113 sandwiched between the gate insulating layer 102 is a channel formation region. It becomes an area.

[0077] The oxide insulating layer in contact with the oxide semiconductor layer is resistant to moisture, hydrogen ions, and OH - Impurities such as The insulating film is formed using an inorganic insulating material that does not contain these substances and blocks their intrusion from the outside. Typically, the film is a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, or an aluminum oxynitride film. The oxide insulating layer 107 has a thickness of at least 1 nm. A method that does not allow impurities such as water and hydrogen to be mixed into the oxide insulating layer, such as a quenching method, is used appropriately. It can be formed.

[0078] In this embodiment mode, a silicon oxide film is formed as the oxide insulating layer by a sputtering method. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower. In this embodiment, the substrate temperature is set to 100° C. The silicon oxide film is formed by sputtering in a rare gas (typically argon) atmosphere. In air, oxygen, or rare gas (typically argon) and oxygen atmosphere Note that the oxide insulating layer formed by a sputtering method is particularly dense and can be It can be used as a single layer as a protective film to suppress the phenomenon of impurity diffusion into the layer. In addition, phosphorus (P) or boron (B) doped targets are used to deposit phosphorus ( P) and boron (B) can also be added.

[0079] In addition, a silicon oxide target or a silicon target can be used as the target. In particular, a silicon target is preferred. Using a silicon target, the reaction is carried out under an oxygen and rare gas atmosphere. The silicon oxide film formed by the sputtering method has dangling bonds between silicon and oxygen atoms (datum). It contains a lot of mercury-containing bonds.

[0080] Since the oxide insulating layer 107 contains many dangling bonds, the impurities contained in the oxide semiconductor layer 113 The oxide insulating layer 107 is in contact with the oxide semiconductor layer 113 via the interface between the oxide insulating layer 107 and the oxide semiconductor layer 113. Specifically, hydrogen atoms and H2 Compounds containing hydrogen atoms such as O and compounds containing carbon atoms diffuse into the oxide insulating layer 107. It becomes easier to move.

[0081] Furthermore, hydrogen moves to the interface between the oxide semiconductor layer 113 and the oxide insulating layer 107. Hydrogen concentration is 1×10 19 cm -3 5×10 or more 22 cm -3 Preferably less than 5 × 10 1 9 cm -3 More than 1×10 22 cm -3 When the hydrogen concentration in the oxide semiconductor layer is less than 100%, the hydrogen concentration in the oxide semiconductor layer is reduced. A semiconductor element using an oxide semiconductor layer with a reduced hydrogen concentration has excellent Demonstrates reliability.

[0082] In addition, the oxide insulating layer 107 at a portion 30 nm away from the interface with the oxide semiconductor layer 113 The hydrogen concentration is low, and the difference is 5 to 100 times (preferably 5 to 10 times). As a result, hydrogen is transferred from the oxide semiconductor layer 113 to the oxide insulating layer 107 through the interface. This promotes activity.

[0083] In this embodiment, a columnar polycrystalline B-doped silicon target (resistance value 0 The distance between the substrate and the target (TS distance) was 89 mm, and the pressure was 1.01 Ωcm. Pulse was measured under an oxygen atmosphere (oxygen flow rate 100%) with a pressure of 0.4 Pa and a direct current (DC) power of 6 kW. The film is formed by DC sputtering. The film thickness is 300 nm.

[0084] Note that the oxide insulating layer 107 is in contact with a region that becomes a channel formation region of the oxide semiconductor layer 113. It functions as a channel protection layer.

[0085] Next, a protective insulating layer 108 is formed over the oxide insulating layer 107 (see FIG. 2D). The protective insulating layer 108 may be a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or the like. In this embodiment, the protective insulating layer 108 of a silicon nitride film is formed by RF sputtering. Form.

[0086] Through the above steps, the thin film transistor 151 can be manufactured.

[0087] Note that in this embodiment, the gate insulating layer 102 and the oxide semiconductor layer 103 are successively formed. The formed gate insulating layer 102 is exposed to the air, and then an oxide semiconductor layer 103 is formed. In that case, the gate insulating layer 102 may be oxidized in an inert gas atmosphere (nitrogen, helium, Neon, argon, etc.) and heat treatment (400°C or higher but below the distortion point of the substrate). By this heat treatment, the gate insulating layer 102 is preferably formed before the formation of the oxide semiconductor layer. Impurities such as hydrogen and water contained in the fuel can be removed.

[0088] The silicon oxide layer, the silicon nitride layer, the silicon oxynitride layer, or the silicon nitride oxide layer may be formed by sputtering. In addition to the plasma CVD method, the film may be formed by using a deposition gas such as SiH 4 , A silicon oxynitride layer may be formed by plasma CVD using oxygen and nitrogen. The thickness of the insulating layer 102 is set to 100 nm or more and 500 nm or less. In the case of a laminated layer, for example, A first gate insulating layer 102a having a thickness of 50 nm or more and 200 nm or less, and a first gate insulating layer 1 A second gate insulating layer 102b having a thickness of 5 nm to 300 nm is laminated on the gate insulating layer 102a. In addition, when the film formed by the plasma CVD method or the like contains impurities such as hydrogen and water, It is preferable that the oxide semiconductor layer be formed after the heat treatment to remove impurities.

[0089] In this embodiment, the gate insulating layer is selectively formed by the third photolithography process. A contact hole 128 reaching the gate wiring layer 111b is formed by etching. For example, after forming the gate insulating layer 102, a laser is formed on the gate insulating layer. A resist mask may be formed, and a contact hole reaching the gate wiring layer 111b may be formed. stomach.

[0090] In addition, after the oxide semiconductor layer is formed, the oxide semiconductor layer may be dehydrated or dehydrogenated. good.

[0091] The temperature of the first heat treatment for dehydration or dehydrogenation is 400° C. or higher and less than 750° C. The heat treatment time is 1 hour or less, preferably 425°C or more. If the heat treatment time is 425°C or more, the heat treatment time is 1 hour or more. However, if the temperature is less than 425℃, the heat treatment time should be longer than 1 hour. In the first heat treatment, the substrate is introduced into an electric furnace, which is a type of heat treatment device, and an oxide semiconductor After the layer was heat-treated in a nitrogen atmosphere, it was cooled to 100° C. This prevents water and hydrogen from re-mixing into the conductor layer, and obtains an oxide semiconductor layer with a low hydrogen concentration. A temperature T that is lower than the temperature at which the layer is dehydrated or dehydrogenated, but is not high enough to prevent water from re-entering the layer. The same furnace was used until the temperature dropped by 100°C or more below the heating temperature T under nitrogen atmosphere. Cool slowly. Also, the atmosphere is not limited to nitrogen, but may be helium, neon, argon, etc. Dehydration or dehydrogenation is carried out.

[0092] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Using RTA (Rapid Thermal Anneal) equipment such as LRTA devices can be used with halogen lamps, metal halide lamps, xenon Arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp. The device uses thermal radiation from the light emitted from the lamp and heats the gas with the light emitted from the lamp. The object is heated by thermal conduction from the heated gas. Inert gases such as argon or nitrogen that do not react with the workpiece during heat treatment Active gas is used. In addition, LRTA and GRTA devices use not only lamps but also resistive emitters. Equipped with a device that heats the workpiece by thermal conduction or thermal radiation from a heating element such as a heater. It's fine.

[0093] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the concentration of impurities is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to keep the concentration of the ion exchange resin at 0.1 ppm or less.

[0094] Note that depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, In some cases, the film crystallizes to become a microcrystalline or polycrystalline film. For example, the crystallization rate is 90% or more. In some cases, the oxide semiconductor layer is microcrystalline, or 80% or more of the oxide semiconductor layer is microcrystalline. Depending on the conditions or the material of the oxide semiconductor layer, an amorphous oxide semiconductor layer containing no crystalline components may be obtained. It may also be a conductive layer.

[0095] After the first heat treatment, the oxide semiconductor layer becomes oxygen-deficient and has low resistance. The oxide semiconductor layer after the treatment has a higher carrier concentration than the oxide semiconductor layer immediately after the deposition, which is preferable. Or 1×10 18 cm -3 The oxide semiconductor layer has a carrier concentration of at least 100 nm.

[0096] The conditions of the first heat treatment and the materials of the gate electrode 111a and the gate wiring layer 111b are In this case, the oxide semiconductor layer may be crystallized to become a microcrystalline film or a polycrystalline film. For example, the gate electrode 111a and the gate wiring layer 111b are made of indium oxide tin oxide. When a gold film is used, the oxide semiconductor layer is crystallized by the first heat treatment at 450° C. for 1 hour, and the gate The electrode 111a and the gate wiring layer 111b are made of indium oxide containing silicon oxide. When a zinc alloy film is used, crystallization does not occur.

[0097] In addition, the first heat treatment of the oxide semiconductor layer 113 is performed after the oxide semiconductor layer 113 is processed into an island-shaped oxide semiconductor layer. The heat treatment can also be performed on the oxide semiconductor layer 103. In that case, the heat treatment can be performed after the first heat treatment. The substrate is then removed from the apparatus and a photolithography process is performed.

[0098] After the oxide insulating layer 107 is formed, a second heat treatment (preferably at a temperature higher than or equal to 200° C. and higher than or equal to 400° C.) is performed. (for example, 250°C to 350°C) in an inert gas atmosphere or nitrogen gas atmosphere It may also be done below.

[0099] For example, the second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. In this case, part of the oxide semiconductor layer 113 is heated while being in contact with the oxide insulating layer 107. In addition, another part of the oxide semiconductor layer 113 is in contact with the second wiring layer (115a and 115b). The material is heated in a

[0100] The oxide semiconductor layer 113 (whose resistance is reduced by the first heat treatment) is in contact with the oxide insulating layer 107. When the second heat treatment is performed in this state, the oxide insulating layer 10 is removed from the oxide semiconductor layer 113. As a result, the oxide semiconductor layer 113 is oxidized. The resistance increases from the region in contact with the insulating layer 107 toward the depth direction of the oxide semiconductor layer 113. (I-type).

[0101] Specifically, the oxide semiconductor layer 113 is formed on the oxide insulating layer 107. An oxide semiconductor layer 123 having a high resistance (i-type) region is formed from the first to second layers 102. can be.

[0102] The thin film transistor 151 has a high resistance (I-type) oxide semiconductor layer in the channel formation region. is formed, the threshold voltage exhibits a positive value, and the device exhibits enhancement-type behavior.

[0103] In addition, by performing the second heat treatment, the second wiring layer (115a and In the vicinity of a region of the oxide semiconductor layer 113 in contact with the metal conductive film 115b), This makes the oxide semiconductor layer more N-type.

[0104] The timing of the second heat treatment is a step after the step of forming the oxide insulating layer 107. There is no particular limitation as long as it is within a certain range.

[0105] The oxide semiconductor layer in which the impurity concentration is suppressed, which is manufactured by the method exemplified in this embodiment, By applying this technique, it is possible to provide highly reliable semiconductor devices. In addition, a thin film transistor using an oxide semiconductor having a high operating speed can be provided. A thin-film transistor using an oxide semiconductor is relatively simple to manufacture and has sufficient reliability. We can provide you with a gyroscope.

[0106] In addition, the present embodiment allows the threshold voltage to be controlled, the operating speed to be high, and the manufacturing process to be relatively simple. A method for manufacturing a thin film transistor using an oxide semiconductor, which is simple and has sufficient reliability can be provided.

[0107] In addition, the threshold voltage shunt during the BT stress test (bias-temperature stress test) This makes it possible to reduce the amount of leakage and obtain a highly reliable thin film transistor. In this specification, the BT stress test (bias-temperature stress test) is a test for testing thin-film transistors. This refers to a test in which a high gate voltage is applied to a transistor in a high-temperature atmosphere.

[0108] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification. .

[0109] (Embodiment 2) In this embodiment, a continuous deposition apparatus used for manufacturing a semiconductor element according to one embodiment of the present invention and a A film forming method using the apparatus will be described. In this embodiment, a process for performing continuous film formation is performed. The other steps may be performed according to the same procedure as in the first embodiment to manufacture a thin film transistor.

[0110] The continuous film forming apparatus 1000 used in this embodiment is shown in FIG. The loader chamber 1110 and the unloader chamber 1120 are used to store substrates before processing. Cassette 1111 and cassette 1121 for storing processed substrates are installed. Between the loader chamber 1110 and the unloader chamber 1120, there is a first transfer chamber 1100. A transport mechanism 1101 for transporting the plate is provided.

[0111] The continuous film forming apparatus 1000 also includes a second transfer chamber 1200. A transfer mechanism 1201 is installed at the center of the wafer 1200, and four processing chambers (the first A processing chamber 1210, a second processing chamber 1220, a third processing chamber 1230, and a fourth processing chamber 12 40). The first processing chamber 1210 is connected to the One end is connected to the first transfer chamber 1100 , and the other end is connected to the second transfer chamber 1200 .

[0112] The pressures in the first transfer chamber 1100, the loader chamber 1110, and the unloader chamber 1120 are The pressure is atmospheric pressure. The chamber 1220, the third processing chamber 1230, and the fourth processing chamber 1240 are each equipped with an exhaust means. 1205, exhaust means 1215, exhaust means 1225, exhaust means 1235, and exhaust means 12 These exhaust means are installed in the processing chambers. An appropriate exhaust device can be selected depending on the purpose, but an exhaust means equipped with a cryopump is particularly preferable. It is also preferable to use a turbo pump equipped with a cold trap.

[0113] In the case of forming an oxide semiconductor layer, not only a treatment chamber for forming the oxide semiconductor layer but also an oxygen Impurities may be mixed in the film in contact with the oxide semiconductor layer and in the process before and after the formation of the oxide semiconductor layer. In order to prevent this, it is preferable to select an exhaust means such as a cryopump.

[0114] The first processing chamber 1210 is provided with a substrate heating mechanism 1211. In addition to a hot plate, an RTA or the like can be used. 0 is the time when the substrate is transferred from the first transfer chamber 1100 under atmospheric pressure to the second transfer chamber 1200 under reduced pressure. By providing a delivery room, the second delivery The chamber 1200 can be protected from atmospheric contamination.

[0115] The second treatment chamber 1220, the third treatment chamber 1230, and the fourth treatment chamber 1240 each include The sputtering device and the substrate heating mechanism are provided. In addition to a top plate, RTA, etc. can be used.

[0116] An example of the operation of the continuous film forming apparatus 1000 will be described. In this example, a gate electrode is formed. A method for successively forming a gate insulating film and an oxide semiconductor layer on a substrate will be described. The continuous film formation method is suitable as an example of a manufacturing process of the thin film transistor described in Embodiment 1. It can be used.

[0117] First, a transport mechanism 1101 transfers the substrate 100 on which the gate electrode is formed to a cassette 1111. Then, the gate valve is closed and the first processing chamber 1210 is transferred to the first processing chamber 1210 under atmospheric pressure. The processing chamber 1210 is evacuated. The substrate 100 is preheated in the first processing chamber 1210. Impurities adsorbed on the plate are desorbed and exhausted. Examples of impurities include hydrogen atoms and H 2 O Examples include compounds containing hydrogen atoms such as those mentioned above, and compounds containing carbon atoms. The preheating temperature is from room temperature to 600°C, preferably from 100°C to 400°C. Below.

[0118] Next, the substrate 100 is transferred to the second processing chamber 1220 to form a silicon nitride film, and then the substrate The substrate 100 is transferred to a third processing chamber 1230 via a second transfer chamber 1200 to form a silicon oxide film. The second processing chamber 1220 and the third processing chamber 1230 are equipped with a cryopump or the like. The impurity concentration in the processing chamber is reduced by evacuating the processing chamber. The silicon nitride film and silicon oxide film stacked in this way function as a gate insulating film with a suppressed impurity concentration. It works.

[0119] The substrate 100 on which the silicon nitride film and the silicon oxide film are successively formed on the gate electrode is placed in the fourth processing chamber 12. The fourth treatment chamber 1240 is equipped with a target for the oxide semiconductor layer. The pump has a cryopump as an exhaust means.

[0120] Next, an oxide semiconductor layer is formed on the silicon oxide film of the substrate 100. The impurity concentration of the oxide semiconductor layer formed in the treatment chamber is suppressed. The hydrogen concentration in the semiconductor layer can be reduced. In this embodiment, the substrate temperature is set to 100° C. or higher and 600° C. or lower, preferably The temperature is set to 200°C or higher and 400°C or lower. By forming the film while heating the substrate, the formed acid The concentration of impurities contained in the compound semiconductor layer can be reduced.

[0121] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. The high filling rate of the metal oxide target allows the oxide film to be deposited with a high degree of accuracy. The compound semiconductor layer becomes a dense film.

[0122] In addition, oxygen gas, nitrogen, helium, neon, or arsenic gas introduced when forming an oxide semiconductor layer may be used. It is preferable that the rare gas such as argon does not contain impurities such as water and hydrogen. 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., non- It is desirable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0123] As described above, continuous film formation is performed in a processing chamber in which impurities are reduced by evacuating with a cryopump. This makes it possible to suppress the impurity concentration in each layer constituting the semiconductor element.

[0124] By using a continuous deposition device that uses an exhaust means equipped with a cryopump, the Impurities adsorbed on the inner walls of the processing chamber are released and adhere to the substrate during film formation and the film. This reduces the risk of impurities being mixed in.

[0125] The oxide semiconductor layer formed using the successive deposition apparatus described in this embodiment is unlikely to be contaminated with impurities. Therefore, a highly reliable semiconductor element can be provided by using the oxide semiconductor layer. Specifically, we have proposed a thin film transistor using an oxide semiconductor with a controlled threshold voltage. In addition, the operating speed is fast, the manufacturing process is relatively simple, and the device has sufficient reliability. In this way, a thin film transistor using an oxide semiconductor can be provided.

[0126] In addition, by using the continuous film formation apparatus exemplified in this embodiment, the threshold voltage is controlled. , an oxide semiconductor having a high operating speed, a relatively simple manufacturing process, and sufficient reliability. It is possible to provide a method for manufacturing a thin film transistor using the layer.

[0127] In addition, the shift in threshold voltage during BT stress testing (bias-temperature stress testing) Therefore, the amount of the metal oxide can be reduced, and a highly reliable thin film transistor can be obtained.

[0128] In this embodiment, three or more processing chambers are connected via a transfer chamber. However, the present invention is not limited to this. For example, the processing chambers may have an entrance and an exit for the substrate, and the processing chambers may be connected to each other. A so-called in-line type configuration may be used.

[0129] This embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0130] (Embodiment 3) In this embodiment, a deposition apparatus for an oxide semiconductor layer and a method for depositing an oxide semiconductor layer using the deposition apparatus are described. In this embodiment, a method for forming an oxide semiconductor layer will be described. Other steps may be carried out in accordance with the first embodiment to manufacture a thin film transistor.

[0131] The film forming apparatus 2000 used in this embodiment is shown in FIG. 2110 and an unloader chamber 2120, each of which is a cassette for storing unprocessed substrates. The loader room is equipped with a cassette 2111 for storing processed substrates and a cassette 2121 for storing processed substrates. Between the 2110 and the unloader chamber 2120, there is a first transfer chamber 2100, which transfers substrates. A transport mechanism 2101 for transporting the liquid crystal is provided.

[0132] The film forming apparatus 2000 also includes a second transfer chamber 2200. A transfer mechanism 2201 is installed in the substrate 2201, and four processing chambers (first processing chamber, chamber 2210, a second process chamber 2220, a third process chamber 2230, and a fourth process chamber 2240. The first processing chamber 2210 is connected to the first The first transfer chamber 2100 is connected to the first transfer chamber 2100 , and the other is connected to the second transfer chamber 2200 .

[0133] The pressures in the first transfer chamber 2100, the loader chamber 2110, and the unloader chamber 2120 are The pressure is atmospheric pressure. The chamber 2220, the third processing chamber 2230, and the fourth processing chamber 2240 are each provided with an exhaust means. 2205, exhaust means 2215, exhaust means 2225, exhaust means 2235, and exhaust means 22 These exhaust means are installed in the processing chambers. An appropriate exhaust device can be selected depending on the purpose, but an exhaust means equipped with a cryopump is particularly preferable. It is also preferable to use a turbo pump equipped with a cold trap.

[0134] Not only the treatment chamber for depositing the oxide semiconductor layer, but also the processes before and after the deposition of the oxide semiconductor layer It is preferable to select an exhaust means such as a cryopump to prevent impurities from being mixed in. .

[0135] The first processing chamber 2210 is a second transfer chamber 2100 in a reduced pressure state, which is in a state where the first transfer chamber 2100 is in an atmospheric pressure state. The chamber 2200 serves as a transfer chamber for transporting the substrate. This makes it possible to protect the second transfer chamber 2200 from contamination by the atmosphere.

[0136] The second processing chamber 2220 is provided with a substrate heating mechanism 2221. In addition to a hot plate, an RTA or the like can be used. The sputtering device and the substrate heating mechanism are installed in the chamber 0. In addition to a hot plate, an RTA or the like can be used. A cooling mechanism 2241 is provided.

[0137] A method for forming an oxide semiconductor layer using the oxide semiconductor layer forming apparatus 2000 will be described. Here, a gate electrode and a substrate on which a gate insulating film has been formed in advance are A method for forming an oxide semiconductor layer will be described. The process can be applied as an example of a manufacturing process of a thin film transistor described in 1.

[0138] First, the transfer mechanism 2101 transfers the wafer W from the cassette 2111 to the first processing chamber 221 under atmospheric pressure. Next, the substrate 100 having the gate insulating film formed on the gate electrode is transferred to the substrate 100. The valve is closed and the first processing chamber 2210 is evacuated. The pressure in the first processing chamber 2210 is equal to that in the second transfer chamber. When the pressure in the second transfer chamber 2200 becomes approximately equal to that in the first transfer chamber 2200, the gate valve is opened to The substrate 100 is transported from the first processing chamber 2210 to the second processing chamber 2220 via the transfer tube 2212 .

[0139] Next, the substrate 100 is preheated by the substrate heating mechanism 2221 of the second processing chamber 2220. The impurities adsorbed on the surface are desorbed and exhausted. The impurities are, for example, hydrogen atoms and H 2 O Examples of compounds that contain hydrogen atoms include those that contain carbon atoms. The preheating temperature is from room temperature to 600° C., preferably from 100° C. to 400° C. The exhaust means provided in the second processing chamber 2220 is preferably a cryopump. The impurities adsorbed on the plate 100 are desorbed by the preheating and diffuse into the second processing chamber 2220. Therefore, it is necessary to use a cryopump to evacuate the impurities from the second process chamber 2220. do.

[0140] Next, the substrate 100 is transferred to a third treatment chamber 2230, where an oxide semiconductor layer is formed. The processing chamber 2230 is evacuated by a cryopump or the like, and the impurity concentration in the processing chamber is reduced. The oxide semiconductor layer formed in the treatment chamber with reduced impurities has a reduced impurity concentration. Specifically, the hydrogen concentration in the oxide semiconductor layer can be reduced. The semiconductor layer is formed while heating the substrate. In this embodiment, the substrate temperature is set to 100° C. The temperature is set to 600° C. or less, preferably 200° C. or more and 400° C. or less. Film formation is performed while heating the substrate. By this, the impurity concentration in the formed oxide semiconductor layer can be reduced. .

[0141] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. The high filling rate of the metal oxide target allows the oxide film to be deposited with a high degree of accuracy. The compound semiconductor layer becomes a dense film.

[0142] Next, the substrate 100 is transferred to the fourth treatment chamber 2240. Substrate during formation of an oxide semiconductor layer From temperature T, the temperature is cooled to a low enough level so that impurities such as water do not enter again. The substrate is gradually cooled until the temperature is 100° C. or more lower than the substrate temperature T during the formation of the oxide semiconductor layer. Helium, neon, argon, or the like may be introduced into the fourth treatment chamber 2240. Nitrogen or rare gases such as helium, neon, and argon used for cooling contain water and hydrogen. Alternatively, nitrogen or a rare gas such as helium, neon, or argon may be used. The purity of is 6N (99.9999%) or more, preferably 7N (99.99999%) or more. (i.e., the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). stomach.

[0143] As described above, the film is formed in a processing chamber in which impurities are reduced by evacuating with a cryopump. This prevents water and hydrogen from re-entering the oxide semiconductor layer without exposing it to the air, and reduces the concentration of impurities. In this way, an oxide semiconductor layer in which the degree of oxidation is suppressed can be obtained.

[0144] By using a deposition device that uses an exhaust means equipped with a cryopump, impurities in the processing chamber can be Impurities adsorbed on the inner walls of the processing chamber are released and adsorbed on the substrate during film formation and in the film. This reduces the risk of impurities being mixed in. In addition, it also prevents impurities from being released from the atmosphere during preheating. By exhausting the gas, the phenomenon of re-adsorption onto the substrate can be prevented.

[0145] In the oxide semiconductor layer formed using the deposition apparatus described in this embodiment, inclusion of impurities is suppressed. Therefore, a highly reliable semiconductor element can be provided by using the oxide semiconductor layer. Specifically, a thin film transistor using an oxide semiconductor with a controlled threshold voltage can be provided. In addition, the operation speed is fast, the manufacturing process is relatively simple, and the acid is sufficiently reliable. It is possible to provide a thin film transistor using a nitride semiconductor.

[0146] In addition, by using the deposition apparatus exemplified in this embodiment, the threshold voltage is controlled, and the operation The present invention provides a method for forming an oxide semiconductor layer, which has a high operating speed, a relatively simple manufacturing process, and sufficient reliability. It is also possible to provide a method for manufacturing a thin film transistor using the same.

[0147] In addition, the threshold voltage shunt during the BT stress test (bias-temperature stress test) The amount of leakage can be reduced, and a highly reliable thin film transistor can be obtained.

[0148] In this embodiment, three or more processing chambers are connected via a transfer chamber. However, the present invention is not limited to this. For example, the processing chambers may have an entrance and an exit for the substrate, and the processing chambers may be connected to each other. A so-called in-line type configuration may be used.

[0149] This embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0150] (Embodiment 4) In this embodiment, a method for successively forming an oxide insulating layer and a protective film over an oxide semiconductor layer is described. An apparatus and a method for successively forming an oxide insulating layer and a protective film using the apparatus will be described. Note that in this embodiment, a process for forming an oxide insulating layer and a protective film will be described. A thin film transistor may be manufactured according to the method of the first embodiment.

[0151] The continuous film forming apparatus 3000 used in this embodiment is shown in FIG. The loader chamber 3110 and the unloader chamber 3120 are used to store substrates before processing. A cassette 3111 and a cassette 3121 for storing processed substrates are provided.

[0152] The continuous film forming apparatus 3000 also includes a first transfer chamber 3100. A transfer mechanism 3101 is installed in the center of the wafer 3100, and five processing chambers (the first A processing chamber 3210, a second processing chamber 3220, a third processing chamber 3230, and a fourth processing chamber 3240. , and the fifth process chamber 3250).

[0153] A loader chamber 3110, an unloader chamber 3120, a first transfer chamber 3100, a first processing chamber 3 210, a second treatment chamber 3220, a third treatment chamber 3230, a fourth treatment chamber 3240, and The treatment chamber 3250 of the fifth embodiment is provided with an exhaust means 3115, an exhaust means 3125, and an exhaust means 31 05, exhaust means 3215, exhaust means 3225, exhaust means 3235, exhaust means 3245, and and exhaust means 3255 are provided to realize a reduced pressure state. The exhaust system should be selected according to the purpose of use of each processing chamber. It is preferable that the exhaust means is equipped with a cold trap. This is also fine.

[0154] In order to prevent impurities from being mixed in during the processes before and after the formation of the oxide semiconductor layer, a cryopump or other device is used. It is preferable to select an exhaust means of the above type.

[0155] The loader chamber 3110 and the unloader chamber 3120 are in a reduced pressure state from the atmospheric pressure state. The first transfer chamber 3100 serves as a transfer chamber for transferring the substrate. By providing this, the first transfer chamber 3100 can be protected from contamination by the atmosphere.

[0156] The first processing chamber 3210 and the fourth processing chamber 3240 each include a substrate heating mechanism 3211. and a substrate heating mechanism 3241. The substrate heating mechanism is a hot plate. In addition, RTA or the like can be used. The sputtering device and the substrate heating mechanism are installed in the chamber 3230. In addition to a hot plate, an RTA or the like can be used. A cooling mechanism 3251 is provided in the cooling unit 3251 .

[0157] An example of the operation of the continuous film forming apparatus 3000 will be described. An insulating film is formed, an oxide semiconductor layer is formed on a gate electrode via a gate insulating film, and The gate electrode and the source electrode are overlapped with each other. A method for successively forming an oxide insulating layer and a protective film in contact with the substrate layer will be described. The method for successively forming films is an example of a manufacturing process of a thin film transistor described in Embodiment 1. It can be applied as follows.

[0158] First, the loader chamber 3110 is evacuated, and the pressure in the loader chamber 3110 is equal to that in the first transfer chamber 31. When the pressure in the first transfer chamber 3100 becomes approximately equal to that in the first transfer chamber 3100, the gate valve is opened and the The substrate 100 is transported from the loader chamber 3110 to the first processing chamber 3210 .

[0159] Next, the substrate 100 is preheated by the substrate heating mechanism 3211 in the first processing chamber 3210. The impurities adsorbed on the surface are desorbed and exhausted. The impurities are, for example, hydrogen atoms and H 2 O Examples of compounds that contain hydrogen atoms include those that contain carbon atoms. The preheating temperature is from room temperature to 600° C., preferably from 100° C. to 400° C. The exhaust means provided in the first processing chamber 3210 is preferably a cryopump. The impurities adsorbed on the plate 100 are desorbed by the preheating and diffuse into the first processing chamber 3210. Therefore, it is necessary to use a cryopump to evacuate the impurities from the first process chamber 3210. do.

[0160] Next, the substrate 100 is transferred to a second treatment chamber 3220, and an oxide insulating layer is formed. The processing chamber 3220 is evacuated by a cryopump or the like, and the impurity concentration in the processing chamber is reduced. The oxide insulating layer formed in the treatment chamber with reduced impurities has a suppressed impurity concentration. Specifically, the hydrogen concentration in the oxide insulating layer can be reduced. The insulating layer is formed while heating the substrate. In this embodiment, the substrate temperature is set to 100° C. 600°C or less, preferably 200°C or more and 400°C or less, more preferably 250°C or more and 300°C or less The oxide insulating layer is formed by heating the substrate. The concentration of dangling bonds contained therein can be increased.

[0161] When silicon oxide is deposited as an oxide insulating layer using a sputtering apparatus, A silicon oxide target or a silicon target can be used, and in particular a silicon target It is preferable to use a silicon target and perform sputtering in an oxygen and rare gas atmosphere. The silicon oxide film formed by this method has dangling bonds of silicon or oxygen atoms. It contains a lot of.

[0162] By providing an oxide insulating layer having many dangling bonds in contact with an oxide semiconductor layer, Impurities contained in the conductor layer are transported to the oxide semiconductor layer via the interface between the oxide semiconductor layer and the oxide insulating layer. Specifically, hydrogen atoms contained in the oxide semiconductor layer and H 2 O Compounds containing hydrogen atoms such as ZnO are more likely to diffuse and move into the oxide insulating layer. The impurity concentration in the semiconductor layer is reduced, and an increase in the carrier concentration due to the impurities is suppressed.

[0163] Next, the substrate 100 is transferred to a third processing chamber 3230, and a protective insulating layer is formed on the oxide insulating layer. The protective insulating layer only needs to have the function of preventing the diffusion of impurity elements. A laminate of one or more films selected from a silicon nitride film, a silicon oxynitride film, and a silicon oxynitride film. The third processing chamber 3230 can be formed by a cryopump or the like. It is preferable that the processing chamber is evacuated so that the impurity concentration therein is reduced.

[0164] The protective insulating layer is formed by diffusing impurities from the outside to the inside of the semiconductor element, causing the impurities to invade the oxide semiconductor layer. Impurities such as hydrogen atoms and H 2 Contains hydrogen atoms such as O Examples include compounds containing aryl groups and compounds containing carbon atoms.

[0165] When a silicon nitride film is formed as a protective insulating layer using a sputtering device, for example, silicon A mixture of nitrogen and argon gas is introduced into the third treatment chamber 3230 using the target, and a reaction is performed. The substrate temperature is set to 200° C. or higher and 400° C. or lower, for example, 20 The film is formed at a temperature between 0 and 350°C. By forming the film while heating, hydrogen atoms are included. Impurities contained in the silicon oxide film can be diffused and captured in an oxide insulating layer typified by silicon oxide. In particular, a temperature range of 200° C. to 350° C. inclusive, in which the diffusion of hydrogen atoms is promoted, is preferable.

[0166] Next, the substrate 100 is transferred to the fourth treatment chamber 3240, where a heat treatment is performed after the film formation. In the heat treatment, the substrate temperature is set to 100°C or higher and 600°C or lower. Impurities contained in the oxide semiconductor layer are removed by oxidation through the interface between the oxide semiconductor layer and the oxide insulating layer. Specifically, hydrogen atoms contained in the oxide semiconductor layer and H 2 Compounds containing hydrogen atoms such as O are more likely to diffuse and move into the oxide insulating layer. The impurity concentration of the conductor layer is reduced, and an increase in the carrier concentration resulting from the impurities is suppressed.

[0167] Next, the substrate 100 is transferred to the fifth treatment chamber 3250. The substrate temperature T Then, the film is cooled to a sufficiently low temperature so that impurities such as water do not enter again. The substrate is cooled slowly until it is 100°C lower than the substrate temperature T of the heat treatment. Alternatively, argon or the like may be introduced into the fifth treatment chamber 3250. Nitrogen or rare gases such as helium, neon, and argon must not contain water or hydrogen. Alternatively, the purity of nitrogen or rare gas such as helium, neon, or argon is preferably 6 or less. N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e. impure It is preferable to keep the concentration of the substance at 1 ppm or less, preferably 0.1 ppm or less.

[0168] By using a deposition device that uses an exhaust means equipped with a cryopump, impurities in the processing chamber can be Impurities adsorbed on the inner walls of the processing chamber are released and adsorbed on the substrate during film formation and in the film. This reduces the risk of impurities being mixed in. In addition, it also prevents impurities from being released from the atmosphere during preheating. By exhausting the gas, the phenomenon of re-adsorption onto the substrate can be prevented.

[0169] The oxide insulating layer formed using the film formation apparatus described in this embodiment contains many dangling bonds. By providing an oxide insulating layer in contact with an oxide semiconductor layer using the deposition apparatus, Impurities contained in the semiconductor layer, specifically hydrogen atoms and H 2 Compounds containing hydrogen atoms such as O Diffuses and moves from the oxide semiconductor layer to the oxide insulating layer, and as a result, is included in the oxide semiconductor layer. The impurity concentration can be reduced. The oxide semiconductor layer with the reduced impurity concentration can be formed by removing impurities derived from the impurities. The increase in carrier concentration is suppressed.

[0170] For example, an oxide insulating layer formed using the film formation apparatus described in this embodiment is provided in contact with the In a thin film transistor in which a gate electrode is connected to an oxide semiconductor layer, In the state where no pressure is applied, that is, in the so-called off state, the carrier concentration in the channel formation region is reduced. Therefore, the off-state current is small and excellent characteristics are exhibited.

[0171] In addition, the threshold voltage shunt during the BT stress test (bias-temperature stress test) The amount of leakage can be reduced, and a highly reliable thin film transistor can be obtained.

[0172] In this embodiment, a configuration in which three or more processing chambers are connected via a transfer chamber is illustrated. For example, the processing chambers may have an entrance and an exit for the substrate, and the processing chambers may be connected to each other. A so-called in-line type configuration may also be used.

[0173] This embodiment mode can be appropriately combined with other embodiment modes shown in this specification. . EXAMPLES

[0174] In this example, a thickness direction of a stacked structure in which an oxide semiconductor layer is sandwiched between insulating layers is shown in FIG. The results of the hydrogen concentration distribution analysis in the direction of the sample are explained below. Figure 6(A) shows the cross section of the sample used in this analysis. This sample was prepared by the method described in the first embodiment on a glass substrate 4. An oxide / nitride insulating layer 401 is formed on the insulating layer 401 by plasma CVD. An In-Ga-Zn-O-based oxide semiconductor layer 402 is formed, and a spatula is formed on the oxide semiconductor layer 402. A silicon oxide insulating layer 403 was formed by a deposition method.

[0175] The hydrogen concentration distribution of this sample was analyzed using secondary ion mass spectrometry (SIMS). The film thickness of the sample was measured by Ion Mass Spectrometry. The horizontal axis indicates the depth from the sample surface. The position at the left end, which is at a depth of 0 nm, corresponds to the sample surface (silicon oxide insulating layer 403). The analysis direction 404 shown in A) indicates the analysis direction of the SIMS analysis. The measurement was performed in the direction from the edge layer 403 to the glass substrate 400. The experiment was conducted from the left edge to the right edge.

[0176] The vertical axis of Fig. 6(B) shows the hydrogen concentration in the sample at a specific depth and the silicon ion intensity on a logarithmic scale. In FIG. 6B, a hydrogen concentration profile 422 is a profile of the hydrogen concentration in the sample. The silicon ion intensity profile 421 is a hydrogen concentration profile The silicon ion intensity profile obtained at the same time as the 422 measurement. From the change in intensity of the hole 421, the range from 0 nm to 44 nm in depth in FIG. 6(B) is silicon oxide insulating. The region of the oxide semiconductor layer 402 corresponds to the layer 403, and the region of the oxide semiconductor layer 402 corresponds to the region of the oxide semiconductor layer 403 having a depth of 44 nm to 73 nm. It can be seen that the range from a depth of 73 nm onwards corresponds to the oxynitride insulating layer 401 .

[0177] The hydrogen concentration in the oxide semiconductor layer 402 was measured using a standard sample manufactured using the same oxide semiconductor as the sample. The hydrogen concentration in the silicon oxide insulating layer 403 and the oxynitride insulating layer 401 was measured using a sample. is quantified using a standard sample made of silicon oxide.

[0178] From the hydrogen concentration profile 422, the hydrogen concentration in the silicon oxide insulating layer 403 is about 7×10 20 atoms / cm 3 In addition, the hydrogen concentration in the oxide semiconductor layer 402 is about 1×10 19 atoms / cm 3 It can be seen that the above is the case. In addition, the oxynitride insulating layer 401 The hydrogen concentration in the 21 atoms / cm 3 Furthermore, it can be seen that silicon oxide In the vicinity of the interface 410 between the insulating layer 403 and the oxide semiconductor layer 402, 21 at oms / cm 3 There is a hydrogen concentration peak of 1000 nm.

[0179] The hydrogen concentration ratio 411 of the hydrogen peak to the hydrogen concentration in the oxide semiconductor layer 402 is about 100 times. The hydrogen concentration peak and the hydrogen concentration ratio 412 in the silicon oxide insulating layer 403 are approximately 5 to 10 times. As shown in the following Example 2, the silicon oxide insulating layer containing defects Since the binding energy of hydrogen atoms is larger than that of the oxide semiconductor layer, the oxide semiconductor layer 40 Hydrogen in 2 moves toward the silicon oxide insulating layer 403 and is concentrated near the interface 410. The amount of hydrogen contained in the oxide semiconductor layer 402 is suppressed during the deposition process. The concentration of hydrogen concentrated near the interface 410 and the silicon oxide insulating layer 403 has an upper limit. It is considered that there may be a difference in hydrogen concentration of at least 5 to 10 times.

[0180] This is because hydrogen in the oxide semiconductor layer 402 first gathers near the interface 410 and then dissolves in the silicon oxide. This is believed to be due to diffusion into the insulating layer 403. Therefore, the silicon oxide insulating layer 403 By lowering the hydrogen concentration that is already present, the hydrogen concentration peak near the interface 410 is reduced. In addition, the hydrogen concentration in the oxide semiconductor layer 402 can be further reduced. It becomes. EXAMPLES

[0181] The amorphous IGZO TFT characteristics are gate-length dependent. When the thickness is shorter than about 1 μm, Vth tends to shift to the negative side. The material is restored by annealing at 50°C for 10 hours. The hydrogen in IGZO is converted to SiO 2 The process of water moving inwards is considered. The atomic structure is amorphous IGZO and amorphous SiO x Which of the following is more likely to exist? I calculated it.

[0182] The binding energy E_bind of hydrogen atoms is used to evaluate the stability of hydrogen atoms in the environment. was defined as follows and evaluated: E_bind = {E(original structure) + E(H)} - E(H The larger the binding energy E_bind, the easier it is for a hydrogen atom to exist. E(original structure), E(H), and E(structure with H added) are the original structure The energy of the bond is expressed as the energy of the hydrogen atom, the energy of the structure with H added. Energy is transferred to amorphous IGZO, an amorphous material without dangling bonds (hereafter abbreviated as DB). RufusSiO 2 The calculations were performed for a total of four cases: one with DB and two with amorphous SiOx. Ta.

[0183] The calculation was performed using the density functional theory program CASTEP. The plane wave basis pseudopotential method was used, and the LDA functional was used. Cutoff energy The energy used was 300 eV. A 2×2×2 grid of k points was used.

[0184] The calculated structure is described below. First, the original structure is described below. Amorphous The unit cell of IGZO consists of 12 In atoms, 12 Ga atoms, 12 Zn atoms, and 48 O atoms. Amorphous SiO without DB, containing a total of 84 atoms. 2 The unit cell of is 16 Si It contains 32 atoms of SiOx, 32 atoms of O, totaling 48 atoms. Also, amorphous SiOx(1) with DB is amorphous SiO without DB. 2 Remove O from and one of the Si bonds to the O In other words, it has a structure in which 16 Si atoms, 31 O atoms, and 1 H atom are bonded to each other. It contains 48 atoms. Also, amorphous SiOx(2) with DB is different from amorphous SiOx(2) without DB. SiO 2 A structure in which silicon is removed from the above and three of the oxygen atoms bonded to the silicon are replaced with hydrogen atoms. That is, it contains 15 Si atoms, 32 O atoms, and 3 H atoms, for a total of 50 atoms. The added structure is the structure in which H is added to the above four structures. H is amorphous I GZO is amorphous SiO without O atoms or DB. 2 Then, amorphous with Si and DB In SiOx, it was added to an atom with DB. The calculated structure has one H in the unit cell. The cell sizes of each structure are summarized in Table 1.

[0185] [Table 1]

[0186] The calculation results are shown in Table 2.

[0187] [Table 2]

[0188] From the above, the amorphous SiOx with DB in oxygen has the largest binding energy. Next is Si with DB, then IGZO, and the smallest is amorphous without DB. SSiO 2 Therefore, when hydrogen is bonded to DB in amorphous SiOx, It is most stable at

[0189] Therefore, the following process is considered. A large amount of DB exists in amorphous SiOx. Therefore, the hydrogen atoms diffusing through the amorphous IGZO-amorphous SiOx interface are It is stabilized by being captured by DB in amorphous SiOx. Therefore, amorphous IGZ The hydrogen atoms in O move to the DB in the amorphous SiOx. [Explanation of symbols]

[0190] 100 Substrates 102 Gate insulating layer 102a Gate insulating layer 102b Gate insulating layer 103 Oxide semiconductor layer 107 Oxide insulating layer 108 Protective insulation layer 111a Gate electrode 111b Gate wiring layer 113 Oxide semiconductor layer 115c wiring layer 123 Oxide semiconductor layer 128 Contact Hole 151 Thin-film transistor 400 Glass Substrate 401 Oxidation and Nitride Insulation Layer 402 Oxide semiconductor layer 403 Silicon oxide insulating layer 410 Interface 411 Hydrogen Concentration Ratio 412 Hydrogen concentration ratio 421 Silicon ion intensity profile 422 Hydrogen Concentration Profile 1000 Continuous film deposition equipment 1100 Delivery Room 1101 Conveyor mechanism 1110 Loader Room 1111 Cassette 1120 Unloader Room 1121 Cassette 1200 Delivery Room 1201 Transport mechanism 1205 Exhaust means 1210 Processing Room 1211 Substrate heating mechanism 1215 Exhaust means 1220 Processing Room 1225 Exhaust means 1230 Processing Room 1235 Exhaust means 1240 Processing Room 1245 Exhaust means 2000 Film deposition equipment 2100 Delivery Room 2101 Conveyor mechanism 2110 Loader Room 2111 Cassette 2120 Unloader Room 2121 Cassette 2200 Delivery Room 2201 Conveyor mechanism 2205 Exhaust means 2210 Processing Room 2215 Exhaust means 2220 Processing Room 2221 Substrate heating mechanism 2225 Exhaust means 2230 Processing Room 2235 Exhaust means 2240 Processing Room 2241 Cooling mechanism 2245 Exhaust means 3000 Continuous film deposition equipment 3100 Delivery Room 3101 Conveyor mechanism 3105 Exhaust means 3110 Loader Room 3111 Cassette 3115 Exhaust means 3120 Unloader Room 3121 Cassette 3125 Exhaust means 3210 Processing Room 3211 Substrate heating mechanism 3215 Exhaust means 3220 Processing Room 3225 Exhaust means 3230 Processing Room 3235 Exhaust means 3240 Processing Room 3241 Substrate heating mechanism 3245 Exhaust means 3250 Processing Room 3251 Cooling mechanism 3255 Exhaust means

Claims

1. A liquid crystal display having a transistor, a gate electrode disposed above a substrate; an insulating layer disposed above the gate electrode; an oxide semiconductor layer disposed above the insulating layer; an oxide insulating layer disposed above the oxide semiconductor layer and having a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer includes a channel formation region of the transistor, the gate electrode has a region overlapping with the channel formation region via the insulating layer, the oxide insulating layer comprises silicon oxide; A liquid crystal display, wherein when analyzed by secondary ion mass spectrometry in a direction from the oxide insulating layer to the substrate, the hydrogen concentration profile in the oxide insulating layer has a peak only near the interface between the oxide insulating layer and the oxide semiconductor layer.

2. A liquid crystal display having a transistor, a gate electrode disposed above a substrate; an insulating layer disposed above the gate electrode; an oxide semiconductor layer disposed above the insulating layer; an oxide insulating layer disposed above the oxide semiconductor layer and having a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer includes a channel formation region of the transistor, the gate electrode has a region overlapping with the channel formation region via the insulating layer, the oxide insulating layer comprises silicon oxide; A liquid crystal display, wherein when analyzed by secondary ion mass spectrometry in a direction from the oxide insulating layer to the substrate, the hydrogen concentration profile in the oxide insulating layer has one peak at the interface between the oxide insulating layer and the oxide semiconductor layer.

3. 1. An electroluminescent display having a transistor, comprising: a gate electrode disposed above a substrate; an insulating layer disposed above the gate electrode; an oxide semiconductor layer disposed above the insulating layer; an oxide insulating layer disposed above the oxide semiconductor layer and having a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer includes a channel formation region of the transistor, the gate electrode has a region overlapping with the channel formation region via the insulating layer, the oxide insulating layer comprises silicon oxide; An electroluminescent display, wherein when analyzed by secondary ion mass spectrometry in a direction from the oxide insulating layer to the substrate, the hydrogen concentration profile in the oxide insulating layer has a peak only near the interface between the oxide insulating layer and the oxide semiconductor layer.

4. 1. An electroluminescent display having a transistor, comprising: a gate electrode disposed above a substrate; an insulating layer disposed above the gate electrode; an oxide semiconductor layer disposed above the insulating layer; an oxide insulating layer disposed above the oxide semiconductor layer and having a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer includes a channel formation region of the transistor, the gate electrode has a region overlapping with the channel formation region via the insulating layer, the oxide insulating layer comprises silicon oxide; An electroluminescent display, wherein when analyzed by secondary ion mass spectrometry in a direction from the oxide insulating layer to the substrate, the hydrogen concentration profile in the oxide insulating layer has one peak at the interface between the oxide insulating layer and the oxide semiconductor layer.

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