Multilayer ceramic capacitor and method of manufacturing the same

The multilayer ceramic capacitor design with barium titanate-based dielectric grains and silicon, dysprosium, and terbium in the grain boundaries addresses the challenges of achieving high density and thin-layer reliability, enhancing interfacial reliability and overall performance.

JP2025080738APending Publication Date: 2025-05-26SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
JP2024135665
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-11-14
Filing Date
2024-08-15
Publication Date
2025-05-26

AI Technical Summary

Technical Problem

Existing multilayer ceramic capacitors face challenges in achieving high density and thin-layer reliability, particularly under ultra-thin layer designs required for advanced IT applications.

Method used

A multilayer ceramic capacitor design featuring a dielectric layer with barium titanate-based grains and grain boundaries containing silicon, dysprosium, and terbium, where terbium has a higher content than dysprosium, which in turn has a higher content than silicon, enhancing the interfacial reliability between dielectric grains and internal electrode layers.

Benefits of technology

The proposed design improves the density and thin-layer reliability of multilayer ceramic capacitors by enhancing the reliability of dielectric grain boundaries and the interface between the dielectric layer and internal electrode layers.

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Abstract

To provide a multilayer ceramic capacitor having excellent density and thin-layer reliability, and a method of manufacturing the same.SOLUTION: A multilayer ceramic capacitor according to one embodiment includes: a capacitor body including a dielectric layer and an internal electrode layer; and an external electrode disposed outside the capacitor body. The dielectric layer includes a plurality of dielectric grains and a grain boundary located between the dielectric grains adjacent to each other. The dielectric grain includes a barium titanate-based primary component including barium (Ba) and titanium (Ti). The grain boundary includes silicon (Si), dysprosium (Dy), and terbium (Tb), and silicon (Si), dysprosium (Dy), and terbium (Tb) are included in the grain boundary in the content order of terbium (Tb)<dysprosium (Dy)<silicon (Si).SELECTED DRAWING: Figure 4
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Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] Examples of electronic components using ceramic materials include capacitors, inductors, piezoelectric elements, varistors, or thermistors. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) can be used in various electronic devices due to its advantages of being small in size, having a high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor mounted on a substrate of various electronic products such as video equipment such as a liquid crystal display (LCD), a plasma display panel (PDP), an organic light-emitting diode (OLED), a computer, a personal mobile terminal, and a smartphone, to play a role of charging or discharging electricity.

[0004] In particular, as the demand for ultra-small and high-capacitance MLCCs for IT applications is increasing, high reliability is required under an ultra-thin layer design.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a multilayer ceramic capacitor excellent in density and thin-layer reliability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor.

Means for Solving the Problems

[0007] One embodiment provides a multilayer ceramic capacitor including a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed outside the capacitor body. The dielectric layer includes a plurality of dielectric grains and grain boundaries located between the adjacent dielectric grains. The dielectric grains include a barium titanate-based main component including barium (Ba) and titanium (Ti). The grain boundaries include silicon (Si), dysprosium (Dy), and terbium (Tb), and terbium (Tb) < dysprosium (Dy) < silicon (Si) have a high content in this order at the grain boundaries.

[0008] The total content of the dysprosium (Dy) and the terbium (Tb) may be more than 0.9 mole parts and less than 2.0 mole parts with respect to 100 mole parts of the titanium (Ti).

[0009] The silicon (Si) may be contained in an amount of 1.3 mole parts to 2.5 mole parts with respect to 100 mole parts of the titanium (Ti).

[0010] The dysprosium (Dy) may be contained in an amount of 0.6 mole parts to 1.6 mole parts with respect to 100 mole parts of the titanium (Ti).

[0011] The terbium (Tb) may be contained in an amount of 0.1 mole parts to 0.5 mole parts with respect to 100 mole parts of the titanium (Ti).

[0012] The terbium (Tb) can have a molar ratio of 0.3 to 0.8 with respect to the dysprosium (Dy).

[0013] The dysprosium (Dy) can have an atomic ratio of more than 0.4 and less than 1.0 with respect to the silicon (Si).

[0014] The terbium (Tb) can have an atomic ratio of more than 0.4 and less than 1.0 with respect to the silicon (Si).

[0015] The crystal grain boundaries may further contain tin (Sn).

[0016] The tin (Sn) may be contained in an amount of 0.5 to 2.5 mole parts with respect to 100 mole parts of the titanium (Ti).

[0017] The dielectric crystal grains may have a diameter of 60% to 90% with respect to the total of the diameter of the dielectric crystal grains and the thickness of the crystal grain boundaries.

[0018] The diameter of the dielectric crystal grains may be 80 nm to 120 nm.

[0019] The size (D50) of the dielectric crystal grains may be 300 nm or less.

[0020] The thickness of the crystal grain boundaries may be 10 nm to 100 nm.

[0021] The average thickness of the dielectric layer may be 0.3 μm to 0.6 μm.

[0022] Another embodiment includes the steps of manufacturing a dielectric slurry by mixing a barium titanate-based main component powder and a sub-component powder containing a silicon (Si) - containing compound, a dysprosium (Dy) - containing compound, and a terbium (Tb) - containing compound; manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; manufacturing a dielectric green sheet laminate by laminating the dielectric green sheets with the conductive paste layer formed thereon; manufacturing a capacitor body including a dielectric layer and an internal electrode layer by firing the dielectric green sheet laminate; and forming an external electrode on one surface of the capacitor body. The dielectric layer includes a plurality of dielectric grains and grain boundaries located between the adjacent dielectric grains. The dielectric grains include a barium titanate-based main component containing barium (Ba) and titanium (Ti), and the grain boundaries include silicon (Si), dysprosium (Dy), and terbium (Tb), and the terbium (Tb) < dysprosium (Dy) < silicon (Si) have a higher content in this order at the grain boundaries. A method for manufacturing a multilayer ceramic capacitor is provided.

[0023] The barium titanate-based main component powder is manufactured by mixing a titanium (Ti) precursor and a barium (Ba) precursor. With respect to 100 mole parts of the titanium (Ti) precursor, the silicon (Si) - containing compound may be included in an amount of 1.3 to 2.5 mole parts, the dysprosium (Dy) - containing compound may be included in an amount of 0.6 to 1.6 mole parts, and the terbium (Tb) - containing compound may be included in an amount of 0.1 to 0.5 mole parts.

[0024] The sub-component powder may further include a tin (Sn) - containing compound.

[0025] The barium titanate-based main component powder is manufactured by mixing a titanium (Ti) precursor and a barium (Ba) precursor. The tin (Sn) - containing compound may be included in an amount of 0.5 to 2.5 mole parts with respect to 100 mole parts of the titanium (Ti) precursor.

Advantages of the Invention

[0026] The multilayer ceramic capacitor according to one embodiment can improve the density and thin-layer reliability by enhancing the reliability of the dielectric grain boundaries and the interface between the dielectric layer and the internal electrode layer.

Brief Description of the Drawings

[0027]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5a

Figure 5b

Figure 5c

Mode for Carrying Out the Invention

[0028] Hereinafter, embodiments of the present invention will be described in detail so that those having ordinary knowledge in the technical field to which the present invention pertains can easily implement it with reference to the accompanying drawings. In order to clearly explain the present invention in the drawings, parts unnecessary for the explanation are omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. Also, in the accompanying drawings, some components are exaggerated, omitted, or schematically illustrated, and the sizes of the components do not entirely reflect the actual sizes.

[0029] The attached drawings are only for facilitating the understanding of the embodiments disclosed in this specification, and the technical idea disclosed in this specification is not limited by the attached drawings. It should be understood that all modifications, equivalents, and alternatives included in the spirit and technical scope of the present invention are included.

[0030] Terms including ordinal numbers such as first, second, etc. can be used to describe various components, but the components are not limited by the terms. The terms are only used for the purpose of distinguishing one component from another.

[0031] Also, when a part such as a layer, film, region, plate, etc. is "on" or "above" another part, this includes not only the case where it is "directly above" the other part, but also the case where there are other parts in between. Conversely, when a part is "directly above" another part, it means that there are no other parts in between. Also, being "on" or "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "on" or "above" in the direction opposite to gravity.

[0032] Throughout the specification, terms such as "comprising" or "having" are intended to specify the presence of the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and it should be understood that the presence or addition possibility of one or more other features, numbers, steps, operations, components, parts, or combinations thereof is not precluded in advance. Therefore, when a part "comprises" a certain component, this means that it can further include other components rather than excluding other components unless otherwise stated to the contrary.

[0033] Also, throughout the specification, when it is said "on a plane", this means when the target part is viewed from above, and when it is said "in a cross-section", this means when the cross-section obtained by vertically cutting the target part is viewed from the side.

[0034] Also, throughout the specification, when "connected" is mentioned, this does not only mean that two or more components are directly connected, but also that two or more components are indirectly connected through other components, not only physically connected but also electrically connected, or can be meant to be integral although named differently by position or function.

[0035] Hereinafter, a multilayer ceramic capacitor according to an embodiment will be described with reference to FIGS. 1 to 3.

[0036] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment, FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor cut along line I-I' of FIG. 1, and FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor cut along line II-II' of FIG. 1.

[0037] The L-axis, W-axis, and T-axis shown in FIGS. 1 to 3 indicate the length direction, width direction, and thickness direction of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be a direction perpendicular to the wide surface (main surface) of the sheet-shaped component, and as an example, it can be used as the same concept as the stacking direction in which the dielectric layer 111 is stacked. The length direction (L-axis direction) may be a direction parallel to the wide surface (main surface) of the sheet-shaped component and substantially perpendicular to the thickness direction (T-axis direction), and as an example, it may be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be a direction parallel to the wide surface (main surface) of the sheet-shaped component and substantially perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction), and the length in the length direction (L-axis direction) of the sheet-shaped component may be even longer than the length in the width direction (W-axis direction).

[0038] Referring to FIGS. 1 to 3, the multilayer ceramic capacitor 100 according to the present embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed outside the capacitor body 110. The external electrodes 131 and 132 can include a first external electrode 131 and a second external electrode 132 disposed at both ends facing each other in the length direction (L-axis direction) of the capacitor body 110.

[0039] The capacitor body 110 may be, for example, substantially hexahedral.

[0040] For the convenience of explanation of an embodiment, both surfaces of the capacitor body 110 facing each other in the thickness direction (T-axis direction) are defined as a first surface and a second surface, both surfaces connected to the first surface and the second surface and facing each other in the length direction (L-axis direction) are defined as a third surface and a fourth surface, and both surfaces connected to the first surface and the second surface and connected to the third surface and the fourth surface and facing each other in the width direction (W-axis direction) are defined as a fifth surface and a sixth surface.

[0041] As an example, the first surface, which is the lower surface, can be the surface facing the mounting direction. Also, the first surface to the sixth surface may be flat, but an embodiment is not limited thereto. For example, the first surface to the sixth surface may be a curved surface convex at the center, and the corners that are the boundaries of each surface may be rounded.

[0042] The shape, dimensions, and the number of stacked dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of the present embodiment.

[0043] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and a first internal electrode 121 and a second internal electrode 122 alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 interposed therebetween.

[0044] At this time, the boundaries between the respective dielectric layers 111 adjacent to each other of the capacitor body 110 can be integrated to such an extent that they are difficult to confirm without using a scanning electron microscope (SEM).

[0045] The capacitor body 110 can have an active region. The active region is a region where the dielectric layers 111 and the internal electrode layers 121 and 122 are alternately arranged with each other, and is a part that contributes to the capacitance formation of the multilayer ceramic capacitor 100. Specifically, the active region may be a region where the first internal electrode 121 or the second internal electrode 122 laminated along the thickness direction (T-axis direction) overlaps.

[0046] Also, the capacitor body 110 can further include a cover portion and a side margin portion.

[0047] The cover portion is a margin portion in the thickness direction and can be arranged on the first surface and the second surface sides of the active region in the thickness direction (T-axis direction), respectively. Such a cover portion may be formed by laminating a single dielectric layer 111 or two or more dielectric layers 111 on the upper surface and the lower surface of the active region, respectively.

[0048] The side margin portion can be regarded as a side cover portion and can be arranged on both side ends of the active region facing each other in the width direction (W-axis direction), that is, on the fifth surface and the sixth surface sides, respectively. The side margin portion can be formed by applying a conductive paste layer for the internal electrode layer only to a partial region of the surface of the dielectric green sheet when applying the conductive paste layer to the surface of the dielectric green sheet, laminating dielectric green sheets without applying the conductive paste layer to both side surfaces of the surface of the dielectric green sheet, and then firing, but is not limited to such a formation method.

[0049] The cover portion and the side margin portion serve to prevent damage to the first internal electrode 121 and the second internal electrode 122 due to physical or chemical stress.

[0050] The dielectric layer 111 according to one embodiment will be described with reference to FIG. 4.

[0051] FIG. 4 is a schematic diagram showing dielectric crystallites (grains) and grain boundaries in a dielectric layer according to one embodiment.

[0052] Referring to FIG. 4, the dielectric layer 111 according to one embodiment includes a plurality of dielectric crystallites (grains) 10 and grain boundaries (grain boundary) 20 located between the adjacent dielectric crystallites 10.

[0053] The dielectric crystallite 10 includes a barium titanate-based main component containing barium (Ba) and titanium (Ti).

[0054] The barium titanate-based main component is a dielectric base material, has a high dielectric constant, and contributes to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0055] The barium titanate-based main component is, for example, BaTiO 3 , Ba(Ti,Zr)O 3 , Ba(Ti,Sn)O 3 , (Ba,Ca)TiO 3 , (Ba,Ca)(Ti,Ca)O 3 , (Ba,Ca)(Ti,Zr)O 3 , (Ba,Ca)(Ti,Sn)O 3 , (Ba,Sr)TiO 3 , (Ba,Sr)(Ti,Zr)O 3 , (Ba,Sr)(Ti,Sn)O 3 , or a combination thereof.

[0056] The grain boundary 20 can include silicon (Si), dysprosium (Dy), and terbium (Tb), and can have a wall form.

[0057] The component present at the crystal grain boundary 20 may be a sub-component dissolved in the barium titanate-based main component that is the dielectric base material.

[0058] Generally, in order to improve reliability, it is known that the size of the crystal grains must be small and the number of dielectrics in the dielectric layer must be large. Also, reliability characteristics are realized through adjustment of the addition amounts and optimization of the composition ratios of additives, that is, transition metal elements of fixed-valence acceptor and variable-valence acceptor, and rare earth elements that play the role of donor. However, even when the same additive composition is utilized, completely different reliability characteristics can be exhibited depending on the dispersion state and arrangement form of the additive in the dielectric material.

[0059] According to one embodiment, when components of silicon (Si), dysprosium (Dy), and terbium (Tb) are present at the crystal grain boundary 20, not only the interfacial reliability between the dielectric crystal grains 10 but also the interfacial reliability between the dielectric layer and the internal electrode layer can be enhanced. The component is a sub-component dissolved in the barium titanate-based main component that is the dielectric base material, and the interfacial concentration phenomenon of the component can be induced through control of the solid solution depth. Thereby, when the components of Si, Dy, and Tb are present at the crystal grain boundary 20 located at the interface between the dielectric crystal grains 10, a laminated ceramic capacitor having excellent density and high thin layer reliability can be ensured due to the enhanced interfacial reliability.

[0060] Silicon (Si) can increase the Schottky barrier at the interface and strengthen the interface resistance by being present at the crystal grain boundary 20. Dysprosium (Dy) and terbium (Tb) are rare earth elements and can improve the high-temperature accelerated life and reliability.

[0061] The above components can be included in the order of high content of terbium (Tb) < dysprosium (Dy) < silicon (Si) at the grain boundaries 20. When silicon (Si), dysprosium (Dy), and terbium (Tb) are included in this order of content at the grain boundaries 20, not only the interface reliability between the dielectric crystallites 10 but also the interface reliability between the dielectric layer and the internal electrode layer is enhanced, thereby improving the density and thin layer reliability.

[0062] Specifically, the total content of dysprosium (Dy) and terbium (Tb) may exceed 0.9 mole parts and be less than 2.0 mole parts with respect to 100 mole parts of titanium (Ti), for example, it may be 1.0 mole part to 1.9 mole parts. When the total content of dysprosium (Dy) and terbium (Tb) is within the above range, the interface reliability is enhanced, and the density and thin layer reliability of the multilayer ceramic capacitor can be improved.

[0063] Silicon (Si) may be included in an amount of 1.3 mole parts to 2.5 mole parts with respect to 100 mole parts of titanium (Ti), for example, it may be 1.35 mole parts to 2.40 mole parts, for example, it may be 1.35 mole parts to 2.25 mole parts. When silicon (Si) is included within the above content range at the grain boundaries 20, the interface reliability is enhanced, the control of the density is easy, a high dielectric constant can be ensured, and the density and thin layer reliability of the multilayer ceramic capacitor can be improved.

[0064] Dysprosium (Dy) may be included in an amount of 0.6 mole parts to 1.6 mole parts with respect to 100 mole parts of titanium (Ti), for example, it may be 0.7 mole parts to 1.5 mole parts, for example, it may be 0.80 mole parts to 1.45 mole parts. When dysprosium (Dy) is included within the above content range at the grain boundaries 20, electron emission as a donor is carried out at an appropriate level, and the phenomenon that the surplus electrons released during solid solution in the dielectric matrix combine with oxygen vacancies and act as an element to hinder oxygen vacancy movement does not occur, and the interface reliability is enhanced, ensuring a multilayer ceramic capacitor with excellent density and thin layer reliability.

[0065] Terbium (Tb) may be contained in an amount of 0.1 to 0.5 parts by mole, for example, 0.20 to 0.48 parts by mole, based on 100 parts by mole of titanium (Ti). When terbium (Tb) is contained within the above content range at the grain boundaries 20, electron emission as a donor is appropriately carried out, thereby enhancing the interface reliability and ensuring a laminated ceramic capacitor excellent in density and thin layer reliability.

[0066] Terbium (Tb) can have a molar ratio of 0.3 to 0.8 with respect to dysprosium (Dy), for example, a molar ratio of 0.31 to 0.60. When the molar ratio of terbium (Tb) to dysprosium (Dy) is within the above range, the interface reliability is enhanced and a laminated ceramic capacitor excellent in density and thin layer reliability can be ensured.

[0067] Dysprosium (Dy) can have an atomic ratio of more than 0.4 to less than 1.0 with respect to silicon (Si). When the atomic ratio of dysprosium (Dy) to silicon (Si) is within the above range, the interface reliability is enhanced, thereby improving the density and thin layer reliability of the laminated ceramic capacitor.

[0068] Terbium (Tb) can have an atomic ratio of more than 0.4 to less than 1.0 with respect to silicon (Si). When the atomic ratio of terbium (Tb) to silicon (Si) is within the above range, the interface reliability is enhanced, thereby improving the density and thin layer reliability of the laminated ceramic capacitor.

[0069] The grain boundaries 20 can further contain tin (Sn). The presence of tin (Sn) in the grain boundaries 20 can increase the low-temperature density and the effective capacitance through this.

[0070] Tin (Sn) may be contained in an amount of 0.5 to 2.5 mol parts, for example, 0.7 to 2.3 mol parts, per 100 mol parts of titanium (Ti). When Sn is contained within the above range at the grain boundaries 20, the low-temperature density and the effective capacitance through this can be increased, and the reliability can be improved.

[0071] The presence of the grain boundaries 20 and the contents of Si, Dy, Tb, and Sn within the grain boundaries 20 can be confirmed by TEM-EDS (transmission electron microscope - energy dispersive spectroscopy) analysis.

[0072] Specifically, after the multilayer ceramic capacitor 100 is put into an epoxy mixture and cured, the W-axis and T-axis direction surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction, and after fixing, it is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect can be observed. Next, it can be measured with a transmission electron microscope (TEM) for the active region of the cross-sectional sample. The transmission electron microscope can be performed using Xe-FIB (focused ion beam) under the conditions of an acceleration voltage of 200 kV and an analysis magnification of 225 k times, and measurement can be performed so that at least one layer, for example, 1 to 10 layers, of the dielectric layer 111 can be seen. Next, in the transmission electron microscope (TEM) image of the measured cross-sectional sample, it can be confirmed that the grain boundaries 20 exist with a predetermined thickness by EDS analysis, and the contents of Si, Dy, Tb, and Sn at the grain boundaries 20 can be confirmed.

[0073] Generally, in order to realize high-reliability characteristics, various additive elements are applied to a fine-grained base material to change the interface between the dielectric layer and the internal electrode layer and the grain boundary resistance characteristics to control the insulation resistance characteristics. This is achieved by combining the additive elements, for example, a reduction-resistant strengthening element to prevent oxidation during the firing process of the internal electrode layer, a fixed-valence acceptor for improving insulation characteristics, a rare earth element serving as a donor, and a variable-valence acceptor for improving the breakdown voltage characteristics and reliability of the dielectric that is insufficient when only the fixed-valence acceptor is added, in appropriate contents, and then adding a sintering aid for adjusting their solid solution characteristics and sintering temperature. Most of such additive elements are doped into the dielectric material and 3 are solid-solved in the shell region of the base material crystal grains to form a core-shell structure.

[0074] In contrast, the dielectric crystal grains 10 in the dielectric layer 111 according to one embodiment do not particularly have a boundary portion where the core and the shell are distinguished, and are distinguished into the dielectric crystal grains 10 and the grain boundaries 20. The core region of the existing core-shell structure of the crystal grains can be regarded as being further extended to the dielectric crystal grains 10 according to one embodiment. Also, in one embodiment, although there is a possibility that the portion corresponding to the shell region of the existing core-shell structure in which various additive elements are solid-solved and affect the reliability improvement decreases and the reliability within the crystal grains decreases, the grain boundary reliability can be further enhanced by the grain boundaries 20 containing Si, Dy, and Tb.

[0075] Specifically, the diameter (d) of the dielectric crystal grains 10 according to one embodiment can account for 60% to 90% of the total of the diameter (d) of the dielectric crystal grains 10 and the thickness (t) of the grain boundaries 20, and for example, can account for 70% to 90%. As an example, the diameter (d) of the dielectric crystal grains may be 80 nm to 120 nm, and for example, may be 85 nm to 115 nm. When the diameter (d) of the dielectric crystal grains 10 is within the above range, high grain boundary reliability and interface reliability and excellent breakdown voltage characteristics can be achieved.

[0076] The diameter (d) of the dielectric crystal grains 10 can be confirmed by TEM analysis.

[0077] After putting the multilayer ceramic capacitor 100 into an epoxy mixture and curing it, the W-axis and T-axis direction surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction, and after fixing, it is maintained in a vacuum atmosphere chamber, so that a cross-sectional sample can be obtained so that the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect can be observed. Next, it can be measured with a transmission electron microscope (TEM) for the active region of the cross-sectional sample. The transmission electron microscope can be performed under the conditions of an acceleration voltage of 200 kV and an analysis magnification of 225 k times using Xe-FIB (focused ion beam), and it can be measured so that at least one layer, for example, 1 to 10 layers of the dielectric layer 111 can be seen. The diameter of the dielectric crystal grains 10 can be obtained by measuring the maximum major axis of at least one, for example, 2 to 20 dielectric crystal grains 10 in the TEM image of the cross-sectional sample and calculating the average value.

[0078] The size (D50) of the dielectric crystal grains 10 may be 300 nm or less, for example, 280 nm or less. When the size (D50) of the dielectric crystal grains 10 is within the above range, high grain boundary reliability and interface reliability can have excellent withstand voltage characteristics.

[0079] The size (D50) of the dielectric crystal grains 10 is measured by measuring the maximum major axis of at least 100 dielectric crystal grains in the transmission electron microscope (TEM) image of the cross-sectional sample to create a size distribution cumulative curve and calculating D50. D50 means the size at the point where it becomes 50% in the size distribution cumulative curve.

[0080] The thickness (t) of the grain boundary 20 may be 10 nm to 100 nm, for example, 20 nm to 90 nm. When the thickness (t) of the grain boundary 20 is within the above range, high grain boundary reliability and interface reliability can have excellent withstand voltage characteristics.

[0081] The thickness (t) of the crystal grain boundary 20 may be the average value of the thicknesses of the crystal grain boundary 20 at at least 10 points in the transmission electron microscope (TEM) image of the cross-sectional sample.

[0082] The average thickness of the dielectric layer 111 according to one embodiment may be 0.3 μm to 0.6 μm, for example, 0.35 μm to 0.55 μm. When the average thickness of the dielectric layer 111 is within the above range, a highly reliable laminated ceramic capacitor with a thin layer can be ensured.

[0083] The average thickness of the dielectric layer 111 can be measured by ion milling after polishing the multilayer ceramic capacitor 100 in an epoxy mixture and curing it, followed by scanning electron microscope (SEM) analysis. The scanning electron microscope may use, for example, the Verios G4 product of Thermo Fisher Scientific. The measurement conditions are 10 kV and 0.2 nA, and the analysis magnification may be 100 times. It can be measured so that at least one layer, three layers, five layers, or ten layers or more of the dielectric layer 111 appear. In the scanning electron microscope (SEM) image, it may be the arithmetic average value of the thicknesses of the dielectric layer 111 at 10 points separated by a predetermined interval from the central point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111 as a reference point. The interval between the 10 points can be adjusted according to the scale of the scanning electron microscope (SEM) image, for example, an interval of 1 μm to 100 μm, 1 μm to 50 μm, or 1 μm to 10 μm. At this time, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed, or the interval between the 10 points can be adjusted.

[0084] The first internal electrode 121 and the second internal electrode 122 are electrodes having different polarities from each other, and are alternately arranged so as to face each other along the T-axis direction with the dielectric layer 111 interposed therebetween, and one end of each is exposed through the third surface and the fourth surface of the capacitor body 110, respectively.

[0085] The first internal electrode 121 and the second internal electrode 122 are electrically insulated from each other by the dielectric layer 111 disposed therebetween.

[0086] The ends of the first internal electrode 121 and the second internal electrode 122 that are alternately exposed through the third surface and the fourth surface of the capacitor body 110 are connected to the first external electrode 131 and the second external electrode 132, respectively, and are electrically connected.

[0087] The first internal electrode 121 and the second internal electrode 122 contain a conductive metal, and can contain, for example, metals such as Ni, Cu, Ag, Pd, Au, or alloys thereof, such as an Ag-Pd alloy.

[0088] Further, the first internal electrode 121 and the second internal electrode 122 can also contain dielectric particles of the same composition system as the ceramic material contained in the dielectric layer 111.

[0089] The first internal electrode 121 and the second internal electrode 122 can be formed using a conductive paste containing a conductive metal. As the printing method of the conductive paste, a screen printing method or a gravure printing method can be used.

[0090] The average thickness of the first internal electrode 121 and the second internal electrode 122 may be 0.1 μm to 2 μm. The average thickness of the first internal electrode 121 and the second internal electrode 122 can be measured by scanning electron microscope (SEM) analysis. Here, since the scanning electron microscope (SEM) analysis is the same as the method for measuring the average thickness of the dielectric layer 111 described above, the description thereof is omitted.

[0091] The capacitor body 110 can be formed by firing a laminate in which a plurality of dielectric layers 111 and internal electrode layers 121 and 122 are laminated.

[0092] The first external electrode 131 and the second external electrode 132 are provided with voltages of different polarities, and are respectively connected to the exposed portions of the first internal electrode 121 and the second internal electrode 122 and electrically connected.

[0093] With the above-described configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charges are accumulated between the first internal electrode 121 and the second internal electrode 122 facing each other. At this time, the capacitance of the multilayer ceramic capacitor 100 becomes proportional to the overlapping area of the first internal electrode 121 and the second internal electrode 122 that overlap each other along the T-axis direction in the active region.

[0094] The first external electrode 131 and the second external electrode 132 are respectively disposed on the third surface and the fourth surface of the capacitor body 110, and include a first connection portion and a second connection portion connected to the first internal electrode 121 and the second internal electrode 122, the third surface and the fourth surface of the capacitor body 110, and a first band portion and a second band portion disposed at the corners where the first surface and the second surface or the fifth surface and the sixth surface are in contact.

[0095] The first band portion and the second band portion are respectively extended from the first connection portion and the second connection portion to a part of the first surface and the second surface or the fifth surface and the sixth surface of the capacitor body 110. The first band portion and the second band portion can play a role in improving the fixing strength of the first external electrode 131 and the second external electrode 132.

[0096] The first external electrode 131 and the second external electrode 132 can each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer disposed to cover the sintered metal layer, and a plating layer disposed to cover the conductive resin layer.

[0097] The sintered metal layer can include a conductive metal and glass.

[0098] The conductive metal can include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof. For example, copper (Cu) can include copper (Cu) alloys. When the conductive metal includes copper, the metal other than copper may be included in an amount of 5 mol parts or less per 100 mol parts of copper.

[0099] The glass can include a composition in which oxides are mixed, and may be, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal is selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni), the alkali metal is selected from the group consisting of lithium (Li), sodium (Na), and potassium (K), and the alkaline earth metal may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0100] Optionally, the conductive resin layer is formed on the sintered metal layer and can be formed, for example, in a form that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 may not include the sintered metal layer. In this case, the conductive resin layer can be in direct contact with the capacitor body 110.

[0101] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) where the conductive resin layer extends and is disposed on the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) where the sintered metal layer extends and is disposed on the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. That is, the conductive resin layer is formed on the sintered metal layer and can be formed in a form that completely covers the sintered metal layer.

[0102] The conductive resin layer includes a resin and a conductive metal.

[0103] The resin contained in the conductive resin layer has bonding properties and shock absorption properties, and is not particularly limited as long as it can be mixed with conductive metal powder to form a paste. For example, it can contain a phenol resin, an acrylic resin, a silicon resin, an epoxy resin, or a polyimide resin.

[0104] The conductive metal contained in the conductive resin layer serves to be electrically connected to the first internal electrode 121 and the second internal electrode 122 or the sintered metal layer.

[0105] The conductive metal contained in the conductive resin layer can have a spherical shape, a flake shape, or a combination of these forms. That is, the conductive metal may consist only of a flake shape, or only of a spherical shape, or may be a form in which the flake shape and the spherical shape are mixed.

[0106] Here, the spherical shape can also include a shape that is not a perfect sphere. For example, it can include a shape in which the length ratio of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flake-shaped powder means a powder having a flat and elongated shape, and is not particularly limited. For example, the length ratio of the major axis to the minor axis (major axis / minor axis) may be 1.95 or more.

[0107] The first external electrode 131 and the second external electrode 132 can further include a plating layer disposed outside the conductive resin layer.

[0108] The plating layer can include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb) alone or alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or may be in a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially laminated, or may be in a form in which a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer are sequentially laminated. Also, the plating layer can include a plurality of nickel (Ni) plating layers and / or a plurality of tin (Sn) plating layers.

[0109] The plating layer can improve the mountability with the substrate of the multilayer capacitor 100, structural reliability, durability against the outside, heat resistance, and equivalent series resistance (ESR).

[0110] Hereinafter, a method for manufacturing the multilayer ceramic capacitor 100 according to an embodiment will be described.

[0111] The multilayer ceramic capacitor 100 according to an embodiment can be manufactured through steps of mixing a barium titanate-based main component powder and a sub-component powder including a silicon (Si)-containing compound, a dysprosium (Dy)-containing compound, and a terbium (Tb)-containing compound to produce a dielectric slurry; manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; laminating the dielectric green sheets with the conductive paste layer formed thereon to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body.

[0112] First, a dielectric slurry is produced by mixing a barium titanate-based main component powder and a sub-component powder containing a silicon (Si)-containing compound, a dysprosium (Dy)-containing compound, and a terbium (Tb)-containing compound.

[0113] The barium titanate-based main component powder can be produced by mixing a titanium (Ti) precursor and a barium (Ba) precursor.

[0114] The titanium (Ti) precursor may be an oxide, salt, alkoxide, etc. of titanium, and for example, may include titanium dioxide, titanium diisopropoxide diacetylacetonate (TPA), titanium alkoxide, or a combination thereof.

[0115] The barium (Ba) precursor is BaO 2 、BaTiO 3 、BaCO 3 、BaO or a combination thereof.

[0116] The titanium (Ti) precursor and the barium (Ba) precursor can be mixed at a molar ratio of 1:0.5 to 1:1.5.

[0117] The silicon (Si)-containing compound, dysprosium (Dy)-containing compound, and terbium (Tb)-containing compound, which are sub-component powders, may be oxides, nitrides or salt compounds, or may be used in the form of a sol dispersed in an organic solvent.

[0118] The silicon (Si)-containing compound may be contained in an amount of 1.3 to 2.5 molar parts with respect to 100 molar parts of titanium (Ti), for example, may be contained in an amount of 1.35 to 2.40 molar parts. When the silicon (Si)-containing compound is used within the above content range, the interfacial reliability is enhanced and the density and thin layer reliability of the multilayer ceramic capacitor can be improved.

[0119] The dysprosium (Dy)-containing compound may be contained in an amount of 0.6 to 1.6 parts by mole, for example, 0.7 to 1.5 parts by mole, based on 100 parts by mole of titanium (Ti). When the dysprosium (Dy)-containing compound is used within the above content range, the interfacial reliability can be enhanced, and the density and thin-film reliability of the multilayer ceramic capacitor can be improved.

[0120] The terbium (Tb)-containing compound may be contained in an amount of 0.1 to 0.5 parts by mole, for example, 0.20 to 0.48 parts by mole, based on 100 parts by mole of titanium (Ti). When the terbium (Tb)-containing compound is used within the above content range, the interfacial reliability can be enhanced, and the density and thin-film reliability of the multilayer ceramic capacitor can be improved.

[0121] The sub-component powder can further contain a tin (Sn)-containing compound.

[0122] The tin (Sn)-containing compound may be contained in an amount of 0.5 to 2.5 parts by mole, for example, 0.7 to 2.3 parts by mole, based on 100 parts by mole of titanium (Ti). When the tin (Sn)-containing compound is used within the above content range, the interfacial reliability can be enhanced, and the density and thin-film reliability of the multilayer ceramic capacitor can be improved.

[0123] Also, the dielectric slurry can be produced by additionally mixing additives such as a dispersant, a binder, a plasticizer, a lubricant, an antistatic agent, and a solvent.

[0124] The dispersant can include, for example, a phosphate ester-based dispersant, a polycarboxylic acid-based dispersant, or a combination thereof. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight, for example, 0.3 to 3 parts by weight, based on 100 parts by weight of the barium titanate-based main component powder. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the produced dielectric layer can be reduced.

[0125] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, an ethyl cellulose resin, or the like. The binder may be added in an amount of 0.1 to 50 parts by weight, for example, 3 to 30 parts by weight, based on 100 parts by weight of the barium titanate-based main component powder. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the produced dielectric layer can be reduced.

[0126] The plasticizer may be, for example, phthalic acid-based compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, di(2-ethylbutyl) phthalate; adipic acid-based compounds such as dihexyl adipate, di(2-ethylhexyl) adipate; glycol-based compounds such as ethylene glycol, diethylene glycol, triethylene glycol; glycol ester-based compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), triethylene glycol di(2-ethylhexanoate), and the like. The plasticizer may be added in an amount of 0.1 to 20 parts by weight, for example, 1 to 10 parts by weight, based on 100 parts by weight of the barium titanate-based main component powder. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the produced dielectric layer can be reduced.

[0127] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, methoxyethanol; a glycol solvent such as ethylene glycol, diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, tetrahydrofuran; an aromatic solvent such as benzene, toluene, xylene, etc. The solvent can use an alcohol solvent or an aromatic solvent, for example, considering the solubility and dispersibility of various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 parts by weight to 1000 parts by weight, for example, 100 parts by weight to 500 parts by weight, based on 100 parts by weight of the barium titanate-based main component powder. When the solvent is mixed within the above content range, the dielectric slurry components can be sufficiently mixed, and the removal of the solvent is also easy thereafter.

[0128] The mixing of the barium titanate-based main component powder and the sub-component powder can use a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, a large number of zirconia balls with a diameter of 0.1 mm to 10 mm can be used for wet mixing for 8 hours to 48 hours, or 10 hours to 24 hours.

[0129] The produced dielectric slurry is formed as a dielectric layer after firing.

[0130] As a method for forming the produced dielectric slurry into a sheet shape, tape forming methods such as the doctor blade method and the calendar roll method can be used. For example, an on-roll coater using a head discharge method can be used, and then a dielectric green sheet can be obtained by drying the formed body.

[0131] To form a conductive paste layer that will become an internal electrode layer after firing, a conductive paste can be produced by mixing conductive powder made of a conductive metal or its alloy, a binder, and a solvent. Additionally, barium titanate powder may be mixed together as a co-material if necessary. The co-material can play a role in suppressing the sintering of the conductive powder during the firing process. A conductive paste layer is formed by applying the conductive paste in a predetermined pattern on the surface of the dielectric green sheet by various printing methods such as screen printing or transfer methods.

[0132] The conductive powder can include nickel (Ni) or a nickel (Ni) alloy.

[0133] Next, after laminating the dielectric green sheets with internal electrode patterns over a plurality of layers, a dielectric green sheet laminate is manufactured by pressing in the lamination direction. At this time, the dielectric green sheet and the internal electrode pattern can be laminated so that the dielectric green sheet is positioned on the upper and lower surfaces of the dielectric green sheet laminate in the lamination direction.

[0134] The step of selectively cutting the manufactured dielectric green sheet laminate into a predetermined size by dicing or the like can be performed.

[0135] Also, the dielectric green sheet laminate can be solidified and dried to remove a plasticizer or the like if necessary, and can be barrel polished using a horizontal centrifugal barrel polishing machine or the like after curing and drying. In barrel polishing, the dielectric green sheet laminate is put into a barrel container together with media and a polishing liquid, and by applying rotational motion, vibration, or the like to the barrel container, unnecessary parts such as burrs generated during cutting can be polished. Also, after barrel polishing, the dielectric green sheet laminate can be washed with a cleaning liquid such as water and dried.

[0136] Next, the dielectric green sheet laminate can be debound and fired to manufacture a capacitor body.

[0137] The debinding treatment conditions can be appropriately adjusted according to the components of the dielectric layer and the internal electrode layer. For example, the heating rate during the debinding treatment may be 5°C / hour to 300°C / hour, the holding temperature may be 180°C to 400°C, and the temperature holding time may be 0.5 hour to 24 hours. During the debinding treatment, the atmosphere may be air or a reducing atmosphere.

[0138] The firing treatment conditions can be appropriately adjusted according to the main component composition of the dielectric layer and the main component composition of the internal electrode. For example, firing can be performed at a temperature of 1100°C to 1400°C, for example, at a temperature of 1200°C to 1350°C. Also, firing can be performed for 0.5 hour to 8 hours, or 1 hour to 3 hours. Further, firing can be performed in a reducing atmosphere, for example, an atmosphere in which a mixed gas of nitrogen and hydrogen is humidified. When the internal electrode contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere is 1.0×10 -14 MPa to 1.0×10 -10 MPa may be sufficient.

[0139] After the firing treatment, annealing can be performed if necessary. Annealing is a treatment for re-oxidizing the dielectric layer, and when firing is performed in a reducing atmosphere, annealing can be performed. The annealing treatment conditions can also be appropriately adjusted according to the components of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 hour to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N 2 ) atmosphere, and the oxygen partial pressure may be 1.0×10 -9 MPa to 1.0×10 -5 MPa may be sufficient.

[0140] In the debinding process, firing process, or annealing process, in order to humidify nitrogen gas, mixed gas, etc., for example, a wetter can be used. In this case, the water temperature may be 5°C to 75°C. The debinding process, firing process, and annealing process can be performed continuously or independently.

[0141] Optionally, surface treatment such as sandblasting, laser irradiation, or barrel polishing can be performed on the third and fourth surfaces of the manufactured capacitor body 110. By performing such surface treatment, the ends of the first internal electrode and the second internal electrode are exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first external electrode and the second external electrode and the first internal electrode and the second internal electrode, and facilitating the formation of an alloy part.

[0142] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0143] As an example, after applying a paste for forming a sintered metal layer as the external electrode, it can be sintered to form a sintered metal layer.

[0144] The paste for forming a sintered metal layer can contain a conductive metal and glass. Since the description of the conductive metal and glass is the same as that described above, repeated descriptions are omitted. Also, the paste for forming a sintered metal layer can optionally contain a binder, a solvent, a dispersant, a plasticizer, an oxide powder, etc. As the binder, for example, ethyl cellulose, acrylic, butyral, etc. can be used, and as the solvent, for example, an organic solvent such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, or toluene, or an aqueous solvent can be used.

[0145] As a method of applying the paste for forming the sintered metal layer to the outer surface of the capacitor body 110, various printing methods such as dip method, screen printing, coating methods using a dispenser, etc., spraying methods using a spray, etc. can be used. The paste for forming the sintered metal layer is applied at least to the third and fourth surfaces of the capacitor body 110, and can also be applied to a part of the first surface, second surface, fifth surface, or sixth surface where the band portions of the first external electrode and the second external electrode are selectively formed.

[0146] Thereafter, the capacitor body 110 coated with the paste for forming the sintered metal layer is dried and sintered at a temperature of 700°C to 1000°C for 0.1 hour to 3 hours to form a sintered metal layer.

[0147] Optionally, a conductive resin layer can be formed by applying a paste for forming a conductive resin layer to the outer surface of the obtained capacitor body 110 and then curing it.

[0148] The paste for forming the conductive resin layer can contain a resin and optionally a conductive metal or a non-conductive filler. Since the explanations regarding the conductive metal and the resin are the same as those described above, repeated explanations are omitted. Also, the paste for forming the conductive resin layer can optionally contain a binder, a solvent, a dispersant, a plasticizer, an oxide powder, etc. As the binder, for example, ethyl cellulose, acrylic, butyral, etc. can be used, and as the solvent, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, etc., or aqueous solvents can be used.

[0149] As an example, the method of forming the conductive resin layer can be to dip the capacitor body 110 into the paste for forming the conductive resin layer and then cure it, or to print the paste for forming the conductive resin layer on the surface of the capacitor body 110 by a screen printing method or a gravure printing method, or to apply the paste for forming the conductive resin layer to the surface of the capacitor body 110 and then cure it to form.

[0150] Next, a plating layer is formed on the outside of the conductive resin layer.

[0151] As an example, the plating layer can be formed by a plating method, and can also be formed by sputtering or electroplating.

[0152] Hereinafter, the above-described embodiments will be described in more detail through examples. However, the following examples are for illustrative purposes only and do not limit the scope of the rights.

[0153] [Examples] (Manufacture of multilayer ceramic capacitor) Examples 1 to 13, Comparative Examples 1 and 2, and Reference Examples 1 to 6 BaCO 3 powder and TiO 2 powder were mixed to produce barium titanate (BaTiO 3 )-based main component powder, and silicon dioxide (SiO 2 ), dysprosium oxide (Dy 2 O 3 ), terbium oxide (Tb 2 O 3 ), and tin oxide (SnO 2 ) were mixed in the composition shown in Table 1 below to produce a dielectric slurry. At this time, each sub-component powder was mixed in terms of the content relative to 100 mol parts of the TiO 2 powder. At this time, the mixing was carried out by using zirconium balls (ZrO- 2 ball) as a dispersion medium, adding ethanol / toluene together with a wetting dispersant and polyvinyl butyral (PVB) resin as a binder, and then mechanically milling.

[0154] The produced dielectric slurry was used to manufacture a dielectric green sheet using an on-roll coater of the head discharge method.

[0155] A conductive paste layer containing nickel (Ni) was printed on the surface of a dielectric green sheet, and a dielectric green sheet (width × length × height = 3.2 mm × 2.5 mm × 2.5 mm) with the conductive paste layer formed thereon was laminated and pressure-bonded to produce a dielectric green sheet laminate.

[0156] The dielectric green sheet laminate was subjected to a plasticizing process in a nitrogen atmosphere at 400 °C or lower and then fired at a firing temperature of 1300 °C or lower and a hydrogen concentration of 1.0% H 2 under the following conditions.

[0157] Next, a multilayer ceramic capacitor was manufactured through processes such as external electrode formation and plating.

[0158]

Table 1

[0159] Evaluation 1: TEM-EDS analysis TEM-EDS (transmission electron microscope - energy dispersive spectroscopy) analysis was performed on the multilayer ceramic capacitor manufactured in Example 1, and the results are shown in FIGS. 5a to 5c and Table 2 below.

[0160] The TEM-EDS analysis was measured by the following method. The multilayer ceramic capacitor manufactured in Example 1 was put into an epoxy mixture and cured, and then the W-axis and T-axis direction surfaces (WT surfaces) of the capacitor body 110 were polished to a depth of 1 / 2 in the L-axis direction. After fixing, it was maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active region where the dielectric layer and the internal electrode layer intersect could be observed. The active region of the cross-sectional sample was measured by TEM. The TEM was measured using Xe-FIB (focused ion beam) under the conditions of an acceleration voltage of 200 kV and an analysis magnification of 225 k times so that at least one layer of the dielectric layer could be seen.

[0161] The dielectric grains and grain boundaries were confirmed through the transmission electron microscope (TEM) image of the measured cross-sectional sample (see Fig. 5a), and the contents of Si, Dy, Tb, and Sn present at the grain boundaries were confirmed by EDS analysis in the TEM image (see Figs. 5b and 5c).

[0162] Fig. 5a is a TEM image of the dielectric layer according to Example 1, Fig. 5b is a TEM-EDS analysis image of the dielectric layer according to Example 1, and Fig. 5c is an EDS-line analysis graph of the dielectric layer according to Example 1.

[0163] Through EDS-line analysis, for the portion shown in Fig. 5b, that is, the portion containing all the dielectric grains and grain boundaries, the atomic percentages of each component were confirmed for the line section connected by a straight line from the starting point to the ending point.

[0164] In Fig. 5c, the region from about 25 nm to about 35 nm corresponds to the grain boundary, and the region from then on to about 120 nm corresponds to the dielectric grains. Referring to Fig. 5c, it can be confirmed that the components of Tb, Dy, and Si in the grain boundary within the dielectric layer according to one embodiment are present in the order of decreasing content of Tb < Dy < Si.

[0165] Evaluation 2: Dielectric constant For the multilayer ceramic capacitors manufactured in Examples 1 to 13, Comparative Examples 1 and 2, and Reference Examples 1 to 6, the dielectric constant was measured under the conditions of 1 kHz and 0.5 V, and the results are shown in Table 2 below.

[0166] Evaluation 3: Reliability For the multilayer ceramic capacitors manufactured in Examples 1 to 13, Comparative Examples 1 and 2, and Reference Examples 1 to 6, the mean time to failure (hr), that is, MTTF (mean time to failure), at which a failure occurs was determined under the conditions of a temperature of 125 °C and a voltage of 9.45 V, and the results are shown in Table 2 below.

[0167] In Table 2 below, ○ indicates that the mean time between failures is 10 hours or more, △ indicates that the mean time between failures is 5 hours or more and less than 10 hours, and X indicates that the mean time between failures is less than 5 hours.

[0168] Evaluation 4: Density For the multilayer ceramic capacitors manufactured in Examples 1 to 14, Comparative Examples 1 and 2, and Reference Examples 1 to 9, SEM (scanning electron microscope) analysis was performed to confirm the number of pores in the dielectric layer, and the results are shown in Table 2 below.

[0169] The SEM analysis was performed as follows. The multilayer ceramic capacitors manufactured in Examples 1 to 14, Comparative Examples 1 and 2, and Reference Examples 1 to 9 were put into an epoxy mixture and cured. After that, the W-axis and T-axis direction surfaces (WT surfaces) of the capacitor body were polished to the 1 / 2 point in the L-axis direction, and after fixing, a cross-sectional sample was obtained while maintaining it in a vacuum atmosphere chamber so that the active part where the dielectric layer and the internal electrode layer intersect could be observed. Next, measurement was performed with a scanning electron microscope (SEM) at a size of about 2 μm × 2 μm at the active part of the cross-sectional sample so that at least three layers of the dielectric layer could be seen. As the SEM, for example, the Verios G4 product of Thermo Fisher Scientific was used, and the measurement conditions were 10 kV and 0.2 nA.

[0170] In Table 2 below, ○ indicates that the observed number of pores is less than 5, △ indicates that the observed number of pores is 5 or more and less than 10, and X indicates that the observed number of pores is 10 or more.

[0171] [Table 2]

[0172] Through Table 2, it can be seen that in the case of Examples 1 to 13 where the components of Tb, Dy, and Si exist in the grain boundaries in the dielectric layer in the order of decreasing content of Tb < Dy < Si, the dielectric constant, reliability, and density are all higher compared to Comparative Examples 1 and 2 that do not satisfy the above content order.

[0173] Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications can be made and implemented within the scope of the claims, the detailed description of the invention, and the accompanying drawings, and it is natural that these also belong to the scope of the present invention.

Description of Reference Numerals

[0174] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: First internal electrode 122: Second internal electrode 131: First external electrode 132: Second external electrode 10: Dielectric crystal grains (grain) 20: Grain boundaries (grain boundary)

Claims

1. a capacitor body including a dielectric layer and an internal electrode layer; an external electrode disposed outside the capacitor body; The dielectric layer includes a plurality of dielectric grains and a grain boundary located between adjacent dielectric grains, The dielectric crystal grains include a barium titanate-based main component including barium (Ba) and titanium (Ti), the grain boundaries contain silicon (Si), dysprosium (Dy) and terbium (Tb); The multilayer ceramic capacitor has a high content of terbium (Tb) < dysprosium (Dy) < silicon (Si) at the grain boundaries.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein a total content of the dysprosium (Dy) and the terbium (Tb) is more than 0.9 parts by mol and less than 2.0 parts by mol with respect to 100 parts by mol of the titanium (Ti).

3. 2. The multilayer ceramic capacitor according to claim 1, wherein the silicon (Si) is contained in an amount of 1.3 parts by mol or more and 2.5 parts by mol or less with respect to 100 parts by mol of the titanium (Ti).

4. 2. The multilayer ceramic capacitor according to claim 1, wherein the dysprosium (Dy) is contained in an amount of 0.6 parts by mol or more and 1.6 parts by mol or less with respect to 100 parts by mol of the titanium (Ti).

5. 2. The multilayer ceramic capacitor according to claim 1, wherein the terbium (Tb) is contained in an amount of 0.1 part by mol or more and 0.5 part by mol or less with respect to 100 parts by mol of the titanium (Ti).

6. 2. The multilayer ceramic capacitor according to claim 1, wherein the terbium (Tb) has a molar ratio of 0.3 to 0.8 relative to the dysprosium (Dy).

7. The multilayer ceramic capacitor according to claim 1 , wherein the dysprosium (Dy) has an atomic ratio to the silicon (Si) of more than 0.4 and less than 1.

0.

8. 2. The multilayer ceramic capacitor according to claim 1, wherein the terbium (Tb) has an atomic ratio to the silicon (Si) of more than 0.4 and less than 1.

0.

9. The multilayer ceramic capacitor of claim 1 , wherein the grain boundaries further contain tin (Sn).

10. 10. The multilayer ceramic capacitor according to claim 9, wherein the tin (Sn) is contained in an amount of 0.5 parts by mol or more and 2.5 parts by mol or less with respect to 100 parts by mol of the titanium (Ti).

11. 2. The multilayer ceramic capacitor according to claim 1, wherein the dielectric crystal grains have a diameter that is 60% or more and 90% or less of the total of the diameter of the dielectric crystal grains and the thickness of the crystal grain boundaries.

12. 2. The multilayer ceramic capacitor according to claim 1, wherein the diameter of the dielectric crystal grains is 80 nm or more and 120 nm or less.

13. 2. The multilayer ceramic capacitor according to claim 1, wherein the size (D50) of the dielectric crystal grains is 300 nm or less.

14. 2. The multilayer ceramic capacitor according to claim 1, wherein the thickness of the grain boundary is 10 nm or more and 100 nm or less.

15. 2. The multilayer ceramic capacitor according to claim 1, wherein the average thickness of the dielectric layers is 0.3 μm or more and 0.6 μm or less.

16. A step of manufacturing a dielectric slurry by mixing a barium titanate-based main component powder with a subcomponent powder including a silicon (Si)-containing compound, a dysprosium (Dy)-containing compound, and a terbium (Tb)-containing compound; preparing a dielectric green sheet using the dielectric slurry, and forming a conductive paste layer on a surface of the dielectric green sheet; laminating the dielectric green sheets having the conductive paste layers formed thereon to manufacture a dielectric green sheet laminate; sintering the dielectric green sheet laminate to manufacture a capacitor body including dielectric layers and internal electrode layers; forming an external electrode on one surface of the capacitor body; The dielectric layer includes a plurality of dielectric grains and a grain boundary located between adjacent dielectric grains, The dielectric crystal grains include a barium titanate-based main component including barium (Ba) and titanium (Ti), The grain boundaries contain silicon (Si), dysprosium (Dy), and terbium (Tb), and the grain boundaries have a decreasing content of terbium (Tb)<dysprosium (Dy)<silicon (Si) in the order of terbium (Tb)<dysprosium (Dy)<silicon (Si).

17. The barium titanate-based main component powder is prepared by mixing a titanium (Ti) precursor and a barium (Ba) precursor, For 100 molar parts of the titanium (Ti) precursor, The silicon (Si)-containing compound is present in an amount of 1.3 parts by mole or more and 2.5 parts by mole or less, The dysprosium (Dy)-containing compound is present in an amount of 0.6 molar parts or more and 1.6 molar parts or less, The method for producing a multilayer ceramic capacitor according to claim 16, wherein the terbium (Tb)-containing compound is contained in an amount of 0.1 parts by mol or more and 0.5 parts by mol or less.

18. The method for producing a multilayer ceramic capacitor according to claim 16, wherein the auxiliary component powder further contains a tin (Sn)-containing compound.

19. The barium titanate-based main component powder is prepared by mixing a titanium (Ti) precursor and a barium (Ba) precursor, The method for producing a multilayer ceramic capacitor according to claim 18, wherein the tin (Sn)-containing compound is contained in an amount of 0.5 to 2.5 parts by mol per 100 parts by mol of the titanium (Ti) precursor.