Integrated optical device, integrated optical module, and method for manufacturing integrated optical device
The integrated optical device addresses miniaturization and reliability challenges by using a metal layer connection system to securely bond the optical semiconductor element to the substrate, enhancing heat dissipation and maintaining alignment accuracy across temperature changes.
Patent Information
- Application Number
- JP2025040151
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-03-26
- Filing Date
- 2025-03-13
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2040-12-23
AI Technical Summary
Existing integrated optical devices face challenges in miniaturization due to their free-space optical systems, and they suffer from reliability issues such as decreased alignment accuracy and heat dissipation problems caused by temperature-dependent expansion and contraction of adhesives.
The integrated optical device includes a base with an optical semiconductor element, a substrate with an optical waveguide, and a metal layer connection system that ensures the optical semiconductor element is securely bonded to the substrate, enhancing heat dissipation and maintaining alignment accuracy across temperature changes.
This configuration enables efficient heat dissipation and maintains the reliability of the integrated optical device by minimizing temperature-induced instability and ensuring strong bonding between components.
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Figure 2025083493000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an integrated optical device, an integrated optical module using the same, and a method for manufacturing an integrated optical device. This application claims priority based on Japanese Patent Application No. 2020-007205 filed in Japan on January 21, 2020, and Japanese Patent Application No. 2020-056032 filed in Japan on March 26, 2020, the contents of which are incorporated herein by reference.
Background Art
[0002] With the increase in data traffic, the multifunctionalization of optical communication systems and various optical devices around us that utilize them has been progressing. Recently, along with multifunctionalization, higher density has been demanded, and multifunctional and small-sized optical devices have been studied.
[0003] In optical communication systems, research on silicon photonics technology has been underway. This involves integrating light-emitting elements, light-receiving elements, etc. into a silicon waveguide. Also, for devices such as wearable devices and small projectors around us that are multifunctional and portable, small optical modules are in demand.
[0004] Conventionally, mirrors and lenses have been used to integrate a plurality of optical elements into one. For example, Patent Document 1 discloses an optical module in which a laser diode (LD), an optical lens, a wavelength filter for total reflection, a wavelength separation filter, a fiber collimator, and a photodiode are integrated in a housing.
[0005] In such an optical module of Patent Document 1, light with a wavelength of 1.3 μm emitted from the LD passes through a condenser lens, a capillary, a collimator lens, and then through a wavelength filter for total reflection, totally reflects by the wavelength separation filter, and is received by a fiber collimator. Light with wavelengths of 1.49 μm and 1.55 μm input from the fiber collimator passes through the wavelength separation filter and is then separated from each other by the wavelength separation filter for total reflection. The light with a wavelength of 1.55 μm after separation is folded back by the wavelength filter for total reflection and enters the photodiode through the coupling lens. The light with a wavelength of 1.49 μm after separation enters the photodiode through the coupling lens.
[0006] Further, Patent Document 2 discloses an optical transceiver module in which light having a predetermined wavelength is incident on a wavelength multiplexer / demultiplexer having a wavelength selection filter and a mirror mounted on the front and back surfaces of a transparent substrate, and the wavelength multiplexer / demultiplexer can multiplex the light.
[0007] As a structure different from the integration using mirrors and lenses as in Patent Documents 1 and 2, for example, Patent Documents 3 and 4 disclose optical devices having a waveguide structure. In the multiplexer disclosed in Patent Document 3, fiber strands each having an arbitrary N thin claddings are fixed to a chip-type plate, and the output ends of the plurality of fiber strands are bundled together. Patent Document 4 discloses a hybrid integrated optical module in which a semiconductor chip having a semiconductor waveguide and mounted on a first substrate and a PLC chip are integrated.
[0008] In the hybrid integrated optical module of Patent Document 4, the end face of the semiconductor chip facing the PLC chip and the end face of the PLC chip facing the semiconductor chip are spaced apart from each other with a gap. Further, the semiconductor chip and the PLC chip are bonded with an ultraviolet curable adhesive.
Prior Art Documents
Patent Documents
[0009]
Patent Document 1
[0010] However, the optical devices disclosed in Patent Documents 1 and 2 described above have a large number of components, and the size of each component is large. They are configured by a free-space optical system using mirrors and lenses. Considering the size of each component and the configuration in the free-space optical system, there is a limit to miniaturizing the optical devices disclosed in Patent Documents 1 and 2. On the other hand, in an integrated optical device using a waveguide as disclosed in Patent Documents 3 and 4, it is easier to miniaturize compared to a free-space optical system.
[0011] However, in the hybrid integrated optical module 1 described in Patent Document 4, the semiconductor chip 2, the PLC chip 3, and the Si bench 5 and the PLC substrate 6 are respectively adhered by an ultraviolet curable adhesive 8 (FIG. 1, paragraph 0025, etc.). Therefore, expansion and contraction of the ultraviolet curable adhesive due to temperature changes caused by processes such as wire bonding of the light source occur, resulting in a decrease in the alignment accuracy between the components adhered to each other, and there is a risk of a decrease in the reliability of the integrated optical device. In addition, in order to operate an optical semiconductor element such as an LD, it is necessary to conduct electricity, and it is necessary to connect the optical semiconductor element to a power source on the substrate using a method such as wire bonding. However, if the strength of fixing the optical semiconductor element to the optical waveguide is not sufficient, there is a risk that the optical semiconductor element will slip off the optical waveguide during wire bonding. In addition, the heat generated in the semiconductor chip 2 and the PLC chip 3 is mainly dissipated through the packages on which these chips are mounted. However, due to the expansion and contraction of the ultraviolet curable adhesive, at least one of the semiconductor chip 2 and the PLC chip 3 is significantly separated from the package, resulting in insufficient heat dissipation and a problem that stable laser light output cannot be obtained in the emission of temperature-dependent laser light.
[0012] The present invention has been made in consideration of such circumstances, and an object thereof is to provide an integrated optical device in which the temperature dependence of laser emission is suppressed and the bonding strength of components to a package is improved, and an integrated optical module using the same.
Means for Solving the Problems
[0013] The integrated optical device according to the first aspect of the present invention includes a base, an optical semiconductor element provided on the surface of the base, a substrate, and an optical waveguide provided on the surface of the substrate. The incident surface of the optical waveguide is arranged to face the emission surface of the optical semiconductor element, and the light emitted from the optical semiconductor element can enter the optical waveguide. The optical semiconductor element is connected to the base via a metal layer, the base is connected to the substrate via another metal layer, and the bottom surface of the base on the side opposite to the surface of the base and the bottom surface of the substrate on the side opposite to the surface of the substrate are provided on substantially the same plane.
[0014] In the integrated optical device according to the above aspect, an antireflection film may be provided between the optical semiconductor element and the optical waveguide.
[0015] The integrated optical device according to the above aspect includes a plurality of the optical semiconductor elements. The plurality of optical semiconductor elements emit light having different wavelengths, and the optical waveguide is provided with a core into which each of the lights emitted by the plurality of optical semiconductor elements can enter. The plurality of cores may be gathered into one on the front side before reaching the emission surface of the optical waveguide.
[0016] In the integrated optical device according to the above aspect, the base has first to third outer surfaces. The first outer surface is the surface of the base, the optical semiconductor element is mounted on the first outer surface of the base, the semiconductor element is arranged to be optically coupled to the optical waveguide, the second outer surface of the base is connected to the side surface of the substrate via a metal layer, and at least a part of the third outer surface of the base may have a roughened region.
[0017] In the integrated optical device according to the above aspect, the surface roughness of the roughened region may be larger than the surface roughness of the first and second outer surfaces.
[0018] In the integrated optical device according to the above aspect, the maximum cross-sectional height (Rt) of the roughened region may be 5 μm or more and 50 μm or less, or 5 μm or more and 30 μm or less.
[0019] In the integrated optical device according to the above aspect, the base is substantially a rectangular parallelepiped, the second outer surface is the first side surface of the base, and the third outer surface may include the second side surface facing the first side surface, the third and fourth side surfaces adjacent to and facing each other with the first and second side surfaces, and the base bottom surface facing the upper surface.
[0020] In the integrated optical device according to the above aspect, the roughened region is provided on the third and fourth side surfaces, and the second side surface and the base bottom surface may be smooth surfaces where the roughened region is not provided.
[0021] In the integrated optical device according to the above aspect, the roughened region may be provided on the entire surfaces of the third and fourth side surfaces.
[0022] In the integrated optical device according to the above aspect, the roughened region may be provided in a front region closer to the first side surface than an intermediate position between the first side surface and the second side surface.
[0023] In the integrated optical device according to the above aspect, the roughened region may be provided in a lower region closer to the base bottom surface than an intermediate position between the upper surface and the base bottom surface.
[0024] In the integrated optical device according to the above aspect, two or more of the optical semiconductor elements may be provided.
[0025] In the integrated optical device according to the above aspect, the optical semiconductor element may include a first optical semiconductor element that outputs red light, a second optical semiconductor element that outputs green light, and a third optical semiconductor element that outputs blue light.
[0026] The integrated optical module according to the second aspect of the present invention includes the integrated optical device described in each of the above items and a package that houses the integrated optical device. The integrated optical device is fixed to an inner surface of the package via a bonding layer containing metal or resin, with both the bottom surface of the base and the bottom surface of the substrate.
[0027] In the integrated optical module according to the above aspect, the bonding layer may be made of a material in which a filler is mixed with resin.
[0028] In the integrated optical module according to the above aspect, the thermal conductivity of the bonding layer may be 4 W / m·K or more.
[0029] A method for manufacturing an integrated optical device according to a third aspect of the present invention includes preparing a base having first to third outer surfaces, with an optical semiconductor element mounted on the first outer surface, a metal bonding material provided on the second outer surface, and a roughened region formed on at least a part of the third outer surface. While irradiating the roughened region with laser light in a state where the second outer surface of the base is in contact with a side surface of a substrate provided with an optical waveguide, heating the metal bonding material together with the base, and adjusting the position of the optical semiconductor element so as to optically couple with the optical waveguide. By stopping the irradiation of the laser light, cooling the base, and metallically bonding the base and the substrate, the optical semiconductor element is fixed.
Advantages of the Invention
[0030] According to the present invention, it is possible to provide an integrated optical device that efficiently dissipates heat generated by the operation of an optical semiconductor element and does not cause operation instability due to temperature changes, and an integrated optical module using the same.
Brief Description of the Drawings
[0031]
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Embodiments for Carrying Out the Invention
[0032] Hereinafter, an embodiment to which the present invention is applied will be described with reference to the drawings. Note that the embodiments shown below are specifically described to better understand the gist of the invention, and do not limit the present invention unless otherwise specified. In addition, the drawings used in the following description may enlarge and show the main parts for the sake of clarity of the features of the present invention, and the dimensional ratios of each component are not necessarily the same as the actual ones. That is, the materials, dimensions, etc. exemplified in the following description are merely examples, and the present invention is not limited thereto, and can be appropriately modified and implemented within the scope where the effects of the present invention are achieved.
[0033] "First Embodiment" (Integrated Optical Device) As shown in Fig. 1, the integrated optical device 10 of this embodiment includes a sub-carrier (base) 20, an LD (optical semiconductor element) 30 provided on the upper surface (surface) 21 of the sub-carrier 20, a substrate 40, and a PLC (optical waveguide) 50 provided on the upper surface (surface) 41 of the substrate 40.
[0034] The integrated optical device 10 is a multiplexer that combines lights of the three primary colors of light, namely red (R), green (G), and blue (B). The integrated optical device 10 can be applied, for example, as a multiplexer mounted on a head-mounted display. The LD (optical semiconductor element) 30, which is the light source to be used, is not limited to red (R), green (G), and blue (B). In this embodiment, the LD (optical semiconductor element) 30 of the three primary colors of light shown as an example can use various laser elements such as commercially available red light, green light, and blue light. It may be selected appropriately according to the desired application. For example, for red light, light with a peak wavelength of 610 nm or more and 750 nm or less can be used; for green light, light with a peak wavelength of 500 nm or more and 560 nm or less can be used; and for blue light, light with a peak wavelength of 435 nm or more and 480 nm or less can be used.
[0035] The integrated optical device 10 includes an LD 30-1 that emits red light, an LD 30-2 that emits green light, and an LD 30-3 that emits blue light. The LD 30-1, 30-2, and 30-3 are arranged at intervals from each other in a direction substantially orthogonal to the emission direction of the light emitted from each LD, and are provided on the upper surface 21 of individual sub-carriers 20. The LD 30-1 is provided on the upper surface 21-1 of the sub-carrier 20-1. The LD 30-2 is provided on the upper surface 21-2 of the sub-carrier 20-2. The LD 30-3 is provided on the upper surface 21-3 of the sub-carrier 20-3. Hereinafter, for the reference sign Z of any component of the integrated optical device 10, regarding the content common to the components of the reference signs Z-1, Z-2,..., Z-K, these may be collectively described as the reference sign Z. The aforementioned K is a natural number of 2 or more. Needless to say, light other than red (R), green (G), and blue (B) shown as this embodiment can also be used, and the mounting order of red (R), green (G), and blue (B) described with reference to the drawings does not necessarily have to be this order and can be changed as appropriate.
[0036] LD30 is mounted on the sub-carrier 20 as a bare chip. The sub-carrier 20 is made of, for example, aluminum nitride (AlN), aluminum oxide (Al 2 O 3 ), silicon (Si), or the like. As shown in FIG. 4, metal layers 75 and 76 are provided between the sub-carrier 20 and the LD30. The sub-carrier 20 and the LD30 are connected via the metal layers 75 and 76. As a method for forming the metal layers 75 and 76, a known method can be used without particular limitation, and known techniques such as sputtering, vapor deposition, and application of pasted metal can be used. The metal layers 75 and 76 include, for example, one or more metals selected from the group consisting of gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), nickel (Ni), titanium (Ti), tantalum (Ta), tungsten (W), an alloy of gold (Au) and tin (Sn), a tin (Sn)-silver (Ag)-copper (Cu) based solder alloy (SAC), SnCu, InBi, SnPdAg, SnBiIn, and PbBiIn, and may be composed of one or more metals selected from this group.
[0037] The substrate 40 is made of silicon (Si). The PLC50 is manufactured on the upper surface 41 integrally with the substrate 40 by a semiconductor process including known photolithography and dry etching used when forming a fine structure such as an integrated circuit. As shown in FIGS. 1 and 2, the PLC50 is provided with cores 51-1, 51-2, 51-3 having the same number as the LD30-1, 30-2, 30-3 constituting the optical waveguide, and a cladding 52 surrounding the cores 51-1, 51-2, 51-3. The thickness of the cladding 52 and the widthwise dimension of the cores 51-1, 51-2, 51-3 are not particularly limited. For example, cores 51-1, 51-2, 51-3 having a widthwise dimension of about several microns are disposed in the cladding 52 having a thickness of about 50 μm.
[0038] The cores 51-1, 51-2, 51-3 and the cladding 52 are made of, for example, quartz. The refractive indices of the cores 51-1, 51-2, 51-3 are higher than that of the cladding 52 by a predetermined value. Due to this, the light incident on each of the cores 51-1, 51-2, 51-3 propagates through each core while undergoing total internal reflection at the interface between each core and the cladding 52. The cores 51-1, 51-2, 51-3 are doped with an amount of impurities such as germanium (Ge) according to the aforementioned predetermined value.
[0039] Hereinafter, the emission direction of the light emitted from the LD 30 is defined as the y direction. In the plane including the y direction, a direction orthogonal to the y direction and in which the LD 30-1, 30-2, 30-3 are arranged at intervals from each other is defined as the x direction. A direction orthogonal to the x direction and the y direction and from the sub-carrier 20 toward the LD 30 is defined as the z direction. At the incident surface 61 of the PLC 50, the cores 51-1, 51-2, 51-3 are arranged in alignment with the optical axes of the light emitted from the LD 30-1, 30-2, 30-3 with respect to the x direction and the z direction.
[0040] As shown in FIGS. 1 and 4, the cores 51-1, 51-2, 51-3 are gathered together into one before reaching the emission surface 64 of the PLC 50. That is, the cores 51-1, 51-2, 51-3 approach each other sequentially as they go forward in the y direction and merge into one core 51-4. In order to prevent leakage light from occurring from the cores 51-1, 51-2, 51-3, it is preferable that each of the cores 51-1, 51-2, 51-3 is connected to the core 51-4 with a radius of curvature equal to or greater than a predetermined radius of curvature.
[0041] As shown in FIG. 3, the incident surface 61 of the PLC 50 is arranged to face the emission surface 31 of the LD 30. Specifically, the emission surface 31-1 of the LD 30-1 faces the incident surface 61-1 of the core 51-1. In the x direction and the z direction, the optical axis of the red light emitted from the LD 30-1 and the center of the incident surface 61-1 are substantially overlapped. Similarly, the emission surface 31-2 of the LD 30-2 faces the incident surface 61-2 of the core 51-2. In the x direction and the z direction, the optical axis of the green light emitted from the LD 30-2 and the center of the incident surface 61-2 are substantially overlapped. The emission surface 31-3 of the LD 30-3 faces the incident surface 61-3 of the core 51-3. In the x direction and the z direction, the optical axis of the blue light emitted from the LD 30-3 and the center of the incident surface 61-3 are substantially overlapped. With such a configuration and arrangement, at least a part of the red light, green light, and blue light emitted from the LD 30-1, 30-2, and 30-3 can be incident on the cores 51-1, 51-2, and 51-3.
[0042] As shown in FIG. 1, the red light, green light, and blue light emitted from the LD 30-1, 30-2, and 30-3 are respectively incident on the cores 51-1, 51-2, and 51-3 and then propagate through each core. The cores 51-1, 51-2 and the red light and green light propagating through these cores are combined at a predetermined combination position 57-1 (see FIG. 3) behind the combination position 57-2 in the y direction. The core 51-7 (see FIG. 3) formed by combining the cores 51-1 and 51-2, the core 51-3, and the red light, green light, and blue light propagating through these cores are combined at the combination position 57-2. The red light, green light, and blue light condensed at the combination position 57-2 propagate through the core 51-4 and reach the emission surface 64. The three-color light emitted from the emission surface 64 is used as signal light or the like according to the use purpose of the integrated optical device 10, for example.
[0043] As shown in FIG. 4, the sub-carrier 20 is connected to the substrate 40 via the first metal layer 71, the second metal layer 72, and the third metal layer 73. In the present embodiment, on the side surface (first side surface) 22 (22-1, 22-2, 22-3) of the sub-carrier 20 facing the substrate 40 and the side surface (second side surface) 42 of the substrate 40 facing the sub-carrier 20, they are connected via the first metal layer 71, the second metal layer 72, the third metal layer 73, and the anti-reflection film 81. The melting point of the metal layer 75 is higher than the melting point of the third metal layer 73.
[0044] The first metal layer 71 is provided in a state of being in contact with the side surface 22 by sputtering, evaporation, or the like, and includes, for example, one or more metals selected from the group consisting of gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), nickel (Ni), titanium (Ti), and tantalum (Ta), and may be composed of one or more metals selected from this group. Preferably, the first metal layer 71 includes at least one metal selected from the group consisting of gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), and nickel (Ni). The second metal layer 72 is provided in a state of being in contact with the side surface 42 by sputtering, evaporation, or the like, and includes, for example, one or more metals selected from the group consisting of titanium (Ti), tantalum (Ta), and tungsten (W), and may be composed of one or more metals selected from this group. Preferably, tantalum (Ta) is used for the second metal layer 72. The third metal layer 73 is interposed between the first metal layer 71 and the second metal layer 72, and includes, for example, one or more metals selected from the group consisting of aluminum (Al), copper (Cu), AuSn, SnCu, InBi, SnAgCu, SnPdAg, SnBiIn, and PbBiIn, and may be composed of one or more metals selected from this group. Preferably, AuSn, SnAgCu, and SnBiIn are used for the third metal layer 73.
[0045] The thickness of the first metal layer 71, that is, the size of the first metal layer 71 in the y direction, is, for example, not less than 0.01 μm and not more than 5.00 μm. The thickness of the second metal layer 72, that is, the size of the second metal layer 72 in the y direction, is, for example, not less than 0.01 μm and not more than 1.00 μm. The thickness of the third metal layer 73, that is, the size in the y direction, is, for example, not less than 0.01 μm and not more than 5.00 μm. Further, the thickness of the third metal layer 73 is preferably larger than the respective thicknesses of the first metal layer 71 and the second metal layer 72. In such a configuration, the above-described respective roles of the first metal layer 71, the second metal layer 72, and the third metal layer 73 are favorably exhibited, and the entry of the material of the first metal layer 71 into the substrate 40 and the decrease in the adhesive strength between the metal layers are suppressed. The thicknesses of the first metal layer 71, the second metal layer 72, and the third metal layer 73 are measured, for example, by spectroscopic ellipsometry.
[0046] In the present embodiment, the first metal layer 71 is provided on the side surface facing the substrate 40 or the PLC 50 in substantially the entire area of the side surface 22 without contacting the metal layer 75. The front ends in the z direction, that is, the upper ends, of the second metal layer 72 and the third metal layer 73 reach, for example, the same position as the upper end of the first metal layer 71 on the front side in the z direction. The rear ends in the z direction, that is, the lower ends, of the second metal layer 72 and the third metal layer 73 reach, for example, the same position as the lower ends of the sub-carrier 20, the first metal layer 71, and the substrate 40. When viewed along the y direction, the first metal layer 71 is formed larger than the sub-carrier 20 in the x direction.
[0047] As in the foregoing configuration, it is preferable that the area of the first metal layer 71, that is, the size in the plane including the x-direction and the z-direction, is substantially the same as the areas of the second metal layer 72 and the third metal layer 73, and the lower end thereof reaches the same position as the lower end of the sub-carrier 20. In such a configuration, the connection strength of the sub-carrier 20 to the substrate 40 is ensured to the maximum extent. That is, for example, even when each of the LD 30 and the sub-carrier 20 and the internal electrode pad 202 corresponding to each LD 30 among the plurality of internal electrode pads 202 are connected by the wire 95 using wire bonding, it is possible to suppress the disconnection of the connection between the sub-carrier 20 and the substrate 40. Further, since the lower ends of the sub-carrier 20, the first metal layer 71, the second metal layer 72, the third metal layer 73, and the substrate 40 reach the same position, the heat dissipation path from the sub-carrier 20 can be increased. Incidentally, the area of the first metal layer 71 may be smaller than the areas of the second metal layer 72 and the third metal layer 73.
[0048] In the integrated optical device 10 according to the present embodiment, an antireflection film 81 is provided between the LD 30 and the PLC 50. For example, the antireflection film 81 is integrally formed on the side surface 42 of the substrate 40 and the incident surface 61 of the PLC 50. However, the antireflection film 81 may be formed only on the incident surface 61 of the PLC 50.
[0049] In the integrated optical device 10, an antireflection film 82 is also provided on the exit surface 64 in addition to the incident surface 61. Note that FIG. 1 shows a schematic configuration of the integrated optical device 10, and the first metal layer 71, the second metal layer 72, the third metal layer 73, and the antireflection films 81 and 82 are omitted.
[0050] The antireflection films 81 and 82 are films for preventing the incident light or the emitted light to the PLC 50 from being reflected in the direction opposite to the direction in which the incident light or the emitted light enters each surface from the incident surface 61 or the exit surface 64, and for increasing the transmittance of the incident light or the emitted light. The antireflection films 81 and 82 are, for example, multilayer films formed by alternately laminating a plurality of types of dielectrics with a predetermined thickness corresponding to the wavelengths of red light, green light, and blue light, which are incident light. Examples of the foregoing dielectric include titanium oxide (TiO 2 ) and tantalum oxide (Ta2 O 5 )), silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ) and the like.
[0051] The emission surface 31 of LD30 and the incident surface 61 of PLC50 are arranged at a predetermined interval. The incident surface 61 faces the emission surface 31, and there is a gap 70 between the emission surface 31 and the incident surface 61 in the y direction. Since the integrated optical device 10 is exposed to the air, the gap 70 is filled with air. Considering that the integrated optical device 10 is used in a head-mounted display and the required light quantity and the like in the head-mounted display, the size of the gap (interval) 70 in the y direction is, for example, larger than 0 μm and 5 μm or less.
[0052] As shown in FIG. 4, in the integrated optical device 10 of the present embodiment, the bottom surface (base bottom surface) 23 facing the upper surface (surface) 21 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 facing the upper surface (surface) 41 of the substrate 40 are provided so as to be located on substantially the same plane S as each other. In the integrated optical device 10 of the present embodiment, since the sub-carrier (base) 20 and the substrate 40 are connected via a metal layer, the occurrence of positional deviation due to the heating process is significantly suppressed as compared with the hybrid integrated optical module of Patent Document 4 having a configuration connected by an adhesive. Here, the substantially same plane S allows a slight deviation between the bottom surface (base bottom surface) 23 and the bottom surface (substrate bottom surface) 43. Specifically, a deviation within a range of 20 μm or less with respect to the thickness of the substrate 40 along the z direction is allowed, but the smaller the deviation, the better, and it is more preferably 10 μm or less, and even more preferably 5 μm or less.
[0053] If, as in this embodiment, the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 are formed so as to be on substantially the same plane S, both the sub-carrier 20 and the substrate 40 can be joined, for example, on one plane of a package or a heat sink. As a result, compared with a conventional integrated optical device in which the bottom surface of the sub-carrier and the bottom surface of the substrate are not on substantially the same plane and can be joined only at one of the bottom surfaces, the integrated optical device 10 of this embodiment can efficiently dissipate the heat generated by the operation of the LD (optical semiconductor element) 30 from both the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40.
[0054] Also, as in this embodiment, by providing the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 on substantially the same plane S, when joining the integrated optical device 10 on one plane of another substrate or the like, it is possible to join on one plane of the substrate or the like with both the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40. Therefore, it is possible to realize an integrated optical device 10 with high joining strength and excellent shock resistance. For example, when the bottom surface of the sub-carrier is located in the +z direction with respect to the bottom surface of the substrate, that is, when the bottom surface of the sub-carrier is spaced upward from the base 180 (see FIG. 7) of the package 110 with respect to the bottom surface of the substrate, the size of the first side surface of the sub-carrier is small, heat dissipation cannot be efficiently performed, and the joining strength with the substrate is not sufficient. When wire bonding described later is performed, the sub-carrier may slip. However, in the integrated optical device 10 according to this embodiment, since the size of the side surface 22 is sufficiently ensured and heat dissipation from the bottom surface 23 and the side surface 22 and joining with the substrate 40 can be sufficiently performed, heat dissipation and shock resistance can be improved. By improving the shock resistance, for example, the LD 30 is maintained at an optimal position with respect to the PLC 50. Therefore, the integrated optical device 10 can exhibit desired light utilization efficiency and optical characteristics, and the reliability of the integrated optical device 10 can be enhanced.
[0055] Next, the manufacturing method of the integrated optical device 10 will be briefly described. FIG. 5 is a diagram for explaining the manufacturing method of the integrated optical device 10. First, the bare chip LD30 is mounted on the upper surface 21 of the sub-carrier 20 using a known method. For example, a metal layer 75 is formed on the upper surface 21 of the sub-carrier 20 by sputtering or vapor deposition or the like. Further, a metal layer 76 is formed on the lower surface 33 of the LD30 (for example, the lower surface 33-1 of the LD30-1) by sputtering or vapor deposition or the like. Next, as shown in FIG. 5(a), for example, laser light is irradiated from the laser 90 to the sub-carrier 20, and the sub-carrier 20 is heated to such an extent that only the sub-carrier 20 is not melted and deformed. Due to heat transfer from the sub-carrier 20, the metal layers 75 and 76 are softened or melted and then cooled. Thereby, the LD30 is joined to the upper surface 21 of the sub-carrier 20 via the metal layers 75 and 76. Also, before or after mounting the LD30 on the sub-carrier 20, a first metal layer 71 is formed on the side surface 22 of the sub-carrier 20 by sputtering or vapor deposition or the like.
[0056] Next, the PLC 50 is formed on the upper surface 41 of the substrate 40 by a known semiconductor process. Subsequently, antireflection films 81 and 82 and an antireflection film (not shown) are formed on the incident surface 61 and the exit surface 64. Further, a second metal layer 72 and a third metal layer 73 are formed in this order behind the antireflection film 81 in the y direction by sputtering or vapor deposition or the like.
[0057] Next, in the x direction and the z direction, the emission surfaces 31 of the LD30 and the incident surfaces 61 of the cores 51-1, 51-2, and 51-3 that correspond to each other are opposed to each other with a gap in the y direction. The optical axis of each color light emitted from the LD30 and the center of the incident surface 61 of the corresponding core are substantially overlapped. At this time, the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 are arranged so as to be substantially on the same plane.
[0058] Next, as shown in FIG. 5(b), laser light is irradiated from the laser 90 onto the sub-carrier 20, and the first metal layer 71, the second metal layer 72, and the third metal layer 73 are softened or melted by heat transfer from the sub-carrier 20. The relative positions of the LD 30 and the PLC 50 are adjusted, and the sub-carrier 20 on which the LD 30 is mounted is joined to the substrate 40 on which the PLC 50 is formed so that the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 are substantially on the same plane. Through such steps, an integrated optical device 10 can be manufactured in which the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 are positioned substantially on the same plane with respect to each other.
[0059] (Integrated optical module) Next, an integrated optical module having the integrated optical device of the present embodiment will be described.
[0060] The integrated optical module 100 of the present embodiment may be housed in a package 110, for example, as shown in FIGS. 6 and 7. The integrated optical module 100 includes the above-described integrated optical device 10 and a package 110. The package 110 includes a main body 102 having a cavity structure and a cover 105 covering the main body 102.
[0061] The main body 102 has a box-shaped housing portion 107 in which the integrated optical device 10 is housed and an electrode portion 108 adjacent to the housing portion 107. The main body 102 is formed of, for example, ceramic or the like. An opening is formed in the upper surface of the housing portion 107. A metal film 112 such as kovar is formed on the upper surface of the housing portion 107 at the periphery of the opening in a top view. The cover 105 covers the opening formed in the upper surface of the housing portion 107 without a gap via the metal film 112. When the housing portion 107 is hermetically sealed with the cover 105, an inert gas such as nitrogen (N 2 ) is enclosed in the internal space of the housing portion 107. That is, the housing portion 107 is hermetically sealed by the cover 105. The internal space of the housing portion 107 is filled with an inert gas. As a result, the gap 70 (see FIG. 4) is filled with an inert gas.
[0062] The electrode part 108 is arranged on the front side in the y direction of the accommodating part 107, that is, on the rear side in the y direction. The upper surface of the electrode part 108 is located below the upper surface of the accommodating part 107. The bottom surface of the electrode part 108 is located at substantially the same height as the bottom surface of the accommodating part 107. A plurality of external electrode pads 210 are provided on the upper surface of the electrode part 108 at intervals in the x direction.
[0063] As shown in FIGS. 7 and 8, a base 180 for installing the integrated optical device 10 is provided at a predetermined position on the bottom wall portion 131 of the accommodating part 107. The integrated optical device 10 is provided on the base 180. That is, the integrated optical device 10 is arranged in the internal space of the accommodating part 107. Since the bottom surface (base bottom surface) 23 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 of the substrate 40 are formed so as to be located on substantially the same plane S, the integrated optical device 10, the sub-carrier 20, and the substrate 40 are all joined to the upper surface 180a (one inner surface) of the base 180.
[0064] The bottom surface (base bottom surface) 23 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 only need to be joined via an adhesive layer 182 between them and the upper surface 180a (one inner surface) of the base 180. As this adhesive layer 182, a material in which a filler is mixed with a resin is used to enhance the thermal conductivity. Examples of the resin constituting the adhesive layer 182 include epoxy resin. In addition, as the filler for improving the thermal conductivity of the resin, copper powder, aluminum powder, alumina powder, etc. can be used. In addition, in order to maintain a certain level or more of thermal conductivity, such an adhesive layer 182 preferably has a thermal conductivity of 0.5 W / m·K or more, more preferably 1 W / m·K or more, and even more preferably 4 W / m·K or more.
[0065] In this way, by bonding both the sub-carrier (base) 20 of the integrated optical device 10 and the substrate 40 to the upper surface 180a of the base 180 of the package 110, the heat generated by the operation of the LD 30 can be efficiently radiated from both the bottom surface (base bottom surface) 23 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 of the substrate 40 toward the base 180. Further, by bonding both the bottom surface (base bottom surface) 23 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 of the substrate 40 using an adhesive layer made of a resin mixed with a filler, heat can be efficiently propagated from both the bottom surface (base bottom surface) 23 of the sub-carrier (base) 20 and the bottom surface (substrate bottom surface) 43 of the substrate 40 toward the base 180.
[0066] On the bottom wall portion 131 at the position between the base 180 below the sub-carrier 20 and the external electrode pad 210 in the y direction, a plurality of internal electrode pads 202 are provided at intervals in the x direction. Each of the LD 30 and the sub-carrier 20 and the internal electrode pad 202 corresponding to each LD 30 among the plurality of internal electrode pads 202 are connected by a wire 95 using a method such as wire bonding. For example, each of the LD 30-1 and the sub-carrier 20-1 and each of the two internal electrode pads 202-1 are individually connected by a wire 95-1. Each of the LD 30-2 and the sub-carrier 20-2 and each of the two internal electrode pads 202-2 are individually connected by a wire 95-2. Each of the LD 30-3 and the sub-carrier 20-3 and each of the two internal electrode pads 202-3 are individually connected by a wire 95-3.
[0067] Each of the internal electrode pads 202-1, 202-2, and 202-3 is connected to a different external electrode pad 210. As described above, the external electrode pads 210 electrically connected to each of the internal electrode pads 202-1, 202-2, and 202-3 are electrically connected to a power supply (not shown) and the like. That is, in the integrated optical device 10, the LD 30 and a power supply (not shown) are connected by the wire 95, the internal electrode pads 202-1, 202-2, and 202-3, and the external electrode pads 210. By supplying power from a power supply (not shown) to the external electrode pads 210 corresponding to each of the internal electrode pads 202-1, 202-2, and 202-3, red light, green light, and blue light are emitted from the LD 30-1, 30-2, and 30-3.
[0068] In the side wall portion 132 of the housing portion 107, an opening 133 is formed in the side wall portion 132 facing the emission surface 31 of the PLC 50 of the integrated optical device 10. The opening 133 is formed with the position intersecting the optical axes of the three-color light emitted from the core 51-4 of the PLC 50 in the side wall portion 132 as a substantially center. The opening 133 is formed larger than the size on the surface of the side wall portion 132 of the three-color light emitted from the core 51-4 and spreading in the internal space of the housing portion 107. As shown in FIGS. 12 and 13, the opening 133 is covered without a gap by the glass plate 220 from the outside of the side wall portion 132. That is, the housing portion 107 is hermetically sealed by the glass plate 220 in addition to the cover 105. Anti-reflection films (not shown) are provided on both plate surfaces of the glass plate 220.
[0069] The opening 133 is a window through which the three-color light emitted from the core 51-4 of the PLC 50 passes and propagates to the outside of the package 110. As shown in FIG. 14, the three-color light LL emitted from the core 51-4 of the PLC 50 diffuses around the y-axis, passes through the opening 133 and the glass plate 220, and travels to the back side in the y-direction of the package 110, that is, the front in the y-direction. For example, a collimating device 300 provided with a collimating lens 310 can be arranged on the back side in the y-direction from the side wall portion 132-1 of the package 110. By adjusting the distance between the emission surface 31 in the y-direction and the collimating lens 310 to the focal length of the collimating lens 310 and aligning the center of the collimating lens 310 on the optical axis of the three-color light LL, the three-color light LL emitted from the core 51-4 is collimated and becomes parallel light.
[0070] "Second Embodiment" (Integrated Optical Device) FIGS. 11 to 14 are diagrams for explaining the integrated optical device 10A according to the second embodiment. FIG. 11 is a perspective view of the integrated optical device 10A. FIG. 12 is a cross-sectional view of the incident surface 61 of the PLC 50 of the integrated optical device 10A shown in FIG. 11. FIG. 13 is a plan view of a part of the integrated optical device 10A shown in FIG. 11. FIG. 14 is a cross-sectional view of the integrated optical device 10A shown in FIG. 11 taken along the line B-B'. FIG. 15 is a diagram for explaining the surface roughness of each surface of the sub-carrier 20. The integrated optical device 10A according to the second embodiment is different from the sub-carrier 20 of the integrated optical device 10 according to the first embodiment in the configuration of the sub-carrier 420. In the integrated optical device 10A, the same components as those in the integrated optical device 10 may be denoted by the same reference numerals and the description thereof may be omitted.
[0071] As shown in FIG. 11, the integrated optical device 10A according to the present embodiment includes a sub-carrier (base) 420, an LD (optical semiconductor device) 30 provided on the upper surface 421 of the sub-carrier 420, a substrate 40, and a PLC (optical waveguide device) 50 provided on the upper surface 41 of the substrate 40.
[0072] The integrated optical device 10A is a multiplexer that combines lights of the three primary colors of light, namely red (R), green (G), and blue (B). Therefore, the integrated optical device 10A includes an LD30-1 that emits red light, an LD30-2 that emits green light, and an LD30-3 that emits blue light. Such an integrated optical device 10A can be applied, for example, as a multiplexer mounted on a head-mounted display or smart glasses. In the present embodiment, red light means light having a peak wavelength of 690 nm or more and 710 nm or less. Green light means light having a peak wavelength of 535 nm or more and 555 nm or less. Blue light means light having a peak wavelength of 425 nm or more and 445 nm or less.
[0073] The LD30-1, 30-2, and 30-3 are arranged at intervals from each other in a direction substantially orthogonal to the emission direction of the light emitted from each LD, and are provided on the upper surfaces 421 of the individual sub-carriers 420. The LD30-1 is provided on the upper surface 421-1 of the sub-carrier 420-1. The LD30-2 is provided on the upper surface 421-2 of the sub-carrier 420-2. The LD30-3 is provided on the upper surface 421-3 of the sub-carrier 420-3. Hereinafter, for the reference sign Z of any component of the integrated optical device 10A, for the content common to the components of the reference signs Z-1, Z-2,..., Z-K, these may be collectively described as the reference sign Z. The aforementioned K is a natural number of 2 or more.
[0074] The LD30 is mounted on the sub-carrier 420 as a bare chip. The sub-carrier 420 is made of, for example, aluminum nitride (AlN), aluminum oxide (Al 2 O 3 ), silicon (Si), or the like. As shown in FIG. 14, metal layers 75 and 76 are provided between the sub-carrier 420 and the LD30. The sub-carrier 420 and the LD30 are connected via the metal layers 75 and 76.
[0075] As a method for forming the metal layers 75 and 76, any known method may be used without particular limitation, and known techniques such as sputtering, vapor deposition, and application of pasty metal can be used. The metal layers 75 and 76 are composed of one or more metals selected from the group consisting of, for example, gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), nickel (Ni), titanium (Ti), tantalum (Ta), tungsten (W), an alloy of gold (Au) and tin (Sn), a tin (Sn)-silver (Ag)-copper (Cu) based solder alloy (SAC), SnCu, InBi, SnPdAg, SnBiIn, and PbBiIn.
[0076] The substrate 40 is made of silicon (Si). The PLC 50 is fabricated on the upper surface 41 so as to be integrated with the substrate 40 by a semiconductor process including known photolithography and dry etching used when forming fine structures such as integrated circuits. As shown in FIGS. 11 and 12, the PLC 50 is provided with cores 51-1, 51-2, 51-3 having the same number as the LD 30-1, 30-2, 30-3 constituting the optical waveguide, and a cladding 52 surrounding the cores 51-1, 51-2, 51-3. The thickness of the cladding 52 and the width of the cores 51-1, 51-2, 51-3 are not particularly limited. For example, cores 51-1, 51-2, 51-3 having a width of about several microns are disposed in the cladding 52 having a thickness of about 50 μm.
[0077] The cores 51-1, 51-2, 51-3 and the cladding 52 are made of, for example, quartz. The refractive index of the cores 51-1, 51-2, 51-3 is higher than that of the cladding 52 by a predetermined value. As a result, the light incident on each of the cores 51-1, 51-2, 51-3 propagates through each core while undergoing total reflection at the interface between each core and the cladding 52. The cores 51-1, 51-2, 51-3 are doped with an impurity such as germanium (Ge) in an amount corresponding to the aforementioned predetermined value.
[0078] Hereinafter, the emission direction of the light emitted from LD30 is defined as the y-direction. The x-direction is defined as the direction that is orthogonal to the y-direction within the plane containing the y-direction and in which LD30-1, 30-2, and 30-3 are arranged at intervals from each other. The z-direction is defined as the direction that is orthogonal to the x-direction and y-direction and from the sub-carrier 420 toward LD30. At the incident surface 61 of the PLC50, the cores 51-1, 51-2, and 51-3 are arranged in alignment with the optical axes of the light emitted from LD30-1, 30-2, and 30-3 with respect to the x-direction and z-direction.
[0079] As shown in FIGS. 11 and 13, the cores 51-1, 51-2, and 51-3 are gathered together into one before reaching the emission surface 64 of the PLC50. That is, the cores 51-1, 51-2, and 51-3 approach each other sequentially as they go forward in the y-direction and merge into one core 51-4. So that leakage light from the cores 51-1, 51-2, and 51-3 does not occur, it is preferable that each of the cores 51-1, 51-2, and 51-3 is connected to the core 51-4 with a radius of curvature equal to or greater than a predetermined radius of curvature.
[0080] As shown in FIG. 13, the incident surface 61 of the PLC50 is arranged to face the emission surface 31 of the LD30. Specifically, the emission surface 31-1 of the LD30-1 faces the incident surface 61-1 of the core 51-1. In the x-direction and z-direction, the optical axis of the red light emitted from the LD30-1 and the center of the incident surface 61-1 are substantially overlapped. The emission surface 31-2 of the LD30-2 faces the incident surface 61-2 of the core 51-2. In the x-direction and z-direction, the optical axis of the green light emitted from the LD30-2 and the center of the incident surface 61-2 are substantially overlapped. The emission surface 31-3 of the LD30-3 faces the incident surface 61-3 of the core 51-3. In the x-direction and z-direction, the optical axis of the blue light emitted from the LD30-3 and the center of the incident surface 61-3 are substantially overlapped. With such a configuration and arrangement, at least a part of the red light, green light, and blue light emitted from LD30-1, 30-2, and 30-3 can be incident on the cores 51-1, 51-2, and 51-3.
[0081] As shown in FIG. 11, the red light, green light, and blue light emitted from LD30-1, 30-2, and 30-3 are incident on cores 51-1, 51-2, and 51-3, respectively, and then propagate through each core. Cores 51-1 and 51-2 and the red light and green light propagating through these cores are combined at a predetermined combining position 57-1 (see FIG. 13) behind the combining position 57-2 in the y direction. The core 51-7 (see FIG. 13) formed by the combination of cores 51-1 and 51-2, core 51-3, and the red light, green light, and blue light propagating through these cores are combined at the combining position 57-2. The red light, green light, and blue light focused at the combining position 57-2 propagate through core 51-4 and reach the exit surface 64. The three-color light emitted from the exit surface 64 is used as signal light or the like, for example, according to the purpose of use of the integrated optical device 10A.
[0082] As shown in FIG. 14, the sub-carrier 420 is connected to the substrate 40 via the first metal layer 71, the second metal layer 72, and the third metal layer 73. In the present embodiment, the side surface (first side surface) 422 (422-1, 422-1, 422-3) of the sub-carrier 420 facing the substrate 40 is connected to the side surface 42 of the substrate 40 via the first metal layer 71, the second metal layer 72, the third metal layer 73, and the antireflection film 81. The melting point of the metal layer 75 is higher than the melting point of the third metal layer 73.
[0083] The first metal layer 71 is provided in a state of being in contact with the first side surface 422 by sputtering, vapor deposition, or the like, and is composed of one or more metals selected from the group consisting of, for example, gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), nickel (Ni), titanium (Ti), and tantalum (Ta). Preferably, gold (Au), platinum (Pt), silver (Ag), lead (Pb), indium (In), and nickel (Ni) are used for the first metal layer 71. The second metal layer 72 is provided in a state of being in contact with the side surface 42 by sputtering, vapor deposition, or the like, and is composed of one or more metals selected from the group consisting of, for example, titanium (Ti), tantalum (Ta), and tungsten (W). Preferably, tantalum (Ta) is used for the second metal layer 72. The third metal layer 73 is interposed between the first metal layer 71 and the second metal layer 72, and is composed of one or more metals selected from the group consisting of, for example, aluminum (Al), copper (Cu), AuSn, SnCu, InBi, SnAgCu, SnPdAg, SnBiIn, and PbBiIn. Preferably, AuSn, SnAgCu, and SnBiIn are used for the third metal layer 73.
[0084] The thickness of the first metal layer 71, that is, the size of the first metal layer 71 in the y direction, is, for example, 0.01 μm or more and 5.00 μm or less. The thickness of the second metal layer 72, that is, the size of the second metal layer 72 in the y direction, is, for example, 0.01 μm or more and 1.00 μm or less. The thickness of the third metal layer 73, that is, the size in the y direction, is, for example, 0.01 μm or more and 5.00 μm or less. Also, the thickness of the third metal layer 73 is preferably greater than the respective thicknesses of the first metal layer 71 and the second metal layer 72. With such a configuration, the aforementioned respective roles of the first metal layer 71, the second metal layer 72, and the third metal layer 73 are well exhibited, and the entry of the material of the first metal layer 71 into the substrate 40 and the decrease in the adhesive strength between the metal layers are suppressed.
[0085] In this embodiment, the first metal layer 71 is provided on the side surface facing the substrate 40 or the PLC 50 in substantially the entire area of the first side surface 422 without contacting the metal layer 75. The front ends in the z direction, that is, the upper ends, of the second metal layer 72 and the third metal layer 73 reach the same position as the upper end of the first metal layer 71 on the front side in the z direction. The rear ends in the z direction, that is, the lower ends, of the second metal layer 72 and the third metal layer 73 reach the same position as the lower ends of the metal layer 71, the sub-carrier 420, and the substrate 40. When viewed along the y direction, the first metal layer 71 is formed larger than the sub-carrier 420 in the x direction.
[0086] As in the above-described configuration, it is preferable that the area of the first metal layer 71, that is, the size in the plane including the x direction and the z direction, is substantially the same as the areas of the second metal layer 72 and the third metal layer 73, and its lower end reaches the same position as the lower end of the sub-carrier 20. In such a configuration, the connection strength of the sub-carrier 420 to the substrate 40 is ensured to the maximum extent. Note that the lower ends of the first metal layer 71, the second metal layer 72, and the third metal layer 73 may be located above the lower ends of the sub-carrier 420 and the substrate 40.
[0087] In this embodiment, an antireflection film 81 is provided between the LD 30 and the PLC 50. For example, the antireflection film 81 is integrally formed on the side surface 42 of the substrate 40 and the incident surface 61 of the PLC 50. However, the antireflection film 81 may be formed only on the incident surface 61 of the PLC 50.
[0088] In addition to the incident surface 61, an antireflection film 82 is also provided on the exit surface 64. Note that an antireflection film (not shown) is also provided on the exit surface 64. In FIG. 11, a schematic configuration of the integrated optical device 10A is shown, and the first metal layer 71, the second metal layer 72, the third metal layer 73, and the antireflection films 81 and 82 are omitted.
[0089] The antireflection films 81 and 82 are films for preventing the incident light or the emitted light to the PLC 50 from being reflected in the direction opposite to the direction in which the light enters each surface from the incident surface 61 or the exit surface 64, and for increasing the transmittance of the incident light or the emitted light. The antireflection films 81 and 82 are, for example, multilayer films formed by alternately laminating a plurality of types of dielectrics with a predetermined thickness corresponding to the wavelengths of red light, green light, and blue light, which are incident light. Examples of the aforementioned dielectrics include titanium oxide (TiO 2 ), silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), etc.
[0090] FIG. 15 is a diagram for explaining the surface roughness of each surface of the sub-carrier 420.
[0091] As shown in FIG. 15, the shape of the sub-carrier 420 is substantially a rectangular parallelepiped, and includes an upper surface 421 that constitutes the mounting surface of the LD 30, a first side surface 422 that is connected to the side surface of the substrate 40 via the metal layers 71, 73, and 72, a second side surface 423 opposite to the first side surface 422, third side surfaces 424 and 425 that are adjacent to each of the first side surface 422 and the second side surface 423 and face each other, and a bottom surface (base bottom surface) 26 opposite to the upper surface 421. The LD 30 is disposed near the first side surface 422 of the sub-carrier 420 (i.e., the front end portion of the upper surface 421) and is connected to the sub-carrier 420 via the metal layers 75 and 76.
[0092] In this embodiment, the upper surface 421, the first side surface 422, the second side surface 423, and the bottom surface 26 of the sub-carrier 420 are smooth surfaces, but roughened regions 420S are provided on the entire surfaces of the third side surface 424 and the fourth side surface 425. The roughened region 420S is a region having a larger surface roughness than the smooth surfaces such as the upper surface 421 of the sub-carrier 420. Specifically, the maximum cross-sectional height (Rt) of the smooth surfaces such as the upper surface 421 of the sub-carrier 420 is 0.01 or more and less than 5 μm, while the maximum cross-sectional height (Rt) of the roughened region 420S is 5 μm or more and 50 μm or less. The maximum cross-sectional height (Rt) of the roughened region 420S may be 10 μm or more and 50 μm or less, or 20 μm or more and 40 μm or less, and is preferably 5 μm or more and 30 μm or less. In this specification, the "maximum cross-sectional height" means the sum of the maximum value of the peak height and the maximum value of the valley depth of the contour curve in the evaluation length in accordance with JIS B601.
[0093] The maximum cross-sectional height (Rt) of the roughened region 420S of the sub-carrier 420 is measured non-contact by a method using an apparatus based on the same principle as a white light interference microscope (for example, "Wyko-HD9800" manufactured by BRUKER). Samples 1 to 5 shown in Table 1 are examples in which the maximum cross-sectional height (Rt) of the surface before and after roughening the surface of a sub-carrier made of silicon using sandblasting was measured by a white light interference microscope ("Wyko-HD9800" manufactured by BRUKER). The measurement was performed using the VSI mode. The Rt before the roughening treatment was measured at a magnification of 7.5 times and a measurement range of (400) μm × (400) μm, and the Rt after the roughening treatment was measured at a magnification of 10 times and a measurement range of (400) μm × (400) μm.
Table 1
[0094] When the entire surface of the sub-carrier 420 is a smooth surface, when irradiating the sub-carrier 420 with a laser as described later, the laser light is reflected by the smooth surface of the sub-carrier 420, resulting in poor heating efficiency, and the bonding strength between the sub-carrier 420 and the substrate 40 through the metal layers 71, 73, 72 may be insufficient. However, when the third and fourth side surfaces 424, 425 of the sub-carrier 420 are roughened, the heat capacity can be suppressed, the reflection of the laser light irradiated on the third and fourth side surfaces 424, 425 of the sub-carrier 420 can be suppressed, and the heating efficiency of the sub-carrier 420 can be increased, thereby increasing the metal bonding strength.
[0095] The upper surface 421 and the first side surface 422 of the sub-carrier 420 are smooth surfaces. By making the upper surface 421 of the sub-carrier 420 a smooth surface, a metal layer with a uniform thickness can be formed on the upper surface 421, and the LD 30 can be reliably and firmly mounted on the sub-carrier 420 through the metal layer. Also, by making the first side surface 422 of the sub-carrier 420 a smooth surface, a metal layer 71 with a uniform thickness can be formed on the first side surface 422, and the sub-carrier 420 and the side surface of the substrate 40 can be reliably and firmly connected through the metal layers 71, 73, 72.
[0096] It is also preferable that the second side surface 423 and the bottom surface 26 of the sub-carrier 420 are smooth surfaces. Thereby, the second side surface 423 and the bottom surface 26 of the sub-carrier 420 can be held by vacuum suction. Therefore, the position of the sub-carrier 420 can be adjusted while irradiating the third and fourth side surfaces 424, 425 of the sub-carrier 420 with laser light.
[0097] The method of roughening for forming the roughened region is not particularly limited, and known methods for roughening the surface of an inorganic member can be used, whether wet or dry. For example, it can be formed at an arbitrary location by a technique such as sandblasting. Instead of sandblasting, something like sandpaper can be used to form scratches on the side surface of the sub-carrier. Alternatively, it may be formed by adopting processing conditions that result in a rough cutting surface when dicing and separating the collective substrate of the sub-carriers 420 into individual pieces. Specifically, roughening can be achieved by adjusting the size of the diamond abrasive grains adhered to the blade of the diamond cutter. Additionally, it is also possible to form it under predetermined conditions using a laser cutting method.
[0098] The emission surface 31 of the LD30 and the incident surface 61 of the PLC50 are arranged with a predetermined interval therebetween (see Fig. 15(b)). The incident surface 61 faces the emission surface 31, and there is a gap 70 between the emission surface 31 and the incident surface 61 in the y direction. When the integrated optical device 10A is exposed to the air, the gap 70 is filled with air. Considering the required light quantity and the like when the integrated optical device 10A is used in a head-mounted display or the like, the size of the gap (interval) 70 in the y direction is, for example, larger than 0 μm and 5 μm or less.
[0099] Next, the manufacturing method of the integrated optical device 10A will be briefly described. Fig. 16 is a diagram for explaining the manufacturing method of the integrated optical device 10A. First, the bare chip LD30 is mounted on the upper surface 421 of the sub-carrier 420 using a known technique. For example, a metal layer 75 is formed on the upper surface 421 of the sub-carrier 420 using sputtering, evaporation, or the like. Further, a first metal layer 76 is formed on the lower surface 33 of the LD30 (for example, the lower surface 33-1 of the LD30-1) using sputtering, evaporation, or the like. Next, as shown in Fig. 16(a), for example, laser light is irradiated from the laser device 90 to the sub-carrier 420, and the sub-carrier 420 is heated to such an extent that only the sub-carrier 420 is not melted and deformed. Due to heat transfer from the sub-carrier 420, the metal layers 75 and 76 are softened or melted and then cooled. Thereby, the LD30 is joined to the upper surface 421 of the sub-carrier 420 via the metal layers 75 and 76. Also, before or after mounting the LD30 on the sub-carrier 420, a first metal layer 71 is formed on the first side surface 422 of the sub-carrier 420 using sputtering, evaporation, or the like.
[0100] Next, a PLC 50 is formed on the upper surface 41 of the substrate 40 by a known semiconductor process. Subsequently, antireflection films 81 and 82 and an antireflection film (not shown) are formed on the incident surface 61 and the exit surface 64. Further, a second metal layer 72 and a third metal layer 73 are formed in this order behind the antireflection film 81 in the y direction using sputtering, evaporation, or the like.
[0101] Next, in the x direction and the z direction, the emission surfaces 31 of the LDs 30 and the incident surfaces 61 of the cores 51-1, 51-2, and 51-3 that correspond to each other are opposed to each other with a gap in the y direction. The optical axes of the respective color lights emitted from the LDs 30 and the centers of the incident surfaces 61 of the corresponding cores are substantially overlapped. At this time, the bottom surface 423 of the sub-carrier 420 and the bottom surface 43 of the substrate 40 are arranged so as to be aligned while the bottom surface 423 of the sub-carrier 420 and the bottom surface 43 of the substrate 40 are substantially on the same plane.
[0102] Next, as shown in FIG. 16(b), the sub-carrier 420 is irradiated with laser light from the laser device 90, and the first metal layer 71, the second metal layer 72, and the third metal layer 73 are softened or melted by heat transfer from the sub-carrier 420. While adjusting the relative positions of the LDs 30 and the PLC 50 and while the bottom surface 423 of the sub-carrier 420 and the bottom surface 43 of the substrate 40 are substantially on the same plane, the sub-carrier 420 on which the LDs 30 are mounted is joined to the substrate 40 on which the PLC 50 is formed. Through such steps, an integrated optical device 10A can be manufactured in which the bottom surface 423 of the sub-carrier 420 and the bottom surface 43 of the substrate 40 are located substantially on the same plane with respect to each other.
[0103] Specifically, as shown in FIG. 17, laser devices 90 are arranged on both sides of the sub-carrier 420 in the X direction, and the laser light emitted from the laser devices 90 is applied to the third side surface 424 and the fourth side surface 425 of the sub-carrier 420 along the direction indicated by the arrow for heating, and the sub-carrier 420 is heated to such an extent that only the sub-carrier 420 is not melted and deformed. At the same time, each color light is emitted from the LD 30, the emission intensity is detected, and the emission intensities of the three-color light emitted from the core 51-4 are detected. As illustrated in FIG. 18, when the interval S between the emission surface 31 and the incident surface 61 in the y direction is varied by a value on the micron order, and the emission intensity with respect to the emission intensity is defined as the light utilization efficiency [%], the larger the interval S becomes (Sa < Sb < Sc < Sd < Se < Sf < Sg), the lower the light utilization efficiency. The "light utilization efficiency" at each interval S means the light utilization efficiency when the DT offset on the horizontal axis of the graph in FIG. 18 is 0 (zero). The optimal interval S varies depending on the usage of the integrated optical device 10A, the emission pattern of the LD 30, and the sizes of the core 51-1, 51-2, 51-3 in the x direction and the z direction. Considering these conditions, the interval S, the position, and the posture of the LD 30 are adjusted so as to satisfy the required light utilization efficiency. Such adjustment of the position and the posture of the LD 30 means performing so-called active alignment and gap control. The above-described adjustment of the interval S and the LD 30 can be performed using a known device having a function of active alignment.
[0104] When performing active alignment, gap control, and heating of the sub-carrier 420, as shown in FIG. 17, the first metal layer 71, the second metal layer 72, and the third metal layer 73 between the emission surface 31 and the incident surface 61 of the LD 30 arranged at the optimal position become thinner than the metal layers not sandwiched between the emission surface 31 and the incident surface 61 due to the alloying of the third metal layer 73 and slight thermal shrinkage. By stopping the heating of the sub-carrier 420 by the laser device 90, it is cooled and the position of the LD 30 is fixed. By proceeding with the above procedure, the integrated optical device 10A can be manufactured.
[0105] As described above, the third side surface 424 and the fourth side surface 425 of the sub-carrier 420 are roughened, and the laser light is irradiated onto the roughened region 420S. Therefore, when the sub-carrier 420 is heated, the reflection of the laser light can be suppressed, and the heating efficiency can be enhanced. Accordingly, when the sub-carrier 420 and the substrate 40 are joined via the first metal layer 71, the second metal layer 72, and the third metal layer 73, the joining strength can be increased.
[0106] The integrated optical device 10A of the present embodiment described above includes a sub-carrier 420, an LD 30, a substrate 40, and a PLC 50. The incident surface 61 is arranged to face the emission surface 31, and the light emitted from the LD 30 can enter the cores 51-1, 51-2, 51-3. Further, the first side surface 422 of the sub-carrier 420 and the side surface 42 of the substrate 40 are connected via the first metal layer 71, the second metal layer 72, and the third metal layer 73 from the rear to the front in the y direction.
[0107] According to the above-described configuration, the first metal layer 71 and the second metal layer 72 are firmly adhered to the first side surface 422 and the side surface 42 of the base 40. The third metal layer 73 alloyizes at the interface with the first metal layer 71 and the second metal layer 72, and firmly joins with the first metal layer 71 and the second metal layer 72 over substantially the entire area in the plane including the x direction and the z direction of the first side surface 422. The connection between the sub-carrier 420 and the substrate 40 by such alloying of the first metal layer 71, the second metal layer 72, and the third metal layer 73 is resistant to heat. For example, as shown in FIG. 19, even when the ambient temperature rises in a process such as wire bonding, it is difficult to be released. Therefore, for example, even when the LD 30 and a power supply (not shown) are connected by a wire 95 on the upper surface 421 using a method such as wire bonding, the state in which the PLC 50 is firmly fixed to the LD 30 is maintained. That is, when wire bonding is performed, the LD 30 and the sub-carrier 420 do not slip off from the PLC 50 and the substrate 40, and the LD 30 is maintained at an optimal position with respect to the PLC 50. As a result, the integrated optical device 10A can exhibit desired light utilization efficiency and optical characteristics, and the reliability of the integrated optical device 10A can be enhanced.
[0108] On the other hand, in the adhesion between an LD and a PLC using a resin as in the prior art, or the adhesion between a sub-carrier and a substrate, hydrogen bonding due to substituents occurs in the resin which is a polymer in terms of molecular structure. Since the density of the substituents in the resin is low, local bonding occurs within the formation surface of the resin. When applied to the configuration of the integrated optical device 10A, the LD and the PLC, and the sub-carrier and the substrate are locally bonded within the plane including the x-direction and the z-direction. Therefore, it is presumed that in the connection using a resin as in the prior art, the connection strength is lower than the overall and strong bonding by alloying described above.
[0109] Moreover, according to the integrated optical device 10A of the present embodiment, since the third metal layer 73 is thicker than the first metal layer 71 and the second metal layer 72, the first metal layer 71 and the third metal layer 73, and / or the third metal layer 73 and the second metal layer 72 are sufficiently alloyed, and the sub-carrier 420 and the substrate 40 can be bonded more strongly. Also, the distance between the alloy layer of the first metal layer 71 and the third metal layer 73 and the substrate 40 can be ensured in the y-direction.
[0110] Moreover, according to the integrated optical device 10A of the present embodiment, when viewed along the y-direction (the light traveling direction), the lower ends of the first metal layer 71, the second metal layer 72, and the third metal layer reach the same position as the lower end of the sub-carrier 420 and the lower end of the substrate 40. That is, similar to the integrated optical device 10A according to the first embodiment, the bonding area of the sub-carrier 420 is maximized, and the sub-carrier 420 and the substrate 4 can be bonded strongly.
[0111] Moreover, according to the integrated optical device 10A of the present embodiment, since the antireflection film 81 is provided between the LD 30 and the PLC 50, reflection at the incident surface 61 of each color light emitted from the LD 30 can be prevented, and the coupling efficiency of each color light to the cores 51-1, 51-2, 51-3 can be increased.
[0112] In the integrated optical device 10A of the present embodiment, since the emission surface 31 of the LD 30 and the incident surface 61 of the PLC 50 are arranged at a predetermined interval, the relative arrangement of the LD and the PLC is not affected by the intervening substance between the emission surface of the LD and the incident surface of the PLC, unlike the conventional integrated optical element in which resin intervenes between the emission surface of the LD and the incident surface of the PLC. This can prevent the occurrence of misalignment in the relative arrangement of the LD 30 and the PLC 50.
[0113] In the integrated optical device 10A of the present embodiment, a plurality of LDs 30 are provided, and the plurality of LDs 30 emit light having mutually different peak wavelengths (wavelengths). That is, the integrated optical device 10A includes a plurality of LDs 30-1, 30-2, 30-3, and the PLC 50 is provided with a plurality of cores 51-1, 51-2, 51-3 into which the light emitted by the plurality of LDs 30-1, 30-2, 30-3 can be incident respectively. The plurality of cores 51-1, 51-2, 51-3 are gathered into one at the front side before reaching the emission surface 64. According to such a configuration, three-color light having mutually different peak wavelengths (wavelengths) can be efficiently incident on the plurality of cores 51-1, 51-2, 51-3, and the light utilization efficiency of the three-color light emitted from the emission surface 64 can be increased.
[0114] In the integrated optical device 10A of the present embodiment, the bottom surface 423 of the sub-carrier 420 and the bottom surface 43 of the substrate 40 are formed so as to be substantially in the same plane S shape. That is, even in the integrated optical device 10A of the present embodiment, similar to the integrated optical device 10 of the first embodiment, the heat generated by the operation of the LD (optical semiconductor element) 30 can be efficiently radiated from both the bottom surface 423 of the sub-carrier 420 and the first side surface 422.
[0115] FIGS. 20(a) to (f) and FIGS. 21(a) to (f) are development views showing modified examples of the configuration of the sub-carrier 420.
[0116] The sub-carrier 420 shown in Fig. 20(a) has a top surface 421, a first side surface 422, and a bottom surface 426 that are smooth surfaces, and the entire second side surface 423, third side surface 424, and fourth side surface 425 are composed of roughened regions 420S. That is, a roughened region 420S is further added to the second side surface 423 of the sub-carrier 420 shown in Fig. 15.
[0117] The sub-carrier 420 shown in Fig. 20(b) has a top surface 421, a first side surface 422, and a second side surface 423 that are smooth surfaces, and the entire third side surface 424, fourth side surface 425, and bottom surface 426 are composed of roughened regions 420S. That is, a roughened region 420S is further added to the bottom surface 426 of the sub-carrier 420 shown in Fig. 15.
[0118] The sub-carrier 420 shown in Fig. 20(c) has only the second side surface 423 as the roughened region 420S, and all other outer surfaces are smooth surfaces. Also, Fig. 20(d) has only the bottom surface 426 as the roughened region 420S, and all other outer surfaces are smooth surfaces.
[0119] Fig. 20(e) has only the second side surface 423 and the bottom surface 426 as the roughened regions 420S, and all other outer surfaces are smooth surfaces. Therefore, the third side surface 424 and the fourth side surface 425 are smooth surfaces.
[0120] Fig. 20(f) has the top surface 421 and the first side surface 422 as smooth surfaces, and all surfaces other than the top surface 421 and the first side surface 422 are roughened regions 420S.
[0121] The sub-carrier 420 shown in Fig. 21(a) has roughened regions 420S provided only at the central portions of each of the third side surface 424 and the fourth side surface 425, rather than on the entire surfaces. Therefore, the areas near the edges of the third side surface 424 and the fourth side surface 425 are smooth surfaces.
[0122] The sub-carrier 420 shown in Fig. 21(b) is provided with roughened regions 420S similar to the third side surface 424 and the fourth side surface 425 also on the second side surface 423 and the bottom surface 426. Thus, the roughened region 420S does not need to be formed on the entire target surface, and it may be formed only on a part of the target surface, that is, the laser irradiation region.
[0123] For the sub-carrier 420 shown in Fig. 21(c), in the third side surface 424 and the fourth side surface 425, the front half region closer to the first side surface 422 is the roughened region 420S, and the rear half region closer to the second side surface 423 is a smooth surface. Also, for the sub-carrier 420 shown in Fig. 21(d), a similar roughened region 420S is formed in the front half region of the bottom surface 426. Thus, the roughened region 420S may be provided only in the front region closer to the first side surface 422 than the intermediate position between the first side surface 422 and the second side surface 423.
[0124] For the sub-carrier 420 shown in Fig. 21(e), in the third side surface 424 and the fourth side surface 425, the lower half region closer to the bottom surface 426 is a rough surface, and the upper half region closer to the upper surface 421 is a smooth surface. For the sub-carrier 420 shown in Fig. 21(f), similar roughened regions 420S are also formed in the lower half region of the second side surface 423 and the entire bottom surface 426. Thus, the roughened region 420S may be provided only in the lower region closer to the bottom surface 426 than the intermediate position between the upper surface 421 and the bottom surface 426.
[0125] As described above, the shape of the sub-carrier 420 is substantially a rectangular parallelepiped, having an upper surface 421, first to fourth side surfaces 422 to 425, and a bottom surface 426. Here, when the upper surface 421 on which the LD 30 is mounted is the first outer surface, the first side surface 422 connected to the substrate 40 is the second outer surface, and the remaining surfaces are the third outer surface, the roughened region 420S may be provided on at least a part of the third outer surface. That is, in the present invention, the roughened region 420S may be formed on at least a part of any of the second side surface 423, the third side surface 424, the fourth side surface 425, and the bottom surface 426.
[0126] "Third Embodiment" FIG. 22 is a cross-sectional view of the integrated optical device 10B according to the third embodiment. The lengths of the sub-carrier 520, the first metal layer 571, the second metal layer 572, and the third metal layer 573 in the z direction of the integrated optical device 10B according to the third embodiment are different from those of the integrated optical device 10A according to the second embodiment. In the integrated optical device 10B, the same components as those in the integrated optical device 10A are denoted by the same reference numerals, and the description thereof is omitted.
[0127] In the present embodiment, the first metal layer 571 is provided on the side surface facing the substrate 40 or the PLC 50 in substantially the entire area of the first side surface 522 without contacting the metal layer 575. The front ends in the z direction, that is, the upper ends, of the second metal layer 572 and the third metal layer 573 reach the same position as the first metal layer 571 on the front side in the z direction. The rear ends in the z direction, that is, the lower ends, of the second metal layer 572 and the third metal layer 573 reach positions behind the first metal layer 571 and in front of the antireflection film 81. When viewed along the y direction, the first metal layer 571 is formed larger than the sub-carrier 520 in the x direction.
[0128] The area of the first metal layer 571, that is, the size in the plane including the x direction and the z direction, is preferably substantially the same as the areas of the second metal layer 572 and the third metal layer 573, or smaller than the areas of the second metal layer 572 and the third metal layer 573.
[0129] The integrated optical device 10B according to the present embodiment is manufactured in the same manner as the integrated optical device 10A. In manufacturing the integrated optical device 10B, the bottom surface 523 of the sub-carrier 520 and the bottom surface 43 of the substrate 40 may be displaced so that the bottom surface 523 of the sub-carrier 520 and the bottom surface 43 of the substrate 40 are substantially on the same plane. Further, when joining the sub-carrier 520 on which the LD 30 is mounted to the substrate 40 on which the PLC is formed, the bottom surface 523 of the sub-carrier 520 and the bottom surface 43 of the substrate 40 do not have to be on the same plane.
[0130] Even for the integrated optical device 10B according to the present embodiment, similar to the integrated optical device 10A, for example, when wire bonding is performed, the LD 30 and the sub-carrier 520 do not slip off the PLC 50 or the substrate 40, and the LD 30 is maintained at an optimal position with respect to the PLC 50. By this, the integrated optical device 10B can exhibit desired light utilization efficiency and optical characteristics, and the reliability of the integrated optical device 10B can be enhanced.
[0131] Also, even for the integrated optical device 10B of the present embodiment, the first metal layer 571 and the third metal layer 573, and / or the third metal layer 573 and the second metal layer 572 are sufficiently alloyed, and the sub-carrier 520 and the substrate 40 can be joined more firmly. Also, the distance between the alloy layer of the first metal layer 571 and the third metal layer 573 and the substrate 40 can be ensured in the y direction.
[0132] Further, according to the integrated optical device 10B of the present embodiment, since the area of the first metal layer 571 is smaller than the area of the second metal layer 572 when viewed along the y direction (the light traveling direction), the bonding area between the sub-carrier 520 and the substrate 40 can be secured to be at least the area of the first metal layer 571 or more. By providing the first metal layer 571 over substantially the entire area of the first side surface 52B, the bonding area of the sub-carrier 520 can be maximized, and the sub-carrier 520 and the substrate 40 can be joined more firmly.
[0133] (Integrated Optical Module) FIG. 23 is a schematic perspective view transparently showing an example of the structure of the integrated optical module 100B. As shown in FIG. 23, this integrated optical module 100B includes an integrated optical device 10B composed of a combination of the LD 30 on the sub-carrier 20 and the PLC 50 on the substrate 40, and a package 91 that houses the integrated optical device 10B. Then, the integrated optical device 10B is housed in the package 91 together with other components (not shown) such as a PD (Photo Detector) module and a controller IC chip, and is hermetically sealed together with an inert gas.
[0134] The package 91 is composed of a resin or ceramic main body 91a having an opening on the upper surface side and a cover 92 that covers the opening formed on the upper surface of the main body 91a without any gaps. A laser light emission window 93 is provided on the side surface of one end side in the longitudinal direction of the main body 91a. An opening is formed in the portion of the main body 91a corresponding to the emission window 93. The laser light emitted from the PLC 50 passes through the emission window 93 and is output to the outside. Also, on the side surface opposite to the side surface where the emission window 93 is provided, a terminal block 91b integrated with the main body 91a is formed, and a plurality of external electrode pads 94 are formed on the upper surface of the terminal block 91b. The plurality of external electrode pads 94 are electrically connected to any one of the plurality of internal terminal electrodes 96 in the package 91, and the LD 30 is connected to the internal terminal electrode 96 via a bonding wire (wire) 95.
[0135] The plurality of external electrode pads 94 are electrically connected to any one of the plurality of internal terminal electrodes 96 in the package 91, and the LD 30 is connected to the internal terminal electrode 96 via the wire 95. In this way, wire bonding is used for the connection between the pads of the LD 30 and the internal terminal electrode 96. However, when the bonding strength between the sub-carrier 20 and the substrate 40 is weak, the sub-carrier 20 may be peeled off from the substrate 40 due to the pressing force during wire bonding. However, in this embodiment, since the sub-carrier 20 is firmly bonded to the substrate 40, the electrical connection between the case-side terminals and the optical semiconductor device 30 by wire bonding can be surely performed.
[0136] In addition, the inside of the package 91 may be filled with an inert gas such as nitrogen (N 2 ).
[0137] The embodiments of the present invention have been described above. However, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. For example, the characteristic configurations of the above embodiments and modification examples may be combined with each other.
[0138] For example, in the integrated optical device 10 (10A, 10B) of the present embodiment, three LDs (optical semiconductor elements) 30-1, 30-2, and 30-3 are provided on the upper surface (surface) 21 (421, 521) of the sub-carrier (base) 20 (420, 520). However, at least one LD (optical semiconductor element) (for example, an LD that emits white light) may be provided, or four or more LDs may be provided. Also, the light emitted by each of the LDs (optical semiconductor elements) 30-1, 30-2, and 30-3 is not limited to red light, blue light, and green light, and an LD that emits light in an arbitrary wavelength range can be used.
[0139] Further, for example, a configuration including one common heat sink or the like joined to the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40, which are located substantially on the same plane as each other, may be used. Also, in the integrated optical module 100 (100A), a heat sink or the like can be further joined to the bottom surface of the package. Thereby, the heat propagated from the integrated optical device 10 (10A, 10B) to the package 110 can be radiated to the outside more efficiently.
[0140] Further, for example, in the integrated optical device 10 (10A, 10B), the sub-carrier 20 (420, 520) and the substrate 40 may be connected via a metal composite layer (not shown) including at least an alloy layer of the metal of the first metal layer 71 (571) and the third metal layer 73 (573), and / or an alloy layer of the metal of the second metal layer 72 (572) and the third metal layer 73 (573). The "metal composite layer including at least an alloy layer of the metal of the first metal layer 71 (571) and the third metal layer 73 (573), and / or an alloy layer of the metal of the second metal layer 72 (572) and the third metal layer 73 (573)" means a layer having, in part, an alloy layer of the metal of the first metal layer 71 (571) and the third metal layer 73 (573), and / or an alloy layer of the second metal layer 72 (572) and the third metal layer 73 (573), or a layer entirely composed of an alloy layer of the metal of the first metal layer 71 (571) and the third metal layer 73 (573), and an alloy layer of the metal of the second metal layer 72 (572) and the third metal layer 73 (573). As an example, in the integrated optical device 10 (10A, 10B), the metal of the first metal layer 71 (571) and the metal of the third metal layer 73 (573) may be alloyed over a part or the whole of the y direction to form one alloy layer.
[0141] Further, for example, the metal of the second metal layer 72 (572) and the metal of the third metal layer 73 (573) may be alloyed over a part or the whole of the y direction to form one alloy layer. In these cases, the sub-carrier 20 (420, 520) and the substrate 40 can be connected via either or both of an alloy layer of the first metal layer 71 (571) and the third metal layer 73 (573), and an alloy layer of the second metal layer 72 (572) and the third metal layer 73 (573). According to such a configuration, the sub-carrier 20 (420, 520) and the substrate 40 can be more firmly connected by the alloy layer than by the conventional resin connection, and the reliability of the integrated optical device can be improved.
[0142] Also, for example, in the integrated optical device 10 (10A, 10B), the sub-carrier 20 (420, 520) and the LD 30 may be connected via a metal composite layer (not shown) including at least an alloy layer with the metal layers 75 and 76. The "metal composite layer including at least an alloy layer with the metal layers 75 and 76" means a layer having an alloy layer of the metal layer 75 and the metal layer 76 in a part thereof, or a layer entirely composed of the alloy layer. As an example, in the integrated optical device 10 (10A, 10B), there is a case where the metal of the metal layer 75 and the metal of the metal layer 76 are alloyed over a part or the whole in the z direction to form an alloy layer. When the metal of the metal layer 75 and the metal of the metal layer 76 are alloyed in a part in the z direction, between the sub-carrier 20 (420, 520) and the LD 30, an alloy layer of the metal layers 75 and 76 and one or both of the metal layer 75 and the metal layer 76 are interposed. When the metal of the metal layer 75 and the metal of the metal layer 76 are alloyed over the whole in the z direction, substantially only the above alloy layer is interposed between the sub-carrier 20 (420, 520) and the LD. Also, although it is preferable that the metal layer 75 and the metal layer 76 are alloyed over the whole in the y direction to form an alloy layer, the present invention is not limited to such a configuration, and an alloy layer may be formed by alloying in a part in the y direction.
[0143] The metal material interposed between the sub-carrier 20 (420, 520) and the substrate 40 to connect the sub-carrier 20 (420, 520) and the substrate 40 can be appropriately changed according to the materials of the sub-carrier 20 (420, 520), the substrate 40, and the first metal layer 71 (571). Also, the thickness of the metal material of the metal layer and the alloy layer is also appropriately set according to the materials of the sub-carrier 20 (420, 520), the substrate 40, and the first metal layer 71 (571). Depending on the type and thickness of the metal material, the heating conditions of the sub-carrier 20 (420, 520), etc., the configuration of the metal composite layer interposed between the sub-carrier 20 (420, 520) and the substrate 40 can vary. The metal composite layer may be any of a single alloy layer, a combination of a metal layer and an alloy layer, a combination of alloy layers with different compositions from each other, and a multilayer structure including at least an alloy layer other than these.
[0144] In addition, although it has been described that the integrated optical device 10 (10A, 10B) described above is a multiplexer that combines the three primary colors of light in the visible wavelength range, the integrated optical device of the present invention is not limited to a multiplexer and can be widely used in optical communication applications.
[0145] In addition, although it has been described that the integrated optical device 10 (10A, 10B) described above is capable of multiplexing the three primary colors in the visible wavelength range for use in applications such as wearable devices and small projectors, the wavelength of the light processed by the integrated optical device of the present invention is not limited to the visible wavelength range. For example, the wavelength range of the light processed by the integrated optical device of the present invention may extend from the visible wavelength range to the near-infrared wavelength range, or may be only the near-infrared wavelength range for the purpose of being used in optical communication. The materials of the substrate 40, the PLC 50, and various metal layers and alloy layers may be selected according to the wavelength of the light processed by the integration of the present invention.
Example
[0146] The effects of the present invention were verified. (Example) An integrated optical device 10 according to the first embodiment shown in FIG. 1 was fabricated, and the heat dissipation state when a package was bonded to the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 of the integrated optical device 10 via a thermally conductive adhesive was simulated. Sub-carrier: Silicon (Si) Substrate: Silicon (Si) Package: Aluminum oxide (Al 2 O 3 ) Adhesive: Epoxy resin
[0147] (Comparative example) An integrated optical device was fabricated in which the bottom surface of the sub-carrier was recessed in the thickness direction from the bottom surface of the substrate, and the other configurations were the same as those in the example. The heat dissipation state when a package was bonded to the bottom surface of the substrate of the integrated optical device via a thermally conductive adhesive was measured. The bottom surface of the sub-carrier was not bonded to the package, and the gap between the bottom surface of the sub-carrier and the inner surface of the package was 0.5 mm.
[0148] Fig. 24(a) shows the heat distribution when the LD 30 of the integrated optical device 10 of the embodiment generates 1 W of heat, and Fig. 24(b) shows the heat distribution when the LD of the integrated optical device of the comparative example generates 1 W of heat. Note that Fig. 24 shows a cross-section of the main part along the thickness direction of the integrated optical module.
[0149] According to the results shown in Fig. 24, in the integrated optical device 10 of the embodiment, since the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40 are both joined to the package so that they are on substantially the same plane S, it can be seen that the heat generated by the LD 30 is radiated to the package from each of the bottom surface 23 of the sub-carrier 20 and the bottom surface 43 of the substrate 40. Thus, it was confirmed that the temperature of the LD 30 is kept lower than that of the comparative example.
[0150] On the other hand, in the integrated optical device of the comparative example, there is a step between the bottom surface of the sub-carrier and the bottom surface of the substrate, and only the bottom surface of the substrate is joined to the package. Therefore, the heat generated by the LD is radiated to the package only at the bottom surface of the substrate located at a position away from the LD. For this reason, the heat dissipation efficiency is poor compared with the embodiment, and the temperature of the LD is higher than that of the embodiment.
[0151] Next, in the above-described embodiment and comparative example, the relationship between the thermal conductivity of the adhesive for joining the integrated optical device to the package and the maximum value of the temperature change was measured. The results are shown in a graph in Fig. 25. According to the measurement results in Fig. 25, it was confirmed that by setting the thermal conductivity to 1 W / (m·K) or more, the amount of temperature change of the integrated optical module can be minimized, and further, by setting the thermal conductivity to 4 W / (m·K) or more, it is possible to suppress the amount of temperature change of the integrated optical module.
Explanation of Reference Numerals
[0152] 10 Integrated optical device 20, 420, 520 Sub-carrier (base) 20-1, 420-1, 520-1 Sub-carrier (base) 20-2, 420-2, 520-2 Sub-carrier (base) 20-3, 420-3, 520-3 Sub-carriers (Base) 21, 421, 521 Upper Surfaces 21-1 Upper Surface 21-2 Upper Surface 21-3 Upper Surface 22 Side Surfaces 22-1 Side Surface 22-2 Side Surface 22-3 Side Surface 23 Bottom Surface (Base Bottom Surface) 30 LD (Optical Semiconductor Element) 30-1 LD 30-2 LD 30-3 LD 31 Emission Surface 31-1 Emission Surface 31-2 Emission Surface 31-3 Emission Surface 33 Lower Surface 33-1 Lower Surface 40 Substrate 41 Upper Surface (Surface) 42 Side Surfaces 43 Bottom Surface (Substrate Bottom Surface) 50 PLC (Optical Waveguide) 51-1, 51-2, 51-3 Cores 51-4, 51-7 Cores 52 Cladding 57-1, 57-2 Confluence Positions 61 Incidence Surface 61-1 Incidence Surface 61-2 Incidence Surface 61-3 Incidence Surface 64 Emission Surface 70 Gap 71 First Metal Layer 72 Second Metal Layer 73 Third Metal Layer 75 Metal Layer 76 Metal Layer 81, 82 Anti-Reflection Films 100 Integrated Optical Module 102 Body 105 Cover 110 Package 180 Base On the upper surface (one inner surface) of 180a 182 Adjacent layer
Claims
1. A plurality of bases; a plurality of optical semiconductor elements provided on the surfaces of the plurality of bases, respectively; A substrate; an optical waveguide provided on a surface of the substrate; Equipped with The optical semiconductor elements emit light having different wavelengths, an incident surface of the optical waveguide is disposed opposite to an exit surface of the optical semiconductor elements; the optical waveguide is provided with a core into which each of the light beams emitted by the plurality of optical semiconductor elements can be incident; The plurality of cores are gathered together before reaching an emission surface of the optical waveguide, the plurality of optical semiconductor elements are connected to the plurality of bases via metal layers, the plurality of bases are connected to the substrate via a plurality of bonding layers each including a first metal layer, a second metal layer, and a third metal layer; The plurality of bonding layers are provided at positions facing the plurality of bases and spaced apart from each other, An integrated optical device, wherein a bottom surface of the bases opposite to the surface of the plurality of bases and a bottom surface of the substrate opposite to the surface of the substrate are provided on approximately the same plane.
2. The plurality of bases have first to third outer surfaces, the first outer surface is a surface of the base; the plurality of optical semiconductor elements are mounted on the first outer surface of the base, the plurality of optical semiconductor elements are arranged to be optically coupled to the optical waveguide; the second outer surfaces of the plurality of bases are connected to a side surface of the substrate via a metal layer; 2. The integrated optical device of claim 1, wherein at least a portion of said third outer surfaces of said plurality of bases comprises a roughened region.
3. The integrated optical device of claim 2 , wherein the roughened region has a surface roughness greater than a surface roughness of the first and second outer surfaces.
4. The integrated optical device of claim 2 , wherein the roughened region has a maximum profile height (Rt) of 5 μm or more and 50 μm or less.
5. The plurality of bases are substantially rectangular parallelepipeds, the first outer surface is a top surface of the base; the second outer surface is a first side surface of the base; The integrated optical device of claim 2 , wherein the third outer surface includes a second side surface facing the first side surface, a third side surface and a fourth side surface adjacent to the first side surface and the second side surface and facing each other, and a bottom surface of the base facing the top surface.
6. The roughened region is provided on the third side surface and the fourth side surface, The integrated optical device according to claim 5 , wherein the second side surface and the bottom surface of the base are smooth surfaces that are not provided with the roughened region.
7. The integrated optical device according to claim 6 , wherein the roughened region is provided on the entire surfaces of the third side surface and the fourth side surface.
8. 6. The integrated optical device according to claim 5, wherein the roughened region is provided in a lower region closer to the bottom surface of the base than a midpoint between the top surface and the bottom surface of the base.
9. The integrated optical device according to any one of claims 1 to 8, wherein the plurality of optical semiconductor elements include a first optical semiconductor element that outputs red light, a second optical semiconductor element that outputs green light, and a third optical semiconductor element that outputs blue light.
10. 10. The integrated optical device according to claim 1, further comprising an anti-reflection film provided between said plurality of optical semiconductor elements and said optical waveguide.
11. 11. The integrated optical device according to claim 1, wherein an anti-reflection film is provided on a surface of the optical waveguide opposite to the incident surface.
12. 13. An integrated optical module comprising: the integrated optical device according to claim 1; and a package housing the integrated optical device, wherein the integrated optical device is fixed at both the base bottom surface and the substrate bottom surface to one inner surface of the package via a bonding layer containing a metal or a resin.
13. 13. The integrated optical module according to claim 12, wherein the bonding layer is made of a material in which a filler is mixed into a resin.
14. 14. The integrated optical module according to claim 12, wherein the bonding layer has a thermal conductivity of 4 W / m·K or more.
15. preparing a plurality of bases each having a first to third outer surface, an optical semiconductor element mounted on the first outer surface, a metal bonding material provided on the second outer surface, and a roughened region formed on at least a portion of the third outer surface; a laser beam is irradiated onto the roughened region in a state in which the second outer surfaces of the plurality of bases are in contact with a side surface of a substrate on which an optical waveguide is provided, thereby heating the metal bonding material together with the plurality of bases, while adjusting the positions of the plurality of optical semiconductor elements so as to be optically coupled to the optical waveguide; a step of metal-bonding the plurality of bases and the substrate to fix the plurality of optical semiconductor elements by stopping the irradiation of the laser light to cool the base and metal-bonding the plurality of bases and the substrate to fix the plurality of optical semiconductor elements.
16. 16. The method for manufacturing an integrated optical device according to claim 15, further comprising bonding the optical waveguide and the optical semiconductor elements while making the bottom surfaces of the bases and the bottom surface of the substrate substantially flush with each other.
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