Etching method
The etching method addresses the challenge of dimension variations in recesses by using a controlled plasma processing approach with specific power levels and bias settings, resulting in improved uniformity and reduced sidewall tapering.
Patent Information
- Application Number
- JP2023204564
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-04
- Publication Date
- 2025-06-16
AI Technical Summary
Existing etching methods face challenges in reducing variations in the dimensions of recesses formed during the etching process.
An etching method involving a substrate with a film containing silicon and oxygen, where a resist mask is applied, and a plasma processing apparatus is used to repeat cycles of deposit formation and etching, with specific power levels and bias settings to control the etching process.
This method effectively reduces variations in the dimensions of recesses formed by etching, improving the dimensional uniformity and preventing sidewall tapering and resist mask reduction.
Smart Images

Figure 2025089743000001_ABST
Abstract
Description
Technical Field
[0001] Exemplary embodiments of the present disclosure relate to an etching method.
Background Art
[0002] Patent Document 1 discloses a plasma etching method. In a first period, a first RF power is supplied so that etching is mainly performed. In a second period, a second RF power is supplied so that deposition is mainly performed. In the first period, a bias voltage is supplied. The first RF power and the second RF power are supplied alternately.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] The present disclosure provides a technique capable of reducing variations in dimensions of recesses formed by etching.
Means for Solving the Problems
[0005] In one exemplary embodiment, an etching method includes: (a) preparing a substrate on a substrate support in a chamber of a plasma processing apparatus, the substrate including a film containing silicon and oxygen and a resist mask provided on the film; (b) repeating a first cycle, the first cycle including: (b1) forming a deposit on the substrate, the deposit being supplied to the substrate from plasma generated from a process gas having deposition properties in the chamber; and (b2) etching the deposit using plasma generated in the chamber; and (c) etching the film using plasma generated in the chamber, wherein a second cycle including (b) and (c) is repeated, a power level of source high-frequency power used for plasma generation during a period when (b1) is performed in the first cycle is higher than a power level of the source high-frequency power during a period when (b2) is performed in the first cycle, a level of an electrical bias supplied to the substrate support to draw ions to the substrate during a period when (b2) is performed in the first cycle is higher than a level of the electrical bias supplied to the substrate support during a period when (b1) is performed in the first cycle, or the electrical bias is not supplied to the substrate support in (b1), and a level of the electrical bias supplied to the substrate support in (c) is higher than a level of the electrical bias supplied to the substrate support in (b1). [[Effect of the Invention]]
[0006] According to one exemplary embodiment, variations in dimensions of recesses formed by etching can be reduced. [[Brief Description of the Drawings]]
[0007]
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[0008] Hereinafter, various exemplary embodiments will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts will be denoted by the same reference numerals.
[0009] FIG. 1 is a diagram for explaining a configuration example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas discharge port for discharging gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 described later, and the gas discharge port is connected to an exhaust system 40 described later. The substrate support unit 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.
[0010] The plasma generation unit 12 is configured to generate plasma from at least one process gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), ECR plasma (Electron-Cyclotron-resonance plasma), helicon wave plasma (HWP), surface wave plasma (SWP), or the like. Also, various types of plasma generation units including an AC (Alternating Current) plasma generation unit and a DC (Direct Current) plasma generation unit may be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency within the range of 100 kHz to 10 GHz. Accordingly, the AC signal includes an RF (Radio Frequency) signal and a microwave signal. In one embodiment, the RF signal has a frequency within the range of 100 kHz to 150 MHz.
[0011] The control unit 2 processes computer-executable instructions for causing the plasma processing apparatus 1 to execute various processes described in the present disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 so as to execute the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is realized by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and perform various control operations by executing the read program. This program may be stored in the storage unit 2a2 in advance, or may be acquired via a medium when necessary. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 and executed. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).
[0012] Hereinafter, a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1 will be described. FIG. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.
[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power source 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a showerhead 13. The substrate support unit 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support unit 11. In one embodiment, the showerhead 13 constitutes at least a part of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support unit 11 are electrically insulated from the housing of the plasma processing chamber 10.
[0014] The substrate support unit 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of the substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a plan view. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. Accordingly, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as a ring support surface for supporting the ring assembly 112.
[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Also, at least one RF / DC electrode coupled to the RF power supply 31 and / or the DC power supply 32 described later may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or the DC signal described later is supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as a plurality of lower electrodes. Also, the electrostatic electrode 1111b may function as a lower electrode. Accordingly, the substrate support portion 11 includes at least one lower electrode.
[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.
[0017] Further, the substrate support portion 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. Further, the substrate support portion 11 may include a heat transfer gas supply portion configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a.
[0018] The shower head 13 is configured to introduce at least one process gas from the gas supply portion 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas introduction ports 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c. Further, the shower head 13 includes at least one upper electrode. Note that the gas introduction portion may include, in addition to the shower head 13, one or more side gas injection portions (SGI) attached to one or more openings formed in the side wall 10a.
[0019] The gas supply portion 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply portion 20 is configured to supply at least one process gas from the corresponding gas source 21 to the shower head 13 via the corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Further, the gas supply portion 20 may include at least one flow modulation device that modulates or pulses the flow rate of at least one process gas.
[0020] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. Thereby, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Accordingly, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Also, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and the ion component in the formed plasma can be drawn into the substrate W.
[0021] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.
[0022] The second RF generation unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.
[0023] Further, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generation unit 32a and a second DC generation unit 32b. In one embodiment, the first DC generation unit 32a is connected to at least one lower electrode and is configured to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generation unit 32b is connected to at least one upper electrode and is configured to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.
[0024] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a pulse waveform that is rectangular, trapezoidal, triangular, or a combination thereof. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses from a DC signal is connected between the first DC generation unit 32a and at least one lower electrode. Accordingly, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses may have a positive polarity or a negative polarity. Also, the sequence of voltage pulses may include one or more positive-polarity voltage pulses and one or more negative-polarity voltage pulses within one period. Note that the first and second DC generation units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generation unit 32a may be provided in place of the second RF generation unit 31b.
[0025] The exhaust system 40 can be connected to, for example, a gas discharge port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbo molecular pump, a dry pump, or a combination thereof.
[0026] FIG. 3 is a flowchart of an etching method according to one exemplary embodiment. The etching method shown in FIG. 3 (hereinafter referred to as "method MT") can be executed by the plasma processing apparatus 1 of the above embodiment. When the plasma processing apparatus 1 is used, method MT can be executed in the plasma processing apparatus 1 by controlling each part of the plasma processing apparatus 1 by the control unit 2.
[0027] Hereinafter, the method MT will be described with reference to FIGS. 3, 4, and FIGS. 5(a) to 5(c). Also, the control of each part of the plasma processing apparatus 1 by the control unit 2 will be described. FIG. 4 is a timing chart related to an etching method according to one exemplary embodiment. Each of FIGS. 5(a) to 5(c) is a partially enlarged cross-sectional view of a substrate related to each step of an etching method according to one exemplary embodiment. Hereinafter, the method MT will be described by taking the case where the plasma processing apparatus 1 is used as an example. Note that the method MT may be performed using a plasma processing apparatus different from the plasma processing apparatus 1.
[0028] As shown in FIG. 3, the method MT includes a step STa, a step STb, and a step STc.
[0029] (Step STa) In step STa, a substrate W is prepared on the substrate support 11 in the plasma processing chamber 10 of the plasma processing apparatus 1 (see FIG. 2). The steps of the method MT performed after step STa are performed with the substrate W placed on the substrate support 11.
[0030] As shown in Fig. 5(a), the substrate W to which the method MT is applied includes a film EF containing silicon and oxygen and a resist mask PR. The substrate W may further include a base region UR. The film EF is a film to be etched in the method MT. The film EF is provided on the base region UR. The film EF may be a dielectric film containing silicon and oxygen. The film EF may be a silicon oxide film (SiO2 film) or a silicon oxynitride film (SiON film). The film EF may be a low dielectric constant film such as a SiOC film or a SiOCH film. The resist mask PR is provided on the film EF. The resist mask PR has a pattern to be transferred to the film EF by etching. That is, the resist mask PR provides one or more openings. The resist mask PR may provide a plurality of openings having different dimensions (CD: Critical Dimension). Each opening may be a hole or a trench. The resist mask PR may be an EUV resist mask or an ArF resist mask. The resist mask PR may be a metal-containing film. The base region UR may be a carbon-containing film. The carbon-containing film may be a SOC (Spin On Carbon) film.
[0031] (Step STb) Next, in the method MT, step STb is performed. In step STb, the first cycle CY1 is repeated. The first cycle CY1 includes steps STb1 and STb2. The first cycle CY1 may include only steps STb1 and STb2. The length of one cycle of the first cycle CY1 may be 10 to 2000 μs (microseconds).
[0032] (Step STb1) Process STb1 is performed during period P1 (see FIG. 4). Period P1 may be 5 to 1000 μs. In process STb1, a deposit MDP is formed on substrate W (see (b) of FIG. 5). The deposit MDP can be formed on the upper surface of the resist mask PR, on the sidewalls defining the opening of the resist mask PR, and on the surface of the film EF exposed within the opening of the resist mask PR. The deposit MDP is supplied from the plasma generated from the process gas in the plasma processing chamber 10. The deposit MDP may contain carbon and fluorine.
[0033] The process gas in process STb1 is a gas having depositability. The process gas may contain a fluorine-containing gas. The process gas may contain a gas component containing fluorine and carbon. This gas component may be a fluorocarbon gas such as C4F8 gas. That is, the fluorine-containing gas may be a fluorocarbon gas. Further, this gas component may contain a hydrofluorocarbon gas in addition to or instead of the fluorocarbon gas. Alternatively, the process gas may contain a fluorine-containing gas and a carbon-containing gas. Examples of the fluorine-containing gas include NF3 gas. Examples of the carbon-containing gas include hydrocarbon gases such as methane. The process gas may further contain one or more of a hydrogen-containing gas (e.g., hydrogen gas), a nitrogen-containing gas (e.g., nitrogen gas), an oxygen-containing gas (e.g., oxygen gas), and a noble gas (e.g., Ar gas).
[0034] In step STb1, the control unit 2 controls the gas supply unit 20 to supply the processing gas into the plasma processing chamber 10. In step STb1, the control unit 2 controls the exhaust system 40 to set the pressure in the plasma processing chamber 10 to a specified pressure. In step STb1, the control unit 2 controls the power supply 30 to supply the source high-frequency power RF (see FIG. 4) to the high-frequency electrode (upper electrode or lower electrode) to generate plasma from the processing gas. In step STb1, the control unit 2 may control the power supply 30 so as not to supply the electrical bias EB (see FIG. 4) to the bias electrode (lower electrode). Alternatively, in step STb1, the control unit 2 may control the power supply 30 to supply the electrical bias EB to the bias electrode.
[0035] (Step STb2) Step STb2 is performed during period P2 (see FIG. 4). Period P2 is a period after or following period P1. Period P2 may be 5 to 1000 μs. Period P2 may be the same length as period P1 or a different length from period P1. In step STb2, the deposited material MDP is etched using the plasma generated in the plasma processing chamber 10. In step STb2, by trimming the deposited material MDP, the shape of the resist mask PR covered by the deposited material MDP is adjusted. The processing gas used in step STb2 may be the same processing gas as that used in step STb1. That is, in step STb2, the plasma may be generated from the processing gas having the above-described deposition property.
[0036] In step STb2, the control unit 2 controls the gas supply unit 20 to supply the processing gas into the plasma processing chamber 10. In step STb2, the control unit 2 controls the exhaust system 40 to set the pressure in the plasma processing chamber 10 to a specified pressure.
[0037] In step STb2, the control unit 2 controls the power supply 30 to supply the source high-frequency power RF to the high-frequency electrode in order to generate plasma from the process gas. In one embodiment, the power level of the source high-frequency power RF used in step STb2 (power level LB in FIG. 4 RF2 ) may be equal to or lower than the power level of the source high-frequency power RF used in step STb1 (power level LB in FIG. 4 RF1 ), and may be lower than this.
[0038] In step STb2, the control unit 2 controls the power supply 30 to supply the electrical bias EB to the bias electrode. In one embodiment, the level of the electrical bias EB used in step STb2 (power level LB in FIG. 4 EB2 ) may be higher than the level of the electrical bias EB used in step STb1 (power level LB in FIG. 4 EB1 ). In step STb1, the supply of the electrical bias EB may be stopped. The electrical bias EB may be bias high-frequency power or a DC voltage pulse. When the electrical bias EB is bias high-frequency power, the level of the electrical bias EB is the power level of the bias high-frequency power. When the electrical bias EB includes a voltage pulse, the level of the electrical bias EB is the absolute value of the negative voltage level of the voltage pulse.
[0039] Next, as shown in FIG. 3, in method MT, step STJ1 is performed. In step STJ1, it is determined whether or not a stop condition is satisfied. In step STJ1, the stop condition is satisfied when the number of executions of the first cycle CY1 reaches a predetermined number. When it is determined in step STJ1 that the stop condition is not satisfied, the first cycle CY1 is performed again. When it is determined in step STJ1 that the stop condition is satisfied, the repetition of the first cycle CY1 ends. As a result of the repetition of the first cycle CY1, as shown in FIG. 5(b), the surface of the substrate W is covered with the deposit MDP.
[0040] (Step STc) Next, in method MT, step STc is performed. Step STc is performed after repeating the first cycle CY1. Step STc is performed during period P3 (see FIG. 4). Period P3 is a period after or following the alternating repetition of period P1 and period P2. Period P3 may be longer than period P1, may be longer than period P2, or may be longer than the total time of period P1 and period P2. Period P3 may be 1000 to 4000 μs. In one embodiment, period P3 may be 100 to 10000 μs.
[0041] In step STc, film EF is etched using the plasma generated from the etching gas in plasma processing chamber 10. In step STc, plasma may be generated from the above-described processing gas. That is, in step STc, the same processing gas used in steps STb1 and STb2 may be used as the etching gas. That is, in steps STb1, STb2, and STc, gas switching between steps may not be performed. Alternatively, the etching gas used in step STc may be another gas selected to selectively etch film EF. That is, gas switching may be performed between step STb2 and step STc.
[0042] In step STc, control unit 2 controls gas supply unit 20 to supply the etching gas into plasma processing chamber 10. In step STc, control unit 2 controls exhaust system 40 to set the pressure in plasma processing chamber 10 to a specified pressure.
[0043] In step STc, control unit 2 controls power supply 30 to supply source high-frequency power RF to the high-frequency electrode in order to generate plasma from the etching gas. In one embodiment, the power level of the source high-frequency power RF used in step STc is the power level of the source high-frequency power RF used in step STb1 (power level LB in FIG. 4) RF1It may be the same as or substantially the same as. Also, the power level of the source high-frequency power RF used in step STc may be higher than the power level of the source high-frequency power RF used in step STb2 (the power level LB in FIG. 4 RF2 )). The power level of the source high-frequency power RF used in step STc may be higher than the power level of the source high-frequency power RF used in step STb1 (the power level LB in FIG. 4 RF1 ).
[0044] In step STc, the control unit 2 controls the power supply 30 to supply the electric bias EB to the bias electrode. In one embodiment, the level of the electric bias EB used in step STc may be the same as or substantially the same as the level of the electric bias EB used in step STb2 (the power level LB in FIG. 4 EB2 ). Also, the level of the electric bias EB used in step STc may be higher than the level of the electric bias EB used in step STb1 (the power level LB in FIG. 4 EB1 ). The level of the electric bias EB used in step STc may be higher than the level of the electric bias EB used in step STb2 (the power level LB in FIG. 4 EB2 ).
[0045] Note that in step STc, the level of the electric bias EB may be constant. Alternatively, in step STc, the level of the electric bias EB may be increased stepwise or continuously. Alternatively, in step STc, the level of the electric bias EB may be decreased stepwise or continuously.
[0046] As shown in FIG. 3, in the method MT, a second cycle CY2 including steps STb and STc is repeated. The second cycle CY2 may include only steps STb and STc. The length of one cycle of the second cycle CY2 may be 1 second or less.
[0047] Method MT further includes step STJ2. In step STJ2, it is determined whether the stop condition is satisfied. In step STJ2, the stop condition is satisfied when the number of executions of the second cycle CY2 reaches a predetermined number. If it is determined in step STJ2 that the stop condition is not satisfied, the second cycle CY2 is performed again. If it is determined in step STJ2 that the stop condition is satisfied, method MT ends. In method MT, as a result of repeating the second cycle CY2, as shown in Fig. 5(c), a recess is formed in the film EF. The bottom of the recess can reach the base region UR.
[0048] In steps STb1, STb2, and STc, the temperature of the substrate support 11 and the pressure in the plasma processing chamber 10 may be constant. In steps STb1, STb2, and STc, the temperature of the substrate support 11 may be 30°C or lower, or the pressure in the plasma processing chamber 10 may be 13.33 Pa (100 mTorr) or lower. In one embodiment, in steps STb1, STb2, and STc, the temperature of the substrate support 11 may be 60°C or lower.
[0049] Hereinafter, with reference to Fig. 4, the details of the control by the control unit 2 will be described. The control unit 2 executes first control for repeating the first cycle CY1, and after the first control, that is, after repeating the first cycle, executes second control.
[0050] The first cycle CY1 is performed with a process gas having deposition properties being supplied into the plasma processing chamber 10. In the first cycle CY1, the control unit 2 controls the power supply 30 to sequentially change at least one of the power level of the source high-frequency power RF and the level of the electrical bias EB to two different levels from each other.
[0051] In one embodiment, in the first cycle CY1, each of the power level of the source high-frequency power RF and the level of the electrical bias EB may be sequentially changed to two different levels from each other. For example, in the first cycle CY1, the power level of the source high-frequency power RF is the power level LB RF1 and the power level LB RF2 in sequence, and the level of the electrical bias EB is the level LB EB1 and the level LB EB2 in sequence. Note that LB RF1 is larger than LB RF2 , and LB EB2 is larger than LB EB1 .
[0052] Each change in the power level of the source high-frequency power RF and the level of the electrical bias EB in the first cycle CY1 may be synchronized with each other. For example, the period when the power level of the source high-frequency power RF is the power level LB RF1 and the period when the level of the electrical bias EB is the level LB EB1 may be synchronized with each other. Also, the period when the power level of the source high-frequency power RF is the power level LB RF2 and the period when the level of the electrical bias EB is the level LB EB2 may be synchronized with each other.
[0053] The repetition frequency of the first cycle CY1 may be 1 Hz or more and 50 kHz or less. The repetition frequency of the first cycle CY1 may be 100 Hz or more and may be 21 kHz or less. Also, the power level of the source high-frequency power RF may be a power level within the range of 0 W or 7 W or more and 3000 W or less. Also, when the electrical bias EB is the bias high-frequency power, the power level of the bias high-frequency power may be a power level within the range of 0 W or 7 W or more and 3000 W or less.
[0054] In the second control, the control unit 2 controls the power supply 30 to supply the source high-frequency power RF and the electrical bias EB in order to generate plasma of the etching gas in the plasma processing chamber 10. In the second control, the power level of the source high-frequency power RF may be set to a power level within a range of 7 W or more and 3000 W or less. Further, when the electrical bias EB is the bias high-frequency power, in the second control, the power level of the bias high-frequency power may be set to a power level within a range of 7 W or more and 3000 W or less. Note that, in the second control, the level of the electrical bias EB may be constant. Alternatively, in the second control, the level of the electrical bias EB may be increased stepwise or continuously. Alternatively, in the second control, the level of the electrical bias EB may be decreased stepwise or continuously.
[0055] Further, the control unit 2 executes a third control for repeating a second cycle CY2 including the first control and the second control. The repetition frequency of the second cycle CY2 is lower than the repetition frequency of the first cycle CY1. The repetition frequency of the second cycle CY2 may be 1 Hz or more and 50 kHz or less. The repetition frequency of the second cycle CY2 may be 10 Hz or more and may be 2.1 kHz or less. Note that the repetition frequency of the second control is the same as the repetition frequency of the second cycle CY2.
[0056] According to method MT, as a result of repeating process STb1 and process STb2, deposits MDP (see (b) of FIG. 5) are formed on the sidewalls defining the openings of the resist mask PR, so the dimensions (CD) of the openings become smaller. Since the deposits MDP on the sidewalls defining the openings tend to be thicker as the dimensions of the openings are larger, according to method MT, the variation in the dimensions of the openings of the resist mask PR is reduced. As a result, the variation in the dimensions (CD) of the recesses formed in the film EF by etching can be reduced. Therefore, the dimensional uniformity (LCDU: Local Critical Dimension Uniformity) of the recesses formed in the film EF can be improved. Further, since the deposits MDP are formed on the sidewalls defining the openings of the resist mask PR, the etching of the sidewalls is suppressed. As a result, it is possible to suppress the sidewalls of the recesses formed in the film EF from becoming tapered. Thus, the sidewalls of the recesses can be made closer to the direction perpendicular to the main surface of the substrate W. Furthermore, since the deposits MDP are formed on the upper surface of the resist mask PR, the reduction of the resist mask PR by etching can be suppressed.
[0057] Note that in method MT, as the repetition of the second cycle CY2 progresses, that is, as the depth of the recesses formed in the film EF increases, the gas conditions and / or temperature conditions in each step of the second cycle CY2 may be changed.
[0058] Also, as the repetition of the first cycle CY1 progresses, at least one of the power level of the source high-frequency power RF and the level of the electrical bias EB may be changed in each step of the first cycle CY1. For example, at least one of the power level of the source high-frequency power RF and the level of the electrical bias EB may be set to a relatively low level in each step, and the first cycle CY1 may be repeated. Thereafter, at least one of the levels may be set to a relatively high level, and the first cycle CY1 may be repeated.
[0059] Hereinafter, with reference to FIGS. 6 and 7(a) to 7(d), an etching method according to another exemplary embodiment will be described. FIG. 6 is a flowchart of the etching method according to another exemplary embodiment. Each of FIGS. 7(a) to 7(d) is a partially enlarged cross-sectional view of an example substrate related to each step of the etching method according to another exemplary embodiment. Hereinafter, taking the case where the plasma processing apparatus 1 is used as an example, the etching method shown in FIG. 6 (hereinafter referred to as "method MTA") will be described. Note that method MTA may be performed using a plasma processing apparatus different from the plasma processing apparatus 1.
[0060] Method MTA is applied to the substrate W shown in FIG. 7(a). As shown in FIG. 7(a), the substrate W includes a base region UR, a film EF1, a mask MHM, a silicon oxide film OXM, an organic film OF, a film EF, and a resist mask PR.
[0061] The base region UR is, for example, an etching stop layer. The base region UR may have a laminated structure including an aluminum oxide film and a SiCN film. The film EF1 is provided on the base region UR. The film EF1 is a dielectric film and may contain silicon and oxygen. In one embodiment, the film EF1 may include a low dielectric constant film LKF. The film EF1 may have a laminated structure including a low dielectric constant film LKF and a silicon oxide film OXF. Note that the low dielectric constant film LKF may be a SiOCH film.
[0062] The mask MHM is a metal hard mask and is provided on the film EF1. The mask MHM has a pattern that is transferred to the film EF1 by etching. That is, the mask MHM provides one or more openings. The mask MHM may contain at least one metal selected from the group consisting of titanium, tungsten, molybdenum, and ruthenium. The mask MHM is formed of, for example, titanium nitride. The mask MHM may be formed of other metal-containing materials.
[0063] The silicon oxide film OXM is provided on top of the mask MHM. The organic film OF is provided so as to cover the silicon oxide film OXM, the mask MHM, and the film EF1. The film EF is provided on the organic film OF. The film EF is a silicon-containing film containing silicon and oxygen. The film EF can be an antireflection film. The resist mask PR is provided on the film EF. The resist mask PR is patterned using photolithography technology. The resist mask PR provides one or more openings to form recesses (e.g., trenches or holes) in the film EF1 at the portions exposed from the mask MHM.
[0064] Returning to FIG. 6, the method MTA includes the step STa. In the step STa of the method MTA, in the plasma processing chamber 10 of the plasma processing apparatus 1, a substrate W (see (a) of FIG. 7) is prepared on the substrate support portion 11 in the same manner as in the step STa of the method MT. The steps of the method MTA performed after the step STa are performed with the substrate W placed on the substrate support portion 11.
[0065] In the method MTA, after the step STa, the step ST1 is performed. In the step ST1, the film EF is etched. In the step ST1, the steps STb and STc of the method MT are performed. In the step ST1, the first cycle CY1 and the second cycle CY2 of the method MT may be repeated respectively. By the step ST1, the pattern of the resist mask PR is transferred to the film EF, and recesses are formed in the film EF. In the step ST1, for etching the film EF, plasma is generated from the etching gas in the plasma processing chamber 10.
[0066] In step ST1, the control unit 2 controls the gas supply unit 20 to supply etching gas into the plasma processing chamber 10. In step ST1, the control unit 2 controls the exhaust system 40 to set the pressure in the plasma processing chamber 10 to a specified pressure. In step ST1, the control unit 2 controls the power supply 30 to supply source high-frequency power RF to the high-frequency electrode in order to generate plasma from the etching gas. In step ST1, the control unit 2 may control the power supply 30 to supply an electrical bias EB to the bias electrode.
[0067] Next, step ST2 is performed. In step ST2, the organic film OF is etched. By step ST2, as shown in FIG. 7(b), the pattern of the film EF is transferred to the organic film OF. In step ST2, plasma is generated from the etching gas in the plasma processing chamber 10 for etching the organic film OF. The etching gas used in step ST2 contains an oxygen-containing gas (for example, oxygen gas). Alternatively, the etching gas used in step ST2 may contain nitrogen gas and hydrogen gas.
[0068] In step ST2, the control unit 2 controls the gas supply unit 20 to supply etching gas into the plasma processing chamber 10. In step ST2, the control unit 2 controls the exhaust system 40 to set the pressure in the plasma processing chamber 10 to a specified pressure. In step ST2, the control unit 2 controls the power supply 30 to supply source high-frequency power RF to the high-frequency electrode in order to generate plasma from the etching gas. In step ST2, the control unit 2 may control the power supply 30 to supply an electrical bias EB to the bias electrode.
[0069] Next, step ST3 is performed. In step ST3, the film EF1 is etched. By step ST3, as shown in FIG. 7(c), the pattern of the organic film OF is transferred to the film EF1, and recesses are formed in the film EF1.
[0070] Next, step ST4 is performed. In step ST4, the organic film OF is removed. In step ST4, for removing the organic film OF, plasma is generated from the ashing gas in the plasma processing chamber 10. The ashing gas used in step ST4 contains an oxygen-containing gas (for example, oxygen gas and / or CO gas).
[0071] In step ST4, the control unit 2 controls the gas supply unit 20 to supply the ashing gas into the plasma processing chamber 10. In step ST4, the control unit 2 controls the exhaust system 40 to set the pressure in the plasma processing chamber 10 to a specified pressure. In step ST4, the control unit 2 controls the power supply 30 to supply the source high-frequency power RF to the high-frequency electrode to generate plasma from the etching gas.
[0072] Next, step ST5 is performed. In step ST5, as shown in FIG. 7(d), the film EF1 is further etched so as to increase the depth of the concave portion.
[0073] According to method MTA, in step ST1, the same operational effects as those of method MT can be obtained. According to method MTA, the variation in the dimension (CD) of the concave portion formed in the film EF by etching can be reduced.
[0074] As described above, various exemplary embodiments have been described, but the present disclosure is not limited to the above-described exemplary embodiments, and various omissions, substitutions, and changes may be made. Also, it is possible to form other embodiments by combining elements in different embodiments.
[0075] Hereinafter, various experiments conducted for the evaluation of method MT and method MTA will be described. The experiments described below do not limit the present disclosure.
[0076] (First Experiment) A substrate including an SOC film, a SiON film on the SOC film, and a photoresist mask on the SiON film was prepared. The photoresist mask has a plurality of holes having different dimensions (CDs). Using the plasma processing apparatus 1, the first cycle CY1 including the process STb1 and the process STb2 was repeated, and the second cycle CY2 including the repeated plurality of first cycles CY1 and the process STc was repeated to etch the SiON film. The conditions for each process are as follows. Processing gas for each process: Mixed gas of nitrogen gas, C4F8 gas, hydrogen gas, and NF3 gas Source high-frequency power and bias high-frequency power in process STb1: 200 W, 0 W Source high-frequency power and bias high-frequency power in process STb2: 30 W, 50 W Source high-frequency power and bias high-frequency power in process STc: 200 W, 50 W Number of executions of the first cycle CY1: 3 times Number of executions of the second cycle CY2: Multiple times
[0077] (Second experiment) An experiment was conducted in the same manner as the first experiment except that the first cycle CY1 was not repeated (the number of executions of the first cycle CY1 was 1 time). That is, the cycle including the process STb1, the process STb2, and the process STc was repeated.
[0078] (Third experiment) An experiment was conducted in the same manner as the first experiment except that the second cycle CY2 was not repeated (the number of executions of the second cycle CY2 was 1 time). That is, after the cycle including the process STb1 and the process STb2 was repeated, the process STc was performed.
[0079] (Fourth experiment) An experiment was conducted in the same manner as the first experiment except that only the process STc was performed.
[0080] (Experimental results) For each substrate obtained in the first to fourth experiments, the dimensions (CD) of the recesses formed in the SiON film by etching were measured by CD-SEM. The difference between the dimensions of the holes with small dimensions and the dimensions of the holes with large dimensions was calculated. The results are shown below. In the first to third experiments, it was found that the difference in dimensions could be made smaller than in the fourth experiment. First experiment: 19.3 nm Second experiment: 19.5 nm Third experiment: 19.3 nm Fourth experiment: 20.2 nm
[0081] The thickness of the resist mask was measured by TEM in the cross-section of each substrate (see (c) of FIG. 5). The results are shown below. In the first to third experiments, it was found that a decrease in the thickness of the resist mask could be suppressed compared to the fourth experiment. First experiment: 33.1 nm Second experiment: 32.4 nm Third experiment: 33.1 nm Fourth experiment: 28.9 nm
[0082] The angle from the lower surface of the SiON film through the inside of the SiON film to the side wall of the recess was measured by TEM in the cross-section of each substrate (see (c) of FIG. 5). The results are shown below. In the first to second experiments, it was found that the angle of the side wall approached perpendicularity compared to the third to fourth experiments. First experiment: 89.2° Second experiment: 89.1° Third experiment: 85.5° Fourth experiment: 87.8°
[0083] From the above description, it will be understood that the various embodiments of the present disclosure are described herein for illustrative purposes and that various changes can be made without departing from the scope and spirit of the present disclosure. Therefore, the various embodiments disclosed herein are not intended to be limiting, and the true scope and spirit are indicated by the appended claims.
Description of reference numerals
[0084] 1... Plasma processing apparatus, 10... Plasma processing chamber, 11... Substrate support part, EF... Film, MDP... Deposit, PR... Photoresist mask, W... Substrate.
Claims
【Claim 1】 (a) A step of preparing a substrate on a substrate support in a chamber of a plasma processing apparatus, the substrate including a film containing silicon and oxygen and a resist mask provided on the film; and (b) A step of repeating a first cycle, the first cycle including: (b1) A step of forming a deposit on the substrate, the deposit being supplied to the substrate from plasma generated from a process gas having a deposition property in the chamber; and (b2) A step of etching the deposit using plasma generated in the chamber; and (c) A step of etching the film using plasma generated in the chamber; including A second cycle including (b) and (c) is repeated, The power level of the source high-frequency power used for plasma generation during the period when (b1) is performed in the first cycle is higher than the power level of the source high-frequency power during the period when (b2) is performed in the first cycle, The level of the electrical bias supplied to the substrate support to draw ions to the substrate during the period when (b2) is performed in the first cycle is higher than the level of the electrical bias supplied to the substrate support during the period when (b1) is performed in the first cycle, or the electrical bias is not supplied to the substrate support in (b1), The level of the electrical bias supplied to the substrate support in (c) is higher than the level of the electrical bias supplied to the substrate support in (b1), An etching method.
Citation Information
Patent Citations
Methods and Systems for Plasma Etching Using Bi-Modal Process Gas Composition Responsive to Plasma Power Level
US20170125253A1