Multilayer substrate, manufacturing method for multilayer substrate, and electronic appliance

Abstract

To provide a multilayer substrate that reduces a manufacturing process and decreases a resistance value of a conductive paste, a manufacturing method for the multilayer substrate, and an electronic appliance.SOLUTION: A multilayer substrate 100 includes a plurality of unit multilayer bodies 50 stacked on each other through an adhesive layer 38. Each unit multilayer body 50 includes metal layers formed by interlayer connection with a first via 18 containing plating or a conductive paste formed on both surfaces of a first insulating layer 14, second insulating layers 24 and 28 stacked in the gap between the respective metal layers, a third insulating layer 32 stacked on the second insulating layer 24 on an upper surface side, a second via 44 connecting the metal layer and another metal layer 22 inside the third insulating layer and containing a conductive paste, and the adhesive layer 38 stacked on the third insulating layer 32. Each metal layer includes pattern parts 20c and 22c and step parts 20b and 22b formed at the same height as the pattern parts and connected to the first via 18, and convex parts 20a and 22a formed on the surfaces of the step parts 20b and 22b and connected to the second via 44 in this order from the upper surface of the first insulating layer 14.SELECTED DRAWING: Figure 28

Description

Technical Field

[0001] The present invention relates to a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device.

Background Art

[0002] Conventionally, circuit boards such as printed wiring boards have been widely used in general to compactly incorporate electronic components into electronic devices. A printed wiring board is obtained by etching a copper foil laminated on a laminate according to an electronic circuit pattern.

[0003] On the other hand, with the demands for miniaturization, high performance, and low cost of electronic devices, the miniaturization, multilayerization of electronic circuits of circuit boards, and high-density mounting of electronic components have advanced rapidly, and the study of multilayer substrates has become active.

[0004] Therefore, as in Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2004-158671), a build-up multilayer substrate in which insulating materials having conductor patterns formed thereon are sequentially laminated on both surfaces of a core material serving as a base has been proposed as a multilayer substrate.

[0005] Further, Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2015-26689) proposes a multilayer substrate in which a plurality of insulating layers having a conductive paste connected to a metal layer are laminated by an adhesive layer.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] The build-up type multilayer substrate such as in Patent Document 1 requires a very long time in the manufacturing process. Also, due to the multi-layer structure, the yield per layer is reflected in the overall yield as a multiplier of the number of layers, resulting in the problem of increased manufacturing costs.

[0008] In addition, the multilayer substrate disclosed in Patent Document 2 has the merit of being able to shorten the manufacturing process compared to the build-up type multilayer substrate described above. However, since the interlayer connection is made with a conductive paste, there has been a problem that the resistance value in the conductive paste increases, and the allowable current value of the entire multilayer substrate decreases.

Means for Solving the Problems

[0009] Therefore, the present invention has been made to solve the above problems, and an object thereof is to provide a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device in which the manufacturing process is shortened and the allowable current value is improved by reducing the resistance value of the conductive paste.

[0010] That is, the disclosed multilayer substrate includes a first insulating layer, a metal layer formed on both surfaces of the first insulating layer and interconnected by first vias containing plating or conductive paste, a second insulating layer laminated in the gaps between the metal layers, a third insulating layer laminated on one side of the second insulating layer, a second via formed inside the third insulating layer to connect the metal layer to another metal layer and containing conductive paste, and an adhesive layer laminated on the third insulating layer. A plurality of unit laminates are laminated via the adhesive layer. Each metal layer formed on both surfaces of the first insulating layer has, in order from the surface of the first insulating layer, a patterned portion formed in a pattern shape, a stepped portion formed at the same height as the patterned portion and connected to the first via, and a convex portion formed on the surface of the stepped portion and connected to the second via. This makes it possible to shorten the manufacturing process compared to a build-up type multilayer substrate. Also, since the metal layer has a convex portion, the height of the conductive paste can be reduced, and the resistance value of the conductive paste can be decreased. That is, the allowable current value of the multilayer substrate can be improved.

[0011] Also, in the disclosed multilayer substrate, for the surface roughness of the surface and side surfaces of the patterned portion, the surface and side surfaces of the stepped portion, and the side surface of the convex portion of the metal layer to satisfy high-speed transmission characteristics, as an example, it is preferably about Rz of 2.0 μm or less. However, when Rz is made small, it becomes difficult for the copper of the circuit to adhere to the insulating resin. Therefore, in the disclosed multilayer substrate, it is preferable that an adhesion improvement coating is formed on the surface and side surfaces of the patterned portion, the surface and side surfaces of the stepped portion, and the side surface of the convex portion of the metal layer.

[0012] Furthermore, in the disclosed multilayer substrate, it is preferable that the convex portion is formed so as to have a smaller diameter as it is spaced apart from the first insulating layer.

[0013] In the disclosed method for manufacturing a multilayer substrate, in a first insulating layer having metal layers formed on both sides and interconnected by first vias containing plating or conductive paste, a first etching step is performed to sequentially form, by etching on each of the metal layers, a convex portion, a stepped portion connected to the convex portion, and a patterned portion having the same height as the stepped portion, from the surface side of the first insulating layer. Next, a first lamination step is carried out to laminate a second insulating layer in the gap between each of the metal layers. Then, a second lamination step is performed to laminate a third insulating layer on one side of the second insulating layer. Subsequently, a third lamination step is carried out to laminate an adhesive layer on the third insulating layer. Next, a via forming step is included, in which a plurality of through-holes connecting to the convex portion are drilled in the adhesive layer and the third insulating layer, and conductive paste is filled in each of the through-holes to form second vias, thereby manufacturing a unit laminate. A first step is required to include these steps. This can shorten the manufacturing process compared to a build-up type multilayer substrate. Also, the height of the conductive paste can be reduced, and the resistance value of the conductive paste can be decreased. That is, the allowable current value of the multilayer substrate can be improved.

[0014] Further, in the method for manufacturing a multilayer substrate, the first step preferably further includes a chemical adhesion improvement step of forming an adhesion improvement film in close contact with the metal layer as a subsequent step to the first etching step, and a first polishing step of exposing the surface of the convex portion and removing the adhesion improvement film on the surface of the convex portion by polishing the surface of the second insulating layer on the side where the third insulating layer is laminated and the surface of the convex portion as a subsequent step to the first lamination step. As a subsequent step to the second lamination step, a second polishing step of exposing the surface of the convex portion and removing the adhesion improvement film on the surface of the convex portion by polishing the surface of the second insulating layer on the side where the third insulating layer is not laminated and the surface of the convex portion is also preferably included.

[0015] Furthermore, in the method for manufacturing the disclosed multilayer substrate, in the first lamination step, a second insulating layer is laminated so as to cover the surface of the metal layer, and in the second lamination step, a metal foil is further laminated on the surface of the third insulating layer. The first step preferably further includes a second etching step of removing the metal foil by etching as a subsequent step to the second lamination step.

[0016] The disclosed electronic device is characterized by including the above-described disclosed multilayer substrate and electronic components.

Advantages of the Invention

[0017] According to the present invention, the manufacturing process can be shortened as compared with a build-up type multilayer substrate. Further, according to the present invention, since the metal layer has convex portions, the height of the conductive paste can be reduced, and the resistance value of the conductive paste can be decreased. That is, the allowable current value of the multilayer substrate can be improved.

Brief Description of the Drawings

[0018]

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[0019] Hereinafter, with reference to the drawings, the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200 in each embodiment will be described in detail. In all the drawings for explaining each embodiment, members having the same function are denoted by the same reference numerals, and repeated explanations may be omitted.

[0020] In the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200, there may be cases where "upper surface" or "lower surface" is described. However, since the stacking direction of the unit laminate 50 and the unit laminate 52 to be described later is the vertical direction and is illustrated in each figure, the expression is based on the vertical direction on the drawing. That is, the upper surface and the lower surface in the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200 include cases where they do not coincide with the actual vertical directions.

[0021] On the other hand, in the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200, there may be cases where "surface" is described. Here, "surface" means the above-mentioned "upper surface" or "lower surface". In the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200, there may be cases where "side surface" is described. Here, "side surface" means the "side surface" with respect to the above-mentioned "upper surface" and "lower surface".

[0022] <Multilayer Substrate> As shown in FIG. 28, the multilayer substrate 100 in the present embodiment has a configuration in which a plurality of unit laminates 50 and a unit laminate 52 are laminated.

[0023] Further, the unit laminate 50 includes a first insulating layer 14, metal layers 20 and 22 formed on both surfaces of the first insulating layer 14 and interconnected by first vias 18 containing plating or conductive paste, second insulating layers 24 and 28 laminated in the gaps between the metal layers 20 and 22, a third insulating layer 32 laminated on one side (the upper surface side in the present embodiment), a second via 44 formed inside the third insulating layer 32 and connecting the metal layer 20 and the metal layer 22 or the metal layer 58 and containing conductive paste, and an adhesive layer 38 laminated on the third insulating layer 32. That is, the multilayer substrate 100 includes the first insulating layer 14 in which the metal layer 20 and the metal layer 22 are interconnected by the first via 18 containing plating or conductive paste, and the third insulating layer 32 in which the metal layer 20 and the metal layer 22 or the metal layer 58 are interconnected by the second via 44. By adopting a configuration in which a plurality of such unit laminates 50 are laminated, the manufacturing process can be shortened as compared with the conventional build-up type multilayer substrate.

[0024] Also, the metal layer 20 on the upper surface side of the first insulating layer 14 has, in order from the upper surface of the first insulating layer 14, a patterned portion 20c formed in a predetermined pattern, a stepped portion 20b formed at the same height as the patterned portion 20c and connected to the first via 18, and a convex portion 20a formed on the surface (upper surface) of the stepped portion 20b and connected to the second via 44. Further, the metal layer 22 on the lower surface side of the first insulating layer 14 has, in order from the lower surface of the first insulating layer 14, a patterned portion 22c formed in a predetermined pattern, a stepped portion 22b formed at the same height as the patterned portion 22c and connected to the first via 18, and a convex portion 22a formed on the surface (lower surface) of the stepped portion 22b and connected to the second via 44.

[0025] The stepped portion 20b is formed in a flat plate shape (particularly a disc shape) with a thickness of about 18 to 35 μm, and the convex portion 20a is formed in a frustum of a cone shape with a thickness of about 5 to 20 μm and a smaller diameter than the stepped portion 20b. Similarly, the stepped portion 22b is formed in a flat plate shape (particularly a disc shape) with a thickness of about 18 to 35 μm, and the convex portion 22a is formed in a frustum of a cone shape with a thickness of about 5 to 20 μm and a smaller diameter than the stepped portion 22b. Note that the convex portion 20a and the stepped portion 20b are integrally formed, and the convex portion 22a and the stepped portion 22b are integrally formed.

[0026] By configuring the metal layers 20 and 22 as described above, the height of the second via 44 can be reduced, so that the resistance value of the second via 44 including the conductive paste can be decreased, and the allowable current value of the entire multilayer substrate 100 can be improved.

[0027] Further, it is preferable that adhesion improvement films (inorganic or organic films by a chemical adhesion process) 20d and 20e are formed on the surface and side surface of the patterned portion 20c, the surface and side surface of the stepped portion 20b, and the side surface of the convex portion 20a of the metal layer 20. Similarly, it is preferable that adhesion improvement films 22d and 22e are formed on the surface and side surface of the patterned portion 22c, the surface and side surface of the stepped portion 22b, and the side surface of the convex portion 22a of the metal layer 22. Thereby, while ensuring the adhesion between the second via 44 and the convex portions 20a and 22a, the high-speed signal lines of the metal layers 20 and 22 can be protected, so that the reliability of the entire multilayer substrate 100 can be improved.

[0028] Furthermore, it is preferable that the convex portions 20a and 22a are formed so as to have a smaller diameter as they are separated from the first insulating layer 14.

[0029] In addition, the multilayer substrate 100 is adhered by an adhesive layer 38 on the upper surface of the unit laminate 50 of the uppermost layer and has a metal layer 58 connected to the second via 44. Note that the metal layer 58 is formed in a pattern.

[0030] Note that since the unit laminate 52 becomes the lowermost layer during lamination, its configuration is different from that of the unit laminate 50. That is, the unit laminate 52 has a metal layer 60, an insulating layer 62, a conductive paste 72, and an adhesive layer 66, and has the same configuration as the configuration above the metal layer 20 of the unit laminate 50. Note that the metal layer 60 is formed in a pattern.

[0031] <Method for manufacturing a multilayer substrate> Subsequently, the method for manufacturing a multilayer substrate according to the present embodiment will be described in detail with reference to FIGS. 1 to 28.

[0032] The method for manufacturing a multilayer substrate includes a first step of manufacturing a unit laminate 50 and a second step of laminating a plurality of unit laminates 50.

[0033] First, as shown in FIGS. 1 and 2, in the method for manufacturing a multilayer substrate, a support 10 is prepared, and a step of drilling one or more through holes 16 in the support 10 is performed.

[0034] As an example, the support 10 can employ a copper-clad laminate (CCL) 10 in which copper foils 12 are attached to the upper and lower surfaces of the first insulating layer 14, but is not limited thereto, and can be appropriately selected according to the purpose.

[0035] Further, the first insulating layer 14 is not particularly limited as long as it is an insulating layer used in a multilayer substrate, and can be appropriately selected according to the purpose. As an example, the first insulating layer 14 can employ an inorganic base material such as an inorganic woven fabric or an inorganic non-woven fabric using glass cloth or the like, or a base material hardened in terms of hardness by an organic base material such as an organic woven fabric or an organic non-woven fabric.

[0036] Further, the first insulating layer 14 can more specifically, as an example, adopt a glass epoxy substrate (a glass woven fabric substrate impregnated with an epoxy resin, a glass non-woven fabric substrate impregnated with an epoxy resin), a glass woven fabric substrate impregnated with a bismaleimide triazine resin, an aramid non-woven fabric substrate impregnated with an epoxy resin, a glass woven fabric substrate impregnated with a modified polyphenylene ether resin, etc. Note that the glass epoxy substrate is a substrate obtained by impregnating a cloth (woven fabric or non-woven fabric) of glass fibers with an epoxy resin.

[0037] Also, the insulating layer (first insulating layer) 14 is cured. Cured means, for example, a state where heat generation corresponding to approximately 100% of the total heat generation amount of curing has ended, and for example, a state where almost no heat generation can be observed when differential scanning calorimetry is performed.

[0038] Also, the insulating layer (first insulating layer) 14 is usually flat. As an example, the average thickness of the insulating layer (first insulating layer) 14 may be 10 μm or more and 200 μm or less, or may be 30 μm or more and 100 μm or less, but there is no particular limitation, and it can be appropriately selected according to the purpose.

[0039] Also, the through hole 16 can be formed, for example, by laser processing. Examples of the type of laser processing include, but are not limited to, CO2 laser, YAG laser, etc., and can be appropriately selected according to the purpose.

[0040] Also, the size (opening diameter) of the through hole 16 may be, for example, 50 μm or more and 500 μm or less, or may be 100 μm or more and 300 μm or less, but it is not limited thereto, and can be appropriately selected according to the purpose.

[0041] In addition, although the shape of the through hole 16 in the present embodiment is a through hole drilled perpendicular to the first insulating layer 14, it is not limited thereto and can be appropriately selected according to the purpose. When the first via 18 is formed by filling a conductive paste described later, the through hole 16 may be formed in a shape (taper shape) in which its diameter gradually decreases from the first insulating layer 14 on the side where the conductive paste is filled.

[0042] Subsequently, as shown in FIG. 3, in the method for manufacturing a multilayer substrate, a step of forming a first via 18 including plating in the through hole 16 and a step of forming metal layers 20 and 22 connected to the first via 18 by plating are performed.

[0043] As an example, plating can be performed by electrolytic copper plating or the like. In this case, the first via 18 and the metal layers 20 and 22 are formed of copper.

[0044] In addition, in the method for manufacturing a multilayer substrate, instead of the first via 18 including plating, a step of filling the through hole 16 with a conductive paste to form the first via 18 may be performed. As the conductive paste, one containing a conductive filler and a binder resin can be adopted, but it is not limited thereto and can be appropriately selected according to the purpose. As the conductive filler, as an example, metal particles such as copper, gold, silver, palladium, nickel, tin, and bismuth can be adopted, and these metal particles can be used alone or in a mixture of two or more kinds. Furthermore, as the binder resin, as an example, an epoxy resin or a polyimide resin, which is a kind of thermosetting resin, can be adopted, but it is not limited thereto and can be appropriately selected according to the purpose.

[0045] Subsequently, as shown in FIGS. 4 to 9, in the method for manufacturing a multilayer substrate, a first etching step of forming a convex portion 20a, a stepped portion 20b, and a pattern-shaped portion 20c on the upper surface side metal layer 20 and forming a convex portion 22a, a stepped portion 22b, and a pattern-shaped portion 22c on the lower surface side metal layer 22 is performed.

[0046] First, a film-like dry film resist is attached to each surface of the metal layers 20 and 22. Next, it is exposed in a predetermined pattern to remove unnecessary portions, and a resist layer RGST is formed in the range where the convex portions 20a are to be formed in the metal layer 20 and the range where the convex portions 22a are to be formed in the metal layer 22. Next, by performing etching (half etching), the convex portions 20a are formed on the metal layer 20 and the convex portions 22a are formed on the metal layer 22. In this etching (half etching), portions that will become the stepped portions 20b and the patterned portions 20c are left on the metal layer 20, and portions that will become the stepped portions 22b and the patterned portions 22c are left on the metal layer 22. Thereafter, the resist layer RGST is removed.

[0047] Next, a film-like dry film resist is attached to each surface of the convex portions 20a and 22a and the metal layers 20 and 22 that remain after the etching (half etching). Next, it is exposed in a predetermined pattern to remove unnecessary portions, and a resist layer RGST is formed in the range where the convex portions 20a and 22a, the stepped portions 20b and 22b, and the patterned portions 20c and 22c are to be formed. Next, etching is performed, and then the resist layer RGST is removed. Thereby, the stepped portions 20b and the patterned portions 20c can be formed on the metal layer 20, and the stepped portions 22b and the patterned portions 22c can be formed on the metal layer 22. Note that the convex portions 20a and 22a remain as they are.

[0048] By forming the convex portions 20a and 22a and the stepped portions 20b and 22b on the metal layers 20 and 22, the height of the second via 44 including the conductive paste described later can be made low, so that the resistance value of the second via 44 can be decreased and the allowable current value of the entire multilayer substrate 100 can be improved.

[0049] Subsequently, as shown in FIG. 10, in the method for manufacturing a multilayer substrate, a chemical adhesion step of forming adhesion improvement films 20d and 20e on the metal layer 20 and forming adhesion improvement films 22d and 22e on the metal layer 22 is performed.

[0050] In the multilayer substrate 100, for the metal layers 20 and 22, the surface roughness of the surfaces and side surfaces of the patterned portions 20c and 22c, the surfaces and side surfaces of the stepped portions 20b and 22b, and the side surfaces of the convex portions 20a and 22a is preferably, for example, Rz of about 2.0 μm or less in order to satisfy the high-speed transmission characteristics. However, if Rz is reduced, it becomes difficult to adhere the metal layers 20 and 22 to the insulating resin (the second insulating layers 24 and 28). Therefore, in the present embodiment, instead of modifying the surface roughness of the metal layers 20 and 22, it is preferable to apply an inorganic or organic film (adhesion improvement film) to the surfaces and side surfaces of the metal layers 20 and 22 by a chemical adhesion process.

[0051] When the adhesion improvement films 20d, 20e, 22d, and 22e are inorganic films, electroless plating treatment can be employed as the chemical adhesion process. More specifically, by electroless plating treatment, for example, metals such as nickel, palladium, gold, and tin can be deposited on the surfaces of the metal layers 20 and 22 to form an adhesion improvement film (metal film). Note that the adhesion improvement films (metal films) 20d, 20e, 22d, and 22e are formed to have a thickness of about 0.1 μm to 3 μm, for example.

[0052] When the adhesion improvement films 20d, 20e, 22d, and 22e are organic films, OSP (Organic Solderability Preservative) treatment or the like can be employed as the chemical adhesion process. Thereby, adhesion improvement films (organic films) 20d, 20e, 22d, and 22e such as azole compounds and imidazole compounds can be formed on the surfaces of the metal layers 20 and 22. Note that the adhesion improvement films (organic films) 20d, 20e, 22d, and 22e are formed to have a thickness of about 0.1 μm to 3 μm, for example.

[0053] By forming the adhesion improvement films 20d, 20e, 22d, and 22e on the metal layers 20 and 22, high-speed signal lines of the metal layers 20 and 22 can be secured.

[0054] In the case where high-speed transmission is required for the multilayer substrate 100 and the electronic device 200, it is preferable to adopt a chemical adhesion process. Otherwise, it is preferable to perform a general roughening treatment (copper roughening treatment).

[0055] Subsequently, as shown in FIG. 11, in the method for manufacturing a multilayer substrate, a first lamination step of laminating second insulating layers 24 and 28 in the gaps between the metal layers 20 and 22 is performed.

[0056] The second insulating layers 24 and 28 are not particularly limited as long as they are insulating base materials used in multilayer substrates, and can be appropriately selected according to the purpose. More specifically, as an example, a thermosetting resin can be adopted for the second insulating layers 24 and 28. As the thermosetting resin, a fluororesin, a polyphenylene ether resin (PPE / PPO resin), a polyimide resin (PI resin), or a bismaleimide triazine resin (BT resin) is preferable. Since these resins are resins having a low dielectric constant and a low dielectric tangent, by adopting these resins, the transmission loss of electrical signals can be reduced.

[0057] Note that as the second insulating layers 24 and 28, an inorganic base material such as an inorganic woven fabric or an inorganic non-woven fabric using a glass cloth or the like, or a base material hardened by an organic base material such as an organic woven fabric or an organic non-woven fabric may be adopted. More specifically, the second insulating layers 24 and 28 may be a glass epoxy base material (a glass woven fabric base material impregnated with an epoxy resin, a glass non-woven fabric base material impregnated with an epoxy resin), a glass woven fabric base material impregnated with a bismaleimide triazine resin, an aramid non-woven fabric base material impregnated with an epoxy resin, a glass woven fabric base material impregnated with a modified polyphenylene ether resin, or the like.

[0058] In the first lamination step, the uncured second insulating layer 24 described above and the resin film 26 are laminated in this order on the upper part of the upper metal layer 20, and the uncured second insulating layer 28 described above and the resin film 30 are laminated in this order on the lower part of the lower metal layer 22, and thermocompression bonding is performed. Further, after the thermocompression bonding, the resin films 26 and 30 are peeled off.

[0059] Thermal compression bonding can be carried out, for example, at a temperature of 50°C or higher and 100°C or lower, a pressure of 0.5 MPa or higher and 1.2 MPa or lower, and a time of 60 seconds or longer and 120 seconds or shorter, but is not limited thereto and can be appropriately selected according to the purpose.

[0060] In addition, the resin films 26 and 30 are not particularly limited as long as they are resin films that do not melt during thermal compression bonding, and can be appropriately selected according to the purpose. For example, polyethylene terephthalate films, polyethylene naphthalate films, polyphenylene sulfite films, polyimide films, etc. can be adopted.

[0061] Moreover, the thickness of the resin films 26 and 30 may be 10 μm or more and 150 μm or less, or may be 20 μm or more and 100 μm or less, but is not limited thereto and can be appropriately selected according to the purpose.

[0062] In addition, the method for peeling the resin films 26 and 30 is not particularly limited and can be appropriately selected according to the purpose. For example, a method of gripping the ends of the resin films 26 and 30 with a jig and pulling them away from the second insulating layers 24 and 28 can be adopted.

[0063] Note that, as another example, the first lamination step may adopt a method of laminating the second insulating layers 24 and 28 by a screen printing method.

[0064] In addition, in the first lamination step, it is preferable to laminate the second insulating layers 24 and 28 so as to cover the surfaces of the metal layers 20 and 22. That is, it is preferable that the second insulating layer 24 is formed thicker than the metal layer 20, and the second insulating layer 28 is formed thicker than the metal layer 22. In particular, in the first lamination step, it is preferable to laminate the second insulating layer 28 so as to cover the surface of the metal layer 22. Thereby, when etching the metal foil 34 described later, it is possible to prevent the metal layer 22 on the lower surface side from being removed by etching.

[0065] Subsequently, as shown in FIG. 12, in the method for manufacturing a multilayer substrate, a first polishing step is performed to expose the surface (upper surface) of the convex portion 20a of the metal layer 20 on the upper surface side and the surface (upper surface) of the second insulating layer 24 on the upper surface side by polishing, and to remove the adhesion improvement film 20d on the surface of the convex portion 20a. More specifically, polishing is performed by a polishing machine (not shown) such that the convex portion 20a after removing the adhesion improvement film 20d and the second insulating layer 24 are flush. Thereby, while protecting the high-speed line of the metal layer 20, the adhesion between the convex portion 20a and the second via 44 described later can be enhanced.

[0066] When resin films 26 and 30 are attached to the second insulating layers 24 and 28, the resin films 26 and 30 are peeled off before polishing.

[0067] Subsequently, as shown in FIG. 13, in the method for manufacturing a multilayer substrate, a second lamination step is performed to laminate a third insulating layer 32 on the second insulating layer 24 on one side (upper surface side).

[0068] The third insulating layer 32 is not particularly limited as long as it is an insulating base material used in a multilayer substrate, and can be appropriately selected according to the purpose. Further, the third insulating layer 32 is cured. As an example, the third insulating layer 32 can employ an inorganic base material such as an inorganic woven fabric or non-woven fabric using a glass cloth, or a base material hardened by an organic base material such as an organic woven fabric or non-woven fabric.

[0069] More specifically, as an example, the third insulating layer 32 can employ a glass epoxy base material (a glass woven fabric base material impregnated with an epoxy resin, a glass non-woven fabric base material impregnated with an epoxy resin), a glass woven fabric base material impregnated with a bismaleimide triazine resin, an aramid non-woven fabric base material impregnated with an epoxy resin, a glass woven fabric base material impregnated with a modified polyphenylene ether resin, and the like.

[0070] Note that it is preferable that the glass epoxy substrate as the third insulating layer 32 and the glass epoxy substrate as the first insulating layer 14 are the same glass epoxy substrate. Thereby, since the characteristic values (such as volume shrinkage / expansion and mechanical rigidity) are the same, it is possible to reduce the occurrence of warpage of the multilayer substrate due to stress differences. In addition, it is possible to eliminate the influence on the curing, bonding state, etc. caused by the movement of the material components and moisture contained in the substrate into the adjacent substrate.

[0071] Note that in the second lamination step, a metal foil (for example, a copper foil) 34 may be attached to the upper surface of the third insulating layer 32, and the third insulating layer 32 and the metal foil 34 may be laminated on the second insulating layer 24 and the convex portion 20a by thermocompression bonding. Further, in the second lamination step, a metal foil (copper foil) 36 may be attached to the lower surface of the second insulating layer 28, and the above thermocompression bonding may be performed. Thereby, the flatness of the unit laminate 50 can be ensured, and the reliability of the multilayer substrate 100 can be improved.

[0072] Thermocompression bonding can be carried out, for example, at a temperature of 50°C or higher and 100°C or lower, a pressure of 0.5 MPa or higher and 1.2 MPa or lower, and a time of 60 seconds or longer and 120 seconds or shorter, but it is not limited thereto and can be appropriately selected according to the purpose.

[0073] Subsequently, as shown in FIG. 14, in the method for manufacturing a multilayer substrate, a second etching step of removing the metal foils 34 and 36 is performed.

[0074] Note that even when the metal foil 36 is not attached to the lower surface of the second insulating layer 28, since the second insulating layer 28 covers the metal layer 22 on the lower surface side and the second insulating layer 28 functions as a barrier resin, it is possible to prevent the metal layer 22 from being etched.

[0075] Subsequently, as shown in FIG. 15, in the method for manufacturing a multilayer substrate, a second polishing step is performed to expose the surface (lower surface) of the convex portion 22a of the metal layer 22 on the lower surface side and the surface (lower surface) of the second insulating layer 28 on the lower surface side by polishing, and to remove the adhesion improvement film 22d on the surface of the convex portion 22a. More specifically, polishing is performed by a polishing machine (not shown) so that the convex portion 22a after removing the adhesion improvement film 22d and the second insulating layer 28 are flush. Thereby, while protecting the high-speed line of the metal layer 22, the adhesion between the convex portion 22a and the second via 44 in the other unit laminate can be enhanced.

[0076] Subsequently, as shown in FIG. 16, in the method for manufacturing a multilayer substrate, a third lamination step is performed to laminate an adhesive layer (particularly, an insulating adhesive layer) 38 on the surface (upper surface) of the third insulating layer 32.

[0077] The adhesive layer 38 is, for example, an insulating adhesive 38, and a bonding sheet having a separator 40 laminated thereon can be employed.

[0078] Subsequently, as shown in FIGS. 17 to 19, in the method for manufacturing a multilayer substrate, a via forming step is performed to form a plurality of through holes 42 connecting to the convex portions 20a of the metal layer 20 on the upper surface side in the separator 40, the adhesive layer 38, and the third insulating layer 32, fill each through hole 42 with a conductive paste 44, and form the second via 44. More specifically, through holes 42 reaching the surface (upper surface) of the convex portion 20a are drilled from the surfaces (upper surfaces) of the separator 40, the adhesive layer 38, and the third insulating layer 32. Next, each through hole 42 is filled with a conductive paste (particularly, an uncured conductive paste) 44, and the separator 40 is peeled off.

[0079] The through holes 42 can be drilled by laser processing. Examples of the type of laser include, but are not limited to, a CO2 laser, a YAG laser, etc., and can be appropriately selected according to the purpose.

[0080] Further, the size (aperture diameter) of the through-hole 42 may be, for example, 50 μm or more and 500 μm or less, or may be 100 μm or more and 300 μm or less, but is not limited thereto and can be appropriately selected according to the purpose.

[0081] Further, the shape of the through-hole 42 in the present embodiment is preferably formed in a shape (taper shape) in which the diameter gradually decreases from the surface (upper surface) side of the adhesive layer 38 toward the metal layer 20.

[0082] As the conductive paste 44 filled in the through-hole 42, one containing a conductive filler and a binder resin can be adopted, but is not limited thereto and can be appropriately selected according to the purpose. As the conductive filler, for example, metal particles such as copper, gold, silver, palladium, nickel, tin, and bismuth can be adopted, and these metal particles can be used alone or in a mixture of two or more. Further, as the binder resin, for example, an epoxy resin or a polyimide resin, which is a kind of thermosetting resin, can be adopted, but is not limited thereto and can be appropriately selected according to the purpose.

[0083] By implementing each of the above steps, the unit laminate 50 can be manufactured.

[0084] Subsequently, a method for manufacturing the unit laminate 52 located in the lowermost layer of the multilayer substrate 100 will be described in detail with reference to FIGS. 20 to 25.

[0085] In the method for manufacturing the unit laminate 52, as shown in FIGS. 20 and 21, first, a support 80 is prepared, and a step of removing the metal foil 64 on the surface (upper surface) of the support 80 by etching is performed.

[0086] As the support 80, for example, a copper-clad laminate (CCL) 80 in which metal foils (copper foils) 56 and 64 are attached to the upper and lower surfaces of an insulating layer 62 can be adopted, but is not limited thereto and can be appropriately selected according to the purpose.

[0087] In addition, as the insulating layer 62, a base material similar to the first insulating layer 14 can be adopted. Note that it is preferable that the glass epoxy base material as the insulating layer 62 and the glass epoxy base material as the first insulating layer 14 are the same glass epoxy base material. Thereby, since the characteristic values (volume shrinkage / expansion, mechanical rigidity, etc.) are the same, it is possible to reduce the occurrence of warping of the multilayer substrate due to stress differences. Further, it is possible to eliminate the influence on the curing, bonding state, etc. caused by the movement of the material components and moisture contained in the base material into the adjacent base material.

[0088] Subsequently, in the method for manufacturing the unit laminate 52, as shown in FIG. 22, a step of laminating an adhesive layer (particularly, an insulating adhesive layer) 66 on the surface (upper surface) of the support 80 after etching is performed.

[0089] As an example, the adhesive layer 66 is an insulating adhesive 66, and a bonding sheet having a separator 68 laminated thereon can be adopted.

[0090] Subsequently, in the method for manufacturing the unit laminate 52, as shown in FIGS. 23 and 24, one or a plurality of through holes 70 connected to the metal foil 56 are drilled in the separator 68, the adhesive layer 66, and the insulating layer 62, and a conductive paste 72 is filled to form a third via 72.

[0091] The through holes 70 can be drilled by laser processing. Examples of the type of laser include, but are not limited to, a CO2 laser, a YAG laser, etc., and can be appropriately selected according to the purpose.

[0092] In addition, the size (opening diameter) of the through hole 70 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited thereto, and can be appropriately selected according to the purpose.

[0093] In addition, the shape of the through hole 70 in the present embodiment is preferably formed in a shape (taper shape) in which the diameter gradually decreases from the surface (upper surface) side of the adhesive layer 38 toward the metal foil 56.

[0094] Further, as the conductive paste 72 filled in the through-hole 70, the same one as the conductive paste 44 can be adopted.

[0095] Subsequently, in the method for manufacturing the unit laminate 52, as shown in FIG. 25, a step of peeling the separator 68 is carried out.

[0096] As described above, the unit laminate 52 located in the lowermost layer of the multilayer substrate 100 can be manufactured.

[0097] Subsequently, as shown in FIGS. 26 and 27, in the method for manufacturing the multilayer substrate, a second step of laminating a plurality of unit laminates 50 and the unit laminate 52 is carried out. Further, a metal foil 54 is laminated on the upper surface of the unit laminate 50 in the uppermost layer. More specifically, the convex portion 22a of one unit laminate 50 is connected to the second via (non-cured second via) 44 of the other lower unit laminate 50 or the third via (non-cured third via) 72 of the lower unit laminate 52, and the second insulating layer 24 on the lower surface side of one unit laminate 50 is adhered to the adhesive layer 38 of the other lower unit laminate 50 or the adhesive layer 66 of the lower unit laminate 52, and the entire multilayer substrate 100 is thermocompression bonded. Thereby, as shown in FIG. 27, a multilayer substrate 100 having a metal foil 54 laminated on the upper surface and a metal foil 56 laminated on the lower surface can be obtained.

[0098] Further, as shown in FIG. 28, in the method for manufacturing the multilayer substrate, metal layers 58 and 60 having a pattern shape can be obtained by performing predetermined etching on the metal foil 54 and the metal foil 56.

[0099] The multilayer substrate 100 can be obtained by the above-described method for manufacturing the multilayer substrate.

[0100] In addition, when the number of layers of the multilayer substrate 100 is an odd number, a structure in which a metal layer, an insulating layer, and a conductive paste are further laminated on the above-described unit laminate 52 may be laminated on the lowermost layer of the multilayer substrate 100.

[0101] <Electronic device> Next, the electronic device 200 according to the present invention will be described. The electronic device 200 includes at least a multilayer substrate 100 and electronic components, and may further include other members as needed.

[0102] The electronic device 200 is not particularly limited and can be appropriately selected according to the purpose. For example, personal computers (laptop computers, desktop computers), telephones, mobile phones, tablet-type mobile terminals, smartphones, copiers, facsimiles, various printers, digital cameras, televisions, videos, CD devices, DVD devices, air conditioners, remote control devices, etc. can be mentioned.

[0103] FIG. 29 shows a schematic cross-sectional view of a semiconductor package. The semiconductor package in FIG. 29 includes a mother board 160 having solder balls 155, an interposer 170 connected to the mother board 160 via bumps 165, and a semiconductor element 180 disposed on the interposer 170. Examples of the semiconductor element 180 include FPGA (Field Programmable Gate Array) chips.

[0104] Here, the multilayer substrate 100 can be used as the mother board 160 in FIG. 29, can also be used as the interposer 170, and further can be used as the multilayer substrate constituting the semiconductor element 180.

Description of reference numerals

[0105] 14 First insulating layer 18 First via 20, 22 Metal layer 20a, 22a Convex portion 20b, 22b Step portion 20c, 22c Patterned portion 20d, 20e, 22d, 22e Adhesion improvement film 24, 28 Second insulating layer 32 Third insulating layer 38 Adhesive layer 44 Second via 50 unit laminates 52 unit laminates 100 multi-layer substrates 200 electronic devices

Claims

1. A first insulating layer, a metal layer formed on both surfaces of the first insulating layer and interconnected by first vias containing plating or a conductive paste, a second insulating layer laminated in a gap between each of the metal layers, a third insulating layer laminated on one side of the second insulating layer, a second via formed inside the third insulating layer to connect the metal layer and another metal layer and containing a conductive paste, and a plurality of unit laminates each having an adhesive layer are laminated via the adhesive layer, Each of the metal layers formed on the first insulating layer has, in order from the surface of the first insulating layer, a patterned portion formed in a pattern, a stepped portion formed at the same height as the patterned portion and connected to the first via, and a convex portion formed on the surface of the stepped portion and connected to the second via. A multilayer substrate characterized by the above.

2. An adhesion improvement coating is formed on the surface and side surfaces of the patterned portion, the surface and side surfaces of the stepped portion, and the side surface of the convex portion of the metal layer. The multilayer substrate according to claim 1, characterized by the above.

3. The convex portion is formed so as to have a smaller diameter as it is separated from the first insulating layer. The multilayer substrate according to claim 2, characterized by the above.

4. In a first insulating layer having metal layers interconnected by first vias containing plating or a conductive paste formed on both surfaces, a first etching step of forming, by etching, a convex portion, a stepped portion connected to the convex portion, and a patterned portion having the same height as the stepped portion in order from the surface side of the first insulating layer for each of the metal layers; Next, a first lamination step of laminating a second insulating layer in a gap between each of the metal layers; Next, a second lamination step of laminating a third insulating layer on one side of the second insulating layer; Next, a third lamination step of laminating an adhesive layer on the third insulating layer; Next, a via formation step of forming a second via by drilling a plurality of through holes connecting to the convex portions in the adhesive layer and the third insulating layer, and filling each through hole with a conductive paste, and a first step of manufacturing a unit laminate including the above steps are included. Next, a second step of laminating a plurality of the unit laminates through the adhesive layer is provided. A method for manufacturing a multilayer substrate, characterized by the above.

5. The first step includes a chemical adhesion step of forming an adhesion improvement film in close contact with the metal layer as a subsequent step of the first etching step. As a subsequent step of the first lamination step, the surface of the convex portion is exposed by polishing the surface of the second insulating layer on the side where the third insulating layer is laminated and the surface of the convex portion, and a first polishing step of removing the adhesion improvement film on the surface of the convex portion is performed. As a subsequent step of the second lamination step, the surface of the convex portion is exposed by polishing the surface of the second insulating layer on the side where the third insulating layer is not laminated and the surface of the convex portion, and a second polishing step of removing the adhesion improvement film on the surface of the convex portion is further included. The method for manufacturing a multilayer substrate according to claim 4, characterized by the above.

6. In the first lamination step, the second insulating layer is laminated so as to cover the surface of the metal layer. In the second lamination step, a metal foil is further laminated on the surface of the third insulating layer. The first step further includes a second etching step of removing the metal foil by etching as a subsequent step of the second lamination step. The method for manufacturing a multilayer substrate according to claim 5, characterized by the above.

7. An electronic device in which an electronic component is mounted on the multilayer substrate according to any one of claims 1 to 3.

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