Spatial light modulation device

Abstract

To apply a sufficient voltage to a liquid crystal while suppressing an increase in pixel area.SOLUTION: A spatial light modulation device includes: a light modulation portion in which a plurality of pixels are arrayed; a first driver supplying a first potential to the light modulation portion; a second driver supplying a second potential to the light modulation portion; and a voltage control portion supplying a third potential controlled in three stages to the light modulation portion. The pixel has: a first transistor whose conduction state is controlled by the first potential applied to a gate terminal; a second transistor whose conduction state is controlled by the second potential applied to the gate terminal when the conduction state of the first transistor is on; and a liquid crystal element formed by interposing a ferroelectric liquid crystal between a first electrode whose potential is set according to the conduction state of the second transistor, and a second electrode supplied with the third potential and facing the first electrode.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present disclosure relates to a spatial light modulation device.

Background Art

[0002] Generally, a spatial light modulation device used in a video projection device such as a projector or a holographic display, also referred to as an SLM (Spatial Light Modulator), is used for spatial modulation of the phase and amplitude of coherent light using a liquid crystal cell. As an SLM using a liquid crystal cell, for example, there is a reflective SLM using LCOS (Liquid Crystal On Silicon).

[0003] In such a reflective SLM, pixels sandwiching a liquid crystal layer with a transparent electrode and a reflective electrode are formed on silicon, input light passing through the transparent electrode and the liquid crystal layer is reflected by the reflective electrode of each pixel, and modulated light is output. For example, when outputting binary modulated light, a ferroelectric liquid crystal (FLC: Ferroelectric Liquid Crystal) having spontaneous polarization is often used as the liquid crystal layer.

[0004] The pixel circuit of an SLM having FLC can be formed based on, for example, a DRAM (Dynamic Random Access Memory) cell or an SRAM (Static Random Access Memory) cell. In such a pixel circuit, the potential of the reflective electrode is controlled to 0 or the power supply potential according to the data, and a voltage between the reflective electrode and the transparent electrode is applied to the liquid crystal layer made of FLC. And if the applied voltage reaches the driving voltage of FLC, the polarization direction of FLC can be reversed. Therefore, in order to make the voltage between the reflective electrode and the transparent electrode sufficiently large, the potential of the transparent electrode is generally fixed to half of the power supply potential. Also, it is desirable that the pixels be small. For example, in order to realize a practical viewing angle of 30° in a holographic display, the pixel pitch required is 1 μm.

Prior Art Documents

Patent Document

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] However, in an SLM having an FLC, for example, when attempting to narrow the pixel pitch such as a 1-μm pitch, there is a problem that it is difficult to obtain a driving voltage for driving the FLC. Narrowing the pixel pitch means miniaturizing the transistors in the pixel circuit. Generally, as transistors are miniaturized, their breakdown voltage decreases. Therefore, when narrowing the pixel pitch, it is necessary to lower the power supply potential. Furthermore, regardless of whether the potential of the reflective electrode is controlled to be either 0 or the power supply potential, since the potential of the transparent electrode is fixed at half of the power supply potential, the voltage between the reflective electrode and the transparent electrode can only be at most half of the magnitude of the power supply potential. Therefore, as the pixel pitch is narrowed, it becomes difficult to obtain a voltage sufficient to invert the polarization direction of the FLC.

[0007] Also, for example, a pixel circuit based on a DRAM cell has a configuration in which the potential of the reflective electrode is controlled by a single transistor. Therefore, although the pixel area can be reduced, for an FLC with a large inversion current, even if it can be driven with a voltage sufficient to invert the polarization, a sufficiently large driving current cannot be obtained, and the inversion takes time, resulting in a slow frame rate.

[0008] Furthermore, for example, a pixel circuit based on an SRAM cell can suppress a decrease in the frame rate by assigning data writing to the pixel and driving the FLC to different transistors. However, since it has a configuration with a plurality of transistors, the pixel area increases.

[0009] The present disclosure has been made in view of the above, and an object thereof is to provide a spatial light modulator capable of applying a sufficient voltage to liquid crystal while suppressing an increase in pixel area.

Means for Solving the Problems

[0010] According to one aspect of the present disclosure, a spatial light modulator includes a light modulation unit in which a plurality of pixels are arranged, a first driver that supplies a first potential to the light modulation unit, a second driver that supplies a second potential to the light modulation unit, and a voltage control unit that supplies a third potential controlled in three stages to the light modulation unit. The pixel includes a first transistor whose conduction state is controlled by the first potential applied to a gate terminal, a second transistor whose conduction state is controlled by the second potential applied to the gate terminal when the conduction state of the first transistor is on, a first electrode to which a potential is set according to the conduction state of the second transistor, and a ferroelectric liquid crystal sandwiched between a second electrode to which the third potential is supplied and opposed to the first electrode.

Effects of the Invention

[0011] According to the present disclosure, it is possible to apply a sufficient voltage to the liquid crystal while suppressing an increase in pixel area.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

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Figure 8

Figure 9

Figure 10

Figure 11

[0013] Hereinafter, an embodiment according to the present disclosure will be described with reference to the accompanying drawings. The embodiments described below are examples and are not to be construed as being limited by this description.

[0014] FIG. 1 is a block diagram showing the configuration of a spatial light modulator 100 according to an embodiment. This spatial light modulator 100 is provided in a video projection device such as a holographic display, for example, and spatially modulates the phase of input light and outputs it. The spatial light modulator 100 shown in FIG. 1 includes a light modulation unit 110, a gate driver 120, a source driver 130, a counter voltage control unit 140, and a counter voltage generation unit 150.

[0015] The light modulation unit 110 includes a pixel array in which a plurality of pixels 115 are two-dimensionally arranged in a row direction and a column direction, drives a liquid crystal element for each pixel 115 according to data written to each pixel 115 by the source driver 130, and spatially modulates the input light for each pixel 115.

[0016] Specifically, the optical modulation unit 110 has the configuration shown in FIG. 2. FIG. 2 is a diagram showing a partial cross-section of the optical modulation unit 110. As shown in FIG. 2, on the silicon substrate 210, a pixel circuit 220, a reflective electrode 230, an alignment film 241, a liquid crystal layer 250, an alignment film 242, a transparent electrode 260, and a cover glass 270 are laminated to form the optical modulation unit 110. The pixel circuit 220 and the reflective electrode 230 are provided for each pixel 115.

[0017] The pixel circuit 220 is connected to the gate driver 120 and the source driver 130, and is a circuit having two transistors such as, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The pixel circuit 220 controls the writing of data to the pixel 115 by switching the conduction states of the two transistors to control the potential of the reflective electrode 230.

[0018] The reflective electrode 230 is an electrode formed of a metal such as aluminum, for example, and reflects the input light that passes through the cover glass 270, the transparent electrode 260, and the liquid crystal layer 250. The reflective electrode 230 forms a liquid crystal element of the pixel 115 by sandwiching the liquid crystal layer 250 between the opposing transparent electrodes 260. The potential of the reflective electrode 230 is controlled to a potential corresponding to the data by the pixel circuit 220.

[0019] The alignment films 241 and 242 are in direct contact with the liquid crystal layer 250 and align the liquid crystal molecule groups forming the liquid crystal layer 250 in a predetermined direction.

[0020] The liquid crystal layer 250 is formed using ferroelectric liquid crystal (FLC) having spontaneous polarization, and reverses the polarization direction in the pixel 115 where the voltage between the reflective electrode 230 and the transparent electrode 260 reaches the driving voltage. Then, the liquid crystal layer 250 changes the transmittance with respect to the input light according to the polarization direction for each pixel 115.

[0021] The transparent electrode 260 is a transparent electrode formed of, for example, indium tin oxide (ITO: Indium Tin Oxide), and transmits the input light and the reflected light from the reflective electrode 230. The transparent electrode 260 is a single film-like electrode facing a plurality of reflective electrodes 230 provided for each pixel 115, and is connected to the counter voltage generation unit 150. The potential of the transparent electrode 260 is controlled in three steps of a positive power supply potential, 0, and a negative power supply potential by the counter voltage control unit 140 and the counter voltage generation unit 150.

[0022] The cover glass 270 is a transparent member that covers the transparent electrode 260 and protects the surface of the light modulation unit 110. The input light input to the light modulation unit 110 is incident from the outside to the cover glass 270, and the reflected light reflected by the reflective electrode 230 is output from the cover glass 270 to the outside.

[0023] Returning to FIG. 1, the gate driver 120 sequentially applies a gate voltage to each row of the pixel array of the light modulation unit 110, and controls whether data is written to the pixel 115 to which the gate voltage is applied.

[0024] When writing data to each column of the pixel array of the source driver 130, the source driver 130 supplies a data voltage corresponding to the data and controls the potential of the reflective electrode 230 included in the pixel 115.

[0025] The counter voltage control unit 140 controls the counter voltage for setting the potential of the transparent electrode 260 to a desired potential. Specifically, when the frame of the display data starts, the counter voltage control unit 140 supplies a negative power supply potential as the counter voltage to the transparent electrode 260 in order to reset the polarization direction of the liquid crystal elements of all the pixels 115. Then, while data is being written to each pixel 115, the counter voltage control unit 140 supplies 0 as the counter voltage to the transparent electrode 260, and when the writing of data to all the pixels 115 is completed, the counter voltage control unit 140 supplies a positive power supply potential as the counter voltage to the transparent electrode 260. In this way, the counter voltage control unit 140 supplies a three-step counter voltage to the transparent electrode 260 and controls the potential of the transparent electrode 260 in three steps of a positive power supply potential, 0, and a negative power supply potential.

[0026] The counter-voltage generation unit 150 supplies a counter-voltage to the transparent electrode 260 in accordance with the control by the counter-voltage control unit 140. That is, the counter-voltage generation unit 150 supplies three types of counter-voltages, namely, a positive power supply potential, 0, and a negative power supply potential, to the transparent electrode 260. Specifically, the counter-voltage generation unit 150 has, for example, the circuit configuration shown in FIG. 3. As shown in FIG. 3, the counter-voltage generation unit 150 includes inverter circuits 151 to 153, a voltage dividing circuit 154, and transmission gate circuits 155 and 156.

[0027] The inverter circuit 151 is connected to a positive power supply potential (+V DD ) and a ground potential (GND), and supplies an output voltage to the voltage dividing circuit 154.

[0028] The inverter circuit 152 is connected to a positive power supply potential (+V DD ) and a ground potential (GND), and supplies an output voltage to the transmission gate circuit 155.

[0029] The inverter circuit 153 is connected to a ground potential (GND) and a negative power supply potential (-V DD ), and supplies an output voltage to the transmission gate circuit 156.

[0030] The voltage dividing circuit 154 has resistor elements with a resistance ratio of 2:1, and divides the voltage between the potential of the output of the inverter circuit 151 and the negative power supply potential (-V DD ) and supplies the output voltage to the inverter circuit 153.

[0031] The transmission gate circuit 155 switches whether to supply the output voltage of the inverter circuit 152 to the transparent electrode 260.

[0032] The transmission gate circuit 156 switches whether to supply the output voltage of the inverter circuit 153 to the transparent electrode 260.

[0033] Such a counter-voltage generation unit 150 supplies any one of a positive power supply potential (+V DD ), 0, and a negative power supply potential (-V DD ) to the transparent electrode 260 as a counter-voltage by controlling the operations of the inverter circuits 151 and 152 and the transmission gate circuits 155 and 156 by the counter-voltage control unit 140.

[0034] Next, the configuration of the pixel 115 of the optical modulation unit 110 will be described in more detail. FIG. 4 is a diagram showing the circuit configuration of the pixel 115. The pixel 115 shown in FIG. 4 includes transistors 301 and 302 and a liquid crystal element 303.

[0035] The transistor 301 is a field-effect transistor such as a MOSFET, for example. Its gate terminal is connected to the gate driver 120, its source terminal is connected to the source driver 130, and its drain terminal is connected to node A. Therefore, the conduction state of the transistor 301 is controlled by the write voltage from the gate driver 120, and when the conduction state is on, the potential of node A is set by the data voltage from the source driver 130. Here, since node A is the node connected to the gate terminal of the transistor 302, a gate voltage corresponding to the potential of node A is applied to the gate terminal of the transistor 302.

[0036] The transistor 302 is a field-effect transistor such as a MOSFET, for example. Its gate terminal is connected to node A, its source terminal is connected to the ground electrode, and its drain terminal is connected to node B. Therefore, the conduction state of the transistor 302 is controlled by the potential from node A, and when the conduction state is on, the potential of node B is set by the ground potential from the ground electrode. Here, since node B is the node connected to the reflective electrode 230 of the liquid crystal element 303, when the conduction state of the transistor 302 is on, the potential of the reflective electrode 230 of the liquid crystal element 303 is set to 0 in the same manner as node B.

[0037] The liquid crystal element 303 is configured by sandwiching a liquid crystal layer 250 between a reflective electrode 230 and a transparent electrode 260, and drives the liquid crystal layer 250 by the voltage between the reflective electrode 230 and the transparent electrode 260. That is, when the voltage between the reflective electrode 230 and the transparent electrode 260 reaches the driving voltage, the liquid crystal element 303 can reverse the polarization direction of the liquid crystal molecules constituting the liquid crystal layer 250.

[0038] The liquid crystal element 303 is in a state where the transistor 302 is conductive and the potential V of node B B is controlled to 0 and the polarization direction is reset to the initial state at the timing when the counter voltage becomes the negative power supply potential. Thereafter, the liquid crystal element 303 maintains or reverses the polarization direction according to the potential state of the reflective electrode 230 at the timing when the transistor 302 is non-conductive, node B is in a high impedance (Hi-Z) state, and the counter voltage becomes the positive power supply potential.

[0039] Thus, since the pixel 115 is composed of two transistors 301, 302 and the liquid crystal element 303, an increase in the pixel area is suppressed to a minimum. In particular, since it is only necessary for the pixel circuit 220 to be provided with two transistors 301, 302, the circuit scale of the pixel circuit 220 is small, and the manufacturing cost of the spatial light modulator 100 and the like can also be reduced.

[0040] Next, the writing of data to the pixel 115 configured as described above will be specifically described. Here, first, for example, when writing data "0" to the pixel 115, the case where the polarization direction of the liquid crystal element 303 is set in the direction of "-" will be described.

[0041] FIG. 5 is a diagram showing a first example of the potential transition of each node in the pixel 115. In FIG. 5, the data voltage V, the write voltage V, the counter voltage V, the potential V of node A, the potential V of node B, and the potential V of node C are shown in order from the top. The data voltage V is controlled by the source driver 130, and the write voltage V DATA , write voltage V WRITE , counter voltage V OPP , potential V of node A A , potential V of node B B are shown. The data voltage V DATA is controlled by the source driver 130, and the write voltage VWRITE is controlled by the gate driver 120, and the counter voltage V OPP is controlled by the counter voltage control unit 140 and the counter voltage generation unit 150.

[0042] The first example is a case where, for example, at the start of a frame (time t0), the data "0" of the previous frame is written to the pixel 115 and the polarization direction of the liquid crystal element 303 is in the "-" direction. In this case, when the frame starts at time t0, the potential V of the node B equal to the potential of the reflective electrode 230 B is the positive power supply potential +V DD and is.

[0043] From time t0 to t1, the counter voltage V continues from the previous frame OPP is set to the positive power supply potential +V DD , and the potential of the transparent electrode 260 becomes the positive power supply potential +V DD . Then, from time t1 to t2, the counter voltage V OPP is set to 0, and accordingly, the potentials of the transparent electrode 260 and the reflective electrode 230 become 0. Here, it is assumed that the counter voltage V OPP is set to 0 from time t1 to t2, but the counter voltage V OPP may remain set to the positive power supply potential +V DD until time t2.

[0044] From time t2 to t3, the polarization direction of the liquid crystal element 303 is reset to the initial "-" direction. Specifically, the counter voltage V OPP is set to the negative power supply potential -V DD , and the write voltage V WRITE is set to the positive power supply potential +V DD . When the write voltage V WRITE is set to the positive power supply potential +V DD , the conduction state of the transistor 301 becomes on, and before writing the data, the data voltage V set to the positive power supply potential +V DD by DATA causes the potential V of the node A AAs a result, the transistor 302 is turned on, and the potential V B is set to 0.

[0045] Therefore, the potential of the transparent electrode 260 is equal to the counter voltage V OPP The negative power supply potential -V DD , and the potential of the reflective electrode 230 is set to the potential V B Since the power supply potential is set to 0, which is equal to the drive voltage of the liquid crystal layer 250, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the power supply potential. Therefore, by making the power supply potential greater than the drive voltage of the liquid crystal layer 250, the polarization direction of the liquid crystal element 303 can be reset from time t2 to t3. Here, because data "0" was written in the previous frame, the polarization direction of the liquid crystal element 303 is in the "-" direction, and the polarization direction of the liquid crystal element 303 does not change even when it is reset.

[0046] From time t3 to t4, the counter voltage V OPP is set to 0, and accordingly the potential of the transparent electrode 260 becomes 0. As a result, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes 0, but the polarization direction of the liquid crystal element 303 remains in the "-" direction.

[0047] From time t4 to t5, the write voltage V WRITE is the positive power supply potential +V DD With the data voltage V DATA is set to 0, which corresponds to data “0”. As a result, the data voltage V DATA The potential of node A is V A is set to 0, the transistor 302 is turned off, and the node B is set to a high impedance (Hi-Z) state. This causes the pixel 115 to be set to a data "0" state.

[0048] From time t5 to t6, the write voltage V WRITEis returned to 0, and the conduction state of the transistor 301 becomes off. Even after the conduction state of the transistor 301 becomes off, the potential V of node A A is maintained at 0. Thereafter, from time t6 to t8, each potential elapses without changing.

[0049] At time t8 to t9, the polarization direction of the liquid crystal element 303 is set in accordance with the data set in the pixel 115. Specifically, the counter voltage V OPP is set to the positive power supply potential +V DD . Then, since the counter voltage V OPP is set to the positive power supply potential +V DD , the potential of the transparent electrode 260 becomes the positive power supply potential +V DD . Also, since the conduction state of the transistor 302 is off, the potential V of node B, which is in a high impedance (Hi-Z) state B rises to the positive power supply potential +V DD in the same manner as the potential of the transparent electrode 260 without being affected by the ground electrode.

[0050] Therefore, the potential of the transparent electrode 260 is set to the positive power supply potential +V OPP equal to the counter voltage V DD , and the potential of the reflective electrode 230 rises to the positive power supply potential +V B the same as the potential V of node B DD . For this reason, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes a small value close to 0. For this reason, the voltage between the reflective electrode 230 and the transparent electrode 260 does not reach the driving voltage of the liquid crystal layer 250, and the polarization direction of the liquid crystal element 303 is maintained. That is, in the liquid crystal element 303, the polarization direction remains in the "-" direction corresponding to the data "0".

[0051] FIG. 6 is a diagram showing a second example of the potential transition of each node in the pixel 115. In FIG. 6, in the same manner as in FIG. 5, the data voltage V DATA , the write voltage V WRITE , the counter voltage V OPP , the potential V of node A A , the potential V of node B BThe transition is shown.

[0052] The second example is a case where, for example, at the start of a frame (time t0), data "1" of the previous frame is written to pixel 115 and the polarization direction of liquid crystal element 303 is temporarily in the direction of "+". In this case, when the frame starts at time t0, the potential V of node B equal to the potential of reflection electrode 230 B is 0.

[0053] From time t0 to t1, the opposing voltage V OPP is set to the positive power supply potential +V DD and the potential of transparent electrode 260 becomes the positive power supply potential +V DD . Then, from time t1 to t2, the opposing voltage V OPP is set to 0, and accordingly, the potentials of transparent electrode 260 and reflection electrode 230 become 0.

[0054] From time t2 to t3, the polarization direction of liquid crystal element 303 is reset to the initial state "-" direction. Specifically, the opposing voltage V OPP is set to the negative power supply potential -V DD , and the write voltage V WRITE is set to the positive power supply potential +V DD . By setting the write voltage V WRITE to the positive power supply potential +V DD , the conduction state of transistor 301 becomes on, and before data writing, the potential V DD of node A is set to a high potential by the data voltage V DATA set to the positive power supply potential +V A . As a result, the conduction state of transistor 302 becomes on, and the potential V B of node B is set to 0 by the ground potential from the ground electrode.

[0055] Therefore, the potential of transparent electrode 260 is set to the negative power supply potential -V OPP equal to the opposing voltage V DD , and the potential of reflection electrode 230 is the potential V BSince it is also set to 0, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the magnitude of the power supply potential. Therefore, by making the magnitude of the power supply potential larger than the driving voltage of the liquid crystal layer 250, the polarization direction of the liquid crystal element 303 can be reset from time t2 to t3. Here, since data "1" was written in the previous frame, the polarization direction of the liquid crystal element 303 is in the "+" direction, which is the opposite of the "-" direction, and the polarization direction of the liquid crystal element 303 is inverted by the reset. That is, the polarization direction of the liquid crystal element 303 is reset to the "-" direction corresponding to data "0".

[0056] Thereafter, similar to the first example described above, from time t4 to t5, the conduction state of the transistor 302 becomes off, and the pixel 115 is in a state where data "0" is set. Then, from time t8 to t9, the counter electrode voltage V OPP is set to the positive power supply potential +V DD , so that the potential of the transparent electrode 260 becomes the positive power supply potential +V DD , and the potential of the reflective electrode 230 rises to the positive power supply potential +V DD . As a result, the voltage between the reflective electrode 230 and the transparent electrode 260 does not reach the driving voltage of the liquid crystal layer 250, and the polarization direction of the liquid crystal element 303 is maintained. That is, in the liquid crystal element 303, the polarization direction remains in the "-" direction corresponding to data "0".

[0057] Next, for example, when writing data "1" to the pixel 115, the case where the polarization direction of the liquid crystal element 303 is set to the "+" direction opposite to the "-" direction will be described.

[0058] FIG. 7 is a diagram showing a third example of the potential transition of each node in the pixel 115. In FIG. 7, similar to FIG. 5, the data voltage V DATA , the write voltage V WRITE , the counter electrode voltage V OPP , the potential V A of the node A, and the potential V B of the node B are shown in order from the top.

[0059] The third example is a case where, for example, at the start of a frame (time t0), data "0" of the previous frame is written to pixel 115 and the polarization direction of liquid crystal element 303 is in the "-" direction. In this case, when the frame starts at time t0, the potential V of node B equal to the potential of reflection electrode 230 B is the positive power supply potential +V DD and is thus.

[0060] From time t0 to t1, the counter voltage V OPP continues from the previous frame and is set to the positive power supply potential +V DD , and the potential of transparent electrode 260 becomes the positive power supply potential +V DD . Then, from time t1 to t2, the counter voltage V OPP is set to 0, and accordingly, the potentials of transparent electrode 260 and reflection electrode 230 become 0.

[0061] From time t2 to t3, the polarization direction of liquid crystal element 303 is reset to the initial "-" direction. Specifically, the counter voltage V OPP is set to the negative power supply potential -V DD , and at the same time, the write voltage V WRITE is set to the positive power supply potential +V DD . When the write voltage V WRITE is set to the positive power supply potential +V DD , the conduction state of transistor 301 becomes on, and before data writing, the data voltage V DD set to the positive power supply potential +V DATA sets the potential V of node A A to a high potential. As a result, the conduction state of transistor 302 becomes on, and the potential V of node B B is set to 0 by the ground potential from the ground electrode.

[0062] Therefore, the potential of transparent electrode 260 is set to the negative power supply potential -V OPP equal to the counter voltage V DD , and the potential of reflection electrode 230 is the potential V of node B BSince it is set to 0 which is equal to, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the magnitude of the power supply potential. Therefore, by making the magnitude of the power supply potential larger than the driving voltage of the liquid crystal layer 250, the polarization direction of the liquid crystal element 303 can be reset from time t2 to t3. Here, since data "0" was written in the previous frame, the polarization direction of the liquid crystal element 303 is in the "-" direction, and even if it is reset, the polarization direction of the liquid crystal element 303 does not change.

[0063] From time t3 to t4, the counter voltage V OPP is set to 0, and accordingly, the potential of the transparent electrode 260 becomes 0. As a result, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes 0, but the polarization direction of the liquid crystal element 303 remains in the "-" direction.

[0064] From time t4 to t5, the write voltage V WRITE is set to the positive power supply potential +V DD in a state where the data voltage V DATA is set to the positive power supply potential +V DD corresponding to data "1". As a result, the potential V DATA of node A is set to a high potential by the data voltage V A and the conduction state of the transistor 302 becomes on. Thereby, the pixel 115 is set to a state where data "1" is set.

[0065] From time t5 to t6, the write voltage V WRITE is returned to 0 and the conduction state of the transistor 301 becomes off. Even after the conduction state of the transistor 301 becomes off, the potential V A of node A remains at a high potential. Thereafter, from time t6 to t8, each potential elapses without changing.

[0066] From time t8 to t9, the polarization direction of the liquid crystal element 303 is set in reflection of the data set in the pixel 115. Specifically, the counter voltage V OPP is set to the positive power supply potential +V DD And the counter voltage VOPP is set to the positive power supply potential +V DD By being set to this, the potential of the transparent electrode 260 becomes the positive power supply potential +V DD Also, since the conduction state of the transistor 302 is on, the potential V of node B B is maintained at 0 regardless of the potential of the transparent electrode 260.

[0067] Therefore, the potential of the transparent electrode 260 becomes the positive power supply potential +V equal to the counter voltage V OPP And the potential of the reflective electrode 230 is set to 0, the same as the potential V of node B DD Since it is set to this, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the magnitude of the power supply potential. For this reason, by making the magnitude of the power supply potential larger than the drive voltage of the liquid crystal layer 250, the polarization direction of the liquid crystal element 303 can be reversed. That is, the polarization direction of the liquid crystal element 303 reset in the "-" direction can be reversed to the "+" direction corresponding to the data "1". B is set to, and the potential of the reflective electrode 230 is set to 0, the same as the potential V of node B

[0068] FIG. 8 is a diagram showing a fourth example of the potential transition of each node in the pixel 115. In FIG. 8, similar to FIG. 5, the data voltage V, the write voltage V, the counter voltage V, the potential V of node A, and the potential V of node B are shown in order from the top. DATA the write voltage V WRITE the counter voltage V OPP the potential V of node A A the potential V of node B B are shown.

[0069] The fourth example is, for example, an example where the data "1" of the previous frame is written in the pixel 115 at the start of the frame (time t0), and the polarization direction of the liquid crystal element 303 is in the "+" direction. In this case, when the frame starts at time t0, the potential V of node B equal to the potential of the reflective electrode 230 B is 0.

[0070] From time t0 to t1, the counter voltage V continues from the previous frame OPP is the positive power supply potential +V DDis set to the positive power supply potential +V of the transparent electrode 260 DD becomes. Then, from time t1 to t2, the counter voltage V OPP is set to 0, and accordingly, the potentials of the transparent electrode 260 and the reflective electrode 230 become 0.

[0071] From time t2 to t3, the polarization direction of the liquid crystal element 303 is reset to the initial state "−" direction. Specifically, the counter voltage V OPP is set to the negative power supply potential −V DD , and at the same time, the write voltage V WRITE is set to the positive power supply potential +V DD . By setting the write voltage V WRITE to the positive power supply potential +V DD , the conduction state of the transistor 301 becomes on, and before writing data, the data voltage V DD set to the positive power supply potential +V DATA sets the potential V of node A A to a high potential. As a result, the conduction state of the transistor 302 becomes on, and the potential V of node B B is set to 0 by the ground potential from the ground electrode.

[0072] Therefore, the potential of the transparent electrode 260 is set to the negative power supply potential −V OPP equal to the counter voltage V DD , and the potential of the reflective electrode 230 is set to 0, the same as the potential V of node B B . Therefore, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the magnitude of the power supply potential. For this reason, by making the magnitude of the power supply potential larger than the driving voltage of the liquid crystal layer 250, the polarization direction of the liquid crystal element 303 can be reset from time t2 to t3. Here, since data "1" was written in the previous frame, the polarization direction of the liquid crystal element 303 is in the "+" direction, and the polarization direction of the liquid crystal element 303 is reversed by the reset. That is, the polarization direction of the liquid crystal element 303 is reset to the "−" direction corresponding to data "0".

[0073] Thereafter, similar to the above-described third example, from time t4 to t5, the conduction state of the transistor 302 becomes on, and the pixel 115 is in a state where the data "1" is set. Then, from time t8 to t9, the counter voltage V OPP is set to the positive power supply potential +V DD . As a result, the potential of the transparent electrode 260 becomes the positive power supply potential +V DD , and the potential of the reflective electrode 230 remains at 0. As a result, the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 becomes equal to the magnitude of the power supply potential, and the polarization direction of the liquid crystal element 303 is reversed. That is, in the liquid crystal element 303, the polarization direction is set to the "+" direction corresponding to the data "1".

[0074] Summarizing the potential transitions in the above pixel 115, it becomes as shown in FIG. 9. FIG. 9 shows the data voltage V DATA , write voltage V WRITE , counter voltage V OPP , the potential V A of node A, and the potential V B of node B at each time in FIGS. 5 to 8, and also shows the conduction states of the transistors 301 and 302 and the polarization direction of the liquid crystal element 303.

[0075] As can be seen from FIG. 9, whether writing data "0" or data "1" to the pixel 115, the counter voltage V OPP transitions in the same manner. That is, from time t2 to t3 when the polarization direction of the liquid crystal element 303 is reset, the counter voltage V OPP is set to the negative power supply potential -V DD , and from time t3 to t8 when data "0" or "1" is set in the pixel 115, the counter voltage V OPP is set to 0. Then, after time t8 when the polarization direction of the liquid crystal element 303 is set according to the data, the counter voltage V OPP is set to the positive power supply potential +V DD .

[0076] And from time t2 to t3, the conduction states of both the transistors 301 and 302 become on, and the potential V Bbecomes 0, the polarization direction of the liquid crystal element 303 is reset to the direction that was tentatively set to "-" (indicated by "-" in FIG. 9) regardless of the polarization direction before time t2. This makes it possible to write data to the pixel 115 without being affected by the previous frame, and the input light input to the light modulation unit 110 can be reliably spatially modulated.

[0077] Also, from time t4 to t5, the transistor 301 is turned on, and the data voltage V DATA The potential of node A V A is set to 0 or a high potential (indicated as “H” in FIG. 9). As a result, the conductive state of the transistor 302 after time t4 is determined, and the potential V B is set to be maintained at ground potential or increased according to the potential of the transparent electrode 260. As a result, data "0" or "1" is set in the pixel 115.

[0078] From time t8 to t9, the potential V B becomes a potential according to the data set in the pixel 115, and the magnitude of the voltage between the reflective electrode 230 and the transparent electrode 260 (the potential V B and the counter voltage V OPP The difference between this voltage and the power supply potential) becomes approximately 0 or a value equal to the power supply potential. When the magnitude of this voltage is approximately 0, liquid crystal layer 250 is not driven and the polarization direction of liquid crystal element 303 remains unchanged at "-". On the other hand, when the magnitude of this voltage is a value equal to the power supply potential, liquid crystal layer 250 is driven and the polarization direction of liquid crystal element 303 is reversed from "-" to "+". In this way, when reversing the polarization direction of liquid crystal element 303, a voltage equal to the power supply potential can be applied, so that the polarization direction can be reversed by applying a sufficiently large voltage to liquid crystal layer 250.

[0079] Incidentally, since the optical modulation unit 110 includes a pixel array in which a plurality of pixels 115 are two-dimensionally arranged in the row direction and the column direction, data writing to each pixel 115 is sequentially executed. At this time, it is possible to reset the polarization direction for all the pixels 115 in all rows at the same time, and then write data to the pixels 115 row by row. Hereinafter, a specific example will be given for explanation.

[0080] When the pixel array of the optical modulation unit 110 has pixels 115 of M rows and N columns (M and N are integers of 2 or more) as shown in FIG. 10(a) for example, the write voltage V supplied from the gate driver 120 to the pixel circuits 220 of each row WRITE is respectively the voltage V W#1 ~V W#M and the data voltage V supplied from the source driver 130 to the pixel circuits 220 of each column DATA is respectively the voltage V D#1 ~V D#N A counter voltage V is supplied from the counter voltage generation unit 150 to one transparent electrode 260 facing these pixel circuits 220 and the reflective electrode 230. OPP

[0081] In such a pixel array, as shown in FIG. 10(b), at time T R the polarization directions of all the pixels 115 are reset. That is, the write voltages V of all rows W#1 ~V W#M are set to the positive power supply potential +V DD and at the same time, the counter voltage V OPP is set to the negative power supply potential -V DD so that the polarization directions of all the pixels 115 are reset to the initial state.

[0082] And thereafter, while the counter voltage V OPP is set to 0, data is set in the pixel circuits 220 row by row. That is, at time T1, the write voltage V supplied to the pixel circuits 220 of the first row W#1 becomes the positive power supply potential +V DD and during this time, the data voltages V of each column of the first row are supplied to the pixel circuits 220 D#1 ~V​D#N is supplied. Also, the write voltage V supplied to the pixel circuit 220 in the second row at time T2 W#2 is the positive power supply potential +V DD and during this period, data voltages V to the pixel circuits 220 in each column of the second row D#1 ~V D#N are supplied. Thereafter, the same data setting is executed, and at time T M the write voltage V supplied to the pixel circuit 220 in the M-th row W#M is the positive power supply potential +V DD and during this period, data voltages V to the pixel circuits 220 in each column of the M-th row D#1 ~V D#N are supplied.

[0083] When the data setting for all the pixel circuits 220 in all rows is completed, the counter voltage V OPP is set to the positive power supply potential +V DD Accordingly, the polarization direction of each pixel 115 is maintained or inverted according to the data set in the pixel circuit 220, and the optical modulation of the input light in the entire optical modulation unit 110 is performed.

[0084] In this way, by commonly controlling the counter voltage V supplied to the transparent electrode 260 for a plurality of pixels 115 OPP the polarization directions in the plurality of pixels 115 can be respectively controlled.

[0085] As described above, according to the present embodiment, the pixel of the optical modulation unit includes two transistors that switch the conduction state according to the write voltage and the data voltage, and a liquid crystal element that sandwiches a ferroelectric liquid crystal between a reflective electrode whose potential is controlled by the transistor and a counter electrode whose potential is controlled in three steps. Then, after resetting the polarization direction of the liquid crystal element for each frame, data is written to the pixel to set the polarization direction. Therefore, the liquid crystal element can be driven by a voltage equal to the power supply potential, and while suppressing an increase in the pixel area, a sufficient voltage can be applied to the liquid crystal.

[0086] Note that the transparent electrode 260 may be composed of a single electrode as in the above-described embodiment, or may be composed of a plurality of electrodes divided into a plurality in the row direction. In that case, the counter voltage V supplied from the counter voltage generation unit 150 OPP may also be divided into the same number as the number of divisions and supplied. Further, in order to set the polarization direction according to the data written in the pixel, the counter voltage V OPP is set from 0 to the positive power supply potential +V DD The timing at which this is set may be different timings for each of the divided electrodes. Thereby, the number of pixels driven by each counter voltage generation unit 150 is reduced, and the counter voltage V OPP can be supplied with more margin.

[0087] Note that the pixel 115 according to the above-described embodiment has two transistors 301, 302 and a liquid crystal element 303, but the pixel 115 may have other circuit elements. FIG. 11 is a diagram showing a modification example of the pixel 115. In FIG. 11, the same parts as those in FIG. 4 are denoted by the same reference numerals.

[0088] The pixel 115 shown in FIG. 11 has a configuration in which capacitors 311 and 312 are added to the pixel 115 shown in FIG. 4.

[0089] The capacitor 311 is interposed between the node A and the ground electrode. By providing the capacitor 311, the potential V of the node A A can be more stably maintained at a high potential when the conduction state of the transistor 301 becomes off after the potential is set to a high potential.

[0090] The capacitor 312 is interposed in parallel with the liquid crystal element 303 between the node B and the counter voltage. By providing the capacitor 312, when the conduction state of the transistor 302 becomes off, the parasitic capacitance of the transistor 302 affects the potential V of the node B B can be reduced, and the potential of the reflection electrode 230 can be more stably increased in accordance with the potential of the transparent electrode 260.

[0091] Only one of these capacitors 311 and 312 may be provided in the pixel 115. Also, since the capacitors 311 and 312 are relatively small circuit elements, the increase in pixel area due to providing the capacitors 311 and 312 in the pixel 115 is limited.

[0092] In the above embodiment, the counter voltage V OPP is set to the negative power supply potential -V DD when resetting the pixel 115, and the counter voltage V OPP is set to the positive power supply potential +V DD when setting the polarization direction of the pixel 115. However, the setting of the counter voltage V OPP is not limited to this. That is, for example, the counter voltage V OPP may be set to the positive power supply potential +V DD when resetting, and the counter voltage V OPP may be set to the negative power supply potential -V DD when setting the polarization direction. In this case, by inverting other potentials such as the data voltage V DATA or changing the alignment of the liquid crystal molecule group by the alignment films 241 and 242, the liquid crystal element can be driven by a voltage equal to the power supply potential in the same manner as in the above embodiment.

Explanation of Signs

[0093] 110 Light modulation section 115 Pixel 120 Gate driver 130 Source driver 140 Counter voltage control section 150 Counter voltage generation section 210 Silicon substrate 220 Pixel circuit 230 Reflective electrode 250 Liquid crystal layer 260 Transparent electrode 301, 302 Transistor 303 Liquid crystal element 311, 312 Capacitor

Claims

1. An optical modulation unit in which a plurality of pixels are arranged, a first driver that supplies a first potential to the optical modulation unit, a second driver that supplies a second potential to the optical modulation unit, and a voltage control unit that supplies a third potential controlled in three steps to the optical modulation unit and having, wherein the pixel a first transistor whose conduction state is controlled by the first potential applied to the gate terminal, a second transistor whose conduction state is controlled by the second potential applied to the gate terminal when the conduction state of the first transistor is on, and a liquid crystal element formed by sandwiching a ferroelectric liquid crystal between a first electrode whose potential is set according to the conduction state of the second transistor and a second electrode to which the third potential is supplied and which faces the first electrode A spatial light modulator having.

2. The pixel The spatial light modulator according to claim 1, further comprising a capacitive element connected between the gate terminal of the second transistor and the ground electrode.

3. The pixel The spatial light modulator according to claim 1 or 2, further comprising a capacitive element connected in parallel with the liquid crystal element.

4. The voltage control unit By supplying the third potential in the first stage to the second electrode to reset the polarization direction of the liquid crystal element, and then supplying the third potential in the second stage to the second electrode, the spatial light modulator according to claim 1, wherein data is set in the pixel.

5. The voltage control unit By supplying the third potential in the third stage, the positive and negative of which are inverted with respect to the third potential in the first stage, to the second electrode, the polarization direction of the liquid crystal element is maintained or inverted according to the data set in the pixel. The spatial light modulator according to claim 4.

6. The liquid crystal element The spatial light modulator according to claim 1, formed by sandwiching a ferroelectric liquid crystal between the first electrode provided for each pixel and the second electrode that commonly faces the first electrodes of the plurality of pixels.

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