Laminated type electronic component
The multilayer electronic component addresses shape distortion in HPCCs by using a dielectric layer with smaller crystal grains and lower porosity, along with an intermediate layer, enabling more layers and higher capacitance in miniaturized components.
Patent Information
- Application Number
- JP2024226056
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-28
- Filing Date
- 2024-12-23
- Publication Date
- 2025-07-10
AI Technical Summary
High-profile ceramic capacitors (HPCCs) face chip shape distortion due to stress during crimping and cutting processes, limiting the number of layers and capacitance enhancement.
A multilayer electronic component with a structure featuring a first dielectric layer having smaller crystal grains and lower porosity than a second dielectric layer, and an intermediate layer between capacitance forming portions, to disperse stress and suppress shape distortion.
The solution effectively suppresses shape distortion, allows for a higher number of layers, and maintains high capacitance, particularly in miniaturized components like 0603 chips.
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Figure 2025105529000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a multilayer electronic component.
Background Art
[0002] A multilayer ceramic capacitor (MLCC), which is one type of multilayer electronic component, is a chip-shaped capacitor that is mounted on printed circuit boards of various electronic products such as video equipment like liquid crystal display devices (LCDs) and plasma display panel devices (PDPs), computers, smartphones, and mobile phones, and serves to charge or discharge electricity.
[0003] Such a multilayer ceramic capacitor can be used as a component of various electronic devices due to its advantages of being small in size while ensuring high capacitance and being easy to mount. As various electronic devices such as computers and mobile devices are being miniaturized and have higher output, the requirements for miniaturization and higher capacitance of multilayer ceramic capacitors are increasing.
[0004] Generally, an MLCC has a structure where the width and thickness are the same. To achieve high capacitance, it is necessary to increase the number of layers by thinning the dielectric layer and the internal electrodes. However, with the structure where the width and thickness of the chip are the same due to technical limitations, it is not easy to realize a high number of layers. Therefore, a HPCC (High-Profile Ceramic Capacitor) product has been developed to increase the thickness of the chip to realize a high number of layers.
[0005] An HPCC has a structure where the thickness T is thicker than the width W, and can increase the number of layers compared to a general MLCC having the same structure of width and thickness, and can easily achieve high capacitance.
[0006] However, since the HPCC has a structure with a thickness T that is thick relative to the width W, there is a problem in that chip shape distortion is likely to occur due to the stress generated during the crimping and cutting processes.
Summary of the Invention
Problems to be Solved by the Invention
[0007] One of the various objects of the present invention is to provide a stacked electronic component with excellent reliability.
[0008] One of the various objects of the present invention is to prevent defects in which the shape of the main body is distorted.
[0009] One of the various objects of the present invention is to provide a stacked electronic component that is small in size and excellent in capacitance.
[0010] However, the object of the present invention is not limited to the above-described content, and can be more easily understood in the process of describing specific embodiments of the present invention.
Means for Solving the Problems
[0011] A stacked electronic component according to an embodiment of the present invention includes a plurality of capacitance forming portions including a first dielectric layer and an internal electrode alternately arranged in a first direction, and an intermediate layer including a second dielectric layer disposed between adjacent capacitance forming portions, and includes a first and a second surface facing each other in the first direction, a third and a fourth surface facing each other in a second direction and connected to the first and second surfaces, a fifth and a sixth surface facing each other in a third direction and connected to the first to fourth surfaces, a main body, and an external electrode disposed on the main body and connected to the internal electrode, the first and second dielectric layers include a plurality of crystal grains and pores, an average size of the crystal grains of the first dielectric layer is smaller than an average size of the crystal grains of the second dielectric layer, and a porosity of the first dielectric layer can be lower than a porosity of the second dielectric layer.
Effects of the Invention
[0012] As one of the various effects of the present invention, it is possible to provide a stacked electronic component with excellent reliability.
[0013] As one of the various effects of the present invention, it is possible to provide a stacked electronic component in which defects in the distortion of the body shape are suppressed.
[0014] As one of the various effects of the present invention, it is possible to provide a stacked electronic component that is small in size and excellent in capacitance.
Brief Description of the Drawings
[0015]
Figure 1
Figure 2
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Mode for Carrying Out the Invention
[0016] Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to an ordinary technician. Therefore, the shape and size of elements in the drawings may be enlarged, reduced (or emphasized or simplified) for clearer explanation, and elements denoted by the same reference numerals in the drawings are the same elements.
[0017] In addition, for the purpose of clearly explaining the present invention in the drawings, parts not related to the explanation are omitted, and the sizes and thicknesses of the illustrated components are arbitrarily shown for convenience of explanation. Therefore, the present invention is not necessarily limited by the illustration. Also, components with the same functions within the scope of the same concept are described using the same reference numerals. Furthermore, throughout the specification, when a part "includes" a certain component, it means that other components can be further included, rather than excluding other components, unless otherwise stated to the contrary.
[0018] In the drawings, the first direction can be defined as the thickness T direction or the stacking direction, the second direction as the length L direction, and the third direction as the width W direction.
[0019] FIG. 1 schematically shows a perspective view of a stacked electronic component according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along the line I-I' of FIG. 1, FIG. 3 is a cross-sectional view taken along the line II-II' of FIG. 2, FIG. 4 is an exploded perspective view schematically showing the decomposition of the body of the stacked electronic component, FIG. 5 is an enlarged view of the K1 region of FIG. 3, and FIG. 6 is an enlarged view of the K2 region of FIG. 3.
[0020] Referring to FIGS. 1 to 6, a multilayer electronic component 100 according to an embodiment of the present invention includes a plurality of capacitor forming portions Ac1, Ac2 including first dielectric layers 111 and internal electrodes 121, 122 alternately arranged in a first direction, and an intermediate layer 140 disposed between adjacent capacitor forming portions Ac1, Ac2 and including a second dielectric layer 112. The multilayer electronic component 100 includes a main body 110 including first and second surfaces 1, 2 facing each other in the first direction, third and fourth surfaces 3, 4 facing each other in a second direction and connected to the first and second surfaces, and fifth and sixth surfaces 5, 6 facing each other in a third direction and connected to the first to fourth surfaces, external electrodes 131, 132 disposed on the main body and connected to the internal electrodes. The first and second dielectric layers include a plurality of crystal grains G1, G2 and pores P1, P2, the average size of the crystal grains of the first dielectric layer is smaller than the average size of the crystal grains of the second dielectric layer, and the porosity of the first dielectric layer can be lower than the porosity of the second dielectric layer.
[0021] As described above, a HPCC (High-Profile Ceramic Capacitor) product that increases the thickness of a multilayer electronic component to achieve a high number of layers has a structure in which the thickness T is thicker than the width W, and the number of layers can be increased compared to a general MLCC having the same width and thickness structure, and a high capacitance can be easily achieved.
[0022] However, since the HPCC has a structure in which the thickness T is thicker than the width W, there is a problem that chip shape distortion is likely to occur due to stress generated during the crimping and cutting processes. As a result, there is a limit in increasing the number of layers beyond a certain level.
[0023] On the other hand, a multilayer electronic component 100 according to an embodiment of the present invention includes an intermediate layer 140 disposed between adjacent capacitor forming portions Ac1, Ac2 and including a second dielectric layer 112. Since the average size of the crystal grains of the first dielectric layer included in the capacitor forming portions Ac1, Ac2 is smaller than the average size of the crystal grains of the second dielectric layer 112, and the porosity of the first dielectric layer 111 is lower than the porosity of the second dielectric layer 112, it is possible to suppress a defect in which the shape of the main body is distorted, and the number of layers can be further increased.
[0024] Hereinafter, each component included in the multilayer electronic component 100 according to an embodiment of the present invention will be described in more detail.
[0025] There is no particular limitation on the specific shape of the main body 110. As shown in the figure, the main body 110 can be formed in a hexahedron shape or a shape similar thereto. Due to the shrinkage of the ceramic powder contained in the main body 110 and the polishing of the edge portions during the firing process, the main body 110 does not have a perfect hexahedron shape with straight lines, but can substantially have a hexahedron shape.
[0026] The main body 110 can have a first surface 1 and a second surface 2 facing each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first and second surfaces and facing each other in a second direction, and a fifth surface 5 and a sixth surface 6 connected to the first to fourth surfaces and facing each other in a third direction.
[0027] The main body 110 can include a plurality of capacitance forming portions Ac1, Ac2 in which capacitances are formed by including first dielectric layers 111 and internal electrodes 121, 122 alternately arranged in the first direction. Adjacent capacitance forming portions Ac1, Ac2 can be arranged in the first direction with, for example, an intermediate layer 140 interposed therebetween.
[0028] The plurality of first dielectric layers 111 forming the capacitance forming portions Ac1, Ac2 are in a fired state, and the boundaries between adjacent first dielectric layers 111 can be integrated to such an extent that they are difficult to confirm without using a scanning electron microscope (SEM).
[0029] The first dielectric layer 111 can be formed by manufacturing a ceramic slurry containing ceramic powder, an organic solvent, an additive, and a binder, applying and drying the slurry on a carrier film to provide a ceramic green sheet, and then firing the ceramic green sheet. The ceramic powder is not particularly limited as long as sufficient capacitance can be obtained. For example, barium titanate (BaTiO3)-based powder can be used. More specifically, the ceramic powder can be one or more of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1).
[0030] The average thickness td of the first dielectric layer 111 does not need to be particularly limited. For example, the average thickness td of the first dielectric layer 111 can be 0.1 to 10 μm. Also, for miniaturization and high capacitance of the multilayer electronic component, the average thickness td of the first dielectric layer 111 can be 0.1 to 0.6 μm.
[0031] Here, the average thickness td of the first dielectric layer 111 can mean the average thickness of the first dielectric layer 111 disposed between the internal electrodes 121 and 122. The average thickness td of the first dielectric layer 111 can be measured by scanning cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at a magnification of 10,000 times. More specifically, the thickness can be measured at a number of points on one first dielectric layer 111, for example, 30 points at equal intervals in the second direction, and the average value can be measured. The 30 points at the above equal intervals can be specified by the capacitance forming portions Ac1 and Ac2. Further, when such average value measurement is extended to 10 first dielectric layers 111 to measure the average value, the average thickness of the first dielectric layer 111 can be further generalized.
[0032] The internal electrodes 121 and 122 can be alternately arranged with the first dielectric layer 111. For example, a first internal electrode 121 and a second internal electrode 122, which are a pair of electrodes having different polarities from each other, can be arranged so as to face each other with the first dielectric layer 111 interposed therebetween. The plurality of first internal electrodes 121 and the plurality of second internal electrodes 122 can be electrically separated from each other by the first dielectric layer 111 disposed therebetween.
[0033] The internal electrodes 121 and 122 can be arranged at a distance from the fifth and sixth surfaces 5 and 6 of the main body 110 and can be arranged so as to be connected to the third or fourth surfaces 3 and 4. For example, the plurality of first internal electrodes 121 can be arranged so as to be separated from the fourth to sixth surfaces 4, 5, and 6 and connected to the third surface 3, respectively. Further, the plurality of second internal electrodes 122 can be arranged so as to be separated from the third surface, the fifth surface, and the sixth surface 3, 5, and 6 and connected to the fourth surface 4, respectively.
[0034] The conductive metal contained in the internal electrodes 121 and 122 can be one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof, but the present invention is not limited thereto.
[0035] The internal electrodes 121 and 122 can be formed by applying a conductive paste for internal electrodes containing a conductive metal with a predetermined thickness on a ceramic green sheet and firing it. Also, the capacitance forming portions Ac1 and Ac2 can be formed by laminating and firing the ceramic green sheets coated with the above-mentioned conductive paste for internal electrodes. As the printing method of the conductive paste for internal electrodes, a screen printing method, a gravure printing method, or the like can be used, but the present invention is not limited thereto.
[0036] The average thickness of the internal electrodes 121 and 122 does not particularly need to be limited. Here, the thickness of the internal electrodes 121 and 122 can mean the size in the first direction of the internal electrodes 121 and 122. For example, the average thickness of the internal electrodes 121 and 122 can be 0.1 to 5 μm. Also, for miniaturization and high capacitance of the multilayer electronic component, the average thickness of the internal electrodes 121 and 122 can be 0.1 to 0.8 μm.
[0037] Here, the average thickness of the internal electrodes 121 and 122 can be measured by scanning the cross-sections in the first and second directions of the main body 110 with a scanning electron microscope (SEM) at a magnification of 10,000 times. More specifically, the thickness can be measured at a number of points of one internal electrode 121 or 122, for example, 30 points at equal intervals in the second direction, and the average value can be measured. The 30 points at the above equal intervals can be specified by the capacitance forming portions Ac1 and Ac2. Also, when such average value measurement is extended to 10 internal electrodes 121 and 122 to measure the average value, the average thickness of the internal electrodes 121 and 122 can be further generalized.
[0038] The main body 110 may include cover portions 113 and 114 disposed on the internal electrodes 121 and 122 that are disposed on the outermost side with respect to the first direction. For example, the cover portions 113 and 114 may include a first cover portion 113 disposed on the internal electrodes 121 and 122 disposed at the uppermost part with respect to the first direction and a second cover portion 114 disposed on the internal electrodes 121 and 122 disposed at the lowermost part, and the cover portions 113 and 114 can basically serve to prevent damage to the internal electrodes due to physical or chemical stress. The cover portions 113 and 114 can have the same configuration as the first dielectric layer 111 except that they do not include internal electrodes.
[0039] The average thickness tc of the cover portions 113 and 114 does not particularly need to be limited. However, for miniaturization and high capacitance of the multilayer electronic component 100, the average thickness tc of the cover portions 113 and 114 can be 20 μm or less. Here, the average thickness tc of the cover portions 113 and 114 means the respective average thicknesses of the first cover portion 113 and the second cover portion 114.
[0040] The average thickness tc of the cover portions 113 and 114 can mean the average size in the first direction of the cover portions 113 and 114, and can be a value obtained by averaging the sizes in the first direction measured at five equally spaced points in the cross-sections in the first direction and the second direction of the main body 110.
[0041] The capacitance forming portions Ac1 and Ac2 may include margin portions 115 and 116 disposed on both end faces in the third direction of the first dielectric layer 111 and the internal electrodes 121 and 122. That is, the margin portions 115 and 116 can mean the regions between both ends of the internal electrodes 121 and 122 and the boundary surface of the main body 110 in the cross-section obtained by cutting the main body 110 in the first direction and the third direction. At this time, the margin portions 115 and 116 may include a first margin portion 115 connected to the fifth surface 5 of the main body 110 and a second margin portion 116 connected to the sixth surface 6 of the main body 110.
[0042] The margin portions 115 and 116 can include the same material as the first dielectric layer 111 of the capacitance forming portions Ac1 and Ac2, except that they do not include the internal electrodes 121 and 122.
[0043] The margin portions 115 and 116 can basically serve to prevent damage to the internal electrodes 121 and 122 due to physical or chemical stress.
[0044] The margin portions 115 and 116 can be formed by applying and firing a conductive paste for internal electrodes, except where the margin portions are formed on the ceramic green sheet.
[0045] The average thickness of the margin portions 115 and 116 does not need to be particularly limited. However, for the miniaturization and high capacitance of the multilayer electronic component 100, the average thickness of the margin portions 115 and 116 can be 20 μm or less. Here, the average thickness of the margin portions 115 and 116 means the respective average thicknesses of the first margin portion 115 and the second margin portion 116.
[0046] The average thickness of the margin portions 115 and 116 can mean the average size in the third direction of the margin portions 115 and 116, and can be a value obtained by averaging the sizes in the third direction measured at five equally spaced points in the cross-section in the first direction and the third direction of the main body 110.
[0047] The external electrodes 131 and 132 are disposed on the third surface and the fourth surface 3 and 4 of the main body 110 and can extend to a part of each of the first surface, the second surface, the fifth surface, and the sixth surface 1, 2, 5, and 6. The external electrodes 131 and 132 can include a first external electrode 131 and a second external electrode 132 respectively connected to the plurality of first internal electrodes 121 and the plurality of second internal electrodes 122.
[0048] The external electrodes 131 and 132 can be formed using any material as long as it has electrical conductivity, such as metal. Specific materials can be determined considering electrical characteristics, structural stability, etc., and they can further have a multilayer structure. For example, the external electrodes 131 and 132 can contain a conductive metal, and the conductive metal contained in the external electrodes 131 and 132 can include copper (Cu), nickel (Ni), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), lead (Pb), and / or alloys containing these, etc.
[0049] The external electrodes 131 and 132 are disposed on the third and fourth surfaces 3 and 4 of the main body 110 and can include first electrode layers 131a and 132a connected to the internal electrodes 121 and 122 and second electrode layers 132a and 132b disposed on the first electrode layers 131a and 132a.
[0050] The first electrode layers 131a and 132a can be formed by dipping the third and fourth surfaces 3 and 4 of the main body 110 into a conductive paste for external electrodes containing a conductive metal and glass and then firing. Or, it can also be formed by a method of transferring a sheet containing a conductive metal and glass. Thus, the first electrode layers 131a and 132a can be fired electrodes containing a conductive metal and glass.
[0051] Also, the first electrode layers 131a and 131b can be resin-based electrodes containing, for example, a conductive metal and a resin. The first electrode layers 131a and 131b can be formed by a method of applying and curing a paste containing a conductive metal and a resin.
[0052] The conductive metal contained in the first electrode layers 131a and 132a can include copper (Cu), nickel (Ni), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), lead (Pb), and / or alloys containing these, etc., but the present invention is not limited thereto.
[0053] The second electrode layers 131b and 132 can improve the mounting characteristics. The types of the second electrode layers 131b and 132 are not particularly limited, and can be plating layers including nickel (Ni), tin (Sn), palladium (Pd), and / or alloys containing the same, and can also be formed of a plurality of layers. The second electrode layers 131b and 132 can be, for example, a nickel (Ni) plating layer or a tin (Sn) plating layer, and can also be in a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially formed. Further, the second electrode layers 131b and 132 can also include a plurality of nickel (Ni) plating layers and / or a plurality of tin (Sn) plating layers.
[0054] In the drawings, the structure in which the multilayer electronic component 100 has two external electrodes 131 and 132 is described, but the present invention is not limited thereto, and the number and shape of the external electrodes 131 and 132 can vary according to the form of the internal electrodes 121 and 122 and other purposes.
[0055] The multilayer electronic component 100 according to an embodiment of the present invention includes an intermediate layer 140 disposed between adjacent capacitance forming portions Ac1 and Ac2 and including a second dielectric layer 112. The average grain size of the crystal grains of the first dielectric layer included in the capacitance forming portions Ac1 and Ac2 is smaller than the average grain size of the crystal grains of the second dielectric layer 112, and the porosity of the first dielectric layer 111 can be lower than the porosity of the second dielectric layer 112.
[0056] The intermediate layer 140 can serve to disperse the stress generated in the pressing and cutting steps of the laminate and suppress the distortion of the shape of the main body. Since the intermediate layer 140 may have a lower capacitance contribution degree than the first dielectric layer 111, the capacitance may be smaller than that of the multilayer electronic component having the same thickness and no intermediate layer 140. However, since the main body 110 includes the intermediate layer 140, the distortion of the shape of the main body can be suppressed, so that the number of laminations can be increased and the thickness of the main body can be made thicker, so that a higher capacitance can be more easily ensured.
[0057] Referring to FIG. 5 showing the microstructure of the first dielectric layer 111 and FIG. 6 showing the microstructure of the second dielectric layer 112, the first dielectric layer 111 can include a plurality of first crystal grains G1 and first pores P1, and the second dielectric layer 112 can include a plurality of second crystal grains G2 and second pores P2. Since the average size of the first crystal grains G1 of the first dielectric layer 111 is smaller than the average size of the second crystal grains G2 of the second dielectric layer 112, and the porosity of the first dielectric layer 111 is lower than the porosity of the second dielectric layer 112, the intermediate layer 140 can play a role in dispersing the stress generated in the pressing and cutting processes of the laminate.
[0058] When the average size of the crystal grains of the first dielectric layer 111 is Gs1 and the average size of the crystal grains of the second dielectric layer 112 is Gs2, Gs2 / Gs1 does not need to be particularly limited. However, when 1.05 < Gs2 / Gs1 < 1.50 is satisfied, the stress dispersion effect of the intermediate layer 140 can be further improved, so that the distortion phenomenon of the main body can be more suppressed, and the number of laminations can be increased while minimizing the capacitance reduction due to the intermediate layer 140. Therefore, it can be more advantageous for ensuring a high capacitance.
[0059] When the porosity of the first dielectric layer 111 is Ps1 and the porosity of the second dielectric layer 112 is Ps2, Ps2 / Ps1 does not need to be particularly limited. However, when 1.05 < Ps2 / Ps1 < 1.40 is satisfied, the stress dispersion effect of the intermediate layer 140 can be further improved, so that the distortion phenomenon of the main body can be more suppressed, and the number of laminations can be increased while minimizing the capacitance reduction due to the intermediate layer 140. Therefore, it can be more advantageous for ensuring a high capacitance.
[0060] The average grain size and porosity can be measured by analyzing an image scanned at 50k magnification using a ZEISS SEM on a cross-section cut in the first and second directions at the center in the third direction of the main body. The pellet diameter (Feret diameter) of the crystal grains can be measured using Zootos, which is particle size measurement software, for the scanned image, and the average size of each crystal grain G1, G2 can be calculated. In addition, since the dielectric crystal grains G1, G2 and the pores P1, P2 have distinct brightness differences, the area ratio occupied by the pore P1 in the first dielectric layer 111 and the area ratio occupied by the pore P2 in the second dielectric layer 112 can be measured from the SEM scan image using an image analysis program, and each porosity can be calculated.
[0061] The second dielectric layer 112 can be formed by manufacturing a ceramic slurry containing ceramic powder, an organic solvent, and a binder, applying and drying the slurry on a carrier film to provide a ceramic green sheet, and then firing the ceramic green sheet. The ceramic powder is not particularly limited as long as sufficient capacitance can be obtained. For example, a barium titanate (BaTiO3)-based powder can be used as the ceramic powder. To give a more specific example, the ceramic powder can be BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y)One or more of O3 (0 < y < 1) can be. On the other hand, the method for controlling the average grain size and porosity of the crystal grains of the first and second dielectric layers 111 and 112 is not particularly limited. For example, the porosity can be controlled by making the binder content contained in the ceramic green sheet for forming the second dielectric layer 112 higher than the binder content contained in the ceramic green sheet for forming the first dielectric layer 111. Also, the average grain size of the crystal grains can be controlled by making the size of the dielectric powder contained in the ceramic green sheet for forming the second dielectric layer 112 larger than the size of the dielectric powder contained in the ceramic green sheet for forming the first dielectric layer 111. However, it is not limited thereto, and the average grain size and porosity of the crystal grains of the first and second dielectric layers can also be controlled by varying the content of additives, the type of ceramic powder, etc.
[0062] The intermediate layer 140 can be formed by laminating one or more layers of the second dielectric layer 112. The intermediate layer 140 can be formed by laminating one or more ceramic green sheets for forming the second dielectric layer and firing them.
[0063] More specifically, one or more ceramic green sheets for forming the first dielectric layer can be laminated to laminate the second cover portion 114, and a plurality of ceramic green sheets for forming the first dielectric layer coated with the conductive paste for the internal electrode can be laminated to laminate the second capacitance forming portion Ac2. After that, one or more ceramic green sheets for forming the second dielectric layer can be laminated to laminate the intermediate layer 140. After this, a plurality of ceramic green sheets for forming the first dielectric layer coated with the conductive paste for the internal electrode can be laminated to laminate the first capacitance forming portion Ac1, and one or more ceramic green sheets for forming the first dielectric layer can be laminated to laminate the first cover portion 113 to provide a laminate.
[0064] In one embodiment, when the average thickness of the main body in the first direction is T and the average thickness of the intermediate layer in the first direction is t1, 0.0002 < t1 / T ≤ 0.06 can be satisfied. Thereby, the stress dispersion effect of the intermediate layer 140 can be further improved, so that the distortion phenomenon of the main body can be further suppressed, and the number of stacked layers can be increased while minimizing the capacitance reduction due to the intermediate layer 140, which can be advantageous for ensuring a high capacitance.
[0065] In one embodiment, the external electrodes 131 and 132 may include a first external electrode and a second external electrode respectively disposed on the third and fourth surfaces, and the internal electrodes 121 and 122 may include a first internal electrode 121 connected to the first external electrode 131 on the third surface and a second internal electrode 122 connected to the second external electrode 132 on the fourth surface.
[0066] In one embodiment, when the average thickness of the main body 110 in the first direction is T and the distance from the point where the extension line E6 of the sixth surface contacts the extension line E1 of the first surface to the point where the extension line E6 of the sixth surface contacts the extension line E2 of the second surface is Tr, 0.996 ≤ T / Tr ≤ 1 can be satisfied. If T / Tr is less than 0.996, it may be difficult to increase the number of stacked layers. On the other hand, although it is ideal for T / Tr to be 1, considering errors in the manufacturing process and the like, 0.996 ≤ T / Tr < 1 can be satisfied.
[0067] Referring to FIG. 7, which is a cross-sectional view for explaining the distortion of the main body, the thickness of the main body 110 in the first direction can be the length of a straight line perpendicular from the extension line E1 of the first surface to the extension line E2 of the second surface, and Tr can be the length of a straight line connecting the point where the extension line E6 of the sixth surface contacts the extension line E1 of the first surface to the point where the extension line E6 of the sixth surface contacts the extension line E2 of the second surface.
[0068] In one embodiment, when the average thickness of the main body in the first direction is T, the average length of the main body in the second direction is L, and the average width in the third direction is W, L > T > W can be satisfied. Thereby, the capacitance of the multilayer electronic component can be easily improved.
[0069] The size of the multilayer electronic component does not particularly need to be limited. However, generally, the smaller the size of the multilayer electronic component, the higher the probability of occurrence of the distortion phenomenon of the main body. When an intermediate layer is disposed between the capacitance forming portions according to the present invention, even when the multilayer electronic component is small, the distortion phenomenon of the main body can be effectively suppressed, and particularly, the effect of suppressing the distortion phenomenon of the main body according to the present invention becomes remarkable in chips of 0603 size or less. Therefore, in one embodiment, when the average thickness of the main body in the first direction is T, the average length of the main body in the second direction is L, and the average width in the third direction is W, T>W, T≦0.55 mm, L≦0.66 mm, and W≦0.33 mm can be satisfied.
[0070] T and W can be measured in the cross sections in the first and third directions cut at the central portion of the main body in the second direction, and the value obtained by averaging the sizes of the main body in the first direction measured at five points having equal intervals in the third direction is T, and the value obtained by averaging the sizes of the main body in the third direction measured at five points having equal intervals in the first direction can be W. L can be measured in the cross sections in the first and second directions cut at the central portion of the main body in the third direction, and the value obtained by averaging the sizes of the main body in the second direction measured at five points having equal intervals in the first direction can be L.
[0071] In one embodiment, when the average thickness of the main body in the first direction is T and the average width in the third direction is W, 1.1<T / W<1.8 can be satisfied. When T / W is 1.1 or less, it may be difficult to ensure a high capacitance, and when T / W is 1.8 or more, since the thickness is too thick with respect to the width of the main body, it may be difficult to mount the multilayer electronic component on the substrate in some cases.
[0072] In one embodiment, the main body 110 includes cover portions 114 and 115 disposed on the innermost internal electrodes with respect to the first direction. When the average thickness of the intermediate layer 140 is t1, the average thickness of the cover portions 114 and 115 is tc, and the average thickness of the first dielectric layer 111 is td, td<tc<t1 can be satisfied.
[0073] Also, in one embodiment, when the average thickness of the intermediate layer 140 is t1 and the average thickness of the first dielectric layer 111 is td, 7 ≦ t1 / td can be satisfied. The upper limit of t1 / td does not particularly need to be limited, but for example, it can be 100 or less. Thereby, since the stress dispersion effect of the intermediate layer 140 can be further improved, the distortion phenomenon of the main body can be further suppressed, and the number of stacked layers can be increased while minimizing the capacitance reduction due to the intermediate layer 140, which can be advantageous for ensuring a high capacitance.
[0074] The average thickness t1 of the intermediate layer 140 can mean the average size of the intermediate layer 140 in the first direction. The thickness of the intermediate layer 140 can mean the distance in the first direction between the two internal electrodes 121 and 122 that are most adjacent to the intermediate layer 140. Further, the average thickness t1 of the intermediate layer 140 can be a value obtained by averaging the sizes in the first direction measured at five equally spaced points in the cross sections in the first direction and the second direction of the main body 110 measured by a scanning electron microscope (SEM). On the other hand, when a plurality of intermediate layers 140 are arranged, it can mean the average thickness of each of the plurality of intermediate layers 140.
[0075] FIG. 8 is a drawing corresponding to FIG. 2 of a stacked electronic component according to another embodiment of the present invention.
[0076] Referring to FIG. 8, the main body 210 of the stacked electronic component 200 according to another embodiment of the present invention can include three capacitance forming portions Ac1, Ac2, Ac3 and two intermediate layers 140' arranged between the adjacent capacitance forming portions Ac1, Ac2, Ac3.
[0077] In one embodiment, the plurality of capacitance forming portions Ac1, Ac2, Ac3 can be three or more, and the intermediate layers 140' can be two or more. The upper limit of the number of the intermediate layers 140' is not particularly limited, but for example, it can be 10 or less.
[0078] In one embodiment, the plurality of capacitance forming portions Ac1, Ac2, Ac3 can be arranged in the first direction.
[0079] In the case of the multilayer electronic component 200 according to an embodiment of the present invention, by arranging a plurality of intermediate layers 140', the stress dispersion effect by the intermediate layer 140' can be further improved, so that the distortion of the main body can be further suppressed.
[0080] The present invention is not limited by the above-described embodiments and the accompanying drawings, but is limited by the appended claims. Therefore, within the scope not departing from the technical idea of the present invention described in the claims, various forms of substitution, modification, and change are possible by those having ordinary knowledge in the technical field, and this can also be said to belong to the scope of the present invention.
[0081] Also, the expression "one embodiment" does not mean the same embodiment, but is provided to emphasize and explain each different unique feature. However, the above-described one embodiment does not exclude being implemented in combination with the features of other embodiments. For example, even if the matter described in a specific one embodiment is not described in other embodiments, it can be understood as an explanation related to other embodiments as long as there is no explanation contrary to or conflicting with that matter in other embodiments.
Explanation of Reference Numerals
[0082] 100 Multilayer electronic component 110 Main body 111 First dielectric layer 112 Second dielectric layer 140 Intermediate layer 113, 114 Cover portion 115, 116 Margin portion 121, 122, 421, 422 Internal electrodes 131, 132 External electrodes 131a, 132a First electrode layer 131b, 132b Second electrode layer G1, G2 Crystal grains P1, P2 Pores
Claims
1. A plurality of capacitor forming portions including first dielectric layers and internal electrodes alternately arranged in a first direction, and an intermediate layer including a second dielectric layer and disposed between adjacent capacitor forming portions, A main body including first and second surfaces facing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and facing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing each other in a third direction, An external electrode disposed on the main body and connected to the internal electrode, The first and second dielectric layers include a plurality of crystal grains and pores, A multilayer electronic component in which an average size of crystal grains of the first dielectric layer is smaller than an average size of crystal grains of the second dielectric layer, and a porosity of the first dielectric layer is lower than a porosity of the second dielectric layer.
2. The multilayer electronic component according to claim 1, wherein when an average size of crystal grains of the first dielectric layer is Gs1 and an average size of crystal grains of the second dielectric layer is Gs2, 1.05 < Gs2 / Gs1 < 1.50 is satisfied.
3. The multilayer electronic component according to claim 1, wherein when a porosity of the first dielectric layer is Ps1 and a porosity of the second dielectric layer is Ps2, 1.05 < Ps2 / Ps1 < 1.40 is satisfied.
4. The multilayer electronic component according to claim 1, wherein when an average thickness of the main body in the first direction is T and an average thickness of the intermediate layer in the first direction is t1, 0.0002 < t1 / T ≤ 0.06 is satisfied.
5. The external electrode includes first and second external electrodes respectively disposed on the third and fourth surfaces, The multilayer electronic component according to claim 1, wherein the internal electrode includes a first internal electrode connected to the first external electrode on the third surface and a second internal electrode connected to the second external electrode on the fourth surface.
6. An average thickness of the main body in the first direction is T, When a distance from a point where an extension line of the fifth surface contacts an extension line of the first surface to a point where the extension line of the fifth surface contacts an extension line of the second surface is Tr, The multilayer electronic component according to claim 5, wherein 0.996 ≤ T / Tr ≤ 1 is satisfied.
7. The multilayer electronic component according to claim 6, wherein T and Tr satisfy 0.996 ≤ T / Tr < 1.
8. When an average thickness of the main body in the first direction is T, an average length of the main body in the second direction is L, and an average width in the third direction is W, The multilayer electronic component according to claim 5, wherein L > T > W is satisfied.
9. When the average thickness of the main body in the first direction is T, the average length of the main body in the second direction is L, and the average width in the third direction is W, the multilayer electronic component according to claim 5, which satisfies T>W, T≤0.55 mm, L≤0.66 mm, and W≤0.33 mm.
10. When the average thickness of the main body in the first direction is T and the average width in the third direction is W, The multilayer electronic component according to claim 5, which satisfies 1.1<T / W<1.
8.
11. The main body includes a cover portion disposed on an internal electrode disposed on the outermost side with respect to the first direction, When the average thickness of the intermediate layer is t1, the average thickness of the cover portion is tc, and the average thickness of the first dielectric layer is td, the multilayer electronic component according to claim 1, which satisfies td<tc<t1.
12. When the average thickness of the intermediate layer is t1 and the average thickness of the first dielectric layer is td, the multilayer electronic component according to claim 1, which satisfies 7≤t1 / td.
13. The plurality of capacitance forming portions are three or more, The multilayer electronic component according to claim 1, wherein the intermediate layer is two or more.
14. The multilayer electronic component according to claim 13, wherein the plurality of capacitance forming portions are arranged in the first direction.