Multilayer ceramic electronic component and method for manufacturing the same

Abstract

To provide a multilayer ceramic electronic component which can improve the reliability, and a method for manufacturing the multilayer ceramic electronic component.SOLUTION: The multilayer ceramic electronic component includes a laminate body in a substantially rectangular parallelepiped shape, in which a plurality of first dielectric layers, a plurality of second dielectric layers, and a plurality of inner electrode layers are laminated. The first and second dielectric layers have different average thicknesses and are alternately laminated with the inner electrode layer in between.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same.

Background Art

[0002] In response to the demand for higher capacitance in multilayer ceramic electronic components such as multilayer ceramic capacitors, the thickness of the dielectric layer between the internal electrodes in the ceramic body has been reduced so that the number of layers increases (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when forming a thin dielectric layer, for example, it is not only difficult to peel the green sheet from a PET (Polyethylene Terephthalate) film of a base material without damage, but also when firing, a plurality of dielectric layers rapidly contract, so that the difference in the amount of shrinkage between the margin region of the dielectric adjacent to the laminated region of the dielectric layer and the internal electrodes increases, and cracks are likely to occur in the ceramic body. For this reason, the reliability of the multilayer ceramic capacitor may decrease.

[0005] Therefore, the present invention has been made in view of the above problems, and an object thereof is to provide a multilayer ceramic electronic component capable of improving reliability and a method for manufacturing the same.

Means for Solving the Problems

[0006] The multilayer ceramic electronic component of the present invention has a substantially rectangular parallelepiped-shaped laminate in which a plurality of first dielectric layers, a plurality of second dielectric layers, and a plurality of internal electrode layers are laminated, and the first dielectric layer and the second dielectric layer have different average thicknesses and are alternately laminated via the internal electrode layer.

[0007] In the above multilayer ceramic electronic component, the average thickness of the first dielectric layer may be 1.05 to 2.0 times the average thickness of the second dielectric layer.

[0008] In the above multilayer ceramic electronic component, the average thickness of the first dielectric layer is 0.4 to 0.8 μm, and the average thickness of the second dielectric layer may be 0.3 to 0.7 μm.

[0009] In the above multilayer ceramic electronic component, among the first dielectric layer and the second dielectric layer, the average particle diameter of the ceramic particles contained in the dielectric layer with the larger average thickness may be larger than the average particle diameter of the ceramic particles contained in the dielectric layer with the smaller average thickness.

[0010] In the above multilayer ceramic electronic component, the average particle diameter of the ceramic particles contained in the first dielectric layer may be 1.15 to 2.0 times the average particle diameter of the ceramic particles contained in the second dielectric layer.

[0011] In the above multilayer ceramic electronic component, the average particle diameter of the ceramic particles contained in the first dielectric layer is 80 to 350 nm, and the average particle diameter of the ceramic particles contained in the second dielectric layer may be 70 to 300 nm.

[0012] In the above multilayer ceramic electronic component, a plurality of the internal electrode layers are alternately drawn out in the stacking direction on a pair of end faces facing in a direction substantially orthogonal to the stacking direction of the stacked body, and the stacked body has, in the substantially orthogonal direction, the internal electrode layer drawn out to one of the pair of end faces and an end margin portion adjacent to the other side of the pair of end faces, and the average particle diameter of the ceramic particles included in the end margin portion may be 75 to 330 nm.

[0013] In the above multilayer ceramic electronic component, a plurality of third dielectric layers having an average thickness different from the average thickness of the first dielectric layer and the average thickness of the second dielectric layer are stacked on the stacked body, and the third dielectric layer may be stacked between the first dielectric and the second dielectric layer via the internal electrode layer.

[0014] The method for manufacturing a multilayer ceramic electronic component of the present invention includes a step of forming a first green sheet by applying a ceramic slurry on a substrate, a step of forming a first internal electrode pattern on the first green sheet, a step of forming a second green sheet by applying a ceramic slurry on the first green sheet and the first internal electrode pattern so as to have an average thickness different from that of the first green sheet, a step of forming a second internal electrode pattern on the second green sheet, a step of peeling the first green sheet and the second green sheet from the substrate, a step of stacking and pressing a plurality of sets of the first green sheet and the second green sheet, a step of dividing the stacked plurality of sets of the first green sheet and the second green sheet into a plurality of stacked bodies along the stacking direction, and a step of firing the stacked body.

[0015] In the method for manufacturing the above-described multilayer ceramic electronic component, the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet having the larger average thickness among the first green sheet and the second green sheet may be larger than the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet having the smaller average thickness.

[0016] Another method for manufacturing a multilayer ceramic electronic component according to the present invention includes a step of forming a first green sheet by applying a ceramic slurry onto a substrate, a step of forming a first internal electrode pattern on the first green sheet, a step of forming a second green sheet by applying a ceramic slurry onto the first green sheet and the first internal electrode pattern so as to have an average thickness different from that of the first green sheet, a step of forming a second internal electrode pattern on the second green sheet, a step of forming a third green sheet by applying a ceramic slurry onto the second green sheet and the second internal electrode pattern so as to have an average thickness different from that of the first green sheet and the second green sheet, a step of forming a third internal electrode pattern on the third green sheet, a step of peeling the first green sheet, the second green sheet, and the third green sheet from the substrate, a step of laminating and pressing a plurality of sets of the first green sheet, the second green sheet, and the third green sheet, a step of dividing the laminated and pressed plurality of sets of the first green sheet, the second green sheet, and the third green sheet into a plurality of laminates along the lamination direction, and a step of firing the laminate.

Advantages of the Invention

[0017] According to the present invention, the reliability of the multilayer ceramic electronic component can be improved.

Brief Description of the Drawings

[0018]

Figure 1

Figure 2

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Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Embodiments for Carrying Out the Invention

[0019] [Embodiment] (Configuration of Multilayer Ceramic Capacitor) Figure 1 is a perspective view showing an example of the multilayer ceramic capacitor 1. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line A-A of Figure 1. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line B-B of Figure 2. Figure 4 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line C-C of Figure 2.

[0020] The multilayer ceramic capacitor 1 includes a laminate 2 having a substantially rectangular parallelepiped shape, and external electrodes 3a and 3b provided on a pair of end faces 2A and 2B facing each other in the laminate 2. The multilayer ceramic capacitor 1 is an example of a multilayer ceramic electronic component. Other examples of multilayer ceramic electronic components include multilayer ceramic varistors and multilayer ceramic thermistors. In the present embodiment, the multilayer ceramic capacitor 1 is illustrated as a representative example of these.

[0021] In FIGS. 1 to 4, an X direction, a Y direction, and a Z direction orthogonal to each other are shown. The X direction is the length (L) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which a pair of end faces 2A and 2B of the laminate 2 face each other. The Y direction is the width (W) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which a pair of side faces 2E and 2F of the laminate 2 face each other. The Z direction is the height (T) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which the upper surface 2C and the lower surface 2D of the laminate 2 face each other and the lamination direction of the multilayer ceramic capacitor 1. Note that the width direction is an example of a direction substantially orthogonal to the lamination direction of the laminate 2.

[0022] The laminate 2 is provided with an upper surface 2C, a lower surface 2D, a pair of end faces 2A and 2B, and a pair of side faces 2E and 2F. The upper surface 2C and the lower surface 2D are substantially flat surfaces facing each other in the lamination direction, the pair of end faces 2A and 2B are substantially flat surfaces facing each other in the length direction, and the pair of side faces 2E and 2F are substantially flat surfaces facing each other in the width direction.

[0023] The laminate 2 has a laminated structure in which dielectric layers 22a and 22b containing a ceramic material that functions as a dielectric and internal electrode layers 23a and 23b are alternately laminated, and further, a pair of cover layers 20 and 21 are laminated so as to sandwich the dielectric layers 22a and 22b and the internal electrode layers 23a and 23b from both sides in the lamination direction. In the laminate 2, a portion sandwiched by a set of internal electrode layers 23a and 23b adjacent to each dielectric layer 22a and 22b contributes to the capacitance of the multilayer ceramic capacitor 1 and may be called a "capacitance portion layer".

[0024] The cover layers 20 and 21 sandwich the capacitive portion layer from both sides in the stacking direction. At both ends of the cover layers 20 and 21 in the length direction, cob parts 200 and 210 each having a curved surface are formed.

[0025] In addition, the laminate 2 is provided with side margin parts 40 and 41 that cover the respective side surfaces 2E and 2F. The side margin parts 40 and 41 extend along the length direction and sandwich the laminated regions of the internal electrode layers 23a and 23b and the dielectric layers 22a and 22b, that is, the capacitive portion layer from both sides in the width direction. The side margin parts 40 and 41 are mainly composed of the same ceramic material as the dielectric layers 22a and 22b.

[0026] The internal electrode layers 23a and 23b have a substantially rectangular shape in a front view in the stacking direction and face each other with the dielectric layers 22a and 22b interposed therebetween in the stacking direction. The internal electrode layers 23a and 23b are alternately provided along the stacking direction. One end of the internal electrode layer 23a is led out to one end face 2A and connected to one external electrode 3a, and one end of the internal electrode layer 23b is led out to the other end face 2B and connected to the other external electrode 3b. The average thicknesses of the internal electrode layers 23a and 23b are substantially the same.

[0027] The internal electrode layers 23a and 23b are mainly composed of base metals such as Ni (nickel), Cu (copper), and Sn (tin). As the internal electrode layers 23a and 23b, noble metals such as Pt (platinum), Pd (palladium), Ag (silver), and Au (gold) or alloys containing these may be used. The thickness of the internal electrode layers 23a and 23b is, for example, 0.05 to 0.6 (μm) or less.

[0028] The dielectric layers 22a and 22b mainly contain a ceramic material having a perovskite structure represented by, for example, the general formula ABO3. Note that the perovskite structure deviates from the stoichiometric composition of ABO 3-αincluding (α represents a very small number). For example, as the ceramic material, BaTiO3 (barium titanate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), MgTiO3 (magnesium titanate), Ba forming a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1), etc., and at least one of them can be selected and used. Ba 1-x-y Ca x Sr y Ti 1-z Zr z O3 includes barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconium titanate, calcium zirconium titanate, and barium calcium zirconium titanate, etc.

[0029] The dielectric layers 22a and 22b are alternately laminated via the internal electrode layers 23a and 23b. The dielectric layers 22a and 22b are respectively sandwiched by the internal electrode layers 23a and 23b from above and below in the lamination direction. Note that the dielectric layer 22a is an example of the first dielectric layer, and the dielectric layer 22b is an example of the second dielectric layer.

[0030] The average thicknesses Da and Db of the dielectric layers 22a and 22b are different. In this example, the average thickness Da of the dielectric layer 22a is larger than the average thickness Db of the dielectric layer 22a. Here, the average thicknesses Da and Db refer to the average value of the thickness along the lamination direction in the XY plane.

[0031] In this way, in the laminate 2, a dielectric layer 22a having a large average thickness Da and a dielectric layer 22b having a small average thickness Db are alternately laminated in the lamination direction. Therefore, in the manufacture of the multilayer ceramic capacitor 1, when the laminate 2 is sintered, a difference can be provided in the sinterability of each dielectric layer 22a, 22b. Specifically, due to the difference in the average thicknesses Da and Db, for example, the shrinkage amount and the shrinkage timing of the dielectric layers 22a, 22b during sintering are different, so that the difference in the shrinkage amount between the side margin portions 40, 41 and the cover layers 20, 21 adjacent to the periphery of the laminated regions of the dielectric layers 22a, 22b and the internal electrodes 23a, 23b and the laminate 2 is reduced.

[0032] Therefore, compared with the case where each average thickness Da, Db is the same, the stress due to the shrinkage of each dielectric layer 22a, 22b can be dispersed. Thereby, the generation of cracks in the laminate 2 is suppressed, and the reliability of the multilayer ceramic capacitor 1 is improved.

[0033] In order to suppress the generation of cracks, the average thickness Da of the dielectric layer 22a is preferably 1.05 to 2.0 times the average thickness Db of the dielectric layer 22b. More preferably, the average thickness Da of the dielectric layer 22a may be 1.1 to 1.3 times the average thickness Db of the dielectric layer 22b.

[0034] In order to more effectively suppress the generation of cracks, the average thickness Da of the dielectric layer 22a is preferably 0.4 to 0.8 μm, and the average thickness Db of the dielectric layer 22b is preferably 0.3 to 0.7 μm. More preferably, the average thickness Da of the dielectric layer 22a may be 0.4 to 0.6 μm, and the average thickness Db of the dielectric layer 22b may be 0.3 to 0.5 μm. Note that the measurement of the average thicknesses Da, Db of each dielectric layer 22a, 22b is performed, as an example, by adjusting the magnification of a scanning electron microscope or a transmission electron microscope so that about 3 to 4 layers of the dielectric layers 22a, 22b are imaged in one image, and measuring the thicknesses at 10 locations at equal intervals for each layer.

[0035] (Particle size of ceramic particles) Depending on the average thicknesses Da and Db of the dielectric layers 22a and 22b, the average particle sizes of the ceramic particles included in the respective dielectric layers 22a and 22b may be different.

[0036] FIG. 5 is a cross-sectional view showing an example of the microstructure of the region P shown in FIG. 2. The dielectric layer 22a is formed of a large number of ceramic particles 220a, the dielectric layer 22b is formed of a large number of ceramic particles 220b, and the end margin portion 22m is formed of a large number of ceramic particles 220m.

[0037] The average particle size of the ceramic particles 220a is larger than the average particle size of the ceramic particles 220b. Thus, among the dielectric layers 22a and 22b, the dielectric layer 22a having a larger average thickness includes the ceramic particles 220a having a larger average particle size, and the dielectric layer 22b having a smaller average thickness includes the ceramic particles 220b having a smaller average particle size.

[0038] Therefore, the dielectric layers 22a and 22b are not only appropriately smoothed according to their average thicknesses, but also the size of the grain boundaries between the ceramic particles 220a and 220b is appropriately adjusted according to the average thickness, thereby suppressing the movement of oxygen vacancies. As a result, the flatness and insulation characteristics of the dielectric layers 22a and 22b are improved as compared with the case where the average particle sizes of the ceramic particles 220a and 220b are not set as described above.

[0039] In order to suppress the generation of cracks, the average particle size of the ceramic particles 220a is preferably 1.15 to 2.0 times the average particle size of the ceramic particles 220b. More preferably, the average particle size of the ceramic particles 220a may be 1.4 to 1.65 times the average particle size of the ceramic particles 220b.

[0040] In order to suppress the generation of cracks, the average particle size of the ceramic particles 220a is preferably 80 to 350 nm, and the average particle size of the ceramic particles 220b is preferably 70 to 300 nm. More preferably, the average particle size of the ceramic particles 220a may be 80 to 150 nm, and the average particle size of the ceramic particles 220b may be 70 to 100 nm.

[0041] In addition, the average particle size of the ceramic particles 220m included in the end margin portion 22m is 75 to 330 nm. Thereby, stress can be more effectively relaxed and crack generation can be suppressed. The measurement of the average particle size of each of the ceramic particles 220a, 220b, and 220m is performed, for example, by adjusting the magnification of a scanning electron microscope or a transmission electron microscope so that about 80 to 150 crystal grains are imaged in one image and measuring the Feret diameter of all the crystal grains in the image. Here, the Feret diameter is the diameter in the direction parallel to the stacking direction of the multilayer ceramic capacitor 1.

[0042] (Another Embodiment of Multilayer Ceramic Capacitor) The above-described multilayer ceramic capacitor 1 has a laminate 2 in which two dielectric layers 22a and 22b having different average thicknesses are alternately laminated, but may have a laminate 2 in which three dielectric layers are repeatedly laminated as in the following example.

[0043] FIG. 6 is a cross-sectional view of a multilayer ceramic capacitor 1a according to another embodiment taken along line A-A of FIG. 1. In FIG. 6, the same reference numerals are given to the configurations common to those in FIG. 2, and the description thereof is omitted.

[0044] In the laminate 2, in addition to the dielectric layers 22a and 22b, a dielectric layer 22c having an average thickness Dc different from those of the dielectric layers 22a and 22b is laminated. The average thickness Dc of the dielectric layer 22c is smaller than the average thicknesses Da and Db of the dielectric layers 22a and 22b.

[0045] In the laminate 2, the dielectric layers 22a to 22c are repeatedly laminated in the stacking direction via the internal electrode layers 23a and 23b. Thereby, the dielectric layer 22c is sandwiched by the internal electrode layers 23a and 23b from above and below in the stacking direction and is laminated between the dielectric layers 22a and 22b. The dielectric layer 22c is mainly composed of the same ceramic material as the dielectric layers 22a and 22b. Note that the dielectric layer 22c is an example of a third dielectric layer.

[0046] Thus, in the laminate 2, three dielectric layers 22a to 22c having different average thicknesses Da to Dc are repeatedly laminated in the lamination direction. Therefore, when sintering the laminate 2 in the manufacture of the multilayer ceramic capacitor 1, a difference can be provided in the sinterability of each of the dielectric layers 22a to 22c. Specifically, due to the difference in the average thicknesses Da to Dc, for example, the shrinkage amount and shrinkage timing of the dielectric layers 22a to 22c during sintering are different, so that the difference in shrinkage amount between the side margin portions 40, 41 and the cover layers 20, 21 adjacent to the periphery of the lamination region of the dielectric layers 22a to 22c and the internal electrodes 23a, 23b and the laminate 2 is further reduced.

[0047] Therefore, compared with the case where each of the average thicknesses Da to Dc is the same, the stress caused by the shrinkage of each of the dielectric layers 22a to 22c can be dispersed. As a result, the occurrence of cracks in the laminate 2 is suppressed, and thus the reliability of the multilayer ceramic capacitor 1 is further improved. Note that the average particle diameter of the ceramic particles contained in the dielectric layer 22c may be smaller than the average particle diameters of the ceramic particles 220a, 220b contained in the other dielectric layers 22a, 22b, respectively. In this case, as described above, the flatness and insulation characteristics of the dielectric layer 22c can be improved as compared with the case where the average particle diameters of the ceramic particles in the dielectric layers 22a to 22c are the same.

[0048] (Manufacturing Process of Multilayer Ceramic Capacitor) FIG. 7 is a flowchart showing an example of the manufacturing process of the multilayer ceramic capacitor 1. This manufacturing process is an example of a method for manufacturing multilayer ceramic electronic components.

[0049] (Laminated Sheet Forming Process) First, a laminated sheet forming step St1 is performed. In this step, two green sheets that will become the dielectric layers 22a, 22b after the firing step are formed, and internal electrode patterns that will become the internal electrode layers 23a, 23b after the firing step are respectively formed on the two green sheets.

[0050] FIG. 8 is a cross-sectional view showing an example of the laminated sheet forming step St1. FIG. 8 shows a cross-section along the lamination direction and the length direction of the laminate 2 after firing.

[0051] First, a green sheet forming step St10 is performed. In the green sheet forming step St10, a green sheet 7a is formed by applying a ceramic slurry onto a substrate 8. The ceramic slurry is obtained, for example, by adding various additive compounds (such as sintering aids) to ceramic powder to obtain a dielectric material, adding a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol and toluene, and a plasticizer, and then performing wet mixing. Using the ceramic slurry, the green sheet 7a is coated on the substrate 8 and dried, for example, by the die coater method or the doctor blade method. The substrate 8 is, for example, a PET (polyethylene terephthalate) film.

[0052] Note that, as additive compounds of the ceramic powder, oxides of Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Sm (samarium), Eu (europium), Gd (gadolinium), Tb (terbium), Dy (dysprosium), Ho (holmium), Er (erbium), Tm (thulium) and Yb (ytterbium)), and oxides or glasses of Co (cobalt), Ni, Li (lithium), B (boron), Na (sodium), K (potassium) and Si (silicon) are used.

[0053] Next, an internal electrode pattern forming step St11 is performed. In the internal electrode pattern forming step St11, internal electrode patterns 6a are formed by applying conductive pastes added with ceramic particles onto the green sheet 7a respectively. The internal electrode patterns 6a become internal electrode layers 23a after firing.

[0054] In the internal electrode pattern forming step St11, a metal conductive paste for forming an internal electrode containing an organic binder is printed on the green sheet 7a by gravure printing or the like, thereby forming a plurality of internal electrode patterns 6a spaced apart from each other. Ceramic particles are added to the conductive paste as a co-material. The main component of the ceramic particles is not particularly limited, but is preferably the same as the ceramic that is the main component of the dielectric layers 22a and 22b. Further, the internal electrode pattern 6a is not limited to printing, and may be formed by a vacuum deposition method such as sputtering.

[0055] Next, the green sheet forming step St12 is performed. In the green sheet forming step St12, a green sheet 7b is formed by applying a ceramic slurry similar to the ceramic slurry used in the green sheet forming step St10 on the green sheet 7a and the internal electrode pattern 6a. At this time, the average thickness of the green sheet 7b is adjusted, for example, by adjusting the coating amount of the ceramic slurry so as to be different from the average thickness of the green sheet 7a. Specifically, the average thickness Tb of the green sheet 7b is smaller than the average thickness Ta of the green sheet 7a.

[0056] Here, the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet 7a having a large average thickness Ta is larger than the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet 7b having a small average thickness Tb. Thereby, the average particle diameter of the ceramic particles in the dielectric layer 22a can be made larger than the average particle diameter of the ceramic particles in the dielectric layer 22b. Note that the green sheet 7a is an example of a first green sheet, and the green sheet 7b is an example of a second green sheet.

[0057] Next, an internal electrode pattern forming step St13 is performed. In the internal electrode pattern forming step St13, similar to the internal electrode pattern forming step St11, an internal electrode pattern 6b is formed by applying a conductive paste containing ceramic particles onto the green sheet 7b. The internal electrode pattern 6b becomes the internal electrode layer 23b after firing. The internal electrode patterns 6a and 6b are formed so as to be shifted from each other by a half pitch in the length direction. Note that the internal electrode pattern 6b may be formed by a vacuum deposition method such as sputtering. The internal electrode pattern 6a is an example of the first electrode pattern, and the internal electrode pattern 6b is an example of the second electrode pattern.

[0058] By the above steps, a plurality of laminated sheets 5 are formed. Then, a laminated sheet peeling step St2 and a laminating and pressure bonding step St3 are performed.

[0059] FIG. 9 is a cross-sectional view showing an example of the laminated sheet peeling step St2 and the laminating and pressure bonding step St3. FIG. 9 shows a cross-section along the lamination direction and the length direction of the laminate 2 after firing.

[0060] (Laminated Sheet Peeling Step) After the laminated sheet forming step St1, a laminated sheet peeling step St2 is performed. In the laminated sheet peeling step St2, the laminated sheet 5 in which the green sheets 7a and 7b are laminated is peeled from the base material 8. At this time, the peeling device 80 applies an adsorption force f to the laminated sheet 5 from above and lifts it upward. Thereby, the laminated sheet 5 is peeled from the base material 8. The base material 8 is fixed to a conveyance table (not shown) or the like.

[0061] In this way, in the laminated sheet peeling step St2, since the green sheets 7a and 7b laminated on each other are peeled from the base material 8 together, even if the average thicknesses Ta and Tb of the green sheets 7a and 7b are reduced, the strength of the laminated sheet 5 is higher than that of the individual green sheets 7a and 7b, so the risk of damage is reduced. Therefore, the laminated ceramic capacitor 1 with the dielectric layers 22a and 22b thinned can be easily manufactured.

[0062] (Lamination and Pressing Process) Next, the lamination and pressing process St3 is performed. In the lamination and pressing process St3, a plurality of sets of green sheets 7a and 7b are laminated and pressed. That is, a plurality of laminated sheets 5 are laminated and pressed. At this time, the plurality of laminated sheets 5 are sandwiched from above and below in the lamination direction by other green sheets 7d and 7e that will become the cover layers 20 and 21 after firing, and then pressed. An internal electrode pattern 6b is formed on the surface of the lowermost green sheet 7e by the same method as in the internal electrode pattern forming process St13. Examples of the pressing means include, but are not limited to, a hydrostatic press.

[0063] (Cutting Process) Next, the cutting process St4 is performed. In the cutting process St4, the pressed green sheets 7a, 7b, 7d, and 7e are cut along a plurality of cut lines LW extending vertically and horizontally at regular intervals, for example, by a blade. As a result, the plurality of laminated sheets 5 are divided into a plurality of pre-fired laminates 2. FIG. 9 shows the cut lines LW along the width direction of the laminate 2. The ends of the internal electrode patterns 6a and 6b are respectively exposed on the end faces 2A and 2B that are the cut surfaces of the laminate 2. Although not shown, when the plurality of laminated sheets 5 are cut by a cut line along the length direction of the laminate 2, the ends of the internal electrode patterns 6a and 6b are exposed on the side faces 2E and 2F that are the cut surfaces of the laminate 2.

[0064] (Side Margin Forming Process) Next, the side margin forming process St5 is performed. In the side margin forming process St5, after pressing the side faces 2E and 2F of the laminate 2 against the green sheet for side margins, the laminate 2 is moved away from the green sheet for side margins. At this time, a part of the green sheet remaining on the side faces 2E and 2F of the laminate 2 becomes the side margin portions 40 and 41. As a result, the side margin portions 40 and 41 are formed on the side faces 2E and 2F of the pre-fired laminate 2.

[0065] (Polishing Process) Next, a polishing step St6 is performed. In the polishing step St6, the laminate 2 is polished by a method such as barrel polishing. As a result, the corners of the laminate 2 are rounded to form the chamfered portions 200 and 210.

[0066] (Firing step) Next, a firing step St7 is performed. In the firing step St7, the laminate 2 before firing is subjected to a debinding treatment in an N2 atmosphere at 250 to 500°C, and then fired at a firing temperature of 1200°C or higher for about 1 hour in a reducing atmosphere with an oxygen partial pressure of 0.003 (Pa), whereby the respective particles in the laminate 2 are sintered. As a result, in the laminate 2, the green sheets 7a, 7b, 7d, and 7e become the dielectric layers 22a, 22b and the cover layers 20, 21, and the internal electrode patterns 6a, 6b become the internal electrode layers 23a, 23b. Also, in the side margin forming step St5, a part of the green sheet remaining on the side surfaces 2E and 2F of the laminate 2 becomes the side margin portions 40 and 41.

[0067] Since the average thicknesses Ta and Tb of the green sheets 7a and 7b are different, in the firing step St7, as described above, a difference occurs in the sinterability of the respective dielectric layers 22a and 22b. For example, the shrinkage amount and the timing of shrinkage of the dielectric layers 22a and 22b are different. Therefore, the difference in the shrinkage amount between the side margin portions 40 and 41 and the laminate 2 is reduced, and compared with the case where the respective average thicknesses Ta and Tb are the same, the stress due to the shrinkage of the respective dielectric layers 22a and 22b can be dispersed. As a result, the occurrence of cracks in the laminate 2 is suppressed, and thus the reliability of the multilayer ceramic capacitor 1 is improved.

[0068] Also, in the firing step St7, in the region of the end margin portion 22m, the ceramic particles of the green sheet 7a and the ceramic particles of the green sheet 7b are mixed and grown, whereby ceramic particles 220m having a different particle size from the dielectric layers 22a and 22b are distributed.

[0069] (External electrode forming step) Next, an external electrode forming step St8 is performed. In the external electrode forming step St8, for example, a conductive paste containing metal powder, glass frit, a binder, and a solvent is applied to each end face 2A, 2B, the upper surface 2C, the lower surface 2D, and each side face 2E, 2F of the laminate 2. After applying the conductive paste, it is dried to form the external electrodes 3a, 3b. Note that the binder and the solvent evaporate by baking. Examples of the applying means of the conductive paste include a sputtering method and a dipping method. In this way, the multilayer ceramic capacitor 1 is manufactured.

[0070] (Manufacturing process of other multilayer ceramic capacitors) Next, the manufacturing process of another multilayer ceramic capacitor 1a will be described. Here, only the difference in the laminated sheet forming step St1 from the manufacturing process of the multilayer ceramic capacitor 1 will be described.

[0071] FIG. 10 is a cross-sectional view showing an example of a green sheet forming step St14 and an internal electrode pattern forming step St15 of another multilayer ceramic capacitor 1a. FIG. 10 shows a cross-section along the lamination direction and the length direction of the laminate 2 after firing.

[0072] After the above internal electrode pattern forming step St13, a green sheet forming step St14 is performed. In the green sheet forming step St14, a ceramic slurry similar to the ceramic slurry used in the green sheet forming step St10 is applied onto the green sheet 7b and the internal electrode pattern 6b to form a green sheet 7c. The green sheet 7c becomes a dielectric layer 22c after firing. Note that the green sheet 7c is an example of a third green sheet.

[0073] The average thickness Tc of the green sheet 7c is adjusted, for example, by adjusting the coating amount of the ceramic slurry so as to be different from the average thicknesses Ta and Tb of the green sheets 7a and 7b. Specifically, the average thickness Tc of the green sheet 7c is smaller than the average thicknesses Ta and Tb of the green sheets 7a and 7b. Note that the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet 7c may be smaller than the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheets 7a and 7b. Thereby, the average particle diameter of the ceramic particles in the dielectric layer 22c can be made smaller than the average particle diameter of the ceramic particles in the dielectric layers 22a and 22b.

[0074] Next, an internal electrode pattern forming step St15 is performed. In the internal electrode pattern forming step St15, similar to the internal electrode pattern forming step St11, an internal electrode pattern 6c is formed by applying a conductive paste containing ceramic particles onto the green sheet 7c. The internal electrode pattern 6c becomes the internal electrode layer 23a after firing. The internal electrode pattern 6c is formed so as to be shifted by a half pitch from the internal electrode pattern 6b in the length direction. Note that the internal electrode pattern 6c may be formed by a vacuum deposition method such as sputtering. The internal electrode pattern 6c is an example of a third electrode pattern.

[0075] As described above, the laminated sheet 5a is formed. Also, a laminated sheet 5b in which the green sheets 7a to 7c with the internal electrode patterns 6a to 6c shifted by a half pitch are laminated is also formed by the same method as described above. In the subsequent laminated sheet peeling step St2, the laminated sheets 5a and 5b in which the green sheets 7a to 7c are laminated are peeled from the base material 8 by the method described above. Then, a laminating and pressing step St3 is performed.

[0076] FIG. 11 is a cross-sectional view showing an example of the laminating and pressing step St3 in another embodiment. FIG. 11 shows a cross-section along the laminating direction and the length direction of the laminate 2 after firing. In FIG. 11, the components common to FIG. 9 are denoted by the same reference numerals, and the description thereof is omitted.

[0077] In the lamination and pressure bonding process St3, a plurality of sets of green sheets 7a to 7c are laminated and pressure bonded by the method described above. Specifically, the laminated sheets 5a and 5b are laminated and pressure bonded alternately. As a result, the green sheets 7a to 7c are repeatedly laminated in the lamination direction via the internal electrode patterns 6a to 6c.

[0078] In the subsequent cutting process St4, the pressure-bonded green sheets 7a to 7d are cut along a plurality of cut lines extending vertically and horizontally at regular intervals, for example, by a blade. As a result, the plurality of laminated sheets 5 are divided into a plurality of pre-fired laminates 2. The ends of the internal electrode patterns 6a to 6c are exposed on the cut surface of the laminate 2. Next, in the side margin forming process St5, side margins 40 and 41 are formed by attaching a part of the green sheet to the side surface in the width direction of the laminate 2. Next, in the polishing process St6, the laminate 2 is polished by a method such as barrel polishing.

[0079] Thereafter, in the firing process St7, the laminate 2 is fired by the same method as described above. Since the average thicknesses Ta to Tc of the green sheets 7a to 7c are different, in the firing process St7, as described above, a difference occurs in the sinterability of each dielectric layer 22a to 22c. For example, the shrinkage amount and the timing of shrinkage of the dielectric layers 22a to 22c are different. Therefore, the difference in the shrinkage amount between the side margins 40 and 41 and the laminate 2 is reduced, and compared with the case where the average thicknesses Ta to Tc are the same, the stress due to the shrinkage of each dielectric layer 22a to 22c can be dispersed. As a result, the occurrence of cracks in the laminate 2 is suppressed, and the reliability of the multilayer ceramic capacitor 1a is improved.

[0080] Thereafter, in the external electrode forming process St8, external electrodes 3a and 3b are formed on the end faces 2A and 2B of the laminate 2. In this way, the multilayer ceramic capacitor 1a is manufactured.

[0081] As described above in detail with reference to the embodiments of the present invention, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims.

Explanation of Reference Numerals

[0082] 1, 1a Multilayer ceramic capacitor 2, 50, 50a Laminate 3a, 3b External electrode 6a to 6c Internal electrode pattern 7a to 7d Green sheet 22a to 22c Dielectric layer 22m End margin portion 23a, 23b Internal electrode layer 220a, 220b, 220m Ceramic particles

Claims

1. It has a laminated body in a substantially rectangular parallelepiped shape in which a plurality of first dielectric layers, a plurality of second dielectric layers, and a plurality of internal electrode layers are laminated, wherein the first dielectric layer and the second dielectric layer have different average thicknesses and are alternately laminated via the internal electrode layer. A multilayer ceramic electronic component characterized by this.

2. The multilayer ceramic electronic component according to Claim 1, wherein the average thickness of the first dielectric layer is 1.05 to 2.0 times the average thickness of the second dielectric layer.

3. The average thickness of the first dielectric layer is 0.4 to 0.8 μm, and the average thickness of the second dielectric layer is 0.3 to 0.7 μm. The multilayer ceramic electronic component according to Claim 1, characterized by this.

4. Among the first dielectric layer and the second dielectric layer, the average particle diameter of the ceramic particles included in the dielectric layer with the larger average thickness is larger than the average particle diameter of the ceramic particles included in the dielectric layer with the smaller average thickness. The multilayer ceramic electronic component according to Claim 1 or 2, characterized by this.

5. The average particle diameter of the ceramic particles included in the first dielectric layer is 1.15 to 2.0 times the average particle diameter of the ceramic particles included in the second dielectric layer. The multilayer ceramic electronic component according to Claim 1 or 2, characterized by this.

6. The average particle diameter of the ceramic particles included in the first dielectric layer is 80 to 350 nm, and the average particle diameter of the ceramic particles included in the second dielectric layer is 70 to 300 nm. The multilayer ceramic electronic component according to Claim 1 or 2, characterized by this.

7. A plurality of the internal electrode layers are alternately drawn out in the stacking direction at a pair of end faces facing in a direction substantially orthogonal to the stacking direction of the stacked body, and the stacked body has, in the substantially orthogonal direction, the internal electrode layer drawn out to one of the pair of end faces and an end margin portion adjacent to the other side of the pair of end faces, and the average particle diameter of the ceramic particles included in the end margin portion is 75 to 330 nm. The multilayer ceramic electronic component according to Claim 6, characterized by this.

8. A plurality of third dielectric layers having an average thickness different from the average thickness of the first dielectric layer and the average thickness of the second dielectric layer are further laminated on the laminated body, The laminated ceramic electronic component according to claim 1, wherein the third dielectric layer is laminated between the first dielectric and the second dielectric layer via the internal electrode layer.

9. A step of forming a first green sheet by applying a ceramic slurry onto a substrate; A step of forming a first internal electrode pattern on the first green sheet; A step of forming a second green sheet by applying a ceramic slurry onto the first green sheet and the first internal electrode pattern so as to have an average thickness different from that of the first green sheet; A step of forming a second internal electrode pattern on the second green sheet; A step of peeling the first green sheet and the second green sheet from the substrate; A step of laminating and pressing a plurality of sets of the first green sheet and the second green sheet; A step of dividing the plurality of sets of the laminated and pressed first green sheet and second green sheet into a plurality of laminates along the lamination direction; A method for manufacturing a laminated ceramic electronic component, comprising a step of firing the laminate.

10. Among the first green sheet and the second green sheet, the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet with the larger average thickness is larger than the average particle diameter of the ceramic powder contained in the ceramic slurry used for forming the green sheet with the smaller average thickness. The method for manufacturing a laminated ceramic electronic component according to claim 9.

11. A step of forming a first green sheet by applying a ceramic slurry onto a substrate; A step of forming a first internal electrode pattern on the first green sheet; A step of forming a second green sheet by applying a ceramic slurry onto the first green sheet and the first internal electrode pattern so as to have an average thickness different from that of the first green sheet; A step of forming a second internal electrode pattern on the second green sheet; A step of forming a third green sheet by applying a ceramic slurry onto the second green sheet and the second internal electrode pattern so as to have an average thickness different from that of the first green sheet and the second green sheet; A step of forming a third internal electrode pattern on the third green sheet; The step of peeling the first green sheet, the second green sheet, and the third green sheet from the base material; The step of laminating and pressing a plurality of sets of the first green sheet, the second green sheet, and the third green sheet; The step of dividing the plurality of sets of the first green sheet, the second green sheet, and the third green sheet that have been pressed into a plurality of laminates along the lamination direction; A method for manufacturing a laminated ceramic electronic component, comprising the step of firing the laminate.

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