Vibration device and method for manufacturing vibration device

Abstract

To provide a vibration device that has excellent vibration characteristics, and a method for manufacturing a vibration device.SOLUTION: A vibration device comprises: a semiconductor substrate that includes a first surface and a second surface in the front-and-back relationship with each other, and is formed with a through hole penetrating the first surface and the second surface; a semiconductor circuit that is arranged on the side of the second surface of the semiconductor substrate, and includes a conductive layer exposed inside the through hole; first wiring that is plated wiring arranged in the through hole, and electrically connected to the conductive layer; second wiring that is sputtering wiring covering the first wring and arranged on the first surface; a vibration element that is located on the side of the first surface, and joined to the second wiring with a joining member therebetween; and a lid body that is joined to the semiconductor substrate and forms, with the semiconductor substrate, a housing space for housing the vibration element.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a vibration device and a method for manufacturing a vibration device. [Background technology]

[0002] For example, the semiconductor device described in Patent Document 1 includes a semiconductor substrate having upper and lower surfaces that are opposite each other and having a through hole formed therethrough, a first conductive layer disposed on the lower surface of the semiconductor substrate and exposed in the through hole, an insulating layer disposed on the inner wall of the through hole, an organic insulating layer disposed on the insulating layer, and copper-plated wiring disposed on the organic insulating layer and electrically connected to the first conductive layer through a second opening in the organic insulating layer. The copper-plated wiring is also formed to extend from the through hole to the upper surface of the semiconductor substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2018-113466 Summary of the Invention [Problem to be solved by the invention]

[0004] When such a semiconductor device is applied to an oscillator, the oscillator has a configuration including the above-mentioned semiconductor device, a vibration element located on the upper surface of a semiconductor substrate and bonded to the copper-plated wiring via a bonding member, and a lid body bonded to the upper surface of the semiconductor substrate and vacuum-sealing the vibration element between the semiconductor substrate. However, since the copper-plated wiring contains moisture, outgassing is generated from the copper-plated wiring due to heating treatment during manufacturing or temperature rise during use, which may reduce the degree of vacuum in the space accommodating the vibration element, resulting in fluctuations and deterioration of the vibration characteristics. [Means for solving the problem]

[0005] The resonation device of the present invention includes a semiconductor substrate having a first surface and a second surface that are reverse to each other, and a through hole that penetrates the first surface and the second surface; a semiconductor circuit disposed on the second surface side of the semiconductor substrate and including a conductive layer exposed in the through hole; a first wiring that is a plated wiring disposed in the through hole and electrically connected to the conductive layer; a second wiring that is a sputtering wiring that covers the first wiring and is disposed on the first surface; a vibration element located on the first surface side and joined to the second wiring via a joining member; The vibration element includes a cover bonded to the semiconductor substrate, the cover forming an accommodation space between the semiconductor substrate and the cover for accommodating the vibration element.

[0006] The method for manufacturing a resonator device of the present invention includes a preparation step of preparing a semiconductor device having a semiconductor substrate having a first surface and a second surface that are opposite surfaces to each other and in which a through hole penetrating the first surface and the second surface is formed, and a semiconductor circuit disposed on the second surface side of the semiconductor substrate and having a conductive layer exposed in the through hole; a first wiring forming step of forming a first wiring in the through hole by plating, the first wiring being electrically connected to the conductive layer; a second wiring forming step of forming a second wiring by sputtering, the second wiring covering the first wiring and being disposed on the first surface; a vibration element bonding step of bonding a vibration element to the second wiring via a bonding member; and a lid bonding step of bonding a lid to the semiconductor device to form an accommodation space for accommodating the vibration element between the semiconductor device and the lid. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view showing a vibration device according to a first embodiment. [Figure 2] 1 is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate. [Figure 3]1 is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate. [Figure 4] FIG. 2 is a plan view showing the top surface of the semiconductor device. [Figure 5] FIG. 1 is a cross-sectional view of a semiconductor device. [Figure 6] FIG. 2 is a plan view showing a vibration element. [Figure 7] 10A to 10C are cross-sectional views illustrating a method for forming a joining member. [Figure 8] FIG. 10 is a cross-sectional view for explaining a problem in plating processing. [Figure 9] 1 is a flowchart showing a manufacturing process of a vibration device. [Figure 10] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 11] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 12] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 13] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 14] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 15] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 16] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 17] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 18] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 19] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 20] 10A to 10C are cross-sectional views illustrating a method for manufacturing a vibration device. [Figure 21] FIG. 4 is a cross-sectional view showing a vibration device according to a second embodiment. [Figure 22] 1 is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate. [Figure 23]1 is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate. DETAILED DESCRIPTION OF THE INVENTION

[0008] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A vibration device and a method for manufacturing a vibration device according to the present invention will be described in detail below with reference to the embodiments shown in the accompanying drawings.

[0009] First Embodiment FIG. 1 is a cross-sectional view showing a resonator device according to a first embodiment. FIGS. 2 and 3 are enlarged cross-sectional views of a through hole formed in a semiconductor substrate. FIG. 4 is a plan view showing the top surface of a semiconductor device. FIG. 5 is a cross-sectional view of the semiconductor device. FIG. 6 is a plan view showing a resonator element. FIG. 7 is a cross-sectional view for explaining a method for forming a bonding member. FIG. 8 is a cross-sectional view for explaining problems in a plating process. FIG. 9 is a flowchart showing the manufacturing process of a resonator device. FIGS. 10 to 20 are cross-sectional views for explaining a method for manufacturing a resonator device. For ease of explanation, each figure illustrates three mutually orthogonal axes as the X-axis, Y-axis, and Z-axis. The side toward which the arrow in the Z-axis direction points is also referred to as "upper," and the opposite side is also referred to as "lower." A planar view from the Z-axis direction is also simply referred to as a "planar view."

[0010] 1, the resonator device 1 includes a semiconductor device 2, a resonator element 3 disposed on the upper surface of the semiconductor device 2, and a lid 4 that covers the resonator element 3 and is bonded to the upper surface of the semiconductor device 2. In such a resonator device 1, the semiconductor device 2 and the lid 4 form a package P, and the resonator element 3 is housed in a housing space S of the package P.

[0011] <Semiconductor device 2> As shown in FIG. 1, the semiconductor device 2 has a semiconductor substrate 5. The semiconductor substrate 5 is a silicon substrate. However, the semiconductor substrate 5 is not particularly limited, and a substrate made of a semiconductor material other than silicon, such as Ge, GaP, GaAs, or InP, may be used. The semiconductor substrate 5 has an upper surface 5a as a first surface and a lower surface 5b as a second surface, which are opposite surfaces. The semiconductor substrate 5 has a pair of through holes 51 and 52 formed therein, penetrating the upper surface 5a and the lower surface 5b. The through holes 51 and 52 can be formed by, for example, RIE (reactive ion etching). This allows the through holes 51 and 52 to have a high aspect ratio. However, the method for forming the through holes 51 and 52 is not particularly limited.

[0012] The semiconductor device 2 also has an insulating film 60 formed on the upper surface 5a and the lower surface 5b of the semiconductor substrate 5. The insulating film 60 formed on the upper surface 5a also extends into the through holes 51 and 52 and is also formed on the upper ends of the through holes 51 and 52. The insulating film 60 is made of, for example, silicon oxide (SiO2). The insulating film 60 can be formed by, for example, sputtering. However, the constituent material and forming method of the insulating film 60 are not particularly limited.

[0013] The semiconductor device 2 also has a semiconductor circuit 7 formed on the lower surface 5b of the semiconductor substrate 5 and electrically connected to the vibration element 3. The semiconductor circuit 7 includes an oscillation circuit 70 that oscillates the vibration element 3 to generate the frequency of a reference signal such as a clock signal. This makes the vibration device 1 an oscillator, which is expected to be highly versatile and in demand.

[0014] The semiconductor circuit 7 has a plurality of elements 700 formed on the lower surface 5b of the semiconductor substrate 5 and a laminated body 71 laminated on the lower surface 5b of the semiconductor substrate 5. The laminated body 71 has a wiring layer 72 formed on the lower surface 5b of the semiconductor substrate 5, an insulating layer 73 formed on the lower surface of the wiring layer 72, a passivation film 74 formed on the lower surface of the insulating layer 73, and a terminal layer 75 formed on the lower surface of the passivation film 74. The plurality of elements 700 are electrically connected to each other via wiring included in the wiring layer 72 and through electrodes penetrating between layers, thereby forming an oscillator circuit 70. The elements 700 are, for example, transistors, resistors, capacitors, etc.

[0015] In this way, by forming the semiconductor circuit 7 on the semiconductor substrate 5, the space of the semiconductor substrate 5 can be effectively utilized. Furthermore, since the semiconductor circuit 7 can be integrally formed with the resonator device 1, the overall size of the device can be reduced. In particular, by forming the semiconductor circuit 7 on the lower surface 5b side, the area in which the semiconductor circuit 7 can be formed is wider compared to when the semiconductor circuit 7 is formed on the upper surface 5a side, since there is no bonding area with the lid 4. Therefore, the degree of freedom in designing the semiconductor circuit 7 is increased.

[0016] In this embodiment, the laminate 71 includes one wiring layer 72, but the present invention is not limited to this, and multiple wiring layers 72 may be laminated with insulating layers 73 interposed therebetween. In other words, the wiring layers 72 and the insulating layers 73 may be alternately laminated multiple times between the semiconductor substrate 5 and the passivation film 74. This improves the degree of freedom in routing the wiring and facilitates circuit design.

[0017] The wiring layer 72 also has an electrode pad 721 as a conductive layer that overlaps the through hole 51 and is exposed in the through hole 51, and an electrode pad 722 as a conductive layer that overlaps the through hole 52 and is exposed in the through hole 52. The terminal layer 75 also has a plurality of external terminals 751 for connecting the semiconductor circuit 7 to an exterior device. Each external terminal 751 penetrates the insulating layer 73 and the passivation film 74 and is electrically connected to the wiring layer 72.

[0018] 1 to 3, the semiconductor device 2 further includes second organic resin films 621 and 622 disposed in the through holes 51 and 52. The second organic resin films 621 and 622 each have insulating properties. The second organic resin film 621 is disposed on the inner circumferential surface of the through hole 51, covering the inner circumferential surface of the through hole 51. Similarly, the second organic resin film 622 is disposed on the inner circumferential surface of the through hole 52, covering the inner circumferential surface of the through hole 52. By covering the inner circumferential surfaces of the through holes 51 and 52 with the second organic resin films 621 and 622 in this manner, the first wirings 811 and 812 can be more reliably insulated from the semiconductor substrate 5.

[0019] The second organic resin films 621, 622 extend from the upper openings of the through holes 51, 52 onto the upper surface 5a, covering the boundary portions 5c between the through holes 51, 52 and the upper surface 5a. The portions of the second organic resin films 621, 622 that cover the boundary portions 5c have rounded surfaces. Furthermore, within the through holes 51, 52, the inner circumferential surfaces of the second organic resin films 621, 622 are tapered such that the inner diameter gradually decreases from the top to the bottom.

[0020] The material for forming the second organic resin films 621 and 622 is not particularly limited, and may be, for example, a polyimide resin, an epoxy resin, or the like.

[0021] 1 to 3, the semiconductor device 2 further includes first wirings 811 and 812 disposed in the through holes 51 and 52 and electrically connected to the electrode pads 721 and 722. The first wirings 811 are disposed on the inner circumferential surface of the second organic resin film 621 within the through hole 51 and are electrically connected to the electrode pads 721 via the lower opening of the through hole 51. The first wirings 811 are disposed within the inner circumferential surface of the through hole 51. The second organic resin film 621 is disposed within the through hole 51 between the inner circumferential surface of the through hole 51 and the first wirings 811.

[0022] Similarly, the first wiring 812 is disposed on the inner circumferential surface of the second organic resin film 622 inside the through hole 52, and is electrically connected to the electrode pad 722 via the lower opening of the through hole 52. The first wiring 812 is disposed inside the inner circumferential surface of the through hole 52. Then, inside the through hole 52, the second organic resin film 622 is disposed between the inner circumferential surface of the through hole 52 and the first wiring 812.

[0023] The first wirings 811, 812 protrude from the upper openings of the through holes 51, 52 onto the upper surface 5a and extend beyond the second organic resin films 621, 622. As described above, the portions of the second organic resin films 621, 622 covering the boundary portion 5c are rounded, which effectively prevents the first wirings 811, 812 from being poorly formed, damaged, or broken at the boundary portion 5c. The first wirings 811, 812 also cover the through holes 51, 52 and the second organic resin films 621, 622 disposed in the through holes 51, 52. The portions of the first wirings 811, 812 protruding onto the upper surface 5a surround the through holes 51, 52 and the second organic resin films 621, 622 in a plan view.

[0024] The first wirings 811, 812 are plated wirings formed by electrolytic plating. By forming the first wirings 811, 812 by electrolytic plating in this way, it becomes easier to form the first wirings 811, 812 thick, and disconnection of the first wirings 811, 812 inside the through holes 51, 52 can be effectively suppressed. In addition, high interlayer adhesion can be achieved. However, the plating process is not limited to electrolytic plating, and the first wirings 811, 812 may also be formed by electroless plating.

[0025] Here, in the electrolytic plating process, a seed layer for growing plating inside the through holes 51, 52 and on the upper surface 5a is formed by sputtering. Therefore, in this embodiment, as described above, the inner surfaces of the second organic resin films 621, 622 are tapered to ensure sputtering coverage when forming the seed layer. Therefore, the seed layer can be formed with a desired thickness over its entire area, and as a result, the first wirings 811, 812 can be formed with high precision.

[0026] The constituent material of such first wirings 811, 812 is not particularly limited, but for example, copper (Cu) can be used. Note that the constituent material being copper (Cu) means that copper (Cu) is used as the main material, and as long as copper (Cu) is used as the main material, other materials may be added. In addition, the configuration of the seed layer is not particularly limited, but for example, it can be a laminate of an underlayer made of a titanium / tungsten alloy (TiW) and a surface layer made of copper (Cu).

[0027] As shown in FIGS. 1 to 3 , the semiconductor device 2 further includes first organic resin films 611 and 612 disposed so as to fill at least a portion of the through holes 51 and 52. The first organic resin films 611 and 612 each have insulating properties. The first organic resin film 611 is disposed on the first wiring 811 and covers the first wiring 811. Similarly, the first organic resin film 612 is disposed on the first wiring 812 and covers the first wiring 812. Covering the first wirings 811 and 812 with the first organic resin films 611 and 612 in this manner effectively prevents deterioration of electrical characteristics of the first wirings 811 and 812 due to oxidation. Furthermore, filling at least a portion of the through holes 51 and 52 with the first organic resin films 611 and 612 can also improve the airtightness of the housing space S.

[0028] Furthermore, the first organic resin films 611, 612 protrude onto the upper surface 5a from the upper openings of the through holes 51, 52 and cover the first wirings 811, 812 located on the upper surface 5a, even around the through holes 51, 52. Therefore, a wider range of the first wirings 811, 812 is covered with the first organic resin films 611, 612, which can more effectively suppress deterioration of the electrical characteristics of the first wirings 811, 812 due to oxidation. Note that the outer edges of the first wirings 811, 812 are exposed from the first organic resin films 611, 612 to establish electrical connection with second wirings 821, 822, which will be described later. The first organic resin films 611, 612 also cover the through holes 51, 52 and the first wirings 811, 812 arranged in the through holes 51, 52. The portions of the first organic resin films 611 and 612 that protrude onto the upper surface 5a surround the through holes 51 and 52 in plan view.

[0029] The first organic resin films 611 and 612 have recesses 611a and 612a on their surfaces that are recessed into the through holes 51 and 52. The first organic resin films 611 and 612 are thicker at the center than at the edges of the through holes 51 and 52. Therefore, the recesses 611a and 612a are shallower than the through holes 51 and 52, and have a gentler slope. This ensures sufficient sputtering coverage when forming the second wirings 821 and 822 (described later), allowing the second wirings 821 and 822 to be formed with precision. Because the first organic resin films 611 and 612 have the recesses 611a and 612a, the film thicknesses at the recesses 611a and 612a are thinner at the centers of the first organic resin films 611 and 612 than at the periphery. Furthermore, the film thickness at the center is thicker than at the edges of the through holes 51 and 52 located outside the recesses 611a and 612a.

[0030] The constituent material of such first organic resin films 611, 612 is not particularly limited, and for example, polyimide resin, epoxy resin, etc. can be used, similar to the above-mentioned second organic resin films 621, 622. In particular, by forming the first organic resin films 611, 612 and the second organic resin films 621, 622 from the same material, their linear expansion coefficients become equal, and for example, delamination and the like can be effectively suppressed.

[0031] As shown in FIGS. 1 to 3 , the semiconductor device 2 further includes second wirings 821 and 822 arranged on the upper surface 5a of the semiconductor substrate 5. The second wiring 821 is electrically connected to the first wiring 811 by overlapping with the outer edge of the first wiring 811 on the upper surface 5a, i.e., the portion exposed from the first organic resin film 611. The first wiring 811 and the second wiring 821 form a single wiring 8A. This configuration allows the first wiring 811 and the second wiring 821 to be easily connected. Furthermore, the contact portion between the first wiring 811 and the second wiring 821 surrounds the through hole 51 and the second organic resin film 621 in a plan view. Similarly, the second wiring 822 is electrically connected to the first wiring 812 by overlapping with the outer edge of the first wiring 812 on the upper surface 5a, i.e., the portion exposed from the first organic resin film 612. The first wiring 812 and the second wiring 822 form one wiring 8B. This configuration makes it possible to easily connect the first wiring 812 and the second wiring 822. Furthermore, the portion where the first wiring 812 and the second wiring 822 contact each other surrounds the through hole 52 and the second organic resin film 622 in plan view.

[0032] As shown in FIG. 4, the second wirings 821 and 822 have internal terminals 821a and 822a that are disposed at one end thereof and to which the vibration element 3 is joined.

[0033] 2 and 3, the second wirings 821 and 822 are also formed on the first organic resin films 611 and 612 so as to cover the upper openings of the through holes 51 and 52, and thus cover at least a portion of the first wirings 811 and 812 from above the first organic resin films 611 and 612. This allows the second wirings 821 and 822 to confine outgassing from the first wirings 811 and 812 within the through holes 51 and 52. This makes it possible to suppress environmental changes in the accommodation space S due to outgassing, particularly an increase in pressure. This stabilizes the vibration characteristics of the vibration element 3, resulting in a highly reliable vibration device 1. In particular, in this embodiment, the second wirings 821 and 822 entirely cover the first wirings 811 and 812. This makes the above-described effects more pronounced.

[0034] The second wirings 821 and 822 are sputtered wirings formed by sputtering. The second wirings 821 and 822 have smaller surface roughness and thinner thickness than the first wirings 811 and 812. For example, the surface roughness of the second wirings 821 and 822 is one-tenth or less of that of the first wirings 811 and 812. By forming the second wirings 821 and 822 by sputtering, it is possible to suppress the generation of outgassing from the second wirings 821 and 822. Therefore, it is possible to suppress environmental changes in the accommodation space S, particularly an increase in pressure. Furthermore, the second wirings 821 and 822 become dense films, which more reliably confine the outgassing from the first wirings 811 and 812 within the through holes 51 and 52. As described above, the through holes 51 and 52 are at least partially filled with the first organic resin films 611 and 612, and recesses 611a and 612a that are shallower and gentler than the through holes 51 and 52 are formed on the surfaces of the first organic resin films 611 and 612. This ensures sputtering coverage, allowing the second wirings 821 and 822 to be formed with high precision. Therefore, the second wirings 821 and 822 can more reliably cover the entire area of the first wirings 811 and 812 from above the first organic resin films 611 and 612.

[0035] As shown in FIGS. 2 and 3, the second wirings 821 and 822 are formed by a laminate of wiring layers 821b and 822b and coating layers 821c and 822c arranged to cover the wiring layers 821b and 822b. The wiring layers 821b and 822b are formed by a laminate of a base layer made of a titanium / tungsten alloy (TiW) and a wiring layer made of copper (Cu), although not shown. The coating layers 821c and 822c are formed by a laminate of a base layer made of titanium (Ti) and a surface layer made of gold (Au), although not shown. By covering the outermost layers of the second wirings 821 and 822 with a surface layer made of gold (Au), degradation of the electrical characteristics of the second wirings 821 and 822 due to oxidation can be effectively suppressed.

[0036] As shown in FIG. 5 , the semiconductor device 2 further includes third organic resin films 631 and 632 disposed on the upper surface 5 a of the semiconductor substrate 5. The third organic resin films 631 and 632 each have insulating properties. The third organic resin film 631 is interposed between the upper surface 5 a and an internal terminal 821 a of the second wiring 821. In other words, the internal terminal 821 a is formed on the third organic resin film 631 and covers the third organic resin film 631. Similarly, the third organic resin film 632 is interposed between the upper surface 5 a and an internal terminal 822 a of the second wiring 822. In other words, the internal terminal 822 a is formed on the third organic resin film 632 and covers the third organic resin film 632.

[0037] The constituent material of such third organic resin films 631, 632 is not particularly limited, and for example, like the first organic resin films 611, 612 and second organic resin films 621, 622, polyimide resin, epoxy resin, etc. can be used.

[0038] <Lid 4> As shown in FIG. 1, the lid 4 has an opening on its lower surface and a bottomed recess 41 for accommodating the vibration element 3 therein. The lid 4 is bonded at its lower surface to the upper surface of the semiconductor device 2, i.e., the upper surface 5a of the semiconductor substrate 5, via a bonding member 40. This forms an accommodating space S for accommodating the vibration element 3 between the lid 4 and the semiconductor device 2. The accommodating space S is airtight and in a reduced pressure state, preferably closer to a vacuum. This reduces viscous resistance and improves the oscillation characteristics of the vibration element 3. However, the atmosphere in the accommodating space S is not particularly limited.

[0039] The lid 4 is a silicon substrate, similar to the semiconductor substrate 5. This makes the linear expansion coefficients of the semiconductor substrate 5 and the lid 4 equal, suppressing the generation of thermal stress due to thermal expansion, resulting in a resonator device 1 with excellent vibration characteristics. Furthermore, since the resonator device 1 can be formed by a semiconductor process, the resonator device 1 can be manufactured with high precision and can be made smaller. However, the lid 4 is not particularly limited, and a substrate made of a semiconductor material other than silicon, such as Ge, GaP, GaAs, or InP, may also be used.

[0040] <Vibration element 3> As shown in FIG. 6 , the vibration element 3 includes a vibration substrate 31 and electrodes arranged on the surface of the vibration substrate 31. The vibration substrate 31 has a thickness-shear vibration mode and is formed of an AT-cut quartz crystal substrate in this embodiment. The AT-cut quartz crystal substrate has a third-order frequency-temperature characteristic, which provides the vibration element 3 with excellent temperature characteristics. The electrodes include an excitation electrode 321 arranged on the upper surface of the vibration substrate 31 and an excitation electrode 322 arranged on the lower surface opposite the excitation electrode 321. The electrodes also include a pair of terminals 323 and 324 arranged on the lower surface of the vibration substrate 31, a wiring 325 electrically connecting the terminal 323 and the excitation electrode 321, and a wiring 326 electrically connecting the terminal 324 and the excitation electrode 322.

[0041] The configuration of the vibration element 3 is not limited to the above-described configuration. For example, the vibration element 3 may be a mesa type in which the vibration region sandwiched between the excitation electrodes 321 and 322 protrudes from its surroundings, or conversely, may be an inverted mesa type in which the vibration region is recessed from its surroundings. In addition, the vibration substrate 31 may be subjected to bevel processing, in which the periphery is ground, or convex processing, in which the upper and lower surfaces are made convex.

[0042] Furthermore, the vibration element 3 is not limited to one that vibrates in a thickness-shear vibration mode, and may be, for example, a vibration element in which multiple vibrating arms vibrate in an in-plane direction. That is, the vibration substrate 31 is not limited to one formed from an AT-cut quartz substrate, and may be formed from a quartz substrate other than an AT-cut quartz substrate, such as an X-cut quartz substrate, a Y-cut quartz substrate, a Z-cut quartz substrate, a BT-cut quartz substrate, an SC-cut quartz substrate, or an ST-cut quartz substrate. In this embodiment, the vibration substrate 31 is made of quartz, but is not limited thereto. For example, the vibration substrate 31 may be made of a piezoelectric single crystal such as lithium niobate, lithium tantalate, lithium tetraborate, langasite, potassium niobate, or gallium phosphate, or may be made of other piezoelectric single crystals. Furthermore, the vibration element 3 is not limited to a piezoelectrically driven vibration element, and may be an electrostatically driven vibration element using electrostatic force.

[0043] 5, the vibration element 3 is joined to internal terminals 821a and 822a by conductive joining members B1 and B2. The joining member B1 electrically connects the internal terminal 821a to the terminal 323, and the joining member B2 electrically connects the internal terminal 822a to the terminal 324. This electrically connects the vibration element 3 and the semiconductor circuit 7 via the joining members B1 and B2 and the wiring 8A and 8B.

[0044] Such bonding members B1 and B2 are microbumps formed by electrolytic plating. By forming the bonding members B1 and B2 by electrolytic plating in this way, it is possible to form minute bonding members B1 and B2. This allows the vibration device 1 to be miniaturized. However, the bonding members B1 and B2 may also be formed by electroless plating. Furthermore, the constituent material of the bonding members B1 and B2 is not particularly limited, but in this embodiment, gold (Au) is used. This results in bonding members B1 and B2 that have excellent conductivity while suppressing deterioration of electrical properties due to oxidation.

[0045] 7, the bonding members B1 and B2 are formed by forming a mask M having openings corresponding to the positions where the bonding members B1 and B2 are to be formed, and then applying a voltage while the semiconductor device 2 is immersed in a plating solution L. Here, as shown in FIG. 8, if the surface roughness of the wiring layers 821b and 822b of the second wirings 821 and 822 is large, the coating layers 821c and 822c may not be formed uniformly on the surfaces, and abnormalities Q, such as thin film thicknesses or through holes, may be formed in the coating layers 821c and 822c. If the abnormalities Q are formed in the coating layers 821c and 822c, when the semiconductor device 2 is immersed in the plating solution L, the wiring layers 821b and 822b will dissolve into the plating solution L through the abnormalities Q, resulting in copper (Cu), the material of the wiring layers 821b and 822b, being mixed into the bonding members B1 and B2. In this way, if copper (Cu) is mixed into the bonding members B1 and B2, the purity of the gold (Au) decreases, thereby reducing the bonding strength between the bonding members B1 and B2 and the vibration element 3, and as a result, reducing the mechanical strength of the vibration device 1. For example, when the wiring layers 821b and 822b are formed by plating, such a problem is likely to occur.

[0046] In contrast, by forming the wiring layers 821b and 822b by sputtering as in this embodiment, the surface roughness of the wiring layers 821b and 822b can be kept sufficiently small, making it difficult for abnormalities Q to form in the coating layers 821c and 822c. This effectively alleviates the above-mentioned problem. In other words, the resonator device 1 of this embodiment prevents copper (Cu) from being mixed into the bonding members B1 and B2, effectively preventing a decrease in the bonding strength between the bonding members B1 and B2 and the resonator element 3. This prevents a decrease in the mechanical strength of the resonator device 1.

[0047] The above has described the configuration of the resonator device 1. In such a resonator device 1, the wirings 8A and 8B that electrically connect the resonator element 3 and the semiconductor circuit 7 are composed of separately formed first wirings 811 and 812 and second wirings 821 and 822. Therefore, the first wirings 811 and 812 can be designed to sufficiently prevent breakage within the through holes 51 and 52, and the second wirings 821 and 822 can be designed to ensure good bonding with the resonator element 3. Therefore, the resonator device 1 can effectively prevent breakage of the wirings 8A and 8B within the through holes 51 and 52 and poor bonding between the resonator element 3 and the wirings 8A and 8B, thereby demonstrating high reliability.

[0048] Next, a description will be given of a manufacturing method of the resonator device 1. As shown in Fig. 9, the manufacturing method of the resonator device 1 includes a preparation step S1 of preparing the semiconductor device 2, a first wiring formation step S2 of forming first wirings 811 and 812 by plating, a second wiring formation step S3 of forming second wirings 821 and 822 by sputtering, a bonding member formation step S4 of forming bonding members B1 and B2 by plating, a resonator element bonding step S5 of bonding the resonator element 3 to the semiconductor device 2 via the bonding members B1 and B2, and a lid bonding step S6 of bonding the lid 4 to the semiconductor device 2.

[0049] ≪Preparation process S1≫ First, as shown in FIG. 10, a semiconductor substrate 5 is prepared, and a semiconductor circuit 7 is formed on the lower surface 5b side. Next, as necessary, the semiconductor substrate 5 is ground and polished from the upper surface 5a side to thin the semiconductor substrate 5 to a predetermined thickness. Next, as shown in FIG. 11, through holes 51 and 52 reaching the electrode pads 721 and 722 are formed in the semiconductor substrate 5. The through holes 51 and 52 can be formed by, for example, RIE (reactive ion etching). Next, an insulating film 60 is formed from the upper surface 5a side of the semiconductor substrate 5 by, for example, sputtering, and unnecessary portions of the insulating film 60 are removed by etching to expose the electrode pads 721 and 722 in the through holes 51 and 52, as shown in FIG.

[0050] ≪First wiring formation step S2≫ Next, an organic resin is applied to the inner circumferential surfaces of the through holes 51 and 52 and the upper surface 5a. The applied organic resin is heated and cured (baked), and then patterned to form second organic resin films 621 and 622, as shown in FIG. 13. When applied, the organic resin drips downward due to its own weight, so the inner circumferential surfaces of the formed second organic resin films 621 and 622 have a tapered shape. Next, an organic resin is applied to the upper surface 5a. The applied organic resin is heated and cured (baked), and then patterned to form third organic resin films 631 and 632, as shown in FIG. 14. However, the third organic resin film 632 is not shown in FIG. 14. The method is not limited to this, and the second organic resin films 621 and 622 may be formed after the third organic resin films 631 and 632 are formed, or they may be formed simultaneously.

[0051] Next, as shown in FIG. 15 , first wirings 811 and 812 are formed on the inner periphery and upper surface 5a of through holes 51 and 52 by electrolytic plating on second organic resin films 621 and 622. By forming thick first wirings 811 and 812, disconnection of first wirings 811 and 812 within through holes 51 and 52 can be effectively prevented. Although not shown, the process of forming first wirings 811 and 812 includes, for example, the steps of forming a seed layer on the surface of semiconductor substrate 5 by sputtering, forming a mask on the seed layer with openings corresponding to first wirings 811 and 812, growing plating within the openings of the mask to form first wirings 811 and 812, and removing the mask and then etching away unnecessary portions of the seed layer. As described above, the tapered inner periphery of second organic resin films 621 and 622 ensures sputtering coverage, enabling the seed layer to be formed with precision.

[0052] ≪Second wiring formation step S3≫ Next, an organic resin is applied onto the first wirings 811, 812, and the applied organic resin is heated and cured (baked), and then patterned to form first organic resin films 611, 612, as shown in Fig. 16. As a result, at least a portion of the through holes 51, 52 is filled.

[0053] 17, second wirings 821, 822 are formed on the upper surface 5a by sputtering from above the first organic resin films 611, 612, and the first wirings 811, 812 are covered with the second wirings 821, 822. This makes it possible to confine outgassing from the first wirings 811, 812 in the through holes 51, 52. Note that, because the through holes 51, 52 are filled with the first organic resin films 611, 612 before this step, sputtering coverage is ensured in this step, and the second wirings 821, 822 can be formed with high precision.

[0054] Although not shown, the process of forming the second wirings 821 and 822 includes the steps of forming an underlayer for the wiring layers 821b and 822b by sputtering and then patterning it, forming the wiring layers for the wiring layers 821b and 822b by sputtering and then patterning it, forming an underlayer for the coating layers 821c and 822c by sputtering and then patterning it, and forming a surface layer for the coating layers 821c and 822c by sputtering and then patterning it.

[0055] <Joint member forming process S4> Next, as shown in FIG. 18, bonding members B1 and B2 are formed on the internal terminals 821a and 822a of the second wirings 821 and 822 by electrolytic plating. However, the bonding member B2 is not shown in FIG. 18. The method for forming the bonding members B1 and B2 is as described above. As described above, the wiring layers 821b and 822b of the second wirings 821 and 822 are formed by sputtering, which allows the surface roughness of the wiring layers 821b and 822b to be sufficiently small. Therefore, abnormalities Q are unlikely to form in the coating layers 821c and 822c on the wiring layers 821b and 822b, effectively preventing the wiring layers 821b and 822b from dissolving in the plating solution L. Therefore, copper (Cu), the material of the second wirings 821 and 822, is unlikely to mix with the bonding members B1 and B2, and the bonding members B1 and B2 can be formed from high-purity gold (Au).

[0056] <Vibration element bonding process S5> 19, the vibration element 3 is pressed against the bonding members B1 and B2 to bond the vibration element 3 to the internal terminals 821a and 822a. At this time, the third organic resin films 631 and 632 formed directly below the internal terminals 821a and 822a function as stress relief layers that relieve stress generated during pressing. Therefore, the stress applied to the semiconductor device 2 during this process can be reduced, and damage to the semiconductor device 2 can be effectively suppressed.

[0057] ≪Lid joining process S6≫ Next, as shown in FIG. 20, the lid 4 is bonded to the upper surface 5a of the semiconductor substrate 5 in a reduced pressure state.

[0058] In this way, the vibration device 1 is obtained. According to this method for manufacturing the vibration device 1, the outgassing generated from the first wirings 811 and 812 can be confined within the through holes 51 and 52 by the second wirings 821 and 822. This makes it possible to suppress environmental changes in the accommodation space S due to the outgassing, particularly an increase in pressure. This stabilizes the vibration characteristics of the vibration element 3, resulting in a vibration device 1 with high reliability.

[0059] The above has described the resonator device 1. As described above, the resonator device 1 includes a semiconductor substrate 5 having an upper surface 5a as a first surface and a lower surface 5b as a second surface that are reverse to each other, with through holes 51 and 52 formed therethrough that penetrate the upper surface 5a and the lower surface 5b, a semiconductor circuit 7 disposed on the lower surface 5b of the semiconductor substrate 5 and including electrode pads 721 and 722 that are conductive layers exposed in the through holes 51 and 52, first wirings 811 and 812 that are plated wirings that are disposed in the through holes 51 and 52 and are electrically connected to the electrode pads 721 and 722, second wirings 821 and 822 that cover the first wirings 811 and 812 and are sputtered wirings that are disposed on the upper surface 5a, a resonator element 3 located on the upper surface 5a and bonded to the second wirings 821 and 822 via bonding members B1 and B2, and a lid 4 bonded to the semiconductor substrate 5 and defining an accommodation space S between the semiconductor substrate 5 and the lid 4 for accommodating the resonator element 3. With this configuration, outgassing generated from the first wirings 811, 812 can be confined within the through holes 51, 52 by the second wirings 821, 822. This makes it possible to suppress environmental changes in the accommodation space S due to outgassing, particularly an increase in pressure. This stabilizes the vibration characteristics of the vibration element 3, resulting in a highly reliable vibration device 1.

[0060] As described above, the second wirings 821 and 822 entirely cover the first wirings 811 and 812. With this configuration, outgassing generated from the first wirings 811 and 812 can be more reliably confined within the through-holes 51 and 52 by the second wirings 821 and 822.

[0061] As described above, the first wirings 811, 812 protrude from the through holes 51, 52 onto the upper surface 5a, and the second wirings 821, 822 contact the first wirings 811, 812 on the upper surface 5a. With this configuration, the first wirings 811, 812 and the second wirings 821, 822 can be easily connected.

[0062] As described above, the resonator device 1 includes the first organic resin films 611 and 612 interposed between the first wirings 811 and 812 and the second wirings 821 and 822 within the through holes 51 and 52. This configuration allows the first organic resin films 611 and 612 to cover the first wirings 811 and 812, thereby suppressing oxidation of the first wirings 811 and 812. This effectively suppresses deterioration of the electrical characteristics of the first wirings 811 and 812, such as an increase in resistance. Furthermore, the first organic resin films 611 and 612 can fill at least a portion of the through holes 51 and 52, thereby improving the airtightness of the accommodation space S. Furthermore, by filling at least a portion of the through holes 51 and 52 with the first organic resin films 611 and 612, sputtering coverage can be ensured when forming the second wirings 821 and 822. This allows the second wirings 821 and 822 to be formed with high precision.

[0063] As described above, the first organic resin films 611, 612 extend onto the upper surface 5a. With this configuration, a wider range of the first wirings 811, 812 is covered with the first organic resin films 611, 612, and deterioration of the electrical characteristics of the first wirings 811, 812 due to oxidation can be more effectively suppressed.

[0064] As described above, the resonator device 1 has the second organic resin films 621, 622 interposed between the inner circumferential surfaces of the through holes 51, 52 and the first wirings 811, 812. With this configuration, the first wirings 811, 812 and the semiconductor substrate 5 can be more reliably insulated from each other.

[0065] As described above, the second organic resin films 621, 622 protrude onto the upper surface 5a. With this configuration, the boundary portions 5c between the through holes 51, 52 and the upper surface 5a are covered with the second organic resin films 621, 622 and are rounded. Therefore, damage, breakage, etc. of the first wirings 811, 812 at the boundary portions 5c can be effectively suppressed.

[0066] As described above, the resonator device 1 has the third organic resin films 631, 632 interposed between the upper surface 5a and the second wirings 821, 822, and the resonator element 3 is bonded to the second wirings 821, 822 via bonding members B1, B2 at portions overlapping with the third organic resin films 631, 632. With this configuration, stress generated when bonding the resonator element 3 is alleviated by the third organic resin films 631, 632, and is less likely to be applied to the semiconductor device 2. Therefore, damage to the semiconductor device 2 can be effectively suppressed.

[0067] As described above, the semiconductor circuit 7 has the oscillation circuit 70 that oscillates the vibration element 3. With this configuration, the vibration device 1 becomes an oscillator, which is expected to be highly versatile and in demand.

[0068] As described above, the method for manufacturing the resonator device 1 includes a preparation step S1 of preparing a semiconductor device 2 having a semiconductor substrate 5 with an upper surface 5a as a first surface and a lower surface 5b as a second surface that are reverse to each other and in which through holes 51, 52 are formed penetrating the upper surface 5a and the lower surface 5b, and a semiconductor circuit 7 that is disposed on the lower surface 5b side of the semiconductor substrate 5 and has electrode pads 721, 722 that are conductive layers exposed in the through holes 51, 52; 22, a second wiring formation process S3, a vibration element bonding process S5, a vibration element bonding process S6, a lid bonding process S7, a semiconductor device 2, a semiconductor device 3, and a semiconductor device 4. The semiconductor device 2 includes a first wiring formation process S2, a first wiring 811, 812 electrically connected to the first wiring 811, 812; a second wiring formation process S3, a second wiring 821, 822, a first wiring 811, 812 electrically connected to the first wiring 811, 812; a second wiring 821, 822, ...

[0069] Second Embodiment Fig. 21 is a cross-sectional view showing a resonation device according to a second embodiment, Fig. 22 and Fig. 23 are enlarged cross-sectional views of a through-hole formed in a semiconductor substrate.

[0070] The resonator device 1 according to this embodiment is similar to the resonator device 1 according to the first embodiment, except for the configuration of the semiconductor device 2. In the following description, the resonator device 1 according to this embodiment will be described focusing on the differences from the first embodiment, and a description of similar points will be omitted. In addition, in the drawings of this embodiment, the same reference numerals are used to designate the same components as those in the above-described embodiment.

[0071] 21 to 23 , in the semiconductor device 2 of this embodiment, the first organic resin films 611, 612 are omitted from the semiconductor device 2 of the first embodiment described above, and to compensate for this, first wirings 811, 812 are filled in the through holes 51, 52. This makes it possible to effectively prevent breakage of the first wirings 811, 812 in the through holes 51, 52.

[0072] Furthermore, within the through holes 51, 52, the first wirings 811, 812 are thicker at the center than at the edges of the through holes 51, 52. Furthermore, the film thickness of the first wirings 811, 812 at the center of the through holes 51, 52 is thinner than the depth of the through holes 51, 52. Therefore, recesses 811a, 812a that are recessed into the through holes 51, 52 are formed on the upper surfaces of the first wirings 811, 812. The recesses 811a, 812a are shallower than the through holes 51, 52 and have a gentler slope. Therefore, it is possible to ensure sputtering coverage when forming the second wirings 821, 822, and the second wirings 821, 822 can be formed with high precision. Since the first wirings 811 and 812 have recesses 811a and 812a, the film thickness at the recesses 811a and 812a is thinner than that at the periphery at the center of the first wirings 811 and 812. The film thickness at the center is thicker than that at the edge of the through holes 51 and 52 located outside.

[0073] As described above, in the resonation device 1 of this embodiment, the first wirings 811, 812 are thicker at the center than at the edges of the through holes 51, 52. This configuration effectively prevents breakage of the first wirings 811, 812 inside the through holes 51, 52. Furthermore, sputtering coverage can be ensured when forming the second wirings 821, 822, allowing the second wirings 821, 822 to be formed with high precision.

[0074] The second embodiment can also achieve the same effects as the first embodiment described above.

[0075] Although the vibration device and the method for manufacturing the vibration device of the present invention have been described above based on the illustrated embodiments, the present invention is not limited thereto, and the configurations and steps of each part can be replaced with any configurations and steps having similar functions. Furthermore, any other configurations and steps may be added to the present invention. Furthermore, the present invention may be a combination of two or more embodiments.

[0076] In the above-described embodiment, an example in which the vibration device 1 is applied to an oscillator has been described, but the application of the vibration device 1 is not particularly limited, and the vibration device 1 can be applied to, for example, an inertial sensor such as an acceleration sensor, an angular velocity sensor, etc. Furthermore, the vibration device 1 can be applied to any other equipment. [Explanation of symbols]

[0077] 1... vibrating device, 2... semiconductor device, 3... vibrating element, 31... vibrating substrate, 321... excitation electrode, 322... excitation electrode, 323... terminal, 324... terminal, 325... wiring, 326... wiring, 4... lid, 40... bonding member, 41... recess, 5... semiconductor substrate, 5a... upper surface, 5b... lower surface, 5c... boundary portion, 51... through hole, 52... through hole, 60... insulating film, 611... first organic resin film, 611a... recess, 612... first organic resin film, 612a... recess, 621... second organic resin film, 622... second organic resin film, 631... third organic resin film, 632... third organic resin film, 7... semiconductor circuit, 70... oscillation circuit, 700... element, 71... laminate, 72... wiring layer, 721... electrode pad, 7 22...electrode pad, 73...insulating layer, 74...passivation film, 75...terminal layer, 751...external terminal, 8A...wiring, 8B...wiring, 811...first wiring, 811a...recess, 812...first wiring, 812a...recess, 821...second wiring, 821a...internal terminal, 821b...wiring layer, 821c...covering layer, 822...second wiring, 822a...internal terminal, 822b...wiring layer, 822c...covering layer, B1...bonding member, B2...bonding member, L...plating solution, M...mask, P...package, Q...abnormal portion, S...accommodation space, S1...preparation step, S2...first wiring formation step, S3...second wiring formation step, S4...bonding member formation step, S5...vibration element bonding step, S6...lid body bonding step

Claims

1. a semiconductor substrate having a first surface and a second surface that are opposite surfaces to each other, and having a through hole formed therein that penetrates the first surface and the second surface; a semiconductor circuit disposed on the second surface side of the semiconductor substrate and including a conductive layer exposed in the through hole; a first wiring that is a plated wiring disposed in the through hole and electrically connected to the conductive layer; a second wiring that is a sputtering wiring that covers the first wiring and is disposed on the first surface; a vibration element located on the first surface side and joined to the second wiring via a joining member; a lid body bonded to the semiconductor substrate and forming an accommodation space between the lid body and the semiconductor substrate for accommodating the vibration element,

2. The resonation device according to claim 1 , wherein the second wiring entirely covers the first wiring.

3. the first wiring extends from the through hole onto the first surface; The resonation device according to claim 1 , wherein the second wiring is in contact with the first wiring on the first surface.

4. The resonator device according to claim 1 , further comprising a first organic resin film interposed between the first wiring and the second wiring within the through hole.

5. The resonation device according to claim 4 , wherein the first organic resin film protrudes onto the first surface.

6. The resonator device according to claim 3 , further comprising a second organic resin film interposed between an inner circumferential surface of the through hole and the first wiring.

7. The resonation device according to claim 6 , wherein the second organic resin film protrudes onto the first surface.

8. a third organic resin film interposed between the first surface and the second wiring; The resonator device according to claim 1 , wherein the resonator element is bonded to the second wiring via the bonding member in a portion overlapping with the third organic resin film.

9. The resonation device according to claim 1 , wherein the first wiring has a thickness greater at a center portion of the through hole than at an edge portion of the through hole.

10. The vibrating device according to claim 1 , wherein the semiconductor circuit includes an oscillation circuit that causes the vibrating element to oscillate.

11. a preparation step of preparing a semiconductor device including: a semiconductor substrate having a first surface and a second surface that are opposite surfaces to each other, with a through hole formed therethrough that penetrates the first surface and the second surface; and a semiconductor circuit disposed on the second surface side of the semiconductor substrate, with a conductive layer exposed in the through hole; a first wiring forming step of forming a first wiring in the through hole by plating, the first wiring being electrically connected to the conductive layer; a second wiring forming step of forming a second wiring by sputtering, the second wiring covering the first wiring and being disposed on the first surface; a vibration element bonding step of bonding a vibration element to the second wiring via a bonding member; A method for manufacturing a vibration device, comprising: a lid bonding process for bonding a lid to the semiconductor device and forming an accommodation space for accommodating the vibration element between the semiconductor device and the lid.

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