Radiation imaging apparatus, radiation imaging system, and control method of radiation imaging apparatus

Abstract

To reduce noise of a radiation image with a high degree of precision.SOLUTION: A radiation imaging apparatus alternately performs a first reading operation for reading a first offset signal based on electric charge accumulated in a first pixel over a first time length, and a second reading operation for reading a second offset signal based on electric charge accumulated in the first pixel over a second time length shorter than the first time length while imaging is prepared. After the preparation of imaging is ended, the radiation imaging apparatus alternately performs a third reading operation for reading a radiation signal based on electric charge accumulated in the first pixel over a third time length including a period when a radioactive ray is emitted, and a fourth reading operation for reading a third offset signal based on electric charge accumulated in the first pixel over a fourth time length shorter than the third time length, not including a period when a radioactive ray is emitted. The radiation imaging apparatus subjects offset noise signals included in the second offset signal and the third offset signal to offset correction.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The disclosed technology relates to a radiation imaging apparatus, a radiation imaging system, and a method for controlling a radiation imaging apparatus. [Background technology]

[0002] Radiation imaging devices have been put to practical use as imaging devices used in medical image diagnosis and non-destructive testing. Radiation images generated by radiation imaging devices contain noise due to dark current flowing in photodiodes, residual images caused by previous radiation exposure, etc. To reduce such noise, radiation images are corrected using offset images acquired when the radiation imaging device is not irradiated with radiation.

[0003] Patent Document 1 describes a technology for correcting a radiographic image using primary offset data and reference secondary offset data acquired before the start of imaging, and immediately preceding secondary offset data acquired after the start of imaging, in order to achieve high frame rate and low image lag. The immediately preceding secondary offset data is acquired with a shorter exposure time than the radiographic image. The primary offset data is acquired with the same exposure time as the radiographic image. The reference secondary offset data is acquired with the same exposure time as the immediately preceding secondary offset data. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-168602 Summary of the Invention [Problem to be solved by the invention]

[0005] In the technology described in Patent Document 1, the temporal relationship between the acquisition of primary offset data and the acquisition of reference secondary offset data differs from the temporal relationship between the acquisition of radiographic images and the acquisition of immediately preceding secondary offset data. Therefore, it is difficult to accurately reduce noise in radiographic images. An object of some aspects of the present invention is to provide a technology for accurately reducing noise in radiographic images. [Means for solving the problem]

[0006] A radiation imaging apparatus according to one aspect of the disclosed technology is a radiation imaging apparatus, a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges; a drive circuit that supplies a drive signal to the plurality of pixels to select one of the plurality of pixels; a readout circuit that reads out a signal based on the charge accumulated in the pixel selected by the drive signal; a control circuit for controlling the readout circuit and the drive circuit; an image generating circuit for generating a radiation image; The control circuit controls at least a first pixel of the plurality of pixels to: While preparing for the shoot, a first read operation that reads out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second readout operation for reading out a second offset signal based on the charge accumulated in the first pixel for a second time length shorter than the first time length; After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and controlling the readout circuit and the drive circuit to alternately execute the steps of: the image generating circuit performs offset correction on an offset noise signal included in the second offset signal and the third offset signal; The radiation image is generated based on correcting the radiation signal using the first offset signal and the offset-corrected second and third offset signals. [Effects of the Invention]

[0007] According to the disclosed technology, noise in radiographic images can be reduced with high accuracy. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram illustrating an example of the configuration of a radiation imaging system according to some embodiments. [Figure 2] FIG. 2 is an equivalent circuit diagram illustrating an example of the configuration of a radiation detection panel according to some embodiments. [Figure 3] 3A and 3B are schematic diagrams illustrating examples of pixel structures according to some embodiments. [Figure 4] 1A and 1B are diagrams illustrating an example of the operation of a radiation imaging system according to some embodiments. [Figure 5] 1A and 1B are diagrams illustrating an example of the operation of a radiation imaging system according to some embodiments. [Figure 6] 1A and 1B are diagrams illustrating an example of the operation of a radiation imaging system according to some embodiments. [Figure 7] 1A and 1B are diagrams illustrating an example of the operation of a radiation imaging system according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0010] 1 shows an example configuration of a radiation imaging system 100 according to some embodiments. The radiation imaging system 100 is configured to generate an electrical radiation image by electrically capturing an optical image formed by radiation. The radiation is typically X-rays, but may also be alpha rays, beta rays, gamma rays, etc. The radiation imaging system 100 includes, for example, a radiation imaging device 110, a computer 120, a display 114, an exposure control device 130, and a radiation generation device 140.

[0011] The radiation generating device 140 starts emitting radiation 160 in accordance with an exposure command (radiation command) from the exposure control device 130. The radiation 160 irradiated from the radiation generating device 140 passes through the subject 150 and enters the radiation imaging device 110. The radiation generating device 140 also stops emitting radiation 160 in accordance with a stop command from the exposure control device 130.

[0012] The radiation imaging device 110 includes a radiation detection panel 111, a control circuit 112, and an image generation circuit 113. The radiation detection panel 111 generates a radiation image according to radiation 160 incident on the radiation imaging device 110 and transmits the generated radiation image to the computer 120. The control circuit 112 controls the operation of the radiation detection panel 111. For example, the control circuit 112 generates a stop signal for stopping the radiation generation device 140 from emitting radiation 160 based on an image signal obtained from the radiation detection panel 111. The stop signal is supplied to the exposure control device 130. In response to the stop signal, the exposure control device 130 sends a stop command to the radiation generation device 140.

[0013] The control circuit 112 may be configured with a dedicated circuit, for example, a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). Alternatively, the control circuit 112 may be configured with a combination of a general-purpose processing circuit such as a processor and a storage circuit such as a memory. In this case, the general-purpose processing circuit may execute a program stored in the storage circuit to realize the functions of the control circuit 112. The control circuit 112 controls the accumulation of charges in the image sensor of the radiation detection panel 111 and the timing of reading out signals based on the charges accumulated in the image sensor.

[0014] The image generation circuit 113 stores the signal supplied from the radiation detection panel 111 in the memory 170 and generates a radiographic image based on this signal. The method of generating a radiographic image will be described in detail later. The image generation circuit 113 transmits the generated radiographic image to the computer 120.

[0015] The computer 120 includes a control unit that controls the radiation imaging device 110 and the exposure control device 130, a receiving unit that receives radiation images from the radiation imaging device 110, and a signal processing unit that processes radiation images obtained by the radiation imaging device 110. Like the control circuit 112, the control unit, receiving unit, and signal processing unit may each be configured with a dedicated circuit or a combination of a general-purpose processing circuit and a memory circuit. In one example, the exposure control device 130 includes an exposure switch, and when the user turns on the exposure switch, the exposure control device 130 sends an exposure command to the radiation generation device 140 and sends a start notification indicating the start of radiation irradiation to the computer 120. In response to the start notification, the computer 120 notifies the control circuit 112 of the radiation imaging device 110 of the start of radiation irradiation. When the exposure control device 130 and the computer 120 are not synchronously connected, the radiation detection panel 111 may detect the start of irradiation of radiation 160 based on pixel signals.

[0016] FIG. 2 shows an example configuration of a radiation detection panel 111. The radiation detection panel 111 includes, for example, a pixel array 200 in which a plurality of pixels P are arranged in a matrix, a drive circuit 210, a readout circuit 220, a buffer circuit 230, and an analog-to-digital (AD) converter 240. The drive circuit 210 and the readout circuit 220 function as peripheral circuits of the pixel array 200. The pixel array 200 includes, for example, a plurality of pixels P, a plurality of drive lines Vg1 to Vgm, a plurality of signal lines Sig1 to Sign, and a bias line Bs. The drive lines Vg1 to Vgm and the signal lines Sig1 to Sign are collectively referred to as drive lines Vg and signal lines Sig, respectively. The plurality of pixels P are arranged to form a plurality of pixel rows and a plurality of pixel columns. A pixel row refers to a group of a plurality of pixels lined up horizontally in FIG. 2. A pixel column refers to a group of a plurality of pixels lined up vertically in FIG. 2. In one example, the radiation detection panel 111 has a dimension of 17 inches, and the pixel array 200 has approximately 3000 pixel rows and approximately 3000 pixel columns.

[0017] The pixel rows of the pixel array 200 are referred to as the first row to the mth row (m is an integer equal to or greater than 1) from the top of the drawing, and the pixel columns of the pixel array 200 are referred to as the first column to the nth column (n is an integer equal to or greater than 1) from the left of the drawing. Each pixel P is composed of a combination of one conversion element C and one switch element S. The pixel P located in the i-th row and j-th column of the pixel array 200 is referred to as pixel P(i,j). The conversion element C and switch element S included in pixel P(i,j) are referred to as conversion element C(i,j) and switch element S(i,j), respectively. For example, pixel P(1,2) represents the pixel P located in the first row and second column.

[0018] The conversion element C generates and accumulates electric charges in response to radiation incident on the pixel P. The conversion element C can accumulate not only electric charges in response to radiation, but also electric charges generated by dark current. The generation and accumulation of electric charges by the conversion element C of the pixel P is referred to as the pixel P generating and accumulating electric charges.

[0019] The switch element S is connected between the conversion element C and the signal line Sig corresponding to the conversion element C. For example, the switch elements S(1,1) to S(m,1) are connected between the plurality of conversion elements C(1,1) to C(m,1) and the signal line Sig1, respectively. When the switch element S is turned on, the conversion element C and the signal line Sig are brought into a conductive state, and the charge obtained in the conversion element C (e.g., the charge accumulated in the conversion element C) is transferred to the signal line Sig. The conversion element C may be, for example, an MIS-type photodiode arranged on an insulating substrate such as a glass substrate and made primarily of amorphous silicon. Alternatively, the conversion element C may be a PIN-type photodiode. The conversion element C may be configured as a direct type that directly converts radiation into charge, or as an indirect type that converts radiation into light and then detects the light. In the indirect type, the scintillator may be shared by multiple pixels P.

[0020] The switch element S is composed of a transistor such as a thin film transistor (TFT) having a control terminal (gate) and two main terminals (source and drain). The conversion element C has two main electrodes. One main electrode of the conversion element C is connected to one of the two main terminals of the switch element S, and the other main electrode of the conversion element is connected to a bias power supply Vs via a common bias line Bs. The bias power supply Vs generates a bias voltage.

[0021] The control terminals of the switch elements S of the pixels P in the first row are connected to the drive line Vg1. The control terminals of the switch elements S of the pixels P in the second row are connected to the drive line Vg2. The same applies to the third to mth rows.

[0022] The drive circuit 210 supplies a drive signal to the control terminal of the switch element S of each pixel P through the drive line Vg in accordance with the drive signal supplied from the control circuit 112. The drive signal includes an ON signal (high-level voltage in the following description) for turning on the switch element S, and an OFF signal (low-level voltage in the following description) for turning off the switch element S. The drive circuit 210 includes, for example, a shift register, and this shift register performs a shift operation in accordance with the control signal (for example, a clock signal) supplied from the control circuit 112.

[0023] Supplying an on signal (i.e., a high-level drive signal) to a pixel P is referred to as selecting the pixel P. In other words, the drive signal is a signal for selecting one of the multiple pixels P. The same drive signal is supplied to multiple pixels included in the same pixel row. Selecting multiple pixels included in one pixel row is referred to as selecting that pixel row.

[0024] The readout circuit 220 amplifies and reads out the signal that appears on the signal line Sig by selecting the pixel P. This signal is based on the charge accumulated in the conversion element C. Reading out the signal based on the charge accumulated in the conversion element C of the pixel P is referred to as reading out the signal based on the charge accumulated in the pixel P.

[0025] The readout circuit 220 includes one amplifier circuit 221 for each signal line Sig. In the example of FIG. 2, since the pixel array 200 has n signal lines Sig, the readout circuit 220 includes n amplifier circuits 221. The amplifier circuit 221 includes, for example, an integrating amplifier 222, a variable amplifier 223, a switch element 224, a capacitor 225, and a buffer circuit 226. The switch element 224 and the capacitor 225 form a sample-and-hold circuit. The integrating amplifier 222 includes, for example, an operational amplifier, an integrating capacitor, and a reset switch connected in parallel between the inverting input terminal and output terminal of the operational amplifier. A reference voltage is supplied to the non-inverting input terminal of the operational amplifier from a reference power supply Vref. When the reset switch is turned on in response to a control signal RC (reset pulse) supplied from the control circuit 112, the integrating capacitor is reset and the potential of the signal line Sig is reset to the reference potential. The variable amplifier 223 amplifies the signal from the integrating amplifier 222 by a set amplification factor. The sample and hold circuit samples and holds the signal from the variable amplifier 223. The on / off of a switch element 224 that constitutes the sample and hold circuit is controlled by a control signal SH supplied from the control circuit 112. The buffer circuit 226 buffers (converts impedance) the signal from the sample and hold circuit and outputs it.

[0026] The readout circuit 220 also includes a multiplexer 227 that selects and outputs signals from the plurality of amplifier circuits 221 in a predetermined order. The multiplexer 227 includes, for example, a shift register, and this shift register performs a shift operation in accordance with a control signal (for example, a clock signal) supplied from the control circuit 112. By this shift operation, one signal from the plurality of amplifier circuits 221 is selected.

[0027] The buffer circuit 230 buffers (converts impedance) the signal output from the multiplexer 227. The AD converter 240 converts into a digital signal the analog signal output from the buffer circuit 230. The output of the AD converter 240, i.e., the pixel signal, is sent to the computer 120.

[0028] FIG. 3 shows a schematic cross-sectional view of a pixel P. The pixel P is formed on an insulating substrate 301, such as a glass substrate. The pixel P includes a conductive layer 302, an insulating layer 303, a semiconductor layer 304, an impurity semiconductor layer 305, and a conductive layer 306 on the insulating substrate 301. The conductive layer 302 constitutes the gate of a transistor (e.g., a TFT) that constitutes the switch element S. The insulating layer 303 is disposed to cover the conductive layer 302. The semiconductor layer 304 is disposed on a portion of the conductive layer 302 that constitutes the gate, with the insulating layer 303 interposed therebetween. The impurity semiconductor layer 305 is disposed on the semiconductor layer 304 to constitute two main terminals (source and drain) of the transistor that constitutes the switch element S. The conductive layer 306 constitutes a wiring pattern connected to the two main terminals (source and drain) of the transistor that constitutes the switch element S. A portion of the conductive layer 306 constitutes a signal line Sig, and another portion constitutes a wiring pattern for connecting the switch element S to the conversion element C.

[0029] The pixel P further includes an interlayer insulating film 307 that covers the insulating layer 303 and the conductive layer 306. The interlayer insulating film 307 is provided with a contact plug 308 for connection to the conductive layer 306 (switch element S). The pixel P further includes, on the interlayer insulating film 307, a conductive layer 309, an insulating layer 310, a semiconductor layer 311, an impurity semiconductor layer 312, a conductive layer 313, a protective layer 314, an adhesive layer 315, and a scintillator 316, in this order. These layers form an indirect-type conversion element C. The conductive layer 309 and the conductive layer 313 respectively form a lower electrode and an upper electrode of a photoelectric conversion element that constitutes the conversion element C. The conductive layer 313 is made of, for example, a transparent material. The conductive layer 309, the insulating layer 310, the semiconductor layer 311, the impurity semiconductor layer 312, and the conductive layer 313 form an MIS-type sensor as a photoelectric conversion element. The impurity semiconductor layer 312 is formed of, for example, an n-type impurity semiconductor layer. The scintillator 316 is made of, for example, a gadolinium-based material or a CsI (cesium iodide) material, and converts radiation into light.

[0030] Alternatively to the above example, the conversion element C may be configured as a direct-type conversion element that directly converts incident radiation into electric charges. Examples of direct-type conversion elements C include conversion elements whose main material is amorphous selenium, gallium arsenide, gallium phosphide, lead iodide, mercury iodide, CdTe, CdZnTe, etc. The conversion element C is not limited to the MIS type, and may be, for example, a pn-type or PIN-type photodiode.

[0031] 3, when orthogonally projected (seen in a plan view) onto the surface of the insulating substrate 301 on which the pixel array 200 is formed, each of the multiple signal lines Sig overlaps a portion of the conversion element C. This configuration is advantageous in that the area of the conversion element C of each pixel P can be increased.

[0032] An example of the operation of the radiation imaging system 100 will be described with reference to FIG. 4. The upper part of FIG. 4 shows a timing chart, and the lower part of FIG. 4 shows a signal processing flow. The same applies to FIGS. 5 to 7, which will be described later. The operation shown in FIG. 4 is started, for example, by an instruction from a user of the radiation imaging system 100. The operation of the radiation imaging system 100 is controlled by the computer 120. The operation of the radiation imaging apparatus 110 is executed by the control circuit 112 under the control of the computer 120. Specifically, the control circuit 112 executes the operation of FIG. 4 by controlling the drive circuit 210 and the readout circuit 220. In the following description, the execution of a specific operation by the control circuit 112 controlling the drive circuit 210 or the readout circuit 220 may be simply expressed as the control circuit 112 executing the specific operation.

[0033] 4 indicates whether the radiation imaging device 110 is irradiated with radiation 160. A low level indicates that the radiation 160 is not being irradiated, and a high level indicates that the radiation 160 is being irradiated.

[0034] "Vg1" to "Vg8" in the timing chart of Fig. 4 indicate the levels of the drive signals supplied to the drive lines Vg1 to Vg8 from the drive circuit 210. In the example of Fig. 4, the pixel array 200 includes eight pixel rows, but the number of pixel rows is not limited to this.

[0035] The "period" in the timing chart of Fig. 4 indicates a period (length of time) during which a specific operation is performed. Imaging by the radiation imaging device 110 includes an accumulation period ("A" in Fig. 4) during which an accumulation operation is performed, and a readout period ("R" in Fig. 4) during which a readout operation is performed. During the accumulation period, the control circuit 112 does not select any of the multiple pixels P included in the pixel array 200. Specifically, the drive circuit 210 maintains a state in which an off signal is supplied to each of the drive lines Vg1 to Vg8. As a result, the charge generated in each conversion element C is accumulated in the conversion element C, and at the same time, charge corresponding to the dark current flowing through each conversion element C is also accumulated.

[0036] During the readout period, the control circuit 112 selects each of the multiple pixels P included in the pixel array 200 and reads out a signal from the selected pixel P. Specifically, the drive circuit 210 supplies an ON signal to the drive lines Vg1 to Vg8 one by one in sequence. First, the drive circuit 210 supplies an ON signal only to the drive line Vg1. This turns on the switch element S(1,j) (j=1,...,n), establishing a conductive state between the conversion element C(1,j) and the signal line Sigj, so that the charge accumulated in the conversion element C(1,j) is read out to the signal line Sigj. Next, the drive circuit 210 supplies an ON signal only to the drive line Vg2. This turns on the switch element S(2,j), establishing a conductive state between the conversion element C(2,j) and the signal line Sigj, so that the charge accumulated in the conversion element C(2,j) is read out to the signal line Sigj. The drive circuit 210 repeats this operation up to the drive line Vg8, and the charge based on the charge accumulated in the conversion element C is read out through the signal line Sigj by the readout circuit 220. In the following description, performing a readout operation on a plurality of pixels P means performing a readout operation on each of the plurality of pixels P.

[0037] The operations performed by the radiation imaging device 110 include operations performed during preparation for imaging and operations performed after preparation for imaging is completed. The period after preparation for imaging is completed may include a period during which a radiation image is captured, and may also include a period during which a moving image is captured. The period during which a radiation image is captured may be referred to as an imaging period. As will be described later, radiation 160 does not need to be constantly irradiated onto the radiation imaging device 110 during the imaging period, and radiation 160 may be intermittently irradiated.

[0038] During preparation for imaging, the radiation imaging device 110 is not irradiated with radiation 160. Preparation for imaging may be completed when a predetermined condition is satisfied. The predetermined condition may be, for example, generation of a predetermined number of offset images, which will be described later. In response to completion of preparation for imaging, the radiation imaging device 110 may notify the computer 120 that radiation irradiation is possible.

[0039] After preparation for imaging is completed, radiation 160 is irradiated to the radiation imaging device 110, and a radiation image corresponding to the radiation 160 is generated. As shown in Fig. 4, the radiation 160 may be irradiated to the radiation imaging device 110 as a plurality of pulses. The radiation imaging device 110 may generate a radiation image for each pulse. When the radiation imaging device 110 performs moving image imaging, the radiation image for each pulse may form a frame of the moving image.

[0040] During preparation for imaging, the control circuit 112 alternately performs accumulation operations and readout operations in a state where radiation is not being irradiated. As shown in FIG. 4, an accumulation operation is performed during an accumulation period 411, and signals based on charges accumulated in a plurality of pixels P are read out during the subsequent readout period 412. Similarly, for accumulation periods 413 to 418, the control circuit 112 reads out signals based on charges accumulated during at least the accumulation period during the subsequent readout period. The signals read out from the pixels P during preparation for imaging are used to generate an offset image.

[0041] In a readout period 412, a signal based on the charge accumulated over the time length 401 is read out from the pixel P. The time length 401 is the length of time from the end of the previous readout operation of the pixel P (i.e., from the time the drive signal changes to low level) to the end of the current readout operation of the pixel P (i.e., from the time the drive signal changes to low level again). The same is true for the other time lengths during which charge is accumulated. The time length 401 includes an accumulation period 411. In a readout period 414, a signal based on the charge accumulated over the time length 402 is read out from the pixel P. The time length 402 includes an accumulation period 413.

[0042] 4, the accumulation period 413 is shorter than the accumulation period 411. As a result, the time length 402 is shorter than the time length 401. Therefore, the signal read out from the pixel P during the readout period 412 is referred to as a long-time offset signal (first offset signal), and the signal read out from the pixel P during the readout period 414 is referred to as a short-time offset signal (second offset signal).

[0043] The image generation circuit 113 generates a long-term offset image S based on a long-term offset signal (first offset signal) read out from each of the multiple pixels P included in the pixel array 200. The long-term offset image S is expressed as a matrix with m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix. The image generation circuit 113 generates a short-term offset image T based on a short-term offset signal (second offset signal) read out from each of the multiple pixels P included in the pixel array 200. The short-term offset image T is expressed as a matrix with m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix.

[0044] The control circuit 112 repeatedly executes the operations from the accumulation period 411 to the readout period 414. That is, the same operations as those from the accumulation period 411 to the readout period 414 are also executed from the accumulation period 415 to the readout period 418. In this way, the control circuit 112 alternately executes a readout operation for reading out a long-time offset signal and a readout operation for reading out a short-time offset signal during preparation for imaging.

[0045] After preparation for imaging is completed, the control circuit 112 starts capturing moving images (i.e., capturing a plurality of radiographic images). Specifically, the control circuit 112 alternately executes accumulation operations and readout operations. As shown in FIG. 4, the control circuit 112 executes an accumulation operation during an accumulation period 421, and then reads out signals based on the charges accumulated in a plurality of pixels P during a subsequent readout period 422. Similarly, for accumulation periods 423 to 428, the control circuit 112 reads out signals based on the charges accumulated during at least the accumulation period during the subsequent readout period. The signals read out from the pixels P after preparation for imaging is completed are used to generate a radiographic image and an offset image.

[0046] In a readout period 422, a signal based on the charge accumulated over the time length 403 is read out from the pixel P. The time length 403 includes the accumulation period 421. The accumulation period 421 includes a period during which the radiation imaging device 110 is irradiated with radiation 160. Therefore, the time length 403 includes a period during which the radiation imaging device 110 is irradiated with radiation 160. The time length 403 may be equal to the time length 401. In a readout period 424, a signal based on the charge accumulated over the time length 404 is read out from the pixel P. The time length 404 includes the accumulation period 423. The time length 404 does not include a period during which the radiation imaging device 110 is irradiated with radiation 160. The time length 404 may be equal to the time length 402.

[0047] 4, the accumulation period 423 is shorter than the accumulation period 421. As a result, the time length 404 is shorter than the time length 403. A signal read out from the pixel P during the readout period 422 is referred to as a radiation signal, and a signal read out from the pixel P during the readout period 424 is referred to as an imaging offset signal. The radiation signal includes a component corresponding to the radiation 160 irradiated to the radiation imaging device 110 during the accumulation period 421. By making the accumulation period 423 shorter than the accumulation period 421, the frame rate of the moving images generated by the radiation imaging device 110 can be improved.

[0048] The image generation circuit 113 generates a radiographic image X based on radiation signals read out from each of the plurality of pixels P included in the pixel array 200. The radiographic image X is expressed as a matrix of m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix. The image generation circuit 113 generates an imaging offset image U based on imaging offset signals (third offset signals) read out from each of the plurality of pixels P included in the pixel array 200. The imaging offset image U is expressed as a matrix of m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix.

[0049] The control circuit 112 repeatedly executes the operations from the accumulation period 421 to the readout period 424. That is, the same operations as those from the accumulation period 421 to the readout period 424 are executed from the accumulation period 425 to the readout period 428. In this way, after preparation for imaging is completed (for example, during imaging of a moving image), the control circuit 112 alternately executes a readout operation for reading out radiation signals and a readout operation for reading out imaging offset signals.

[0050] Next, a method will be described in which the image generating circuit 113 corrects the radiation image X using the long-term offset image S, the short-term offset image T, and the imaging offset image U. As described above, the long-term offset image S, the short-term offset image T, the imaging offset image U, and the radiation image X are each given by a long-term offset signal, a short-term offset signal, an imaging offset signal, and a radiation signal, respectively. In the following method, the radiation signal is corrected using the long-term offset signal, the short-term offset signal, and the imaging offset signal.

[0051] As described above, the control circuit 112 alternately generates a long-term offset image S and a short-term offset image T during preparation for imaging. This generates multiple long-term offset images S and multiple short-term offset images T. The image generation circuit 113 averages multiple long-term offset images S during preparation for imaging to generate a single long-term offset image S and stores the image in the memory 170 of the image generation circuit 113 for subsequent processing. Similarly, the image generation circuit 113 averages multiple short-term offset images T during preparation for imaging to generate a single short-term offset image T and stores the image in the memory 170 of the image generation circuit 113 for subsequent processing. Averaging multiple offset images in this manner can reduce noise contained in the offset images. The number of offset images used for averaging may be two, as shown in FIG. 4, or may be three or more. The number of offset images used for averaging may be set in advance.

[0052] After preparation for imaging is completed, the image generation circuit 113 generates a radiation image X and an imaging offset image U and stores them in the memory 170 of the image generation circuit 113. The image generation circuit 113 reads out the long-time offset image S from the memory 170 and generates a radiation afterimage image ("XS" in FIG. 4) by subtracting the long-time offset image S from the radiation image X. The image generation circuit 113 also reads out the short-time offset image T from the memory 170 and generates an offset afterimage image ("UT" in FIG. 4) by subtracting the short-time offset image T from the imaging offset image U.

[0053] The residual image components contained in each of the radiation residual image (XS) and the offset residual image (UT) are proportional to the length of time during which charge is accumulated in the pixel P. Therefore, the image generation circuit 113 performs offset correction before multiplying each element of the offset residual image (UT) by a coefficient k equal to the ratio of the time length 403 to the time length 404 (i.e., the value obtained by dividing the time length 403 by the time length 404).

[0054] The image generation circuit 113 performs offset correction on the offset noise signal contained in the short-term offset signal (second offset signal) and the imaging offset signal (third offset signal), and generates a radiation image based on correcting the radiation signal using the long-term offset image (first offset signal) and the offset-corrected short-term offset signal and imaging offset signal.

[0055] The image generation circuit 113 generates an offset correction value using pixel information of light-shielded pixels included in the short-time offset image T generated based on the short-time offset signal and pixel information of light-shielded pixels included in the imaging offset image U generated based on the imaging offset signal. The image generation circuit 113 uses the generated offset correction value V to perform offset correction that reduces the offset noise signal.

[0056] The image generation circuit 113 may generate the offset correction value V used for offset correction using the average pixel value of optical black (OB) included in the offset afterimage image as pixel information. The OB used for offset correction may use the average pixel value of pixels in an area where the irradiation field is narrowed by a collimator or an area where X-rays are blocked as pixel information. Furthermore, if the characteristics vary for each pixel row (line) of the offset afterimage image, the offset correction value V may be calculated using the average pixel value of the OB on the left and right of each pixel row (line) of the offset afterimage image or the average pixel value of the light-blocked pixels on each pixel row (line) as pixel information.

[0057] In the driving method for reading out an image, the offset characteristics for each pixel row may change when switching from a mode in which the same pixel row is read out over a short period of time or a crop readout mode in which the irradiation field is narrowed to a mode in which signals based on electric charge are read out from all pixel rows (full screen lines) of a pixel array in which multiple pixels P are arranged in a matrix.

[0058] In this embodiment, by performing offset correction before multiplying each element of the offset residual image by the coefficient k, it is possible to reduce artifacts due to the offset characteristics.

[0059] The image generation circuit 113 performs offset correction on the offset afterimage image using the offset value V, thereby generating an offset afterimage image ("(UT)-V" in FIG. 4) based on the offset signal that has been subjected to the offset correction. Then, the image generation circuit 113 generates an adjusted afterimage image ("k((UT)-V)" in FIG. 4) by multiplying each element of the offset afterimage image ((UT)-V) after the offset correction by a coefficient k that is equal to the ratio of the time length 403 to the time length 404 (i.e., the value obtained by dividing the time length 403 by the time length 404). Thereafter, the image generating circuit 113 generates a radiographic image X' ("XSk((UT)-V)" in FIG. 4) by subtracting the adjusted radiographic afterimage image ((k((UT)-V)) from the radiographic afterimage image (XS). The radiographic image X' is an image obtained by correcting the radiographic image X using the long-time offset image S, the short-time offset image T, the imaging offset image U, the offset correction value V of the offset afterimage image (UT), and the coefficient k. The image generating circuit 113 transmits the corrected radiographic image X' to the computer 120.

[0060] The above-described calculation order for generating the radiation image X' is an example, and calculations may be performed in other orders. The offset correction value V may include a correction value Vt for the second offset signal calculated based on pixel information (e.g., pixel values) of a light-shielded region included in an image based on the short-term offset signal (second offset signal), and a correction value Vu for the third offset signal calculated based on pixel information of a light-shielded region included in an image based on the imaging offset signal (third offset signal). The image generation circuit 113 performs offset correction of the offset noise signal included in the short-term offset signal (second offset signal) using the correction value Vt for the second offset signal, and performs offset correction of the offset noise signal included in the imaging offset signal (third offset signal) using the correction value Vu for the third offset signal. The image generation circuit 113 corrects the radiation signal using the long-term offset signal, the coefficient k, and the offset-corrected short-term offset signal and imaging offset signal.

[0061] The radiation image X', i.e., XSk((UT)-V), is transformed into Xk(U-Vu)+(k(T-Vt)-S). Therefore, during preparation for imaging, the image generation circuit 113 may calculate k(T-Vt)-S using the long-time offset image S, the short-time offset image T, and the coefficient k, and store this value as a correction value in the memory 170 of the image generation circuit 113. Here, Vu is an offset correction value calculated from pixel information of the OB or light-blocked region in the imaging offset image U, and Vt is an offset correction value calculated from pixel information of the OB or light-blocked region in the short-time offset image T.

[0062] During preparation for imaging, the image generating circuit 113 may store in the memory 170 a first correction value calculated using the long-term offset signal (first offset signal), the short-term offset signal (second offset signal), and the correction value Vt for the second offset signal. Here, the first correction value may be obtained as (T-Vt)-S for each image generated based on each signal. After calculating the coefficient k, the first correction value may be obtained as k(T-Vt)-S.

[0063] Furthermore, after preparation for imaging is completed, the image generating circuit 113 may correct the radiation signal using a second correction value calculated using the imaging offset signal (third offset signal) and the correction value Vu for the third offset signal, and the first correction value stored in the memory 170 of the image generating circuit 113. Here, the second correction value may be obtained as (U-Vu) from each image generated based on each signal. Furthermore, after calculating the coefficient k, the second correction value may be obtained as k(U-Vu).

[0064] Note that if the time length 404 (fourth time length) and the time length 403 (third time length) are equal, it is possible to omit the calculation of the ratio, and the first correction value and the second correction value can be obtained with coefficient k = 1. On the other hand, if the time length 404 and the time length 403 are different, the image generating circuit 113 may correct the radiation signal using a short-time offset signal (second offset signal) and an imaging offset signal (third offset signal) that have been further offset-corrected using the ratio of the time length 403 (third time length) to the time length 404 (fourth time length).

[0065] The image generation circuit 113 may set the entire region (entire screen line) formed by a plurality of pixel rows and a plurality of pixel columns as the target region for offset correction, regardless of the control of the control circuit 112. Alternatively, the image generation circuit 113 may set the region of interest formed by a specific pixel row or pixel column, which is read out based on the control of the control circuit 112, among the plurality of pixel rows and pixel columns, as the target region for offset correction.

[0066] The coefficient k can be determined based on a preset setting of the timing at which the drive circuit 210 supplies an ON signal to the pixel array 200. The image generation circuit 113 may correct the radiation image X during imaging of a moving image using the imaging offset image U, the correction value stored in the memory 170, and the coefficient k. In this way, by storing the correction value instead of storing the long-term offset image S and the short-term offset image T, the amount of memory consumed by the image generation circuit 113 can be reduced.

[0067] Next, the technical significance of alternately acquiring the long-time offset image S and the short-time offset image T will be described. The driving lines Vg1 to Vgm have various capacitive couplings within the pixel array 200. For example, the driving line Vg2 intersects with the signal lines Sig1 to Sign at multiple locations in the pixel array 200, and has capacitive couplings at these intersections. The driving line Vg2 extends parallel to the driving line Vg3, and therefore has capacitive coupling with the driving line Vg3. The driving line Vg2 extends parallel to a portion of the bias line Bs, and therefore has capacitive coupling with the bias line Bs. Furthermore, the driving line Vg2 has capacitive coupling with a node at the connection between the switch element S and the conversion element C.

[0068] Due to this type of capacitive coupling, as the level of the drive signal supplied to the drive line Vg changes, the potentials of the signal line Sig, bias line Bs, other drive lines Vg, and the nodes at the junctions of the switch element S and conversion element C also fluctuate. The signal line Sig, bias line Bs, drive line Vg, and the nodes at the junctions of the switch element S and conversion element C whose potentials have fluctuated will return to their original potentials over time. However, the amount of return varies depending on the length of the accumulation period.

[0069] Furthermore, leakage current can flow through the switch element S even when it is in the off state. When the switch element S is turned off, the node between the conversion element C and the switch element S changes to the low level due to charge injection from the control terminal (gate). Therefore, immediately after the switch element S is turned off, a potential difference occurs between the main terminals (source and drain), causing a leakage current to flow. The leakage current depends on the potential difference between the two main terminals (source and drain) of the switch element. If a leakage current flows during the accumulation period, this potential difference becomes smaller, so the leakage current varies depending on the length of the accumulation period. Furthermore, if a leakage current flows through the switch element S, a current also flows through the signal line Sig and bias line Bs.

[0070] For the above reasons, the offset images acquired may differ between a case where a long-time offset image S and a short-time offset image T are each acquired multiple times in succession and a case where a long-time offset image S and a short-time offset image T are acquired alternately. In the operation of the radiation imaging device 110 described above, the long-time offset image S and the short-time offset image T are acquired alternately during preparation for imaging, and after preparation for imaging is completed, the radiation image X and the in-imaging offset image U are acquired alternately. This allows the state of capacitive coupling within the pixel array 200 during preparation for imaging to approach the state of capacitive coupling within the pixel array 200 during imaging of a radiation image, and therefore noise contained in the radiation image X can be reduced with high accuracy.

[0071] 4, the image generating circuit 113 corrects the radiation signal using an imaging offset signal acquired after the radiation signal. Alternatively, the image generating circuit 113 may correct the radiation signal using an imaging offset signal acquired before the radiation signal.

[0072] In the above example, the time length 401 is equal to the time length 403. Alternatively, these time lengths may be different from each other. In such a case where the time lengths are different, the image generation circuit 113 may multiply each element of the long-time offset image S by the ratio of the time length 403 to the time length 401, and then subtract the result from the radiation image X. In the above example, the time length 402 is equal to the time length 404. Alternatively, these time lengths may be different from each other. In such a case where the time lengths are different, the image generation circuit 113 may multiply each element of the short-time offset image T by the ratio of the time length 404 to the time length 402, and then subtract the result from the imaging offset image U.

[0073] Next, with reference to FIG. 5, an example of operation of the radiation imaging device 110 different from the operation of FIG. 4 described above will be described. In the operation of FIG. 4, the control circuit 112 selects multiple pixel rows one by one to generate a short-time offset image T and a time-of-capture offset image U. In the operation of FIG. 5, the control circuit 112 selects multiple pixel rows two by two to generate a short-time offset image T and a time-of-capture offset image U. Specifically, the control circuit 112 simultaneously selects the (2h-1)th pixel row and the 2hth pixel row (h=1,...,m / 2). Such an operation of simultaneously selecting multiple pixel rows may be called a binning operation. In the example of FIG. 5, two pixel rows are simultaneously selected, but three or more pixel rows may also be simultaneously selected.

[0074] The plurality of pixel rows include a first pixel row including a first pixel and a second pixel row including a second pixel, and the drive circuit 210 selects the first pixel row and the second pixel row during a first selection period to read out an image capture offset signal based on the charges accumulated in the first pixel and the second pixel. For example, the control circuit 112 selects the first pixel row and the second pixel row during a period in which the drive signal supplied to the drive line Vg1 is at a high level during the readout period 424 (which may also be referred to as a selection period for the first pixel row). This allows an image capture offset signal based on the charges accumulated in pixel P(1,j) and pixel P(2,j).

[0075] By reading out the imaging offset signal by the binning operation, the readout period (e.g., readout period 424) for reading out the imaging offset signal can be shortened. As a result, the frame rate of moving images can be improved. The accumulation period 423 may be shorter than the accumulation period 421 or may be the same length as the accumulation period 421. Even if the accumulation period 423 is the same length as the accumulation period 421, the frame rate of moving images can be improved by reading out the imaging offset signal by the binning operation. Since the imaging offset signal is read out by the binning operation, the short-term offset signal used for the difference with the imaging offset signal may also be read out by the binning operation. Alternatively, the short-term offset signal may be read out by a normal operation (selecting one row at a time). In this case, the short-term offset signal may be multiplied by a coefficient for adjusting the length of time for which charge is accumulated in the pixel P.

[0076] In the operation of Figure 5, to generate the long-time offset image S and the radiographic image U, the control circuit 112 may select multiple pixel rows one by one, similar to the operation of Figure 4. For example, during the readout period 422, during the period in which the drive signal supplied to the drive line Vg1 is at a high level (which may be referred to as the selection period of the first pixel row), the control circuit 112 selects the first pixel row and does not select any other rows (for example, the second pixel row). This allows a radiation signal based on the charge accumulated in pixel P(1,j) to be read out. Instead of the operation of Figure 5, a binning operation may be performed to generate the long-time offset image S and the radiographic image U.

[0077] Next, a method for generating a radiographic image in the operation of Fig. 5 will be described. The image generation circuit 113 generates a long-term offset image S during preparation for imaging, similar to the description of Fig. 4. Furthermore, during preparation for imaging, the image generation circuit 113 generates a short-term offset image T' based on short-term offset signals read out by a binning operation from multiple pixels P included in the pixel array 200. The short-term offset image T' is expressed as a matrix with (m / 2) rows and n columns, and the signals read out from pixel P(2i-1,j) and pixel P(2i,j) are the (i,j) components of this matrix (i = 1,...,m / 2, j = 1,...,n). The image generation circuit 113 may generate one short-term offset image T' by averaging multiple short-term offset images T'.

[0078] Thereafter, the image generation circuit 113 generates the short-term offset image T by adjusting the size of the short-term offset image T' so that the short-term offset image T' has the same size as the radiation image X. Specifically, the image generation circuit 113 halves the (Ceiling(i / 2),j) component of the short-term offset image T' and sets the resulting value as the (i,j) component of the short-term offset image T (i=1,...,m, j=1,...,n). Here, Ceiling represents a ceiling function, i.e., rounding up to the nearest whole number. The reason for halving is that each component of the short-term offset image T' represents the sum of signals from two pixels.

[0079] Thereafter, the image generation circuit 113 generates a radiographic image X after preparation for imaging is completed, in the same manner as described with reference to FIG. 4 . The drive circuit 210 selects a first pixel row during a second selection period to read out a radiographic image based on the charges accumulated in the first pixels, and the drive circuit 210 does not select a second pixel row during the second selection period. Furthermore, after preparation for imaging is completed, the image generation circuit 113 generates a time-of-imaging offset image U' based on the time-of-imaging offset signals read out by a binning operation from a plurality of pixels P included in the pixel array 200. The method for generating the time-of-imaging offset image U' is similar to the method for generating the short-time offset image T', and therefore a description thereof will be omitted. Thereafter, the image generation circuit 113 generates a time-of-imaging offset image U' by adjusting the size of the time-of-imaging offset image U' so that the time-of-imaging offset image U' has the same size as the radiographic image X. The method for generating the time-of-imaging offset image U is similar to the method for generating the short-time offset image T, and therefore a description thereof will be omitted.

[0080] The image generating circuit 113 generates a radiographic image X' by correcting the radiographic image X using the long-time offset image S, short-time offset image T, and imaging-time offset image U generated as described above. The correction process for the radiographic image X may be the same as the correction process 400 in FIG. 4, and therefore a description thereof will be omitted.

[0081] The adjustment of the size of the offset image may be performed in another order. For example, the image generation circuitry 113 may generate an adjusted image of the correction process 400 without adjusting the size of the offset image, and then adjust the size of this adjusted image.

[0082] As shown in FIG. 5, the ratio of the length of accumulation time of charge read out as an imaging offset signal to the length of accumulation time of charge read out as a radiation signal differs for each pixel row. This difference is due to the fact that radiation signals are read out by normal operation (i.e., one pixel row at a time) and imaging offset signals are read out by a binning operation. For example, in the first pixel row, a radiation signal based on charge accumulated in pixel P over time length 503 is read out, and an imaging offset signal based on charge accumulated in pixel P over time length 504 is read out. In the eighth pixel row, a radiation signal based on charge accumulated in pixel P over time length 507 is read out, and an imaging offset signal based on charge accumulated in pixel P over time length 508 is read out. The time length 507 is different from the time length 503. The time length 508 is different from the time length 504. Furthermore, the ratio of the time length 508 to the time length 507 is different from the ratio of the time length 503 to the time length 504.

[0083] Therefore, the image generation circuit 113 may use an individual coefficient k for each pixel row in the correction process 400. Specifically, the image generation circuit 113 may use the ratio of the time length 503 to the time length 504 as the coefficient k for the pixel P included in the first pixel row. The image generation circuit 113 may use the ratio of the time length 507 to the time length 508 as the coefficient k for the pixel P included in the eighth pixel row. Here, the ratio of the time length 507 to the time length 508 is a different ratio from the ratio of the time length 503 to the time length 504.

[0084] For each of the plurality of pixel rows, the length of accumulation time of the charge read out as the long-time offset signal may be equal to the length of accumulation time of the charge read out as the radiation signal. For example, for the first pixel row, time length 501 may be equal to time length 503, and time length 502 may be equal to time length 504. For the eighth pixel row, time length 505 may be equal to time length 507, and time length 506 may be equal to time length 508.

[0085] Next, an example of operation of the radiation imaging device 110 different from the operation shown in FIG. 4 will be described with reference to FIG. 6. In the operation shown in FIG. 6, similar to the operation shown in FIG. 5, a short-term offset signal and an imaging offset signal are read out by a binning operation. In the operation shown in FIG. 6, to read out signals from each of the plurality of pixels P included in the pixel array 200, pixel rows are selected from the center of the plurality of pixel rows toward the outside. In this example of operation of the radiation imaging device 110, during one readout period in which each of the plurality of pixel rows is selected, the drive circuit 210 selects a pixel row located in the center of the plurality of pixel rows before the two pixel rows located at both ends of the plurality of pixel rows. Specifically, in the example shown in FIG. 6, the control circuit 112 selects pixel rows in the order of the fourth, fifth, third, sixth, second, seventh, first, and eighth rows to read out a long-term offset signal and a radiation signal. To read out the short-term offset signal and the imaging offset signal, the control circuit 112 selects pixel rows in the following order: rows 3 and 4, rows 5 and 6, rows 1 and 2, and rows 7 and 8. In this way, in the operation of Fig. 6, the control circuit 112 selects the pixel row located in the center of the plurality of pixel rows before the two pixel rows located at both ends of the plurality of pixel rows.

[0086] In the operation of FIG. 6, the coefficient k for a pixel row selected first is smaller than the coefficient k for a pixel row selected later. The larger the coefficient k, the more likely it is that noise contained in the short-time offset signal and the imaging offset signal will be amplified. Therefore, by selecting pixel rows so that the coefficient k for a pixel P located at the center of the image, which is likely to be the region of interest in the radiographic image, is small, degradation of the image quality of the radiographic image due to noise can be further reduced. A large coefficient k may increase noise. Therefore, the coefficient k may be set to a value smaller than the ratio of the length of the charge accumulation time, depending on the degree of influence of image retention.

[0087] Next, an example of operation of the radiation imaging device 110 different from the operation in FIG. 4 described above will be described with reference to FIG. 7. In the operation in FIG. 7, similar to the operation in FIG. 5, a short-time offset signal and an imaging offset signal are read out by a binning operation. In the operation in FIG. 7, the control circuit 112 switches, for each readout period, the combination of pixel rows selected for reading out the imaging offset signal by the binning operation. Similarly, the control circuit 112 switches, for each readout period, the combination of pixel rows selected for reading out the imaging offset signal by the binning operation.

[0088] First, the operation during preparation for imaging will be described. The operations during accumulation periods 711 to 713 and the operations during accumulation periods 715 to 717 may be similar to those during accumulation periods 411 to 413 in FIG. 4, and therefore will not be described here. During readout period 714, control circuit 112 simultaneously selects the (2h-1)th pixel row and the 2hth pixel row (h=1,...,m / 2). This reads out an imaging offset signal based on the charge accumulated in pixel P(2h-1,j) and the charge accumulated in pixel P(2h,j). During readout period 718, control circuit 112 simultaneously selects the 2hth pixel row and the (2h+1)th pixel row (h=1,...,m / 2-1). As a result, an offset signal during imaging based on the charge accumulated in pixel P(2h-1,j) and the charge accumulated in pixel P(2h,j) is read out. Note that the pixel rows located at both ends of the multiple pixel rows (i.e., the first row and the mth row) are selected one row at a time.

[0089] The image generation circuit 113 generates the long-term offset image S in the same manner as in FIG. 4 . The image generation circuit 113 generates the short-term offset image T1′ using the short-term offset signal read out during the readout period 714, and generates the short-term offset image T2′ using the short-term offset signal read out during the readout period 718. The image generation circuit 113 generates the short-term offset image T1 and the short-term offset image T2 by adjusting the sizes of the short-term offset image T1′ and the short-term offset image T2′, respectively. The image generation circuit 113 generates the short-term offset image T by averaging the short-term offset image T1 and the short-term offset image T2. By averaging different combinations of pixel rows in this manner, the resolution of the short-term offset image T in the column direction (vertical direction in the figure) can be improved. The example in FIG. 7 shows only one short-term offset image T1′ and one short-term offset image T2′. To generate the short-term offset image T, multiple short-term offset images T1′ and T2′ may be averaged.

[0090] Next, the operation after preparation for imaging is completed (for example, during imaging of a moving image) will be described. The operation during readout periods 721 to 727 may be the same as the operation during readout periods 712 to 718, and therefore the description will be omitted.

[0091] The image generation circuit 113 generates a radiographic image X in the same manner as in the operation of FIG. 4. The image generation circuit 113 generates an image-capturing offset image U1' using the image-capturing offset signals read out during the readout period 723, and generates an image-capturing offset image U2' using the image-capturing offset signals read out during the readout period 727. The image generation circuit 113 generates an image-capturing offset image U1 and an image-capturing offset image U2 by adjusting the sizes of the image-capturing offset image U1' and the image-capturing offset image U2'. The image generation circuit 113 generates an image-capturing offset image U by averaging the image-capturing offset image U1 and the image-capturing offset image U2. By averaging different combinations of pixel rows in this manner, the resolution of the image-capturing offset image U in the column direction (vertical direction in the figure) can be improved.

[0092] For example, as shown in FIG. 7, the plurality of pixel rows further includes a third pixel row including a third pixel, and the driving circuit 210 reads out a radiographic image based on the charge accumulated in the first pixel by selecting the first pixel row during the second selection period, and the driving circuit 210 does not select the second pixel row during the second selection period.

[0093] The drive circuit 210 selects the second pixel row and the third pixel row during the third selection period, thereby reading out an imaging offset signal based on the charges accumulated in the second pixels and the third pixels. The drive circuit 210 does not select the third pixel row during the first selection period, and does not select the first pixel row during the third selection period. The image generation circuit 113 corrects the radiation signal read out during the second selection period using the long-term offset signal (first offset signal), the short-term offset signal (second offset signal), the imaging offset signal read out during the first selection period (third offset signal), and the imaging offset signal read out during the third selection period (third offset signal).

[0094] Thereafter, the image generating circuit 113 generates a radiographic image X' by correcting the radiographic image X using the long-time offset image S, short-time offset image T, and imaging offset image U generated as described above. The correction process for the radiographic image X may be similar to the correction process 400 in FIG. 4 , and therefore a description thereof will be omitted. As described above, the imaging offset image U is generated using the imaging offset signal read out during the readout period 723 before the accumulation period 724 during which radiation 160 is irradiated, and the imaging offset signal read out during the readout period 727 after the accumulation period 724. This makes it possible to further accurately reduce noise in the radiographic image X. Here, the accumulation period 726, which does not include the period during which radiation is irradiated to the radiographic device and during which none of the multiple pixels is selected, is shorter than the accumulation period 724.

[0095] In the above-described embodiment, the pixel array 200 includes only pixels P used to generate radiographic images. Alternatively, the pixel array 200 may include pixels used for purposes other than generating radiographic images, such as pixels used for automatic exposure control.

[0096] <Summary of the embodiment> The techniques disclosed in this specification include the following radiation imaging apparatus, radiation imaging system, and method for controlling a radiation imaging apparatus. [Item 1] A radiation imaging device, a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges; a drive circuit that supplies a drive signal to the plurality of pixels to select one of the plurality of pixels; a readout circuit that reads out a signal based on the charge accumulated in the pixel selected by the drive signal; a control circuit for controlling the readout circuit and the drive circuit; an image generating circuit for generating a radiation image; The control circuit controls at least a first pixel of the plurality of pixels to: While preparing for the shoot, a first read operation that reads out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second readout operation for reading out a second offset signal based on the charge accumulated in the first pixel for a second time length shorter than the first time length; After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and controlling the readout circuit and the drive circuit to alternately execute the steps of: the image generating circuit performs offset correction on an offset noise signal included in the second offset signal and the third offset signal; a radiation imaging apparatus that generates the radiation image by correcting the radiation signal using the first offset signal and the offset-corrected second offset signal and third offset signal. [Item 2] the plurality of pixel rows include a first pixel row including the first pixel and a second pixel row including a second pixel; Item 1. The radiation imaging device according to item 1, wherein the drive circuit reads out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the second pixel by selecting the first pixel row and the second pixel row during a first selection period. [Item 3] the drive circuit selects the first pixel row during a second selection period to read out the radiation image based on the charges accumulated in the first pixels; 3. The radiation imaging device according to item 2, wherein the drive circuit does not select the second pixel row during the second selection period. [Item 4] the plurality of pixel rows further includes a third pixel row including a third pixel; the drive circuit reads out the third offset signal based on the charges accumulated in the second pixels and the charges accumulated in the third pixels by selecting the second pixel row and the third pixel row during a third selection period; Item 4. The radiation imaging device according to item 3, wherein the drive circuit does not select the third pixel row during the first selection period, and does not select the first pixel row during the third selection period. [Item 5] Item 5. The radiation imaging device according to item 4, wherein the image generating circuit corrects the radiation signal read out during the second selection period using the first offset signal, the second offset signal, the third offset signal read out during the first selection period, and the third offset signal read out during the third selection period. [Item 6] After preparation for imaging is completed, imaging by the radiation imaging device is performed as follows: a first accumulation period including a period during which radiation is irradiated to the radiation imaging device, during which none of the plurality of pixels is selected; a first readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the first accumulation period; a second accumulation period that does not include a period during which radiation is irradiated to the radiation imaging device and in which none of the plurality of pixels is selected; a second readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the second accumulation period; Including, 6. The radiation imaging device according to any one of items 1 to 5, wherein the second accumulation period is shorter than the first accumulation period. [Item 7] 7. The radiation imaging device according to any one of items 1 to 6, wherein the drive circuit selects a pixel row located in the center of the plurality of pixel rows before two pixel rows located at both ends of the plurality of pixel rows during one readout period in which each of the plurality of pixel rows is selected. [Item 8] before correcting the radiation signal using a ratio of the third duration to the fourth duration, generating an offset correction value using pixel information of a light-shielded region included in an image based on the second offset signal and pixel information of a light-shielded region included in an image based on the third offset signal; 8. The radiation imaging apparatus according to any one of items 1 to 7, wherein the offset correction is performed using the offset correction value. [Item 9] The offset correction value includes a correction value for a second offset signal calculated based on pixel information of a light-shielded area included in an image based on the second offset signal; a correction value for the third offset signal calculated based on pixel information of a light-shielded region included in an image based on the third offset signal; the image generating circuit performs offset correction of an offset noise signal included in the second offset signal using the correction value for the second offset signal; 9. The radiation imaging apparatus according to item 8, wherein offset correction is performed on an offset noise signal included in the third offset signal using a correction value for the third offset signal. [Item 10] The image generating circuit includes: During preparation for imaging, a first correction value calculated using the first offset signal, the second offset signal, and a correction value for the second offset signal is stored in a memory; Item 10. The radiation imaging device according to item 9, wherein after preparation for imaging is completed, the radiation signal is corrected using the third offset signal, a second correction value calculated using a correction value for the third offset signal, and the first correction value stored in the memory. [Item 11] 11. The radiation imaging device according to any one of items 1 to 10, wherein the image generation circuit targets the entire area formed by the plurality of pixel rows and the plurality of pixel columns for the offset correction, regardless of control by the control circuit. [Item 12] 11. The radiation imaging device according to any one of items 1 to 10, wherein the image generation circuit sets a region of interest constituted by a specific pixel row or pixel column, which is read out from among the plurality of pixel rows and the plurality of pixel columns based on control by the control circuit, as a target region for the offset correction. [Item 13] 13. The radiation imaging device according to any one of items 1 to 12, wherein the image generating circuit corrects the radiation signal using the second offset signal and the third offset signal, which have been further offset-corrected using a ratio of the third time length to the fourth time length. [Item 14] 14. The radiation imaging device according to any one of items 1 to 13, wherein the image generating circuit corrects the radiation signal using the third offset signal that is acquired after the radiation signal and has undergone the offset correction. [Item 15] The control circuit, for a fourth pixel of the plurality of pixels, While preparing for the shoot, a fifth read operation that reads out a fourth offset signal based on the charge accumulated in the fourth pixel for a fifth time period; a sixth readout operation that reads out a fifth offset signal based on the charge accumulated in the fourth pixel for a sixth time length that is shorter than the fifth time length; After preparation for imaging is complete, a seventh readout operation of reading out second radiation signals based on charges accumulated in the fourth pixels over a seventh time period including a period during which the radiation imaging device is irradiated with radiation; an eighth readout operation of reading out a sixth offset signal based on charges accumulated in the fourth pixel for an eighth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the seventh time length; and and controlling the readout circuit and the drive circuit to perform the following: the image generation circuit generates the radiation image further based on correcting the second radiation signal using the fourth offset signal, the fifth offset signal, the sixth offset signal, and a ratio of the seventh time length to the eighth time length; Item 14. The radiation imaging apparatus according to item 13, wherein the ratio of the seventh length of time to the eighth length of time is different from the ratio of the third length of time to the fourth length of time. [Item 16] 16. The radiation imaging device according to any one of items 1 to 15, wherein the third time length is equal to the first time length, and the fourth time length is equal to the second time length. [Item 17] A radiation imaging device according to any one of items 1 to 16, a signal processing means for processing a radiation image obtained by the radiation imaging device; A radiation imaging system comprising: [Item 18] 1. A method for controlling a radiation imaging apparatus having a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and accumulating electric charges, the method comprising: For at least a first pixel of the plurality of pixels, While preparing for the shoot, a first read operation that reads out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second readout operation of reading out a second offset signal based on the charge accumulated in the first pixel for a second time length shorter than the first time length; and After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and and performing offset correction on an offset noise signal included in the second offset signal and the third offset signal; generating a radiation image based on correcting the radiation signal using the first offset signal and the offset-corrected second offset signal and third offset signal; A method for controlling a radiation imaging apparatus having the above configuration.

[0097] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0098] 100: Radiation imaging system, 110: Radiation imaging device, 200: Pixel array

Claims

1. A radiation imaging device, a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges; a drive circuit that supplies a drive signal to the plurality of pixels to select one of the plurality of pixels; a readout circuit that reads out a signal based on the charge accumulated in the pixel selected by the drive signal; a control circuit for controlling the readout circuit and the drive circuit; an image generating circuit for generating a radiation image; The control circuit controls at least a first pixel of the plurality of pixels to: While preparing for the shoot, a first read operation for reading a first offset signal based on charge accumulated in the first pixel for a first length of time; a second readout operation for reading out a second offset signal based on the charge accumulated in the first pixel for a second time period shorter than the first time period; After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and controlling the readout circuit and the drive circuit to alternately execute the steps of: the image generating circuit performs offset correction on an offset noise signal included in the second offset signal and the third offset signal; a radiation imaging apparatus that generates the radiation image by correcting the radiation signal using the first offset signal and the offset-corrected second offset signal and third offset signal.

2. the plurality of pixel rows include a first pixel row including the first pixel and a second pixel row including a second pixel; 2. The radiation imaging device according to claim 1, wherein the drive circuit selects the first pixel row and the second pixel row during a first selection period, thereby reading out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the second pixel.

3. the drive circuit selects the first pixel row during a second selection period, thereby reading out the radiation image based on the charges accumulated in the first pixels; The radiation imaging apparatus according to claim 2 , wherein the drive circuit does not select the second pixel row during the second selection period.

4. the plurality of pixel rows further includes a third pixel row including a third pixel; the drive circuit selects the second pixel row and the third pixel row during a third selection period, thereby reading out the third offset signal based on the charges accumulated in the second pixels and the charges accumulated in the third pixels; The radiation imaging apparatus according to claim 3 , wherein the drive circuit does not select the third pixel row during the first selection period, and does not select the first pixel row during the third selection period.

5. 5. The radiation imaging device according to claim 4, wherein the image generating circuit corrects the radiation signal read out during the second selection period by using the first offset signal, the second offset signal, the third offset signal read out during the first selection period, and the third offset signal read out during the third selection period.

6. After preparation for imaging is completed, imaging by the radiation imaging device is performed as follows: a first accumulation period including a period during which radiation is irradiated to the radiation imaging device, during which none of the plurality of pixels is selected; a first readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the first accumulation period; a second accumulation period that does not include a period during which radiation is irradiated to the radiation imaging device and in which none of the plurality of pixels is selected; a second readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the second accumulation period; Including, The radiation imaging apparatus according to claim 1 , wherein the second accumulation period is shorter than the first accumulation period.

7. 2. The radiation imaging device according to claim 1, wherein the drive circuit selects a pixel row located in the center of the plurality of pixel rows before two pixel rows located at both ends of the plurality of pixel rows during one readout period in which each of the plurality of pixel rows is selected.

8. before correcting the radiation signal using a ratio of the third duration to the fourth duration, generating an offset correction value using pixel information of a light-shielded region included in an image based on the second offset signal and pixel information of a light-shielded region included in an image based on the third offset signal; The radiation imaging apparatus according to claim 1 , wherein the offset correction is performed using the offset correction value.

9. The offset correction value includes a correction value for a second offset signal calculated based on pixel information of a light-shielded region included in an image based on the second offset signal; a correction value for the third offset signal calculated based on pixel information of a light-shielded region included in an image based on the third offset signal, the image generating circuit performs offset correction of an offset noise signal included in the second offset signal using the correction value for the second offset signal; The radiation imaging apparatus according to claim 8 , wherein offset correction is performed on an offset noise signal included in the third offset signal using the correction value for the third offset signal.

10. The image generating circuit includes: During preparation for imaging, a first correction value calculated using the first offset signal, the second offset signal, and a correction value for the second offset signal is stored in a memory; 10. The radiation imaging apparatus according to claim 9, wherein, after preparation for imaging is completed, the radiation signal is corrected using the third offset signal, a second correction value calculated using a correction value for the third offset signal, and the first correction value stored in the memory.

11. The radiation imaging apparatus according to claim 1 , wherein the image generating circuit sets the entire region formed by the plurality of pixel rows and the plurality of pixel columns as the target region for the offset correction, regardless of control by the control circuit.

12. 2. The radiation imaging device according to claim 1, wherein the image generation circuit determines, as a target region for the offset correction, a region of interest constituted by a specific pixel row or pixel column among the plurality of pixel rows and the plurality of pixel columns that is read out based on control of the control circuit.

13. 2. The radiation imaging device according to claim 1, wherein the image generating circuit corrects the radiation signal using the second offset signal and the third offset signal, which have been offset-corrected using a ratio of the third time length to the fourth time length.

14. The radiation imaging apparatus according to claim 1 , wherein the image generating circuit corrects the radiation signal using the third offset signal, which is acquired after the radiation signal and has undergone the offset correction.

15. The control circuit, for a fourth pixel of the plurality of pixels, While preparing for the shoot, a fifth readout operation that reads out a fourth offset signal based on the charge accumulated in the fourth pixel over a fifth length of time; a sixth readout operation for reading out a fifth offset signal based on the charge accumulated in the fourth pixel for a sixth time length that is shorter than the fifth time length; After preparation for imaging is complete, a seventh readout operation of reading out second radiation signals based on charges accumulated in the fourth pixels over a seventh time period including a period during which the radiation imaging device is irradiated with radiation; an eighth readout operation of reading out a sixth offset signal based on charges accumulated in the fourth pixel for an eighth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the seventh time length; and and controlling the readout circuit and the drive circuit to perform the following: the image generation circuit generates the radiation image further based on correcting the second radiation signal using the fourth offset signal, the fifth offset signal, the sixth offset signal, and a ratio of the seventh time length to the eighth time length; The radiation imaging apparatus of claim 13 , wherein the ratio of the seventh length of time to the eighth length of time is different from the ratio of the third length of time to the fourth length of time.

16. The radiation imaging apparatus of claim 1 , wherein the third length of time is equal to the first length of time, and the fourth length of time is equal to the second length of time.

17. A radiation imaging apparatus according to any one of claims 1 to 16, a signal processing means for processing a radiation image obtained by the radiation imaging device; A radiation imaging system comprising:

18. 1. A method for controlling a radiation imaging apparatus having a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and accumulating electric charges, the method comprising: For at least a first pixel of the plurality of pixels, While preparing for the shoot, a first read operation for reading a first offset signal based on charge accumulated in the first pixel for a first length of time; a second readout operation of reading out a second offset signal based on the charge accumulated in the first pixel for a second time period shorter than the first time period; and After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and and performing offset correction on an offset noise signal included in the second offset signal and the third offset signal; generating a radiation image based on correcting the radiation signal using the first offset signal and the offset-corrected second offset signal and third offset signal; A method for controlling a radiation imaging apparatus having the above configuration.

Images