Wiring board and method for manufacturing the same
The wiring board structure with layered via holes and openings facilitates stable deep cavity formation, addressing the challenge of forming deep cavities in conventional substrates by maintaining pad integrity and flatness.
Patent Information
- Application Number
- JP2024012047
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-30
- Publication Date
- 2025-08-12
AI Technical Summary
Conventional wiring substrates face difficulties in stably forming deep cavities.
A wiring board structure comprising multiple insulating and wiring layers with specific via holes and openings, allowing for the formation of a recess that penetrates through multiple layers and exposes a pad, enabling stable deep cavity creation.
The method allows for the stable formation of deep cavities, ensuring the pad's exposure and preventing etching solution contact, maintaining the pad's flatness and integrity.
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Figure 2025117290000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a wiring board and a method for manufacturing a wiring board. [Background technology]
[0002] 2. Description of the Related Art Wiring boards having cavities in which electronic components are mounted are known. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-141204 [Patent Document 2] Japanese Patent Application Publication No. 2023-093291 Summary of the Invention [Problem to be solved by the invention]
[0004] In conventional wiring substrates, it is difficult to stably form deep cavities.
[0005] An object of the present disclosure is to provide a wiring board that can stably form a deep cavity and a method for manufacturing the wiring board. [Means for solving the problem]
[0006] According to one embodiment of the present disclosure, there is provided a wiring substrate having a first insulating layer having a first surface, a pad provided on the first surface, a second insulating layer provided on the first surface and having a second surface facing the first surface and a third surface opposite the second surface, the second insulating layer covering the pad, a first wiring layer provided on the third surface, and a third insulating layer provided on the third surface and covering the first wiring layer, wherein a recess is formed that penetrates the first insulating layer and the second insulating layer and has a bottom surface in the third insulating layer, an opening is formed in the first insulating layer, and the pad is exposed from the opening. [Effects of the Invention]
[0007] According to the disclosed technique, a deep cavity can be formed stably. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a cross-sectional view illustrating a structure of a wiring board according to an embodiment; [Figure 2] 1A to 1C are cross-sectional views (part 1) illustrating a method for manufacturing a wiring board according to an embodiment. [Figure 3] 10A and 10B are cross-sectional views (part 2) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 4] 10A to 10C are cross-sectional views (part 3) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 5] 10A and 10B are cross-sectional views (part 4) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 6] 10A and 10B are cross-sectional views (part 5) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 7] 10A and 10B are cross-sectional views (part 6) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 8] 1A to 1C are cross-sectional views illustrating a method of using the wiring board according to the embodiment. [Figure 9] 10A to 10C are cross-sectional views illustrating a wiring board according to a modified example of the embodiment and a method of using the same. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Note that in this specification and drawings, components having substantially the same functional configurations may be denoted by the same reference numerals to avoid redundant description. In this disclosure, for convenience, the side of a wiring board on which a cavity is provided will be referred to as one side or the bottom side, and the opposite side will be referred to as the other side or the top side. Furthermore, the surface of a wiring board on which a cavity is provided will be referred to as one side or the bottom side, and the opposite side will be referred to as the other side or the top side. However, the wiring board can be used upside down or positioned at any angle. Furthermore, a planar view refers to viewing an object from the normal direction of one side of the wiring board, and a planar shape refers to the shape of the object viewed from the normal direction of one side of the wiring board.
[0010] [Structure of wiring board according to embodiment] First, the structure of the wiring board according to the embodiment will be described. Fig. 1 is a cross-sectional view illustrating the structure of the wiring board according to the embodiment.
[0011] As shown in FIG. 1, the wiring board 100 according to the embodiment includes insulating layers 94, 10, 20, 30, and 40, a pad 98, and wiring layers 50, 60, and .
[0012] The insulating layer 94 has one surface 94A and another surface 94B opposite to the one surface. The one surface 94A is the lower surface, and the other surface 94B is the upper surface. The insulating layer 94 is, for example, a primer layer or a prepreg. The prepreg may or may not contain glass cloth. The insulating layer 94 may be made of an insulating resin such as epoxy resin or polyimide resin. The insulating layer 94 is an example of a first insulating layer, and the surface 94B is an example of a first surface.
[0013] The pad 98 is provided on the other surface 94B of the insulating layer 94. The pad 98 has a metal foil made of, for example, copper (Cu) or a copper alloy. The thickness of the pad 98 is approximately 1.5 μm to 5 μm. For example, the pad 98 is used for connection to an electronic component, or as an external connection terminal.
[0014] The insulating layer 10 is provided on the other surface 94B of the insulating layer 94 and covers the pad 98. The insulating layer 10 has one surface 10A and the other surface 10B opposite to the surface 10A. The surface 10A faces the surface 94B. The insulating layer 10 is, for example, a prepreg. The prepreg may or may not contain glass cloth. The insulating layer 10 may be made of an insulating resin such as an epoxy resin or a polyimide resin. A via hole 11 is formed in the insulating layer 10. The via hole 11 penetrates the insulating layer 10. The via hole 11 overlaps the pad 98 in a plan view and reaches the pad 98. The via hole 11 may be a recess in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the via hole 11 may be larger than the opening diameter at the lower end. The insulating layer 10 is an example of a second insulating layer, the surface 10A is an example of a second surface, and the surface 10B is an example of a third surface.
[0015] The wiring layer 50 is provided on the other surface 10B of the insulating layer 10. The wiring layer 50 has, for example, a copper or copper alloy foil 51, a copper or copper alloy seed layer 52, and a copper or copper alloy plating layer 53. At least a portion of the wiring layer 50 is electrically connected to the pad 98 through the via hole 11. The foil 51 is provided on the surface 10B. An opening connected to the via hole 11 is formed in the foil 51, and the seed layer 52 is provided on the upper surface of the pad 98, the inner wall surface of the via hole 11, the inner wall surface of the opening formed in the foil 51, and the upper surface of the foil 51. The plating layer 53 is provided on the seed layer 52. The wiring layer 50 is an example of a first wiring layer.
[0016] The insulating layer 20 is provided on the other surface 10B of the insulating layer 10 and covers the wiring layer 50. The insulating layer 20 has one surface 20A and the other surface 20B opposite to the surface 20A. The surface 20A faces the surface 10B. The insulating layer 20 is made of, for example, the same material as the insulating layer 10. A via hole 21 is formed in the insulating layer 20. The via hole 21 penetrates the insulating layer 20. The via hole 21 overlaps the wiring layer 50 in a planar view and reaches the wiring layer 50. The via hole 21 may be a recessed portion in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the via hole 21 may be larger than the opening diameter at the lower end. The insulating layer 20 is an example of a third insulating layer, the surface 20A is an example of a fourth surface, and the surface 20B is an example of a fifth surface.
[0017] The wiring layer 60 is provided on the other surface 20B of the insulating layer 20. The wiring layer 60 has, for example, a copper or copper alloy foil 61, a copper or copper alloy seed layer 62, and a copper or copper alloy plating layer 63. At least a portion of the wiring layer 60 is electrically connected to the wiring layer 50 through the via hole 21. The foil 61 is provided on the surface 20B. An opening connected to the via hole 21 is formed in the foil 61, and the seed layer 62 is provided on the upper surface of the wiring layer 50, the inner wall surface of the via hole 21, the inner wall surface of the opening formed in the foil 61, and the upper surface of the foil 61. The plating layer 63 is provided on the seed layer 62. The wiring layer 60 is an example of a second wiring layer.
[0018] The insulating layer 30 is provided on the other surface 20B of the insulating layer 20 and covers the wiring layer 60. The insulating layer 30 has one surface 30A and the other surface 30B opposite to the surface 30A. The surface 30A faces the surface 20B. The material of the insulating layer 30 is, for example, the same as that of the insulating layer 10. A via hole 31 is formed in the insulating layer 30. The via hole 31 penetrates the insulating layer 30. The via hole 31 overlaps the wiring layer 60 in a planar view and reaches the wiring layer 60. The via hole 31 may be a recess in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the via hole 31 may be larger than the opening diameter at the lower end.
[0019] The wiring layer 70 is provided on the other surface 30B of the insulating layer 30. The wiring layer 70 has, for example, a copper or copper alloy foil 71, a copper or copper alloy seed layer 72, and a copper or copper alloy plating layer 73. At least a portion of the wiring layer 70 is electrically connected to the wiring layer 60 through the via hole 31. The foil 71 is provided on the surface 30B. An opening connected to the via hole 31 is formed in the foil 71, and the seed layer 72 is provided on the upper surface of the wiring layer 60, the inner wall surface of the via hole 31, the inner wall surface of the opening formed in the foil 71, and the upper surface of the foil 71. The plating layer 73 is provided on the seed layer 72. The wiring layer 70 is an example of a third wiring layer.
[0020] The insulating layer 40 is provided on the other surface 30B of the insulating layer 30 and covers the wiring layer 70. The insulating layer 40 has one surface 40A and the other surface 40B opposite to the surface 40A. The surface 40A faces the surface 30B. The insulating layer 40 is made of, for example, the same material as the insulating layer 10. An opening 41 is formed in the insulating layer 40. The opening 41 penetrates the insulating layer 40. The opening 41 overlaps the wiring layer 70 in a planar view and reaches the wiring layer 70. The opening 41 may be a recessed portion in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the opening 41 may be larger than the opening diameter at the lower end. As an example, the wiring layer 70 exposed in the opening 41 is used for connection to electronic components or as an external connection terminal.
[0021] In this way, the laminate of insulating layers 30 and 40 is provided on surface 20B of insulating layer 20 and covers wiring layer 60. Furthermore, wiring layer 70 is provided between adjacent insulating layers 30 and 40. Insulating layers 30 and 40 are an example of a fourth insulating layer, and wiring layer 70 is an example of a third wiring layer.
[0022] A cavity 81 is formed in insulating layers 94, 10, and 20. The cavity 81 penetrates the insulating layers 94 and 10 and has a bottom surface 81A within the insulating layer 20. An opening 86 is formed in the insulating layer 94. The opening 86 penetrates the insulating layer 94. The opening 86 overlaps with and reaches the pad 98 in a plan view. The pad 98 is exposed from the opening 86. Furthermore, an opening 87 is formed in the insulating layer 20 at the bottom surface 81A of the cavity 81, reaching the wiring layer 60. The openings 86 and 87 may be truncated cone-shaped recesses. That is, the opening diameter at the lower end of the openings 86 and 87 may be larger than the opening diameter at the upper end.
[0023] [Method of manufacturing wiring board] Next, a method for manufacturing a wiring board according to an embodiment will be described. Figures 2 to 7 are cross-sectional views illustrating an example of the method for manufacturing a wiring board according to an embodiment.
[0024] First, as shown in FIG. 2(a), a support substrate 90 is prepared. The support substrate 90 includes, for example, a prepreg substrate 91, a carrier foil 92, a foil 93, an insulating layer 94, and a foil 95. On both sides of the substrate 91, the carrier foil 92 is provided on the surface of the substrate 91, the foil 93 is provided on the surface of the carrier foil 92, the insulating layer 94 is provided on the surface of the foil 93, and the foil 95 is provided on the surface of the insulating layer 94. The substrate 91 is, for example, a woven or nonwoven fabric such as glass fiber or aramid fiber impregnated with a thermosetting epoxy resin or polyimide resin. For example, the foils 93 and 95 are metal foils such as copper or copper alloy foils. The foil 93 may be thinner than the foil 95. The carrier foil 92 and the foil 93 are laminated together via a release layer (not shown) made of an inorganic or organic material.
[0025] As the support substrate 90, a large support substrate from which a plurality of wiring substrates 100 can be obtained is used. In other words, the support substrate 90 has a plurality of regions in which structures corresponding to the wiring substrates 100 are formed. Then, after members that will become a plurality of wiring substrates 100 are produced at once, the members are cut along cutting lines CL to separate the members into individual wiring substrates 100. For ease of explanation, the parts that will ultimately become the respective components of the wiring substrate 100 will be described using the reference numerals of the final components.
[0026] The foil 95 has a first portion 96 and a second portion 97. The first portion 96 is a portion that is removed when the cavity 81 is formed, and the second portion 97 is a portion that becomes a pad 98. After the support substrate 90 is prepared, the foil 95 is processed so as to leave the first portion 96 and the second portion 97, as shown in FIG. 2(b). For example, the foil 95 is processed by etching. The foil 95 is an example of a first metal layer.
[0027] 2(c), an insulating layer 10 is provided on the insulating layer 94, the first portion 96, and the second portion 97 on both sides of the base 91, and a foil 51 is provided on the insulating layer 10. The insulating layer 10 covers the foil 95. The insulating layer 10 and the foil 51 can be provided by applying pressure while heating. The insulating layer 10 may also be formed by attaching an uncured resin film and heat treatment. The insulating layer 10 may also be formed by applying a liquid resin.
[0028] 3(a), the foil 51 and the insulating layer 10 are processed with a laser to form openings in the foil 51 and to form via holes 11 and 12 in the insulating layer 10. The via hole 12 reaches the first portion 96, and the via hole 11 reaches the second portion 97. For example, in a plan view, the via hole 12 is formed in a rectangular shape, and the via hole 11 is formed in a circular shape. The via hole 12 is an example of a first opening.
[0029] 3(b), a seed layer 52 is provided on both sides of the base 91, on the top surface of the first portion 96, the top surface of the second portion 97, the inner wall surfaces of the via holes 12 and 11, the inner wall surfaces of the openings formed in the foil 51, and the top surface of the foil 51. The seed layer 52 can be formed by, for example, electroless plating.
[0030] 3(c), plating resist layers 101 with openings are formed on the seed layer 52 on both sides of the base 91. The openings in the plating resist layers 101 are formed in the portions where the wiring layers 50 are to be formed.
[0031] Subsequently, as shown in FIG. 4(a), on both sides of the substrate 91, plating layers 53 are formed in the openings of the plating resist layer 101 by electrolytic plating using the seed layer 52 as a plating power supply path.
[0032] Next, as shown in FIG. 4(b), the plating resist layer 101 is removed.
[0033] 4(c), on both sides of the substrate 91, the portions of the seed layer 52 exposed from the plating layer 53 are removed, and further, the portions of the foil 51 exposed from the plating layer 53 are removed. The seed layer 52 and the foil 51 are removed by, for example, flash etching. In this manner, a metal layer 122 is formed, which includes a wiring layer 50 electrically connected to the second portion 97 and a third portion 150 in contact with the first portion 96. The wiring layer 50 and the third portion 150 include the foil 51, the seed layer 52, and the plating layer 53. The wiring layer 50 is formed in the via hole 11 and on the surface 10B of the insulating layer 10, and the third portion 150 is formed in the via hole 12 and on the surface 10B of the insulating layer 10. The metal layer 122 is an example of a second metal layer.
[0034] 5(a), an insulating layer 20, a via hole 21, a foil 61, a seed layer 62, and a plating layer 63 are formed on both sides of the substrate 91 in the same manner as the insulating layer 10, the via hole 11, the foil 51, the seed layer 52, and the plating layer 53. The insulating layer 20 covers the metal layer 122. In this manner, a metal layer 123 is formed having a wiring layer 60 electrically connected to the wiring layer 50. The wiring layer 60 includes the foil 61, the seed layer 62, and the plating layer 63. The wiring layer 60 is formed in the via hole 21 and on the surface 20B of the insulating layer 20. The metal layer 123 is an example of a third metal layer.
[0035] Next, as shown in FIG. 5(b), an insulating layer 30, a via hole 31, a foil 71, a seed layer 72, and a plating layer 73 are formed on both sides of the substrate 91 in the same manner as the insulating layer 10, the via hole 11, the foil 51, the seed layer 52, and the plating layer 53. The insulating layer 30 covers the metal layer 123. In this manner, a metal layer 124 is formed, which has a wiring layer 70 electrically connected to the wiring layer 60. The wiring layer 70 includes the foil 71, the seed layer 72, and the plating layer 73. The wiring layer 70 is formed in the via hole 31 and on the surface 30B of the insulating layer 30. The metal layer 124 is an example of a fourth metal layer.
[0036] 6(a), an insulating layer 40 is provided on the metal layer 124 on both sides of the base 91 in the same manner as the insulating layer 10. The insulating layer 40 covers the metal layer 124.
[0037] Subsequently, as shown in FIG. 6(b), the foil 93 and the carrier foil 92 are separated from each other, and the carrier foil 92 and the substrate 91 are peeled off.
[0038] 7(a), the foil 93 and the insulating layer 94 are processed with a laser to form an opening 85 in the foil 93 and the insulating layer 94. The opening 85 reaches the first portion 96. For example, the opening 85 is formed to have a rectangular shape in a plan view. The opening 85 is an example of a second opening.
[0039] 7(b), the first portion 96 and the third portion 150 are removed through the opening 85. At this time, the foil 93 is also removed. The foil 93, the first portion 96, and the third portion 150 can be removed by, for example, wet etching. By removing the first portion 96 and the third portion 150, a cavity 81 including the opening 85 is formed. The cavity 81 penetrates the insulating layers 94 and 10 and has a bottom surface 81A in the insulating layer 20.
[0040] 7(c), the insulating layer 94 is processed with a laser to form an opening 86 in the insulating layer 94. The opening 86 reaches the second portion 97. The insulating layer 40 is processed with a laser to form an opening 41 in the insulating layer 40. The opening 41 reaches the wiring layer 70. Furthermore, the insulating layer 20 is processed with a laser at the bottom surface 81A of the cavity 81 to form an opening 87 in the insulating layer 20 that reaches the wiring layer 60. The opening 86 is an example of a third opening.
[0041] 7(c) is then cut along the cutting lines CL using a slicer or the like. This separates the structures into individual pieces corresponding to the wiring boards 100, thereby obtaining a plurality of wiring boards 100 according to the embodiment. In this manner, the wiring boards 100 according to the embodiment can be manufactured.
[0042] [Effects of wiring board] In the wiring board 100, the cavity 81 can be formed by removing the first portion 96 of the foil 95 and the third portion 150 of the metal layer 122. The depth of the cavity 81 depends on the thicknesses of the insulating layer 94, the insulating layer 10, the foil 51, the seed layer 52, and the plating layer 53. Therefore, by adjusting the thicknesses of the insulating layer 94, the insulating layer 10, the foil 51, the seed layer 52, and the plating layer 53, a deep cavity 81 can be stably formed.
[0043] Furthermore, when removing the first portion 96 of the foil 95 and the third portion 150 of the metal layer 122, the second portion 97 of the foil 95, which will become the pad 98, is covered by the insulating layer 94. Therefore, the etching solution does not come into contact with the second portion 97, and etching of the second portion 97 can be prevented. In addition, penetration of the etching solution into the interface between the second portion 97 and the insulating layer 10 can also be suppressed.
[0044] Furthermore, since the pad 98 is formed from the foil 95, the surface of the pad 98 on the insulating layer 94 side has high flatness.
[0045] [Example of wiring board use] Next, a description will be given of an example of how the wiring board 100 is used. Figure 8 is a cross-sectional view illustrating a method of using the wiring board according to the embodiment.
[0046] 8(a), a semiconductor element 200, which is an example of an electronic component and includes a main body 201 and terminals 202, is mounted on the wiring board 100 so as to fit within a cavity 81. The terminals 202 are connected to the wiring layer 60. The cavity 81 may be filled with a sealing resin (not shown) to seal the semiconductor element 200.
[0047] 8(b), in the second usage method, similarly to the first usage method, semiconductor element 200 is mounted on wiring substrate 100 so as to fit within cavity 81. Furthermore, capacitor 300, which is an example of an electronic component and includes body 301 and terminals 302, is mounted on insulating layer 40. Terminals 302 are connected to wiring layer 70. Alternatively, capacitor 300 may be mounted in cavity 81 and semiconductor element 200 may be mounted on insulating layer 40. In this case, cavity 81 may be filled with a sealing resin (not shown) to seal capacitor 300.
[0048] [Modification of the embodiment] Next, a modified example of the embodiment will be described. Fig. 9 is a cross-sectional view illustrating a wiring board according to a modified example of the embodiment and a method of using the same.
[0049] 9(a), in a wiring board 600 according to the first modification, an opening 87 is not formed in a bottom surface 81A of a cavity 81. Other configurations of the wiring board 600 are similar to those of the wiring board 100.
[0050] For example, a semiconductor element 400 having a main body 401 and terminals 402, which are an example of an electronic component, is placed in cavity 81 and mounted on wiring board 600 with terminals 402 facing downward. An adhesive 403 such as a conductive adhesive is provided on bottom surface 81A, and semiconductor element 400 is adhered to bottom surface 81A by adhesive 403. Terminals 402 of semiconductor element 400 may be connected to pads 98 by bonding wires (not shown). Alternatively, cavity 81 may be filled with sealing resin (not shown) to seal semiconductor element 400.
[0051] As shown in FIG. 9(b), the wiring board 700 according to the second modification has a plurality of insulating layers 710 between the insulating layer 30 and the insulating layer 40. The wiring board 700 has wiring layers 750 between adjacent insulating layers 30 and 710, between two adjacent insulating layers 710, and between adjacent insulating layers 710 and 40. Via holes are formed in the insulating layers 710, and each wiring layer 750 is electrically connected to the wiring layer 750 or 70 immediately below. The insulating layers 10 and 20 are thicker than the insulating layer 710. In the second modification, the insulating layers 30, 40, and 710 are examples of a fourth insulating layer, and the wiring layers 70 and 750 are examples of a third wiring layer.
[0052] The wiring board 700 has an antenna circuit 410 including at least a part of the wiring layers 50 and 60, and a radio frequency (RF) module circuit 420 including at least a part of the wiring layers 70 and 750.
[0053] Other configurations of the wiring board 700 are similar to those of the wiring board 100 .
[0054] In the second modification, the antenna circuit 410 includes at least a portion of the wiring layers 50 and 60, and the high-frequency module circuit 420 includes at least a portion of the wiring layers 70 and 750. Furthermore, the insulating layers 10 and 20 are thicker than the insulating layer 710. Therefore, good characteristics can be obtained for both the antenna circuit 410 and the high-frequency module circuit 420.
[0055] In the present disclosure, the second insulating layer does not necessarily have to be composed of a single insulating layer, but may be composed of multiple laminated insulating layers. In this case, it is easier to form a deeper cavity. Furthermore, when the second insulating layer is composed of multiple insulating layers, a wiring layer may be provided between adjacent second insulating layers.
[0056] Although the preferred embodiments have been described in detail above, the present disclosure is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims. [Explanation of symbols]
[0057] 10, 20, 30, 40, 94, 710 Insulation layer 10A, 10B, 20A, 20B, 30A, 30B, 40A, 40B, 94A, 94B side 50, 60, 70, 750 wiring layers 51, 61, 71, 95 foil 52, 62, 72 seed layer 53, 63, 73 plating layer 96 Part 1 97 Part 2 98 Pads 100, 600, 700 wiring board 122, 123, 124 metal layer 150 Part 3 410 Antenna Circuit 420 High Frequency Module Circuit
Claims
1. a first insulating layer having a first surface; a pad provided on the first surface; a second insulating layer provided on the first surface, the second insulating layer having a second surface facing the first surface and a third surface opposite the second surface, the second insulating layer covering the pad; a first wiring layer provided on the third surface; a third insulating layer provided on the third surface and covering the first wiring layer; and a recessed portion is formed through the first insulating layer and the second insulating layer and having a bottom surface in the third insulating layer; The wiring board has an opening formed in the first insulating layer, and the pad is exposed through the opening.
2. the third insulating layer has a fourth surface facing the third surface and a fifth surface opposite to the fourth surface, a second wiring layer provided on the fifth surface; a plurality of fourth insulating layers stacked on the fifth surface and covering the second wiring layer; a third wiring layer provided between adjacent fourth insulating layers; The wiring board according to claim 1 , comprising:
3. an antenna circuit including at least a part of the first wiring layer; a high-frequency module circuit including at least a part of the third wiring layer; The wiring board according to claim 2 , comprising:
4. The wiring board according to claim 3 , wherein the second insulating layer is thicker than the fourth insulating layer sandwiching the third wiring layer included in the high-frequency module circuit.
5. providing a first metal layer on a first surface of a first insulating layer having a first surface, the first metal layer having a first portion and a second portion; processing the first metal layer to leave the first portion and the second portion on the first surface; a step of providing a second insulating layer on the first surface, the second insulating layer having a second surface opposite to the first surface and a third surface opposite to the second surface, the second insulating layer covering the first portion and the second portion; forming a first opening in the second insulating layer that reaches the first portion; forming a second metal layer in the first opening and on the third surface, the second metal layer having a third portion in contact with the first portion; providing a third insulating layer on the third surface to cover the second metal layer; forming a second opening in the first insulating layer that reaches the first portion; removing the first portion and the third portion through the second opening; forming a third opening in the first insulating layer, the third opening reaching the second portion; A method for manufacturing a wiring board having the above structure.
6. the third insulating layer has a fourth surface facing the third surface and a fifth surface opposite to the fourth surface, providing a third metal layer on the fifth surface; laminating a plurality of fourth insulating layers covering the third metal layer on the fifth surface; providing a fourth metal layer between adjacent fourth insulating layers; The method for manufacturing a wiring board according to claim 5 , further comprising the steps of:
Citation Information
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