Semiconductor device and method of manufacturing the same

Abstract

To provide a semiconductor device capable of improving characteristics.SOLUTION: According to an embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, and a first insulating member. The third electrode contains silicon. The semiconductor member includes first and second semiconductor layers. The third electrode includes first and second electrode regions. The first concentration of a first element in the first electrode region differs from the second concentration of the first element in the second electrode region. The first element includes at least one selected from the group consisting of B, Ga, In, and Al. The first electrode region includes: a first region between a third partial region of the first semiconductor layer and the second electrode region; a second region between a first semiconductor portion and the second electrode region in a first direction; and a third region between the second electrode region and a second semiconductor portion in the first direction. The first thickness of the first region along a second direction is 30 nm or more.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] For example, in semiconductor devices such as transistors, improvements in characteristics are desired. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6337726 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present invention provide a semiconductor device capable of improving characteristics and a method for manufacturing the same. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first insulating member. The third electrode includes silicon. The position of the third electrode in a first direction from the first electrode to the second electrode is between the position of the first electrode in the first direction and the position of the second electrode in the first direction. The third electrode includes a first electrode region and a second electrode region. The semiconductor member includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is Al x1 Ga 1-x1It includes N(0≦x1<1). The first semiconductor layer includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second direction from the first partial region to the first electrode intersects the first direction. The direction from the second partial region to the second electrode is along the second direction. The direction from the third partial region to the third electrode is along the second direction. The position of the fourth partial region in the first direction is between the position of the first partial region in the first direction and the position of the third partial region in the first direction. The position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and the position of the second partial region in the first direction. The second semiconductor layer is Al x2 Ga 1-x2 It includes N(0<x2≦1, x1<x2). The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The direction from the fourth partial region to the first semiconductor portion is along the second direction. The direction from the fifth partial region to the second semiconductor portion is along the second direction. The first insulating member is provided between the semiconductor member and the third electrode. The first concentration of the first element in the first electrode region is different from the second concentration of the first element in the second electrode region. The first element includes at least one selected from the group consisting of B, Ga, In, and Al. The first electrode region includes a first region between the third partial region and the second electrode region in the second direction, a second region between the first semiconductor portion and the second electrode region in the first direction, and a third region between the second electrode region and the second semiconductor portion in the first direction. The first thickness along the second direction of the first region is 30 nm or more.

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating a part of the semiconductor device according to the first embodiment. [Figure 3]3(a) to 3(c) are schematic views illustrating the semiconductor device according to the first embodiment. [Figure 4] 4(a) to 4(c) are schematic views illustrating the semiconductor device according to the first embodiment. [Figure 5] 5A and 5B are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 6] 6A and 6B are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 7] 7A and 7B are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. FIG. 2 is a schematic cross-sectional view illustrating a part of the semiconductor device according to the first embodiment. As shown in FIG. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41.

[0009] The third electrode 53 includes silicon. The third electrode 53 includes, for example, polysilicon.

[0010] A first direction D1 from the first electrode 51 to the second electrode 52 is defined as the X-axis direction. A direction perpendicular to the X-axis direction is defined as the Z-axis direction. A direction perpendicular to the X-axis and Z-axis directions is defined as the Y-axis direction.

[0011] The position of the third electrode 53 in the first direction D1 is between the position of the first electrode 51 in the first direction D1 and the position of the second electrode 52 in the first direction D1. The third electrode 53 includes a first electrode region 53a and a second electrode region 53b.

[0012] The semiconductor member 10M includes a first semiconductor layer 10 and a second semiconductor layer 20.

[0013] The first semiconductor layer 10 is Al x1 Ga 1-x1 N (0≦x1<1). In one example, the composition ratio x1 may be equal to or greater than 0 and less than 0.15. The first semiconductor layer 10 may be, for example, a GaN layer.

[0014] The first semiconductor layer 10 includes a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15. A second direction D2 from the first partial region 11 to the first electrode 51 intersects with the first direction D1. The second direction D2 may be, for example, the Z-axis direction.

[0015] The direction from the second partial region 12 to the second electrode 52 is along the second direction D2. The direction from the third partial region 13 to the third electrode 53 is along the second direction D2. The position of the fourth partial region 14 in the first direction D1 is between the position of the first partial region 11 in the first direction D1 and the position of the third partial region 13 in the first direction D1. The position of the fifth partial region 15 in the first direction D1 is between the position of the third partial region 13 in the first direction D1 and the position of the second partial region 12 in the first direction D1. The boundaries between these partial regions may be clear or unclear.

[0016] For example, the region overlapping with the first electrode 51 in the second direction D2 corresponds to the first partial region 11. For example, the region overlapping with the second electrode 52 in the second direction D2 corresponds to the second partial region 12. For example, the region overlapping with at least a part of the third electrode 53 in the second direction D2 corresponds to the third partial region 13.

[0017] The second semiconductor layer 20 contains Al x2 Ga 1-x2 N (0 < x2 ≤ 1, x1 < x2). The composition ratio x2 may be, for example, 0.15 or more and 0.40 or less. The second semiconductor layer 20 may be, for example, an AlGaN layer.

[0018] The second semiconductor layer 20 includes a first semiconductor portion 21 and a second semiconductor portion 22. The direction from the fourth partial region 14 to the first semiconductor portion 21 is along the second direction D2. The direction from the fifth partial region 15 to the second semiconductor portion 22 is along the second direction D2. For example, the first electrode 51 is electrically connected to the first semiconductor portion 21. For example, the second electrode 52 is electrically connected to the second semiconductor portion 22.

[0019] The first insulating member 41 is provided between the semiconductor member 10M and the third electrode 53. At least a part of the third electrode 53 is provided between the first semiconductor portion 21 and the second semiconductor portion in the second direction D2. At least a part of the third electrode 53 may be provided between a part of the fourth partial region 14 and a part of the fifth partial region 15 in the second direction D2.

[0020] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. For example, the potential of the third electrode 53 may be a potential based on the potential of the first electrode 51. The first electrode 51 functions as, for example, a source electrode. The second electrode 52 functions as, for example, a drain electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor. The third electrode 53 is, for example, a recessed gate electrode. For example, a normally-off operation can be obtained.

[0021] The first semiconductor layer 10 includes a portion facing the second semiconductor layer 20. A carrier region 10C is formed in this portion. The carrier region 10C is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).

[0022] The distance along the first direction D1 between the first electrode 51 and the third electrode 53 is shorter than the distance along the first direction D1 between the third electrode 53 and the second electrode 52. This makes it easier to obtain stable operation. The first electrode 51, the second electrode 52, and the third electrode 53 may extend along the third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The third direction D3 may be, for example, the Y-axis direction.

[0023] 2, the first electrode region 53a includes a first region r1, a second region r2, and a third region r3. The first region r1 is provided between the third partial region 13 and the second electrode region 53b in the second direction D2. The second region r2 is provided between the first semiconductor portion 21 and the second electrode region 53b in the first direction D1. The third region r3 is provided between the second electrode region 53b and the second semiconductor portion 22 in the first direction D1.

[0024] 2, the first insulating member 41 includes a first insulating region 41a, a second insulating region 41b, and a third insulating region 41c. The first insulating region 41a is provided between the third partial region 13 and the third electrode 53 in the second direction D2. The second insulating region 41b is provided between the first semiconductor portion 21 and the third electrode 53 in the first direction D1. The third insulating region 41c is provided between the third electrode 53 and the second semiconductor portion 22 in the second direction D2.

[0025] For example, the first region r1 is provided between the first insulating region 41a and the second electrode region 53b in the second direction D2. The second region r2 is provided between the second insulating region 41b and the second electrode region 53b in the first direction D1. The third region r3 is provided between the second electrode region 53b and the third insulating region 41c in the first direction D1.

[0026] A first concentration of the first element in the first electrode region 53a is different from a second concentration of the first element in the second electrode region 53b. The first element is at least one selected from the group consisting of B, Ga, In, and Al. The first element provides electrical conductivity to the first electrode region 53a and the second electrode region 53b.

[0027] In the embodiment, the third electrode 53 includes a plurality of electrode regions (first electrode region 53a and second electrode region 53b). With this configuration, stable characteristics can be obtained at the bottom and side portions of the third electrode 53.

[0028] For example, in the first reference example, the third electrode 53 is one electrode region (one layer). For example, the first element is introduced by ion implantation into the silicon layer that becomes the third electrode 53. In this case, it is difficult to obtain a uniform concentration of the first element at the bottom and side portions of the third electrode 53. In the first reference example, it is difficult to obtain the desired characteristics.

[0029] For example, in the second reference example, the third electrode 53 is one electrode region (one layer). For example, the silicon layer that becomes the third electrode 53 is formed using a source gas containing the first element and a source gas containing silicon. In this case, a heat treatment is performed at a high temperature for a long time to activate the first element. The heat treatment may cause Ga and the like in the semiconductor member 10M to diffuse, making it difficult to obtain the desired characteristics. The heat treatment may cause Si or the first element and the like contained in the silicon layer that becomes the third electrode 53 to diffuse toward the first insulating member 41 or the semiconductor member 10M, making it difficult to obtain the desired characteristics.

[0030] In the embodiment, the third electrode 53 includes a plurality of electrode regions (first electrode region 53a and second electrode region 53b). It is sufficient that the concentration of the first element is uniform in the region (first electrode region 53a) of the third electrode 53 facing the semiconductor member 10M. This makes it easy to stably obtain uniform surface characteristics (such as work function) in the region (first electrode region 53a) of the third electrode 53 facing the semiconductor member 10M. This allows stable characteristics (such as threshold voltage). Meanwhile, the second electrode region 53b functions as a layer that reduces the electrical resistance of the third electrode 53. In the embodiment, for example, a stable threshold voltage and low electrical resistance are obtained. According to the embodiment, a semiconductor device capable of improving characteristics can be provided.

[0031] In one example, the silicon layer that becomes the first electrode region 53a may be formed using a source gas containing the first element and a source gas containing silicon. A silicon layer may be formed on such first electrode region 53a, and the first element may be introduced into the silicon layer by ion implantation. This forms the second electrode region 53b. Because the first electrode region 53a is thin, heat treatment can be performed in a short time. Diffusion of Ga and the like in the semiconductor member 10M is suppressed. In the second electrode region 53b, the requirement for uniformity in the concentration distribution of the first element is relaxed. This facilitates manufacturing.

[0032] As shown in FIG. 2, the thickness of the first region r1 along the second direction D2 is defined as a first thickness t1. The first thickness t1 is, for example, 30 nm or more. This allows for stable film quality. Uniform characteristics are easily obtained at the bottom of the third electrode 53.

[0033] The thickness of the second region r2 along the first direction D1 is defined as the second thickness t2. The second thickness t2 is, for example, 30 nm or more. This allows for stable film quality. Uniform characteristics are easily obtained on the side of the third electrode 53.

[0034] The thickness of the third region r3 along the first direction D1 is defined as a third thickness t3. The third thickness t3 is, for example, 30 nm or more. This allows for stable film quality. Uniform characteristics are easily obtained on the side of the third electrode 53.

[0035] The first thickness t1 may be, for example, 150 nm or less. The second thickness t2 may be, for example, 150 nm or less. The third thickness t3 may be, for example, 150 nm or less. If these thicknesses are not excessively thick, for example, the temperature and time of the heat treatment can be relaxed.

[0036] 3(a) to 3(c) are schematic views illustrating the semiconductor device according to the first embodiment. FIG. 3(a) schematically shows the profile of the first element in a portion including the first region r1. FIG. 3(b) schematically shows the profile of the first element in a portion including the second region r2. FIG. 3(c) schematically shows the profile of the first element in a portion including the third region r3. The horizontal axis of FIG. 3(a) represents the position pZ in the Z-axis direction. The horizontal axes of FIGS. 3(b) and 3(c) represent the position pX in the X-axis direction. The vertical axes of these figures represent the concentration CC of the first element.

[0037] As shown in Figures 3(a) to 3(c), the first concentration C1 of the first element in the first electrode region 53a is different from the second concentration C2 of the first element in the second electrode region 53b. In this example, the first concentration C1 is higher than the second concentration C2. In the first electrode region 53a where the first concentration C1 is high, a high work function is easily obtained. This makes it easier to obtain a high threshold voltage. For example, stable normally-off operation is easily obtained.

[0038] For example, the first concentration C1 may be 1.3 to 30 times the second concentration C2. For example, a high threshold voltage is easily obtained. For example, low electrical resistance is easily obtained in the second electrode region 53b.

[0039] The concentration of the first element in the first electrode region 53a may be substantially constant. For example, as shown in FIG. 3(a), the highest value of the concentration CC of the first element in the first region r1 is defined as a first highest value px1. The lowest value of the concentration CC of the first element in the first region r1 is defined as a first lowest value pn1. A first ratio of the difference between the first highest value px1 and the first lowest value pn1 to the first lowest value pn1 may be 0.1 or less.

[0040] The first concentration C1 may be half the sum of the first highest value px1 and the first lowest value pn1. The first highest value px1 is, for example, 5×10 20 cm -3 5x10 or more 21 cm -3 In one example, the first concentration C1 is 5×10 20 cm -3 5x10 or more 21 cm -3 The position in the Z axis direction corresponding to the first highest value px1 and the position in the Z axis direction corresponding to the first lowest value pn1 may be any position within the first region r1.

[0041] As shown in FIG. 3(b), the maximum value of the concentration CC of the first element in the second region r2 is defined as a second maximum value px2. The minimum value of the concentration CC of the first element in the second region r2 is defined as a second minimum value pn2. A second ratio of the difference between the second maximum value px2 and the second minimum value pn2 to the second minimum value pn2 may be 0.1 or less. The second maximum value px2 may be, for example, 5×10 20 cm -3 5x10 or more 21 cm -3 The position in the X-axis direction corresponding to the second highest value px2 and the position in the X-axis direction corresponding to the second lowest value pn2 may be any position within the second region r2.

[0042] As shown in FIG. 3(c), the highest value of the concentration CC of the first element in the third region r3 is defined as a third highest value px3. The lowest value of the concentration CC of the first element in the third region r3 is defined as a third lowest value pn3. A third ratio of the difference between the third highest value px3 and the third lowest value pn3 to the third lowest value pn3 is 0.1 or less. The third highest value px3 is, for example, 5×10 20cm -3 The above 5×10 21 cm -3 The following is acceptable. The position in the X-axis direction corresponding to the third highest value px3 and the position in the X-axis direction corresponding to the third lowest value pn3 may be any position within the third region r3.

[0043] In an embodiment, the second size of the second crystal grains in the second electrode region 53b may be larger than the first size of the first crystal grains in the first electrode region 53a. By having a larger second size, it is easier to obtain a low electrical resistance in the second electrode region 53b. By having a smaller first size, it is easier to obtain uniform characteristics in the first electrode region 53a.

[0044] As shown in FIG. 2, the semiconductor device 110 may further include a first compound member 31. The first compound member 31 contains Al<所 z1 Ga 1-z1 N (x2 < z1 ≦ 1). The composition ratio z1 may be, for example, 0.85 or more and 1 or less. The first compound member 31 may be, for example, an AlN layer.

[0045] The first compound member 31 includes a first compound region 31a, a second compound region 31b, and a third compound region 31c. The first compound region 31a is provided between the third partial region 13 and the first insulating member 41 (for example, the first insulating region 41a) in the second direction D2. The second compound region 31b is provided between the first semiconductor portion 21 and the first insulating member 41 (the second insulating region 41b) in the first direction D1. The third compound region 31c is provided between the first insulating member 41 (the third insulating region 41c) and the second semiconductor portion 22 in the first direction D1.

[0046] As shown in FIG. 2, the third electrode 53 includes a first surface F1 and a second surface F2. The first surface F1 faces the third partial region 13 in the second direction D2. The second surface F2 faces the first semiconductor portion 21 in the first direction D1. The second surface F2 may be inclined with respect to the first surface F1. The second surface F2 may also be substantially perpendicular to the first surface F1.

[0047] As shown in FIG. 1, the semiconductor device 110 includes a first conductive layer 61 and a second conductive layer 62. The second electrode region 53b is located between the first electrode region 53a and the second conductive layer 62. The first conductive layer 61 is located between the second electrode region 53b and the second conductive layer 62. The first conductive layer 61 includes at least one selected from the group consisting of, for example, Ti, Ta, and W. The first conductive layer 61 may include, for example, TiN. The second conductive layer 62 includes at least one selected from the group consisting of, for example, Al, Cu, Au, Ag, and Ni. The first conductive layer 61 is a barrier metal. The second conductive layer 62 is, for example, a wiring layer.

[0048] As shown in FIG. 1 , the semiconductor device 110 may include a base 10S and a nitride layer 10B. The nitride layer 10B is provided between the base 10S and the first semiconductor layer 10. The nitride layer 10B contains Al, Ga, and N. The nitride layer 10B is, for example, a buffer layer. For example, the nitride layer 10B is provided on the base 10S. The first semiconductor layer 10 is provided on the nitride layer 10B. The second semiconductor layer 20 is provided on the first semiconductor layer 10.

[0049] The semiconductor device 110 may further include a second insulating member 42. The second insulating member 42 includes a first insulating portion 42a and a second insulating portion 42b. The first semiconductor portion 21 is located between the fourth sub-region 14 and the first insulating portion 42a in the second direction D2. The second semiconductor portion 22 is located between the fifth sub-region 15 and the second insulating portion 42b in the second direction D2. The second insulating member 42 includes, for example, silicon and nitrogen. The second insulating member 42 is, for example, silicon nitride. The second insulating member 42 protects, for example, the second semiconductor layer 20.

[0050] 4(a) to 4(c) are schematic views illustrating the semiconductor device according to the first embodiment. These figures illustrate the profile of the first element in the semiconductor device 111 according to the embodiment. Figure 4(a) shows a schematic profile of the first element in a portion including the first region r1, Figure 4(b) shows a schematic profile of the first element in a portion including the second region r2, and Figure 4(c) shows a schematic profile of the first element in a portion including the third region r3.

[0051] As shown in these figures, a first concentration C1 of the first element in the first electrode region 53a is different from a second concentration C2 of the first element in the second electrode region 53b. In the semiconductor device 111, the first concentration C1 is lower than the second concentration C2. Except for this, the configuration of the semiconductor device 111 may be similar to the configuration of the semiconductor device 110.

[0052] In the semiconductor device 111, the second concentration C2 is high. This reduces the electrical resistance of the third electrode 53. In the semiconductor device 111, for example, the first concentration C1 is low. This optimizes the characteristics (such as electrical resistance) of the first electrode region 53a. In the semiconductor device 111, for example, an appropriate threshold voltage and low electrical resistance can be obtained. According to the embodiment, a semiconductor device capable of improving characteristics can be provided.

[0053] In the semiconductor device 111, the second concentration C2 may be 1.3 times or more and 30 times or less the first concentration C1.

[0054] The concentration of the first element may be substantially constant in the first electrode region 53a in the semiconductor device 111. For example, as shown in FIG. 4(a), a first ratio of the difference between a first maximum value px1 of the concentration CC of the first element in the first region r1 and a first minimum value pn1 of the concentration CC of the first element in the first region r1 to the first minimum value pn1 may be 0.1 or less.

[0055] The first concentration C1 may be half the sum of the first highest value px1 and the first lowest value pn1. The first highest value px1 is, for example, 1×10 19 cm -3 More than 1×10 20 cm -3 In one example, the first concentration C1 may be 1×10 19 cm-3 More than 1×10 20 cm -3 The position in the Z axis direction corresponding to the first highest value px1 and the position in the Z axis direction corresponding to the first lowest value pn1 may be any position within the first region r1.

[0056] As shown in FIG. 4B, a second ratio of the difference between the second maximum value px2 of the concentration CC of the first element in the second region r2 and the second minimum value pn2 of the concentration CC of the first element in the second region r2 to the second minimum value pn2 may be 0.1 or less. The second maximum value px2 may be, for example, 1×10 19 cm -3 More than 1×10 20 cm -3 The position in the X-axis direction corresponding to the second highest value px2 and the position in the X-axis direction corresponding to the second lowest value pn2 may be any position within the second region r2.

[0057] As shown in FIG. 4C, a third ratio of the difference between the third maximum value px3 of the concentration CC of the first element in the third region r3 and the third minimum value pn3 of the concentration CC of the first element in the third region r3 to the third minimum value pn3 is 0.1 or less. The third maximum value px3 is, for example, 1×10 19 cm -3 More than 1×10 20 cm -3 The position in the X-axis direction corresponding to the third highest value px3 and the position in the X-axis direction corresponding to the third lowest value pn3 may be any position within the third region r3.

[0058] In the semiconductor device 111, the second size of the second crystal grains in the second electrode region 53b may be larger than the first size of the first crystal grains in the first electrode region 53a. The larger second size facilitates low electrical resistance in the second electrode region 53b. The smaller first size facilitates uniform characteristics in the first electrode region 53a.

[0059] (Second embodiment) FIG. 5(a), FIG. 5(b), FIG. 6(a), FIG. 6(b), FIG. 7(a) and FIG. 7(b) are schematic cross-sectional views illustrating a method of manufacturing a semiconductor device according to the second embodiment. As shown in FIG. 5(a), a semiconductor member 10M is prepared. The semiconductor member 10M includes a first semiconductor layer 10 and a second semiconductor layer 20 provided on the first semiconductor layer 10. The first semiconductor layer 10 contains Al x1 Ga 1-x1 N (0 ≦ x1 < 1). The second semiconductor layer 20 contains Al x2 Ga 1-x2 N (0 < x2 ≦ 1, x1 < x2).

[0060] As shown in FIG. 5(b), a part of the second semiconductor layer 20 is removed to form a hole 53h reaching the first semiconductor layer 10.

[0061] As shown in FIG. 6(b), a first electrode region 53a is formed on the bottom and side surfaces of the hole 53h. The first electrode region 53a contains a first element and silicon. The first element contains at least one selected from the group consisting of B, Ga, In, and Al. The first thickness t1 of the first electrode region 53a is 30 nm or more. The formation of the first electrode region 53a is formed by, for example, CVD (Chemical Vapor Deposition). The formation of the first electrode region 53a is formed by, for example, ALD (Atomic Layer Deposition).

[0062] As shown in FIG. 6(a), in this example, between the formation of the hole 53h and the formation of the first electrode region 53a, a first compound member 31 and a first insulating member 41 are formed on the surface of the hole 53h. Further, a second insulating member 42 is formed between the formation of the hole 53h and the formation of the first compound member 31.

[0063] As shown in FIG. 7(a), a second electrode region 53b containing silicon is formed on the first electrode region 53a. The formation of the first electrode region 53a and the second electrode region 53b may be performed continuously.

[0064] 7(b), the first element 81 is implanted into the second electrode region 53b. Thereafter, the second electrode region 53b and the first electrode region 53a are processed to obtain the third electrode 53. Furthermore, the first electrode 51 and the second electrode 52 are formed. In this way, the semiconductor device 110 or the semiconductor device 111 is obtained.

[0065] In an embodiment, information about the composition of the material is obtained by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray spectroscopy), etc. In an embodiment, information about the length and thickness is obtained by electron microscope observation, etc.

[0066] The embodiments may include the following technical solutions. (Technical proposal 1) A first electrode; A second electrode; a third electrode including silicon, wherein a position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction, and the third electrode includes a first electrode region and a second electrode region; A semiconductor member including a first semiconductor layer and a second semiconductor layer, The first semiconductor layer is Al x1 Ga 1-x1 N (0≦x1<1), the first semiconductor layer includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a second direction from the first partial region to the first electrode intersects with the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to the third electrode is along the second direction, a position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, and a position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction, The second semiconductor layer contains Al x2 Ga 1-x2 N (0 < x2 ≤ 1, x1 < x2), and the second semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The direction from the fourth partial region to the first semiconductor portion is along the second direction, and the direction from the fifth partial region to the second semiconductor portion is along the second direction. The semiconductor member, A first insulating member provided between the semiconductor member and the third electrode, and comprises, The first concentration of the first element in the first electrode region is different from the second concentration of the first element in the second electrode region, The first element includes at least one selected from the group consisting of B, Ga, In, and Al, The first electrode region, A first region between the third partial region and the second electrode region in the second direction, A second region between the first semiconductor portion and the second electrode region in the first direction, A third region between the second electrode region and the second semiconductor portion in the first direction, and comprises, A first thickness along the second direction of the first region is 30 nm or more. A semiconductor device.

[0067] (Technical solution 2) For the semiconductor device according to Technical solution 1, a first ratio of a difference between a first maximum value and a first minimum value of the concentration of the first element in the first region to the first minimum value is 0.1 or less.

[0068] (Technical solution 3) For the semiconductor device according to Technical solution 2, the first concentration is 1 / 2 of the sum of the first maximum value and the first minimum value.

[0069] (Technical solution 4) The first concentration is 5×10 20 cm -3 or more and 5×10 21 cm -3A semiconductor device according to Technical Solution 2 or 3, which is as follows:

[0070] (Technical proposal 5) The semiconductor device according to any one of Technical Schemes 1 to 4, wherein the second region has a second thickness along the first direction of 30 nm or more.

[0071] (Technical proposal 6) The semiconductor device described in Technical Proposal 5, wherein the second thickness is 150 nm or less.

[0072] (Technical proposal 7) The semiconductor device described in Technical Proposal 5 or 6, wherein a second ratio of a difference between a second highest value of the concentration of the first element in the second region and a second lowest value of the concentration of the first element in the second region to the second lowest value is 0.1 or less.

[0073] (Technical proposal 8) The second highest value is 5 x 10 20 cm -3 5x10 or more 21 cm -3 A semiconductor device according to Technical Solution 7, which is as follows:

[0074] (Technical proposal 9) The semiconductor device according to any one of Technical Schemes 1 to 8, wherein the third region has a third thickness along the first direction of 30 nm or more.

[0075] (Technical proposal 10) The semiconductor device described in Technical Proposal 9, wherein a second ratio of the difference between a third highest value of the concentration of the first element in the third region and a third lowest value of the concentration of the first element in the third region to the third lowest value is 0.1 or less.

[0076] (Technical proposal 11) The third highest value is 5 x 10 20 cm -3 5x10 or more 21 cm -3 A semiconductor device according to Technical Proposal 10, which is as follows:

[0077] (Technical Solution 12) The semiconductor device according to any one of Technical Solutions 1 to 11, wherein the first concentration is 1.3 times or more and 30 times or less the second concentration.

[0078] (Technical Solution 13) The semiconductor device according to any one of Technical Solutions 1 to 3, wherein the second concentration is 1.3 times or more and 30 times or less the first concentration.

[0079] (Technical Solution 14) The semiconductor device according to any one of Technical Solutions 1 to 13, wherein the second size of the second crystal grains in the second electrode region is larger than the first size of the first crystal grains in the first electrode region.

[0080] (Technical Solution 15) Al z1 Ga 1-z1 Further comprising a first compound member containing N(x2 < z1 ≦ 1), The first compound member is A first compound region between the third partial region and the first insulating member in the second direction, A second compound region between the first semiconductor portion and the first insulating member in the first direction, A third compound region between the first insulating member and the second semiconductor portion in the first direction, The semiconductor device according to any one of Technical Solutions 1 to 14, comprising

[0081] (Technical Solution 16) The third electrode is A first surface facing the third partial region in the second direction, A second surface facing the first semiconductor portion in the first direction, Including The semiconductor device according to any one of Technical Solutions 1 to 15, wherein the second surface is inclined with respect to the first surface.

[0082] (Technical Solution 17) A first conductive layer, A second conductive layer, Further comprising The second electrode region is between the first electrode region and the second conductive layer, The first conductive layer is between the second electrode region and the second conductive layer, The first conductive layer includes at least one selected from the group consisting of Ti, Ta, and W, The second conductive layer includes at least one selected from the group consisting of Al, Cu, Au, Ag, and Ni. The semiconductor device according to any one of Technical Solutions 1 to 16.

[0083] (Technical Solution 18) The first thickness is 150 nm or less. The semiconductor device according to any one of Technical Solutions 1 to 16.

[0084] (Technical Solution 19) At least a part of the first electrode region is between the fourth partial region and the fifth partial region in the first direction. The semiconductor device according to any one of Technical Solutions 1 to 18.

[0085] (Technical Solution 20) Al x1 Ga 1-x1 A first semiconductor layer including N (0≦x1<1), and Al provided on the first semiconductor layer x2 Ga 1-x2 A second semiconductor layer including N (0<x2≦1, x1<x2) are provided. Prepare a semiconductor member including, Remove a part of the second semiconductor layer to form a hole reaching the first semiconductor layer, On the bottom and side surfaces of the hole, form a first electrode region including a first element and silicon. The first element includes at least one selected from the group consisting of B, Ga, In, and Al. The first thickness of the first electrode region is 30 nm or more, On the first electrode region, form a second electrode region including silicon, Inject the first element into the second electrode region. A method for manufacturing a semiconductor device.

[0086] According to the embodiment, a semiconductor device and a manufacturing method thereof capable of improving characteristics can be provided.

[0087] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of each element included in the semiconductor device, such as the electrodes, semiconductor members, semiconductor layers, compound members, and insulating members, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0088] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0089] In addition, all semiconductor devices and manufacturing methods thereof that can be implemented by a person skilled in the art by making appropriate design modifications based on the semiconductor device and manufacturing method thereof described above as embodiments of the present invention also fall within the scope of the present invention, as long as they include the gist of the present invention.

[0090] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0091] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0092] 10, 20: first and second semiconductor layers, 10B: nitride layer, 10C: carrier region, 10M: semiconductor member, 10S: substrate, 11-15: first to fifth region, 21, 22: first and second semiconductor portion, 31: first compound member, 31a-31c: first to third compound region, 41, 42: first and second insulating member, 41a-41c: first to third insulating region, 42a, 42b: first and second insulating portion, 51-53: first to third electrodes, 53a, 53b: first and second electrode region, 53h: hole, 61, 62: first and second conductive layer, 110, 111: semiconductor device, C1, C2: first and second concentration, CC: concentration, D1~D3: 1st to 3rd directions, F1, F2: 1st and 2nd surfaces, pX, pZ: position, pn1~pn3: 1st to 3rd minimum values, px1~px3: 1st to 3rd maximum values, r1~r3: 1st to 3rd regions, t1~t3: 1st to 3rd thicknesses

Claims

1. A first electrode; A second electrode; a third electrode including silicon, wherein a position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction, and the third electrode includes a first electrode region and a second electrode region; A semiconductor member including a first semiconductor layer and a second semiconductor layer, The first semiconductor layer is Al ｘ１ Ga １－ｘ１ N (0≦x1<1), the first semiconductor layer includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a second direction from the first partial region to the first electrode intersects with the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to the third electrode is along the second direction, a position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, and a position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction, The second semiconductor layer is Al ｘ２ Ga １－ｘ２ N (0<x2≦1, x1<x2), the second semiconductor layer includes a first semiconductor portion and a second semiconductor portion, the direction from the fourth partial region to the first semiconductor portion is along the second direction, and the direction from the fifth partial region to the second semiconductor portion is along the second direction; a first insulating member provided between the semiconductor member and the third electrode; Equipped with a first concentration of a first element in the first electrode region is different from a second concentration of the first element in the second electrode region; the first element includes at least one selected from the group consisting of B, Ga, In, and Al; The first electrode region is a first region between the third partial region and the second electrode region in the second direction; a second region between the first semiconductor portion and the second electrode region in the first direction; a third region between the second electrode region and the second semiconductor portion in the first direction; Including, The first region has a first thickness along the second direction of 30 nm or more.

2. 2. The semiconductor device according to claim 1, wherein a first ratio of a difference between a first highest value of the concentration of the first element in the first region and a first lowest value of the concentration of the first element in the first region to the first lowest value is 0.1 or less.

3. The first concentration is 5×10 ２０ cm －３ 5x10 or more ２１ cm －３ 3. The semiconductor device according to claim 2, wherein:

4. 4. The semiconductor device according to claim 1, wherein the second region has a second thickness along the first direction of 30 nm or more.

5. 5. The semiconductor device according to claim 4, wherein a second ratio of a difference between a second highest value of the concentration of the first element in the second region and a second lowest value of the concentration of the first element in the second region to the second lowest value is 0.1 or less.

6. 2. The semiconductor device according to claim 1, wherein the first concentration is 1.3 to 30 times the second concentration.

7. 2. The semiconductor device according to claim 1, wherein the second concentration is 1.3 to 30 times the first concentration.

8. a first conductive layer; a second conductive layer; and Furthermore, the second electrode region is between the first electrode region and the second conductive layer; the first conductive layer is between the second electrode region and the second conductive layer; the first conductive layer includes at least one selected from the group consisting of Ti, Ta, and W; 2. The semiconductor device according to claim 1, wherein said second conductive layer includes at least one selected from the group consisting of Al, Cu, Au, Ag, and Ni.

9. The semiconductor device according to claim 1 , wherein the first thickness is 150 nm or less.

10. Al ｘ１ Ga １－ｘ１ A first semiconductor layer containing N (0≦x1<1); and Al provided on the first semiconductor layer. ｘ２ Ga １－ｘ２ a second semiconductor layer containing N (0<x2≦1, x1<x2); removing a portion of the second semiconductor layer to form a hole reaching the first semiconductor layer; a first electrode region including a first element and silicon is formed on a bottom portion and a side surface of the hole, the first element including at least one selected from the group consisting of B, Ga, In, and Al, and a first thickness of the first electrode region is 30 nm or more; forming a second electrode region comprising silicon on the first electrode region; The method for manufacturing a semiconductor device includes implanting the first element into the second electrode region.

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