Polishing compositions and methods of using the same

Abstract

To provide stable aqueous slurry that selectively polishes a wide variety of materials while achieving very low polishing / removal rates on stop-on films and achieving very low defects and surface roughness on these stop-on films.SOLUTION: A polishing composition includes: at least one abrasive; at least one nitride removal rate reducing agent, an acid or a base; and water. The at least one nitride removal rate reduce agent includes: a hydrophobic portion comprising a C4 to C40 hydrocarbon group; and a hydrophilic portion comprising at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group and a phosphonate group; where the hydrophobic portion and the hydrophilic portion are separated by zero to ten alkylene oxide groups. The polishing composition can have a pH in the range from about 2 to about 6.5.SELECTED DRAWING: None

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority from U.S. Patent Application No. 17 / 091,260, filed November 6, 2020, the contents of which are incorporated herein by reference in their entirety. [Background technology]

[0002] The semiconductor industry is constantly driven to improve chip performance by further miniaturizing devices through process and integration innovations. Chemical-mechanical polishing / planarization (CMP) is a powerful technology because it enables many complex integration schemes at the transistor level, thereby facilitating increased chip density. Summary of the Invention [Problem to be solved by the invention]

[0003] Transistors are generally fabricated in front-end-of-line (FEOL) transistor fabrication steps. The FEOL material stack typically includes multiple stacks of metal gates and dielectric materials. Electrical isolation of the billions of active devices in each integrated circuit is a goal in FEOL and can be achieved using a shallow trench isolation (STI) process. A portion of the STI process is shown in Figure 1 for demonstration purposes. As can be seen from Figure 1, prior to the STI CMP process, thermal silicon oxide and SiN can be deposited on silicon (e.g., a silicon wafer) (Figure 1(a)), which can then be etched away to form trenches / isolation and "active" non-trench regions (to form transistor-containing regions) (Figure 1(b)). These trenches / isolation regions can then be filled by depositing silicon oxide (e.g., TEOS) into the trenches (e.g., by plasma-enhanced chemical vapor deposition (PECVD)) so that the active non-trench regions are isolated from each other by the silicon oxide in the trenches (Figure 1(c)). The "over-layered / excess" silicon oxide layer over the active non-trench regions can then be selectively removed while preserving the silicon oxide layer within the shallow trenches (FIG. 1(d)). The selective removal of silicon oxide is achieved by a shallow trench isolation (STI) chemical-mechanical polishing / planarization (CMP) process, which uses a CMP slurry composition (e.g., the CMP slurry composition described herein) with a high material removal rate (MRR) selectivity for silicon oxide over silicon nitride (e.g., SiN) to remove silicon oxide at a high rate, preferably without substantially removing the silicon nitride (step-on layer). After the STI CMP step, etching can be used to expose the silicon and complete the isolation, preventing adjacent transistors formed in the active non-trench regions from contacting each other, thereby preventing electrical shorts.

[0004] Dielectric films widely used in STI are silicon nitride (e.g., SiN), silicon oxide (e.g., tetraethyl orthosilicate (TEOS)), polysilicon (P-Si), silicon carbonitride (e.g., SiCN), and low-k / ultra-low-k dielectric films (e.g., SiCOH). With the introduction of high-k metal gate technology at 45 nm and FinFET technology in 22 nm chip manufacturing, SiN, TEOS, SiCN, and P-Si films are beginning to be used more frequently and in more applications in FEOL. In addition, in the back end of the line (BEOL), the resistivity of traditional barrier materials (e.g., Ta / TaN or Ti / TiN) has been shown not to scale down efficiently for advanced sub-10 nm manufacturing nodes, so these barrier materials can be replaced by dielectrics such as SiN, TEOS, SiCN, and P-Si for various BEOL material stacks. Therefore, for both the FEOL and BEOL, these dielectric films can be used as etch stop layers, capping materials, spacer materials, additional liners, diffusion / passivation barriers, hard masks and / or stop-on layers.

[0005] Generally, dielectric films are used more and more widely in advanced semiconductor manufacturing. From a CMP point of view, these dielectric-incorporated assemblies require polishing compositions (slurries) that work / polish and / or stop on these films, such as slurries that can remove SiN but not TEOS / p-Si (stop-on), or slurries that can remove TEOS / p-Si but not SiN (stop-on).

[0006] The present disclosure relates to stable aqueous slurries that can selectively polish a wide range of materials (e.g., oxides such as silicon oxide) while achieving very low polishing / removal rates for stop-on films (e.g., silicon nitride films and related silicon- and nitrogen-based films, such as SiCN (silicon carbonitride)) and very low defects and surface roughness on these stop-on films. For example, the polishing compositions described herein can polish silicon oxide (e.g., SiO) at a relatively high material removal rate (MRR) and stop on or polish at a very low rate for silicon nitride (e.g., SiN) or related films (e.g., tungsten and cobalt). For example, silicon oxides that can be removed with the polishing composition described herein include TEOS, thermal oxide (TOX) (e.g., resulting from autoclave-induced oxidation of bare silicon), silicon oxides formed by plasma-enhanced PVD (plasma-enhanced PVD) deposition (e.g., high-density plasma or high-aspect ratio plasma), silicon oxides formed by CVD deposition with post-plasma surface hardening, carbon-doped silicon oxide (SiOC), and silicon oxides formed by liquid application of an oxide precursor followed by light- or heat-induced hardening. In some examples, the target film to be removed with high MRR may not be a silicon oxide dielectric, but a metal, metal oxide, or metal nitride. Typical examples of metals, metal oxides, and metal nitrides include copper, cobalt, ruthenium, aluminum, titanium, tungsten, and tantalum for metals, and hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, and tantalum oxide for metal oxides, as well as ruthenium nitride, aluminum nitride, titanium nitride, tungsten nitride, and tantalum nitride. In such cases, the stop-on / low removal rate film can still be a silicon nitride film, and a polishing composition including a nitride removal rate reducer according to the present disclosure can be utilized to achieve the desired selectivity. [Means for solving the problem]

[0007] More specifically, the present disclosure relates to a polishing composition comprising an abrasive, a nitride removal rate reducer, an acid or base, water, and optionally a metal corrosion inhibitor. The pH of the polishing composition described herein can be in the range of 2 to 6.5, more specifically, in the range of 2 to 4.5. The composition of the present disclosure can be diluted (e.g., at the point of use) to form a polishing composition without performance degradation. The present disclosure also discusses a method for polishing a semiconductor substrate using the polishing composition.

[0008] In one aspect, an embodiment disclosed herein relates to a polishing composition comprising at least one abrasive, at least one nitride removal rate reducer, an acid or base, and water. The nitride removal rate reducer comprises a hydrophobic portion comprising a C4-C40 hydrocarbon group and a hydrophilic portion comprising at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group, the hydrophobic portion and the hydrophilic portion being separated by 0 to 10 alkylene oxide groups. The polishing composition has a pH ranging from about 2 to about 6.5.

[0009] In another aspect, an embodiment disclosed in the present disclosure relates to a polishing composition comprising at least one abrasive, at least one nitride removal rate reducer comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and wherein the polishing composition has a ratio of the silicon oxide removal rate to the silicon nitride removal rate of about 3:1 or greater during polishing of a patterned wafer comprising at least one silicon nitride pattern overlaid with at least silicon oxide (and optionally other materials, e.g., metal or dielectric).

[0010] In yet another aspect, an embodiment disclosed in the present disclosure relates to a polishing composition comprising at least one abrasive, at least one nitride removal rate reducer comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and when a patterned wafer comprising at least a silicon nitride pattern overlaid with at least silicon oxide is polished with the polishing composition (wherein the silicon nitride pattern on the patterned wafer is exposed by polishing), dishing of the silicon oxide occurring is less than about 1000 angstroms.

[0011] In yet another aspect, an embodiment disclosed in the present disclosure relates to a polishing composition comprising at least one abrasive, at least one nitride removal rate reducer comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and when a patterned wafer comprising at least a silicon nitride pattern overlaid with at least a silicon oxide is polished with the polishing composition (wherein the silicon nitride pattern on the patterned wafer is exposed by polishing), erosion of the silicon nitride occurring is less than about 500 angstroms.

[0012] In yet another aspect, embodiments disclosed herein relate to a method comprising: applying a polishing composition described herein to a substrate having at least silicon nitride and at least silicon oxide on a surface of the substrate; and contacting a pad with the surface of the substrate and moving the pad relative to the substrate.

[0013] The synergistic use of an abrasive, a nitride removal rate reducer, the optional dishing reducer, and the optional metal corrosion inhibitor in the same composition provides unique advantages not found in currently available slurries. Among these advantages are the following:

[0014] 1. The compositions described in this disclosure can achieve very low silicon nitride (e.g., SiN) removal rates. Excellent silicon nitride protection can be achieved through judicious selection and formulation / loading of silicon nitride removal rate reducers. Furthermore, as demonstrated in this disclosure, low silicon nitride removal rates are observed on both blanket wafers (i.e., wafers containing only a silicon nitride film) and patterned wafers (i.e., wafers containing a silicon nitride film and other films, such as TEOS, that have been etched into a pattern).

[0015] 2. The very low silicon nitride removal rates described above result in minimal silicon nitride loss, which in turn results in very low silicon nitride erosion on the patterned wafer after polishing.

[0016] 3. The composition can achieve low silicon oxide dishing / step height. Dishing, metal surface roughness, and removal rate can be adjusted by judicious selection and loading / concentration of metal corrosion inhibitors and / or dishing reducers.

[0017] 4. The composition is compatible with a wide range of abrasives. Particle modification allows the zeta potential of the abrasive to be adjusted to further control the removal rate of the target film. Anionic, cationic, and neutral abrasives are all capable of forming stable slurries with higher silicon oxide removal rates and relatively lower silicon nitride removal rates.

[0018] 5. The composition can form a slurry containing high-purity colloidal silica as an abrasive. This allows for the creation of a slurry with a low trace metal count and a low large particle count compared to wafers polished with conventionally used ceria abrasives (which typically produce a large number of defects on the polished wafer), leading to reduced defects on the polished wafer. In addition, the composition described in this disclosure can overcome certain disadvantages of conventional silica-based STI CMP compositions, such as their high silicon nitride removal rate and low removal selectivity between silicon oxide and silicon nitride.

[0019] 6. The composition produces low nitride removal rates across a variety of polishing conditions. For example, silicon nitride removal rates remain low with both hard polishing pads (e.g., polyurethane-based pads) and soft polishing pads (e.g., poromeric, low Shore D hardness pads). In addition, downforce and velocity have been observed to have no discernible effect on silicon nitride removal rates, which is a good CMP property to have since the stop-on film behavior is non-Prestonian. The fact that the compositions of the present disclosure show little variation in removal rate as a function of pressure and velocity results in very good topography and high yields after polishing patterned wafers. In terms of the art, the compositions of the present disclosure result in low values ​​for silicon oxide dishing and step height, as well as low values ​​for silicon nitride erosion / loss.

[0020] The polishing compositions and concentrates described in this disclosure contrast with currently available modern slurries in that they provide performance sustenance on current-generation integrated circuit substrates while simultaneously exhibiting significant advantages for next-generation substrates and integration schemes. The compositions of this disclosure can successfully and efficiently remove various metal and dielectric layers with very high selectivity relative to silicon nitride layer removal. The compositions can be used for shallow trench isolation (STI) processes, self-aligned contact processes, or other processes where very low silicon nitride material removal rates are desired. [Brief explanation of the drawings]

[0021] [Figure 1] FIG. 1 is a schematic diagram of a process flow for a shallow trench isolation (STI) process (including STI CMP) in semiconductor manufacturing. [Figure 2] FIG. 2 is a schematic diagram of an STI patterned wafer film stack before polishing. [Figure 3] FIG. 3 is a wafer map showing overall defectivity after STI CMP using a silica-based polishing composition according to the present disclosure. [Figure 4] FIG. 4 is a wafer map showing overall defectivity after STI CMP using a commercially available ceria abrasive-containing composition. DETAILED DESCRIPTION OF THE INVENTION

[0022] The present disclosure relates to polishing compositions and methods for polishing semiconductor substrates using the same. In some embodiments, the disclosure relates to selectively polishing silicon oxide surfaces relative to silicon nitride surfaces. Selectively polishing silicon oxide relative to silicon nitride is a very important process in semiconductor manufacturing and is commonly performed in shallow trench isolation (STI) processes. Traditionally, STI polishing compositions (slurries) have used ceria abrasives to achieve the necessary polishing performance (e.g., selectivity) in STI processes, because compositions using silica abrasives have not previously performed adequately (e.g., high silicon nitride removal rates). However, ceria abrasives are known to produce high defectivity and high scratch rates when used in polishing compositions due to their "inorganic and hard" nature. Furthermore, ceria-based polishing compositions have a shorter shelf life (e.g., lower storage capability, shorter usable period, and earlier expiration date) and a shorter pot life (e.g., activity after opening the container and / or activity in a holding tank or distribution loop) than silica-based polishing compositions, and ceria also has greater price volatility than silica. In addition, ceria contains rare earth metals, which make it more expensive than silica. The composition of the present disclosure allows the use of silica abrasives, which are softer than ceria abrasives, for STI slurries. Silica-containing polishing compositions can provide very good selectivity in material removal rate (MRR) of silicon oxide (e.g., TEOS) over silicon nitride (e.g., SiN), while providing polished wafer surfaces with very low defectivity compared to STI processes using ceria abrasives. Therefore, the polishing compositions of the present disclosure can increase wafer device yield compared to conventional polishing compositions using ceria abrasives.

[0023] The polishing composition described herein may comprise (a) an abrasive, (b) a nitride removal rate reducer, (c) an acid or base, (d) water, and optionally (e) a metal corrosion inhibitor and / or (f) a dishing-reducing agent (e.g., an anionic dishing-reducing agent). The polishing composition may have a pH of about 2 or more and about 6.5 or less. The polishing composition of the present disclosure may have high selectivity for polishing dielectrics or metals relative to polishing silicon nitride. The present disclosure also provides a method of using the polishing composition to polish a semiconductor substrate. In particular, the present disclosure provides a method for polishing dielectrics or metals with high selectivity relative to silicon nitride.

[0024] In one or more embodiments, the at least one abrasive (e.g., two or three) is selected from cationic abrasives, substantially neutral abrasives, and anionic abrasives. In one or more embodiments, the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, co-formed products thereof, coated abrasives, surface-modified abrasives, and mixtures thereof. In some embodiments, the at least one abrasive does not include ceria.

[0025] In one or more embodiments, the abrasive is a silica-based abrasive, e.g., an abrasive selected from the group consisting of colloidal silica, fumed silica, and mixtures thereof. In one or more embodiments, the abrasive has a surface modified with organic and / or non-siliceous inorganic groups. For example, the cationic abrasive may include a terminal group of formula (I): -O m -X-(CH2) n -Y (I) where m is an integer from 1 to 3, n is an integer from 1 to 10, X is Al, Si, Ti, or Zr, and Y is a cationic amino or thiol group. As another example, the anionic abrasive may contain an end group of formula (I): -O m -X-(CH2) n -Y (I) wherein m is an integer from 1 to 3, n is an integer from 1 to 10, X is Al, Si, Ti, or Zr, and Y is an acid group. In some embodiments, the at least one abrasive may be present in the polishing composition described herein in an amount of from about 0.05 wt % or more (e.g., about 0.1 wt % or more, about 0.5 wt % or more, about 1 wt % or more, about 2 wt % or more, about 3 wt % or more, or about 5 wt % or more) to about 20 wt % or less (e.g., about 15 wt % or less, about 10 wt % or less, about 8 wt % or less, about 6 wt % or less, about 4 wt % or less, or about 2 wt % or less) based on the total weight of the composition.

[0026] In one or more embodiments, the abrasives described herein may have an average particle size of about 1 nm or more (e.g., about 5 nm or more, about 10 nm or more, about 20 nm or more, about 40 nm or more, about 50 nm or more, about 60 nm or more, about 80 nm or more, or about 100 nm or more) to about 1000 nm or less (e.g., about 800 nm or less, about 600 nm or less, about 500 nm or less, about 400 nm or less, or about 200 nm or less). In the present disclosure, average particle size (MPS) is determined by dynamic light scattering techniques.

[0027] In one or more embodiments, the at least one (e.g., two or three distinct) nitride removal rate reducers are compounds comprising a hydrophobic portion comprising a C4-C40 hydrocarbon group (e.g., comprising an alkyl group and / or an alkenyl group) and a hydrophilic portion comprising at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group. In one or more embodiments, the hydrophobic portion and the hydrophilic portion are each a compound comprising 0 to 10 (e.g., 1, 2, 3, 4, 5, 6, 7, 8, or 9) alkylene oxide groups (e.g., —(CH2) nIn one or more embodiments, the hydrophobic portion and the hydrophilic portion of the nitride removal rate reducer are separated by zero alkylene oxide groups. Without wishing to be bound by theory, it is believed that the presence of alkylene oxide groups in the nitride removal rate reducer is undesirable in some embodiments because the alkylene oxide groups in the nitride removal rate reducer cause slurry stability issues and increase the silicon nitride removal rate.

[0028] In one or more embodiments, the nitride removal rate reducer has a hydrophobic portion that includes a hydrocarbon group containing 4 or more carbon atoms (e.g., 6 or more carbon atoms (C6), 8 or more carbon atoms (C8), 10 or more carbon atoms (C10), 12 or more carbon atoms (C12), 14 or more carbon atoms (C14), 16 or more carbon atoms (C16), 18 or more carbon atoms (C18), 20 or more carbon atoms (C20), or 22 or more carbon atoms) and / or 40 or fewer carbon atoms (C40) (e.g., 38 or fewer carbon atoms (C38), 36 or fewer carbon atoms (C36), 34 or fewer carbon atoms (C34), 32 or fewer carbon atoms (C32), 30 or fewer carbon atoms (C30), 28 or fewer carbon atoms (C28), 26 or fewer carbon atoms (C26), 24 or fewer carbon atoms (C24), or 22 or fewer carbon atoms). The hydrocarbon group referred to in this disclosure refers to a group containing only carbon and hydrogen atoms, and may include both saturated groups (e.g., linear, branched, or cyclic alkyl groups) and unsaturated groups (e.g., linear, branched, or cyclic alkenyl groups; linear, branched, or cyclic alkynyl groups; or aromatic groups (e.g., phenyl or naphthyl)). In one or more embodiments, the hydrophilic portion of the nitride removal rate reducer comprises at least one group selected from a phosphate group and a phosphonate group. The term "phosphonate group" is expressly intended to include phosphonic acid groups.

[0029] In one or more embodiments, the nitride removal rate reducer is selected from the group consisting of naphthalene sulfonic acid-formalin condensate, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, oleth-3 phosphate, and oleth-10 phosphate.

[0030] In one or more embodiments, the nitride removal rate reducer is present in the polishing composition described herein in an amount of about 0.1 ppm or more (e.g., about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1000 ppm or less (e.g., about 900 ppm or less, about 800 ppm or less, about 700 ppm or less, about 600 ppm or less, about 500 ppm or less, or about 250 ppm or less) based on the total weight of the composition.

[0031] In one or more embodiments, the polishing composition described herein optionally further comprises at least one (e.g., two or three) dishing-reducing agent (e.g., an anionic dishing-reducing agent). In one or more embodiments, the at least one dishing-reducing agent is a compound containing at least one group selected from the group consisting of a hydroxy group, a sulfate group, a phosphonate group, a phosphate group, a sulfonate group, an amine group, a nitrate group, a nitrite group, a carboxylate group, and a carbonate group. In one or more embodiments, the at least one dishing-reducing agent is at least one selected from the group consisting of polysaccharides and substituted polysaccharides. In one or more embodiments, the at least one dishing-reducing agent is at least one selected from the group consisting of carrageenan, xanthan gum, hydroxypropyl cellulose, methylcellulose, ethyl cellulose, hydroxypropyl methylcellulose, and carboxymethyl cellulose. In one or more embodiments, the at least one nitride removal rate reducer and the at least one dishing reducing agent are chemically distinct from one another.

[0032] In one or more embodiments, the dishing reducing agent is present in the polishing composition described herein in an amount of about 0.1 ppm or more (e.g., about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1000 ppm or less (e.g., about 900 ppm or less, about 800 ppm or less, about 700 ppm or less, about 600 ppm or less, or about 500 ppm or less) based on the total weight of the composition.

[0033] In one or more embodiments, the polishing composition described herein optionally further comprises at least one (e.g., two or three) metal anti-rust agent. In one or more embodiments, the at least one metal anti-rust agent is a compound containing at least one group selected from the group consisting of a hydroxy group, a sulfate group, a phosphonate group, a phosphate group, a sulfonate group, an amine group, a nitrate group, a nitrite group, a carboxylate group, and a carbonate group. In one or more embodiments, the at least one metal anti-rust agent is at least one selected from the group consisting of an amino acid, a phosphonate surfactant, a phosphate surfactant, a sulfate surfactant, a sulfonate surfactant, a glucamide surfactant, an azole, an imide, an oxazole, a thiourea, and a Schiff base.

[0034] In one or more embodiments, the at least one metal rust inhibitor may be selected from substituted or unsubstituted benzotriazoles. A preferred class of substituted benzotriazoles includes benzotriazoles substituted with at least one substituent selected from the group consisting of alkyl, aryl, halogen, amino, nitro, alkoxy, and hydroxy groups. Substituted benzotriazoles also include those fused to one or more aryl (e.g., phenyl) or heteroaryl groups.

[0035] Suitable benzotriazoles for use as rust inhibitors include benzotriazole (BTA), 1-hydroxybenzotriazole, 5-phenylthiol-benzotriazole, 5-chlorobenzotriazole, 4-chlorobenzotriazole, 5-bromobenzotriazole, 4-bromobenzotriazole, 5-fluorobenzotriazole, 4-fluorobenzotriazole, naphthotriazole, tolyltriazole, 5-phenyl-benzotriazole, 5-nitrobenzotriazole, 4-nitrobenzotriazole, 2-(5-amino-pentyl)-benzotriazole, 1-amino-benzotriazole, 5-methylbenzotriazole, benzotriazole-5-carboxylic acid, 4-methylbenzotriazole, 4-ethylbenzotriazole, 5-ethylbenzotriazole, 4-propylbenzotriazole, 5-propylbenzotriazole. , 4-isopropylbenzotriazole, 5-isopropylbenzotriazole, 4-n-butylbenzotriazole, 5-n-butylbenzotriazole, 4-isobutylbenzotriazole, 5-isobutylbenzotriazole, 4-pentylbenzotriazole, 5-pentylbenzotriazole, 4-hexylbenzotriazole, 5-hexylbenzotriazole, 5-methoxybenzotriazole, 5-hydroxybenzotriazole, dihydroxypropylbenzotriazole, 1-[N,N-bis(2-ethylhexyl)aminomethyl]-benzotriazole, 5-t-butylbenzotriazole, 5-(1',1'-dimethylpropyl)-benzotriazole, 5-(1'1'3'-trimethylbutyl)benzotriazole, 5-n-octylbenzotriazole, and 5-(1'1'3'3'-tetramethylbutyl)benzotriazole.

[0036] In one or more embodiments, the at least one metal rust inhibitor may be selected from amino acids, including tricine, alanine, histidine, glycine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, and tyrosine.

[0037] In one or more embodiments, the at least one metal rust inhibitor can be selected from C4-C10 phosphates and C4-C10 phosphonates. Examples of such phosphates include hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, butyl phosphate, triethyl phosphate, octyl phosphate, and decyl phosphate. Examples of the phosphonates include butyl phosphonic acid, hexyl phosphonic acid, octyl phosphonic acid, and phosphonic acid.

[0038] In one or more embodiments, the at least one metal rust inhibitor is at least one selected from the group consisting of benzotriazole, histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, and alkyl-aryl sulfonic acids (e.g., dodecylbenzene sulfonic acid). In one or more embodiments, the at least one metal rust inhibitor is chemically distinct from the at least one nitride removal rate reducer, the acid, and / or the base described herein.

[0039] In one or more embodiments, the metal anti-corrosion agent is contained in the polishing composition described herein in an amount of about 0.1 ppm or more (e.g., about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1 wt. % or less (e.g., about 0.8 wt. % or less, about 0.6 wt. % or less, about 0.5 wt. % or less, about 0.4 wt. % or less, about 0.2 wt. % or less, about 0.1 wt. % or less, about 0.05 wt. % or less, or about 0.02 wt. % or less) based on the total weight of the composition. Without wishing to be bound by theory, it is believed that the inclusion of a metal anti-corrosion agent in the polishing composition described herein results in very low defects and very low surface roughness on stop-on films (e.g., SiN films).

[0040] In one or more embodiments, the acid is selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylenephosphonic acid, hexamethylenediaminetetra(methylenephosphonic acid), bis(hexamethylene)triaminephosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof.

[0041] In one or more embodiments, the base is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolytriazole, pyrazole, isothiazole, and mixtures thereof.

[0042] In one or more embodiments, the acid or base may be present in the polishing composition described herein in an amount of about 0.01 wt % or more (e.g., about 0.05 wt % or more, about 0.1 wt % or more, about 0.5 wt % or more, or about 1 wt % or more) to about 10 wt % or less (e.g., about 8 wt % or less, about 6 wt % or less, about 5 wt % or less, about 4 wt % or less, or about 2 wt % or less) based on the total weight of the composition. For example, the acid or base can be added in an amount sufficient to adjust the pH of the polishing composition to a desired value.

[0043] In one or more embodiments, the water may be present (as a liquid medium or carrier) in the polishing composition described herein in an amount of about 50 wt % or more (e.g., about 55 wt % or more, about 60 wt % or more, about 65 wt % or more, about 70 wt % or more, or about 75 wt % or more) to about 99.9 wt % or less (e.g., about 99.5 wt % or less, about 99 wt % or less, about 97 wt % or less, about 95 wt % or less, or about 90 wt % or less) based on the total weight of the composition.

[0044] In one or more embodiments, the polishing composition described herein may have a pH of about 2 or more (e.g., about 2.5 or more, about 3 or more, about 3.5 or more, or about 4 or more) to about 6.5 or less (e.g., about 6 or less, about 5.5 or less, about 5 or less, or about 4.5 or less). Without wishing to be bound by theory, it is believed that a polishing composition having a pH greater than 6.5 may decrease silicon oxide / silicon nitride removal rate selectivity and may have stability problems.

[0045] In one or more embodiments, the polishing composition described herein may comprise any of a variety of compounds, including an organic solvent, a pH adjuster (e.g., an acid or a base), an amine, an alkali base (e.g., an alkali hydroxide), a fluorine-containing compound (e.g., a fluoride compound or a fluorinated compound, e.g., a fluorinated polymer / surfactant), a silicon-containing compound such as a silane (e.g., an alkoxysilane), a nitrogen-containing compound (e.g., an amino acid, an amine, or an imine (e.g., an amidine such as 1,8-diazabicyclo[5.4.0]-7-undecene (DBU) and 1,5-diazabicyclo[4.3.0]non-5-ene (DBN))), a salt (e.g., a halide salt or a metal salt), a polymer (e.g., a nonionic, cationic, or The polishing composition may be substantially free of one or more specific ingredients, such as anionic polymers or polymers other than dishing-reducing agents, surfactants (e.g., cationic surfactants, anionic surfactants, nonionic surfactants, or surfactants other than nitride removal rate-reducing agents), plasticizers, oxidizers (e.g., H2O2), quaternary ammonium compounds (e.g., salts such as tetraalkylammonium salts and hydroxides such as tetramethylammonium hydroxide), corrosion inhibitors (e.g., azole or non-azole corrosion inhibitors), electrolytes (e.g., polymer electrolytes), and / or specific abrasives (e.g., ceria abrasives, nonionic abrasives, surface-modified abrasives, or negatively / positively charged abrasives). Halide salts that may be excluded from the polishing composition include alkali metal halides (e.g., sodium halide or potassium halide) or ammonium halides (e.g., ammonium chloride), which may be chlorides, bromides, or iodides. In this disclosure, the term "substantially free" of an ingredient in a polishing composition refers to a component that is not intentionally added to the polishing composition. In some embodiments, the polishing composition described herein may have one or more of the components that are substantially free of the polishing composition at about 1000 ppm or less (e.g., about 500 ppm or less, about 250 ppm or less, about 100 ppm or less, about 50 ppm or less, about 10 ppm or less, or about 1 ppm or less).In some embodiments, the polishing compositions described herein may be completely free of one or more of the above components.

[0046] In one or more embodiments, the polishing composition described herein has a ratio of the removal rate of silicon oxide (e.g., TEOS) to the removal rate of silicon nitride (i.e., removal rate selectivity) of about 3:1 or more, or about 4:1 or more, or about 5:1 or more, or about 10:1 or more, or about 25:1 or more, or about 50:1 or more, or about 60:1 or more, or about 75:1 or more, or about 100:1 or more, or about 150:1 or more, or about 200:1 or more, or about 250:1 or more, or about 300:1 or more, or about 500:1 or more, or about 750:1 or more, or about 1000:1 or more, or about 5000:1 or more. In one or more embodiments, the ratio is applicable when measuring removal rates when polishing both blanket wafers and patterned wafers (i.e., wafers containing at least a silicon nitride pattern overlaid with at least a silicon oxide (and optionally other materials such as metals and dielectrics)).

[0047] In one or more embodiments, when a patterned wafer (which may include at least a silicon nitride pattern overlying at least a silicon oxide) is polished with the polishing composition (e.g., until the silicon nitride pattern on the patterned wafer is exposed by polishing), silicon oxide (e.g., TEOS) dishing of about 1000 angstroms or less, or about 500 angstroms or less, or 375 angstroms or less, or 250 angstroms or less, or 200 angstroms or less, or 100 angstroms or less, or 50 angstroms or less, and / or about 0 angstroms or more occurs. In one or more embodiments, when a patterned wafer (which may include at least a silicon nitride pattern overlying at least a silicon oxide) is polished with the polishing composition (e.g., until the silicon nitride pattern on the patterned wafer is exposed by polishing), silicon nitride erosion of about 500 angstroms or less, or about 400 angstroms or less, or about 300 angstroms or less, or about 250 angstroms or less, or about 200 angstroms or less, or about 100 angstroms or less, or about 75 angstroms or less, or about 65 angstroms or less, or about 50 angstroms or less, or about 32 angstroms or less, and / or about 0 angstroms or more occurs.

[0048] In one or more embodiments, when a patterned wafer is polished using a polishing composition according to the present disclosure, the planarization efficiency (i.e., 100 times the quotient of the change in silicon oxide step height divided by the amount of silicon oxide removed during polishing) is about 14% or more (e.g., about 20% or more, 30% or more, 38% or more, 40% or more, 46% or more, 50% or more, 60% or more, 70% or more, or 74% or more) and about 100% or less (e.g., about 99.9% or less, about 99% or less, about 95% or less, about 90% or less, about 80% or less, about 70% or less, or about 60% or less). In one or more embodiments, when a patterned wafer is polished with a polishing composition according to the present disclosure (e.g., a composition comprising a silica abrasive and a nitride removal rate reducer), the total defect count on a patterned wafer having a diameter of 12 inches (i.e., about 300 mm) is 175 or less (e.g., 170 or less, 160 or less, 150 or less, 125 or less, 100 or less, 75 or less, 50 or less, 25 or less, 10 or less, or 5 or less). For purposes of this disclosure, the defects counted are those having a size of about 90 nm or greater.

[0049] In one or more embodiments, the present disclosure relates to a polishing method that may include applying a polishing composition according to the present disclosure to a substrate (e.g., a wafer) having at least silicon nitride and silicon oxide on the surface of the substrate; and contacting a pad with the surface of the substrate and moving the pad relative to the substrate. In some embodiments, when the substrate includes at least a silicon nitride pattern overlaid thereon (e.g., silicon oxide having other materials present, such as silicon-based dielectrics (e.g., silicon carbide, etc.), metals, metal oxides, metal nitrides, etc.), the method can remove at least a portion of the silicon oxide (e.g., silicon oxide on active non-trench areas) to expose the silicon nitride. The terms "silicon nitride" and "silicon oxide" used in the present disclosure are expressly intended to encompass both undoped and doped versions of silicon nitride and / or silicon oxide. For example, in one or more embodiments, the silicon nitride and silicon oxide may be independently doped with at least one dopant selected from carbon, nitrogen (in the case of silicon oxide), oxygen, hydrogen, or any other known dopant for silicon nitride or silicon oxide. Some example types of silicon oxide films include TEOS (tetraethyl orthosilicate), SiOC, SiOCN, SiOCH, SiOH, and SiON, to name a few. Some example types of silicon nitride films include SiN (pure silicon nitride), SiCN, SiCNH, and SiNH, to name a few.

[0050] In one or more embodiments, the method described herein using the polishing composition may further include one or more additional steps for manufacturing a semiconductor device from a substrate treated with the polishing composition. For example, the method may include one or more of the following steps before the polishing method: (1) depositing silicon oxide (e.g., thermal silicon oxide) on a substrate (e.g., a silicon wafer) to form a silicon oxide layer, (2) depositing silicon nitride on the silicon oxide layer to form a silicon nitride layer, (3) etching the substrate to form trenches and non-trench areas, and (4) depositing silicon oxide on the etched substrate to fill the trenches with silicon oxide. As another example, the method may include at least one additional step after the polishing method, such as etching the substrate (e.g., removing the silicon nitride and silicon oxide) to expose silicon oxide or other heterogeneous films on the silicon and / or wafer substrate. [Example]

[0051] Examples are provided to further illustrate the capabilities of the polishing compositions and methods of the present disclosure. The provided examples are not intended to, and should not be construed as, limiting the scope of the present disclosure. All percentages listed are by weight (wt%) unless otherwise noted. The nitride removal rate reducers listed in the examples were obtained from various suppliers and, in some cases, may contain minor amounts of similar compounds having shorter or longer carbon chain lengths than those listed in the tables below. The carbon chain lengths listed in the tables identify the majority component of the nitride removal rate reducers.

[0052] Example 1: Demonstration of nitride stop In this example, the polishing composition used in Samples 1A-1F primarily contained 3 wt.% neutral colloidal silica abrasive, malonic acid as a pH adjuster, a nitride removal rate reducer (if present), and water as the liquid carrier. The pH of the polishing composition was 2.3. A 200 mm silicon oxide (TEOS) blanket wafer and a 200 mm silicon nitride (SiN) blanket wafer were polished using an Applied Materials Mirra CMP polisher with a downforce of 2 psi and a flow rate of 175 mL / min using a Dow VP6000 pad.

[0053] Table 1: TEOS removal rate and SiN removal rate for each nitride removal rate reducing surfactant type [Table 1] "EO" refers to ethylene oxide and "RR" refers to removal rate.

[0054] The results in Table 1 show that the control polishing composition (without the nitride removal rate reducer) had a removal rate selectivity between silicon oxide and silicon nitride of 8, which is too low for most applications requiring low rates for silicon nitride. However, with the addition of the nitride removal rate reducer, the silicon nitride removal rate of the polishing composition decreased to only 1 Å / min, and the removal rate selectivity increased to 868.

[0055] Example 2: Demonstration of pH range and different abrasive surface charges In this example, the polishing composition used in Samples 2A-2I contained 3 wt.% colloidal silica abrasive, an organic acid as a pH adjuster, n-octadecylphosphonic acid, and water as the liquid carrier. n-Octadecylphosphonic acid is representative of the class of nitride removal rate reducers described in this disclosure. Furthermore, in this example, the charge of the colloidal silica was varied by using neutral, cationic, and anionic silica, as shown in Table 2. The pH of the polishing composition varied from about 2.25 to about 4.25. 200 mm silicon oxide (TEOS) and 200 mm silicon nitride (SiN) blanket wafers were polished using an Applied Materials Mirra CMP polisher with a Dow VP6000 pad at a downforce of 2 psi and a flow rate of 175 mL / min.

[0056] Table 2: TEOS and SiN removal rates at different pH levels for three types of silica. [Table 2]

[0057] As shown in Table 2, the nitride removal rate reducer was able to adjust the silicon nitride removal rate over a pH range of about 2.25 to about 4.25 using neutral silica, cationic silica, and anionic silica. The robust nitride removal rate reduction achieved by this system, independent of the surface charge of the silica abrasive, is surprising. For example, it is commonly believed that cationic abrasives would be incompatible with anionic nitride removal rate reducers. In contrast, in this system, the slurry remained stable and the nitride removal rate reducer remained active.

[0058] Conventionally, silicon nitride removal rates using anionic abrasives are generally very high (about 400 Å / min) and difficult to control. Significantly, the nitride removal rate reducers described in the present disclosure can significantly reduce the silicon nitride removal rate. This type of system can be useful when a high removal rate for films that are well polished by anionic abrasives (e.g., silicon carbide films) is desired, along with a low removal rate for TEOS and silicon nitride.

[0059] Example 3: Demonstration of the effect of chain length and head type of nitride removal rate reducers In this example, the polishing compositions used in Samples 3A-3L contained 3 wt.% colloidal silica abrasive, malonic acid as a pH adjuster, a nitride removal rate reducer listed in Table 3, and water as the liquid carrier. The pH of the polishing compositions was 2.25. Specifically, the nitride removal rate reducers used in Samples 3A-3L contained the head group and hydrophobe listed in Table 3, but did not contain alkylene oxide groups. In addition, the nitride removal rate reducers used in Samples 3I, 3J, and 3K contained surfactant mixtures in which lauryl / myristyl phosphate, stearyl phosphate, and lacceryl phosphate were the predominant components, respectively.

[0060] A 200 mm silicon oxide (TEOS) blanket wafer and a 200 mm silicon nitride (SiN) blanket wafer were polished using an Applied Materials Mirra CMP polisher with a Dow VP6000 pad at a downforce of 2 psi and a flow rate of 175 mL / min.

[0061] [Table 3]

[0062] As shown in Table 3, the size of the hydrophobic structure in the nitride removal rate reducer plays an important role in determining the efficiency of silicon nitride rate reduction. Table 3 shows that among the agents tested, chain lengths of 12 or greater performed best for efficient nitride stopping under the test conditions. Carbon chain lengths of 12 or greater in the nitride removal rate reducer (see Samples 3D, 3E, 3F, 3G, 3I, 3J, 3K, and 3L in Table 3) ensure low SiN RR (typically less than 5 Å / min) and produce high TEOS:SiN RR selectivity ratios (greater than 250) for blanket films. Therefore, such polishing compositions are ideally suited for STI CMP processes, where a high selectivity ratio of silicon oxide to silicon nitride is desired.

[0063] Example 4: Demonstration of the effect of downforce In this example, the polishing compositions used in Samples 4A-4C contained 3 wt% colloidal silica abrasive, an organic acid, n-octadecylphosphonic acid, as a pH adjuster, and water as the liquid carrier. The pH of the polishing compositions was between 2 and 6.5. An Applied Materials Mirra CMP polisher was used with a Dow IC1010 pad at downforces of 2, 3, and 4 psi and a flow rate of 175 mL / min to polish 200 mm high-density plasma (HDP) silicon oxide-coated wafers, 200 mm tetraethyl orthosilicate oxide (TEOS)-coated wafers, 200 mm borophosphosilicate glass (BPSG)-coated wafers, and 200 mm silicon nitride-coated wafers.

[0064] Table 4: HDP, TEOS, BPSG, and SiN removal rates for various downforces [Table 4]

[0065] As shown in Table 4, silicon oxide films (HDP, TEOS, and BPSG) exhibited Prestonian behavior, while silicon nitride removal rates exhibited non-Prestonian behavior and remained well-controlled regardless of the applied pressure. In CMP terms, Prestonian removal rate behavior suggests that the polishing rate increases linearly with increasing polishing pressure and / or angular velocity / rpm (revolutions per minute) of the polisher. Prestonian behavior is desirable for high-velocity target films (here, silicon oxide films). Non-Prestonian behavior suggests that the polishing rate does not change appreciably with changes in pressure or velocity. Non-Prestonian behavior is somewhat desirable for stop-on films (here, SiN). As can be seen in Table 4, the removal rate of silicon oxide films increases linearly / Prestonianly with increasing pressure (e.g., increasing the pressure from 2 to 3 to 4 psi pressure causes the TEOS RR to increase from 1835 to 2324 to 3140 Å / min). Conversely, the removal rate of SiN (stop-on film) does not change significantly with increasing pressure (i.e., increasing the pressure from 2 to 3 to 4 psi pressure causes the SiN RR to change from 4 to 2 to 1 Å / min). In addition, this example demonstrates that the polishing composition has similar behavior in films of the silicon oxide family defined above. For further clarity, in Table 4, we list three example silicon oxide films: HDP, TEOS, and BPSG. The polishing composition of the present disclosure works very effectively to provide high material removal rates in all of the various types of silicon oxide films. Similar experiments using examples of various types of silicon nitride films (SiN, SiCN, etc.) showed similar slurry stopping behavior to that achieved for the SiN films listed in Table 4. For brevity, only the rates for the SiN films are listed in Table 4.

[0066] Example 5: Demonstration of the effect of pads In this example, the polishing compositions used in Samples 5A-5C contained 3 wt.% colloidal silica abrasive, an organic acid as a pH adjuster, a nitride removal rate reducer, and water as the liquid carrier. The pH of the polishing compositions was between 2 and 6.5. An Applied Materials Mirra CMP polisher was used with a Dow VP6000 pad or a Fujibo H800 pad at a downforce of 2 psi and a flow rate of 175 mL / min to polish 200 mm tetraethyl orthosilicate oxide (TEOS) and 200 mm silicon nitride (SiN) blanket wafers.

[0067] Table 5: TEOS and SiN removal rates by pad and nitride removal rate reducer [Table 5]

[0068] As shown in Table 5, nitride removal rate reducers have an effect on silicon nitride protection. On the Dow VP6000 pad, which has a moderate hardness, all samples (5A-5C) provided effective nitride protection, as evidenced by low SiN removal rates and high TEOS / SiN removal rate selectivity. However, on the Fujibo H800 pad, which is a soft pad, only the samples containing nitride removal rate reducers with long-chain saturated hydrophobic structures (5A and 5B) provided effective nitride stop. Therefore, this example demonstrates that the polishing composition of the present disclosure works effectively with all types of polishing pads. Furthermore, this example suggests a trend toward increased nitride protection when the nitride removal rate reducer contains a longer hydrophobic structure, is more saturated, and / or is more hydrophobic.

[0069] Example 6: Demonstration of the effectiveness of anti-rust agents In this example, the polishing composition used in Samples 6a-6g contained 2.25 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, a nitride removal rate reducer, and water as the liquid carrier. Samples 6b-6g also contained a metal corrosion inhibitor. The pH of all samples was 3.0. A 200 mm tetraethyl orthosilicate oxide (TEOS) blank wafer, a 200 mm silicon nitride (SiN) blank wafer, and a 200 mm tungsten (W) blank wafer were polished using an Applied Materials Mirra CMP polisher with a Fujibo H804 pad at a downforce of 2 psi and a flow rate of 175 mL / min. In addition, cobalt (Co) coupons were placed in the samples heated to 60°C for 30 minutes to measure the static etch rate (SER).

[0070] Table 6: TEOS and SiN removal rates by pad and nitride removal rate reducer [Table 6]

[0071] As shown in Table 6, the metal rust inhibitor has an effect on the tungsten removal rate. Specifically, this example demonstrates that lower tungsten removal rates were achieved when an azole compound (6b), an amino acid (6c, 6d), a short-chain phosphate surfactant (6e, 6f), and a sulfonic acid surfactant (6g) were used as the metal rust inhibitor.

[0072] Typically, cobalt has a high static etch rate in acidic solutions. This example demonstrates that the addition of the metal corrosion inhibitor described in this disclosure significantly reduced the cobalt static etch rate.

[0073] Example 7: Demonstration of concentrates In this example, the polishing compositions used in Samples 7A-7C contained concentrates corresponding to the ready-to-use formulations, including 3 wt% neutral colloidal silica abrasive, organic acid and / or potassium hydroxide as pH adjusters, n-octadecylphosphonic acid, and water as the liquid carrier. The single-pot solution contained all of the components necessary for polishing, while the two-part system contained all components except the organic acid. Mean particle size (MPS) is a reliable indicator of slurry stability. In unstable systems, particles aggregate over time, causing measurable MPS growth. MPS was measured using dynamic light scattering techniques with a Malvern tool. The slurries were stored in an oven set at 60°C and measured every 7 days. According to the Arrhenius relationship for accelerated aging tests, a total test run of 21 days roughly corresponds to one year of aging at room temperature. In other words, if the slurry is held at 60°C for 21 days without appreciable growth of the silica MPS, the slurry can be certified as having a one year real-time shelf life / expiration date.

[0074] Table 7: Accelerated Aging (60°C) of Slurry Concentrates [Table 7]

[0075] As shown in Table 7, all formulations were stable throughout the entire test run. Stability in the acidic range of neutral silica is typically difficult to achieve. The single-pot solution was stable from about pH 2 to about 6.5 at 2x concentration (selected data shown in Table 7) and other concentration levels (e.g., 3x, 4x, and up to 10x concentrations) (not shown in the table). In the two-part solution (7C), all components except the acid could be concentrated to a higher degree and remained stable (still stable up to 10x). At the time of use, the slurry would be reconstituted by adding acid and water before running it on the polishing tool.

[0076] Example 8: Demonstration of Removal Rate Selectivity for Patterned Wafers In this example, the polishing compositions used in Samples 8A, 8B, and 8C, which contained colloidal silica abrasives and nitride removal rate reducers shown in Tables 1, 3, and 5, were used to polish 200 mm STI patterned wafers in which the patterned silicon nitride was filled with high-density silicon oxide, as shown in Figure 2. The pattern in the silicon nitride consisted of a wide array of lines and spaces, squares, checkers, and meshes of various pitches and densities distributed across the wafer surface.

[0077] Polishing was performed using a 200 mm Applied Materials Mirra polishing tool equipped with a Dow VP6000 pad and a 3M A165 CIP1 conditioning disk, with 2 psi wafer back pressure. The polishing time was varied based on in-situ endpoint detection using both motor torque and red laser (650 nm) absorbance. Features in both of these endpoint signals, indicating silicon oxide removal and exposure of the underlying silicon nitride in the active lines of the film stack, can be observed during polishing. The removal rate of the patterned silicon oxide was calculated based on the amount of material removed prior to silicon nitride exposure divided by the polishing time. Meanwhile, the removal rate of the patterned silicon nitride was calculated by dividing the amount of material removed by the time after the silicon nitride was exposed to the polishing composition. Upon completion of polishing, the wafers were cleaned using Fujifilm Wako 8901 post-CMP cleaning chemistry on a 200 mm on-track post-CMP cleaning tool (obtained from Lam Research). All wafer film thickness measurements (eg, for removal rate determination) were taken using a KLA Tencor F5X ellipsometer.

[0078] [Table 8]

[0079] From the data presented in Table 8, it can be seen that the high selectivity between silicon oxide and silicon nitride material removal rates previously observed in blanket wafers is also observed in patterned wafers containing silicon oxide (top) and silicon nitride (bottom). As can be seen in Table 8, for Sample 8A, the selectivity of silicon oxide to silicon nitride varies from 86 to 190, depending on the pattern size, density, and pitch. For Sample 8B, the selectivity of silicon oxide to silicon nitride is 54, and for Sample 8C, the selectivity is 4. Table 8 only provides an illustrative example of performance for patterned wafers. In our in-house experiments, we have observed selectivity ratios in patterned test wafers to vary from 3 (which is considered satisfactory for patterned wafers) to approximately 1000, depending on the film complexity. Furthermore, the selectivity of polishing compositions containing the nitride removal rate reducers described herein exceeds the selectivity of many legacy, industry-standard, commercially available ceria-based STI polishing compositions presented in the prior art.

[0080] Example 9: Demonstration of dishing and erosion of patterned wafers In this example, patterned wafers similar to those used in Example 8 were measured with a Park Systems atomic force microscope tool to quantify the silicon oxide dishing / step height and silicon nitride erosion / loss at endpoint. The polishing compositions used in Samples 9A and 9B contained the nitride removal rate reducers shown in Tables 1, 3, and 5, and were used to polish the patterned wafers whose stacks are shown in FIG. 2. The silicon oxide dishing / step height and silicon nitride erosion / loss results are shown in Table 9. The planarization efficiency (PE) is reported as a percent and is equal to the change in silicon oxide step height divided by the amount of oxide removed during polishing and multiplied by 100 (to convert to a percent).

[0081] Table 9: Patterned Wafer Dishing and Erosion [Table 9]

[0082] As can be seen from Table 9, silicon oxide dishing and silicon nitride erosion are very small. Typically, very small numbers for dishing and erosion are preferred. The dishing and erosion numbers represent the final topographic flatness of a patterned wafer after CMP polishing. Small values ​​(in Å) of these numbers are desirable because they indicate the separation between film peaks and valleys on wafers containing multiple film types in a patterned wafer. Smaller numbers indicate less separation between peaks and valleys, suggesting a more planar wafer surface, which is the overall goal of the CMP process step in semiconductor fabrication. Ideally, dishing and erosion values ​​of 0 (indicating a perfectly flat wafer surface) are desirable. However, traditionally, these numbers are typically in the hundreds or thousands of Å range on patterned wafers that represent actual devices / products. Therefore, the data presented in Table 9 demonstrates that the polishing composition provides unique / extraordinary performance in providing very low dishing and erosion values, and thus very good topography for patterned wafers. As can be seen from Table 9, silicon oxide dishing can be as low as 35 Å and as high as 375 Å. SiN erosion is much better than dishing, with erosion numbers as low as 30 Å and as high as 74 Å. Again, these are representative examples; in our experiments, we have observed dishing and erosion numbers as high as 1000 Å and as low as 1 Å, which are still satisfactory for the purposes of this invention and acceptable to semiconductor manufacturers.

[0083] For planarization efficiency (PE), the higher the number, the better the result. Ideally, a PE of 100% is desired, because this value means that the entire wafer is already planarized and flat, i.e., there are no step heights between the peaks and valleys. From the data in Table 9, it can be seen that the PE varies from a low of 14% to 74%. Therefore, these polishing compositions provide good planarization efficiency on patterned wafers.

[0084] Again, the data presented in Table 9 demonstrate that the polishing compositions presented in the present disclosure surpass the oxide dishing, silicon nitride erosion, and planarization efficiency of state-of-the-art, commercially available, ceria-based STI polishing compositions.

[0085] Example 10: Demonstration of patterned wafer defectivity after polishing In this example, the defectivity of patterned wafers similar to those used in Examples 8 and 9 was measured using a KLA AIT XUV defect counter tool, using a commercially available ceria-based STI formulation and composition 8A described in Example 8 (which is a silica-based polishing composition containing a nitride removal rate reducer). The wafer map of the wafer polished with composition 8A is shown in Figure 3. The wafer map of the wafer polished with the commercially available ceria-based STI polishing composition is shown in Figure 4.

[0086] As demonstrated in Figure 4, the ceria-based formulation was prone to severe arc-shaped scratches and numerous defects (total defect count over 10,000) that were widespread across the wafer due to the relative hardness and size of the abrasive. Closer inspection of the defects revealed numerous macro- and microscratches accompanied by significant residue, many of which were considered to be overall device-killing defects. However, Figure 3 shows that Polishing Composition 8A, which contains high-purity colloidal silica as the abrasive, had far fewer scratches than the ceria-based composition (Figure 4). In fact, the silica polishing composition was nearly "defect-free," exhibiting a normal surface. The total defect count was approximately 175 for defects 90 nm or larger in size. Defects are critical to the final device yield and the production of saleable chips. For the patterned wafer shown in Figure 4, assume there are 1,000 dies (each square) per patterned wafer. Each of the defective dies could be deemed non-salable if the defect was a device-killing defect. Therefore, ceria-based polishing compositions exhibit a large number of defects, resulting in a low yield of saleable chips per wafer, whereas the polishing compositions of the present disclosure exhibit significantly fewer defects and a significantly higher yield of saleable chips per wafer.

[0087] Therefore, the low defectivity achieved using the polishing composition of the present disclosure is very attractive to semiconductor companies because it increases their top- and bottom-line revenues. From a technical standpoint, ceria abrasives are inorganic in nature (e.g., lanthanide cerium metal-based oxides) and generally harder and larger in size than silica abrasives, which makes them more likely to produce large amounts of scratches and defects on the wafer surface. Conversely, colloidal silica abrasives are organic in nature (silicon non-metal-based oxides in colloidal dispersion form) and generally softer, therefore not producing scratches or defects during polishing.

[0088] Those skilled in the art have been unable to develop silica-based STI polishing compositions with satisfactory removal selectivity for silicon oxide over silicon nitride. As described in this disclosure, the inventors have discovered a synergistic combination of silica and a silicon nitride removal rate reducer that can provide the industry with silica-based STI polishing compositions. In addition, the invention described in this disclosure is applicable to abrasives other than silica (e.g., alumina, titania, etc.).

[0089] Although the present disclosure has been described with reference to the examples set forth herein, it will be understood that other modifications and variations are possible without departing from the spirit and scope of the disclosure as defined in the appended claims.

[0090] Example 11: Demonstration of improved defectivity of rust inhibitors In this example, silicon nitride (SiN) blanket wafers were polished with a slurry containing 1.5 wt% colloidal silica abrasive, an organic acid as a pH adjuster, n-octadecylphosphonic acid, a corrosion inhibitor (listed in the table below), and water as the liquid carrier. Upon completion of polishing, the wafers were cleaned in a 200 mm on-track post-CMP cleaning tool (obtained from Lam Research company) using Fujifilm Wako 8901 post-CMP cleaning chemistry. Particle defect counts were measured with a KLA AIT XUV defect counter tool.

[0091] Table 10: Total defect counts on silicon nitride blanket wafers [Table 10]

[0092] As shown in Table 10, the addition of anticorrosion agents reduces the total defect count by 50-88%. This example demonstrates that short-chain (C6-C8) and medium-chain (C12) anionic surfactants can effectively reduce the total defect count on SiN films after polishing. Reducing post-CMP defectivity is crucial for achieving high device yields. This example demonstrates the effectiveness of anticorrosion agents in improving yield. [1] at least one abrasive; a hydrophobic portion containing a C4 to C40 hydrocarbon group; a hydrophilic portion comprising at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group; the hydrophobic portion and the hydrophilic portion are separated by 0 to 10 alkylene oxide groups; at least one nitride removal rate reducer; at least one metal rust inhibitor different from the at least one nitride removal rate reducer, wherein the metal rust inhibitor comprises an amino acid, a phosphonate surfactant, a phosphate surfactant, a sulfate surfactant, a sulfonate surfactant, a glucamide surfactant, an azole, an imide, an oxazole, a thiourea, or a Schiff base; an acid or base; and water; and having a pH in the range of about 2 to about 6.5. [2] The polishing composition according to [1], wherein the at least one metal rust inhibitor comprises benzotriazole, histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, or dodecylbenzenesulfonic acid. [3] The polishing composition according to [1] above, wherein the at least one metal rust inhibitor is present in an amount of about 0.1 ppm to about 1 wt % based on the composition. [4] The polishing composition according to [1] above, wherein the hydrophobic portion contains a C12 to C32 hydrocarbon group. [5] The polishing composition according to [4] above, wherein the hydrophobic portion contains a C16 to C22 hydrocarbon group. [6] The polishing composition according to [1], wherein the hydrophilic portion contains a phosphate group or a phosphonate group. [7] 1. The polishing composition according to claim 1, wherein the at least one nitride removal rate reducer is selected from the group consisting of naphthalenesulfonic acid-formalin condensates, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, oleth-3 phosphate, and oleth-10 phosphate. [8] The polishing composition according to [1], wherein the at least one nitride removal rate reducer has zero alkylene oxide groups separating the hydrophobic portion and the hydrophilic portion. [9] The polishing composition according to [1], wherein the at least one nitride removal rate reducer is present in an amount of about 0.1 ppm to about 1000 ppm relative to the composition.

[10] The polishing composition according to [1], wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is about 3:1 or more.

[11] The polishing composition according to [1], wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is about 100:1 or more.

[12] The polishing composition according to [1], wherein the at least one abrasive is selected from the group consisting of cationic abrasives, substantially neutral abrasives, and anionic abrasives.

[13]

[13] The polishing composition according to

[12] , wherein the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, co-formed products thereof, coated abrasives, surface-modified abrasives, and mixtures thereof.

[14] The polishing composition according to [1] above, wherein the at least one abrasive is present in an amount of about 0.05% by weight to about 20% by weight of the composition.

[15] The composition according to [1], wherein the acid is selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylenephosphonic acid, hexamethylenediaminetetra(methylenephosphonic acid), bis(hexamethylene)triaminephosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof.

[16] The composition according to [1], wherein the base is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolytriazole, pyrazole, isothiazole, and mixtures thereof.

[17] Applying the polishing composition according to [1] to a substrate having at least silicon nitride and at least silicon oxide on the surface of the substrate; and contacting a pad with the surface of the substrate and moving the pad relative to the substrate; A method comprising:

[18] The method according to

[17] , wherein at least one of the silicon nitride and the silicon oxide is doped with at least one dopant selected from the group consisting of carbon, nitrogen, oxygen, and hydrogen.

[19] The method of claim 18, further comprising forming a semiconductor device from the substrate.

Claims

1. at least one abrasive; a hydrophobic portion comprising a C16 to C22 hydrocarbon group; a hydrophilic portion comprising at least one group selected from the group consisting of a phosphate group and a phosphonate group; the hydrophobic portion and the hydrophilic portion are separated by 0 alkylene oxide groups; at least one nitride removal rate reducer; including hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, or dodecylbenzenesulfonic acid; at least one metal rust inhibitor; an acid or base; and water; Including, free of oxidizing agents, salts, and anionic polymers, and having a pH in the range of 2 to 6.5; Polishing composition.

2. The at least one metal rust inhibitor is present in an amount of 0.1 ppm to 1 wt % based on the polishing composition. The polishing composition of claim 1 .

3. the hydrophobic portion comprises a C16 to C18 hydrocarbon group; The polishing composition of claim 1 .

4. the at least one nitride removal rate reducer is selected from the group consisting of stearyl phosphate, octadecyl phosphonic acid, oleyl phosphate, behenyl phosphate, and mixtures thereof; The polishing composition of claim 1 .

5. the polishing composition comprises at least two of the nitride removal rate reducers; The polishing composition of claim 1 .

6. the at least one nitride removal rate reducer is present in an amount of 0.1 ppm to 1000 ppm relative to the polishing composition; The polishing composition of claim 1 .

7. the at least one abrasive is selected from the group consisting of cationic abrasives, substantially neutral abrasives, and anionic abrasives; The polishing composition of claim 1 .

8. the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, co-formed products thereof, coated abrasives, surface-modified abrasives, and mixtures thereof; The polishing composition of claim 1 .

9. The abrasive is a silica-based abrasive. The polishing composition of claim 8.

10. the at least one abrasive is present in an amount of 0.05 wt. % to 20 wt. % of the polishing composition; The polishing composition of claim 1 .

11. the acid is selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylenephosphonic acid, hexamethylenediaminetetra(methylenephosphonic acid), bis(hexamethylene)triaminephosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof; The polishing composition of claim 1 .

12. the base is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolytriazole, pyrazole, isothiazole, and mixtures thereof; The polishing composition of claim 1 .

13. The acid or base is present in an amount of 0.01 wt % to 10 wt % of the polishing composition. The polishing composition of claim 1 .

14. The polishing composition comprises a mixture of acids or a mixture of acids containing an amino acid. The polishing composition of claim 1 .

15. the amino acid is aminoacetic acid, glycine, bicine, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, or tyrosine; The polishing composition of claim 14.

16. the mixture of acids further comprises an acid selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylenephosphonic acid, hexamethylenediaminetetra(methylenephosphonic acid), bis(hexamethylene)triaminephosphonic acid, peracetic acid, potassium acetate, phenoxyacetic acid, diglycolic acid, glyceric acid, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof; The polishing composition of claim 15.

17. the polishing composition comprises the mixture of acids in an amount of 0.01% to 10% by weight of the polishing composition; The polishing composition of claim 15.

18. The water is present in an amount of 50% to 99.9% by weight of the polishing composition. The polishing composition of claim 1 .

19. the ratio of silicon oxide removal rate to silicon nitride removal rate is equal to or greater than 3:1; The polishing composition of claim 1 .

20. the ratio of silicon oxide removal rate to silicon nitride removal rate is equal to or greater than 100:1; The polishing composition of claim 1 .

21. applying the polishing composition of any one of claims 1 to 20 to a surface of a substrate, the substrate having at least silicon nitride and at least silicon oxide; and contacting a pad with the surface of the substrate and moving the pad relative to the substrate; Contains Polishing method.

22. At least one of the silicon nitride and the silicon oxide is doped with at least one dopant selected from the group consisting of carbon, nitrogen, oxygen, and hydrogen. The polishing method according to claim 21.

23. further comprising forming a semiconductor device from the substrate. The polishing method according to claim 21.

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