Oscillation circuit

Abstract

To provide an oscillation circuit that can suppress fluctuations in oscillation frequency regardless of fluctuations in reference resistance due to temperature.SOLUTION: A constant current circuit comprises: a first transistor having one end connected to a first node; a second transistor having one end connected to the first node; a third transistor having one end connected to the other end of the first transistor and the other end connected to a second node; a fourth transistor having one end connected to the other end of the second transistor and the other end connected to an output node; a reference resistor connected between the third transistor and the third node; and a differential amplifier circuit that differentially amplifies a difference voltage between a reference voltage and a voltage of the second node and outputs an output signal to gates of the first to fourth transistors. A ratio of a shape ratio of the first transistor to a shape ratio of the second transistor is smaller than a ratio of a shape ratio of the third transistor to a shape ratio of the fourth transistor.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an oscillator circuit. [Background technology]

[0002] Oscillator circuits that output signals at a specific oscillation frequency are used in communication devices, etc. For communication applications, fluctuations in the oscillation frequency must be kept within 1% regardless of fluctuations in power supply voltage and temperature.

[0003] In an RC oscillator circuit, the oscillation frequency is determined by the circuit's RC time constant and the constant current value. The reference capacitance C can be MOM (Metal-Oxide-Metal) using the capacitance between wiring, or MIM (Metal-Insulator-Metal) using the capacitor metal. The fluctuation of the capacitance value due to temperature and voltage is much less than 1%, so it has almost no effect on the oscillation frequency of the oscillator circuit.

[0004] On the other hand, polysilicon resistors are generally used for reference resistors. While there is almost no fluctuation in reference resistance due to power supply voltage, there is a large fluctuation due to temperature (temperature coefficient). The temperature coefficient depends on the sheet resistance value, and for a sheet resistance of around 400 Ω / sq, the first-order temperature coefficient is about -1.5e-4. Assuming the operating temperature range of the oscillator circuit is -40 to 125°C, the resistance value will fluctuate by about 1.5% for a temperature fluctuation of 25°C. For this reason, in conventional RC-type oscillator circuits, fluctuations in the reference resistance cause fluctuations in the oscillation frequency, and it may be necessary to perform temperature compensation for the oscillation frequency. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-252414 Summary of the Invention [Problem to be solved by the invention]

[0006] SUMMARY OF THE INVENTION In view of the above problems, the present invention provides an oscillation circuit that can suppress fluctuations in oscillation frequency regardless of fluctuations in the reference resistance due to temperature. [Means for solving the problem]

[0007] According to a first aspect of the present invention, there is provided an oscillator circuit including a reference capacitance, a reference resistor, a constant current circuit for supplying a constant current, and an inverter circuit, wherein the oscillation frequency is determined by a time constant determined by the reference capacitance, the reference resistor, and the constant current, the constant current circuit including a first transistor having one end connected to a first node, a second transistor having one end connected to the first node, a third transistor having one end connected to the other end of the first transistor and the other end connected to a second node, a fourth transistor having one end connected to the other end of the second transistor and the other end connected to an output node, a reference resistor connected between the third transistor and the third node, and a differential amplifier circuit that differentially amplifies a difference voltage between a reference voltage and a voltage at the second node and outputs an output signal to gates of the first to fourth transistors, wherein a ratio of a shape ratio of the first transistor to a shape ratio of the second transistor is smaller than a ratio of a shape ratio of the third transistor to a shape ratio of the fourth transistor.

[0008] An oscillator circuit according to a second aspect of the present application includes a first transistor having one end connected to a first node, a second transistor having one end connected to the first node, a third transistor having one end connected to the other end of the first transistor via a resistive element and the other end connected to a second node, a fourth transistor having one end connected to the other end of the second transistor and the other end connected to an output node, a reference resistor connected between the third transistor and the third node, and a differential amplifier circuit that differentially amplifies a difference voltage between a reference voltage and the voltage of the second node and outputs an output signal to the gates of the first to fourth transistors. [Brief explanation of the drawings]

[0009] [Figure 1]1 is a circuit diagram illustrating an oscillator circuit 1 according to a first embodiment. [Figure 2] 2 is a timing chart illustrating the operation of the oscillator circuit 1. [Figure 3] 2 is a circuit diagram illustrating an example of a circuit configuration of a constant current circuit 11 of the oscillator circuit 1 according to the first embodiment. FIG. [Figure 4] 4 is a graph illustrating the characteristics of the constant current circuit 11 of the oscillation circuit 1 according to the first embodiment. [Figure 5] FIG. 10 is a circuit diagram illustrating an example of the circuit configuration of a constant current circuit 11 of an oscillation circuit 1 according to a second embodiment. [Figure 6] FIG. 2 is a circuit diagram illustrating an example of the configuration of a constant current circuit 11 of a comparative example. [Figure 7] 10 is a graph illustrating the characteristics of the constant current circuit 11 of the oscillation circuit 1 of the comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, the present embodiment will be described with reference to the accompanying drawings. In the accompanying drawings, functionally identical elements may be designated by the same numerals. Note that the accompanying drawings show embodiments and implementation examples according to the principles of the present disclosure, but these are for understanding the present disclosure and are not to be used to interpret the present disclosure in a limiting manner. The descriptions in this specification are merely typical examples and are not intended to limit the scope or application of the present disclosure in any way.

[0011] Although the present embodiment has been described in sufficient detail to enable those skilled in the art to implement the present disclosure, it should be understood that other implementations and forms are possible, and that changes in configuration and structure and substitutions of various elements are possible without departing from the scope and spirit of the technical ideas of the present disclosure. Therefore, the following description should not be interpreted as being limited thereto.

[0012] [First embodiment] An oscillator circuit 1 according to a first embodiment will be described with reference to FIG. 1. The oscillator circuit 1 includes, as an example, a constant current circuit 11, a reference resistor 12, an inverter 13, a capacitive element 14 (capacitor), an operational amplifier 15, an inverter 16, a capacitive element 17, an operational amplifier 18, transistors 19A and 19B, a latch circuit 20, a D flip-flop circuit FF1, a buffer circuit BF1, and inverters IN1 to IN3. The constant current circuit 11 supplies a charging current Irefc generated by mirroring a constant current Irefr to the inverters 13 and 16, and also supplies a reference voltage Vth. Details of the configuration will be described later. The oscillation frequency of the clock signal output by the oscillator circuit 1 is determined according to the capacitance value of the capacitive element, the resistance value of the reference resistor, the magnitude of the constant current supplied by the constant current circuit 11, and other factors.

[0013] The inverter 13 is configured by connecting, for example, a P-type MOS transistor M1 and an N-type MOS transistor M2 in series, and is supplied with a charging current Irefc from the constant current circuit 11. A capacitive element 14 is connected between its output terminal (the connection node between the transistors M1 and M2) and a ground potential node (Vss). An output voltage Vc1 from the output terminal of the inverter 13 is input to an inverting input terminal (-) of an operational amplifier 15. The operational amplifier 15 receives a reference voltage Vth from the constant current circuit 11 at its non-inverting input terminal (+), and outputs a differentially amplified signal between the reference voltage Vth and the output voltage Vc1.

[0014] The inverter 16 is configured by connecting, for example, a P-type MOS transistor M3 and an N-type MOS transistor M4 in series, and is supplied with a charging current Irefc from the constant current circuit 11. A capacitive element 17 is connected between the output terminal (the connection node between the transistors M3 and M4) and a ground potential node (Vss: third node). An output voltage Vc2 from the output terminal of the inverter 16 is input to an inverting input terminal (-) of an operational amplifier 18. The operational amplifier 18 receives a reference voltage Vth from the constant current circuit 11 at its non-inverting input terminal (+), and outputs a differentially amplified signal between the reference voltage Vth and the output voltage Vc2. A P-type MOS transistor 19A, which is switched between conductive and non-conductive states by an enable signal en, is connected between the output terminal of the OP amplifier 15 and a power supply voltage node (Vdd: first node), and an N-type MOS transistor 19B, which is switched between conductive and non-conductive states by an enable signal en_n (an inverted signal of the enable signal en), is connected between the output terminal of the OP amplifier 18 and a ground potential node. When the enable signals en and en_n switch between "H" and "L", the oscillation circuit 1 starts oscillating.

[0015] Latch circuit 20 has the function of receiving the output signals of OP amplifier 15 and OP amplifier 18 and latching the state of the signals. Inverter IN1 receives the output signal of latch circuit 20 and supplies its inverted signal to the input terminal of inverter 13. Inverters IN2 and IN3 are connected in series, and the input terminal of inverter IN3 receives the output signal of latch circuit 20. The output terminal of inverter IN2 is connected to the input terminal of inverter 16.

[0016] The D flip-flop circuit FF1 holds the output signal of the latch circuit 20, delays it by a predetermined delay time, and outputs it. The output signal of the D flip-flop circuit FF1 is further delayed by the buffer circuit BF1 and is output as the clock signal ck0.

[0017] The operation of this oscillator circuit 1 will be described with reference to FIG. 2. When the enable signal en goes high, the oscillator circuit 1 starts operating. The output voltages Vc1 and Vc2 of the inverters 13 and 16 rise as the capacitors 14 and 15 are charged via the transistors M1 and M3. When the output voltages Vc1 and Vc2 reach the reference voltage Vth, the output signals of the operational amplifiers 15 and 18 are inverted and latched by the latch circuit 20. The output signal of the latch circuit 20 is input to the inverters 13 and 16 via the inverters IN1 to IN3, causing the output signals Vc1 and Vc2 of the inverters 13 and 16 to switch from high to low. The above operation is repeated, allowing the clock signal ck0 to continue oscillating at a predetermined frequency.

[0018] The constant current circuit 11 supplies a constant current Irefr to the reference resistor 12, and also supplies a mirror current of the constant current Irefr, a charging current Irefc, to the inverters 13 and 16. The oscillation frequency fck0 of the clock signal ck0 is determined by fcko=Irefc / (4Vth·C). If the resistance value R of the reference resistor 12 fluctuates with temperature, the oscillation frequency fck0 will also fluctuate, and temperature compensation may be required.

[0019] An example of the configuration of a constant current circuit 11 of the comparative example will be described with reference to Figure 6. This constant current circuit of the comparative example includes P-type MOS transistors Mp1 and Mp2 connected in a current mirror configuration. The constant current Irefr flowing through transistor Mp1 is mirrored in transistor Mp2, causing a charging current Irefc to flow. However, if the reference resistor 12 is configured using a polysilicon resistor or the like, there is a problem in that the resistance value fluctuates greatly with temperature, which affects the oscillation frequency fck0.

[0020] As an example, if the sheet resistance of the reference resistor 12 is about 400 Ω / sq, its first-order temperature coefficient is about -1.5e-4. Assuming that the operating temperature range of the oscillator circuit 1 is -40 to 125°C, the resistance value fluctuates by about 1.5% at 25°C. Therefore, the oscillation frequency fck0 can also fluctuate by about 1.5%.

[0021] The graph in Figure 7 shows an example of the temperature dependence of the constant current Irefr, charging current Irefc, and drain-source voltage Vds of transistors Mp1 and Mp2 in the constant current circuit 11 of the comparative example in Figure 6. The constant current Irefr is Irefr = Vth / R, but when the value of R decreases due to an increase in temperature T, the constant current Irefr increases, and the charging current Irefc, which is a mirror current, also increases. As the charging current Irefc increases, the oscillation frequency fck0 also increases. Note that the drain-source voltage Vds of transistors Mp1 and Mp2 decreases in inverse proportion to the increase in charging current Irefc (drain current).

[0022] An example of the circuit configuration of the constant current circuit 11 of the oscillator circuit 1 of the first embodiment will be described with reference to Figure 3. This constant current circuit 11 includes an OP amplifier 31, a first P-type MOS transistor Mp1, a second P-type MOS transistor Mp2, a third P-type MOS transistor Mp3, and a fourth P-type MOS transistor Mp4 (hereinafter simply referred to as transistors Mp1 to Mp4).

[0023] The OP amplifier 31 receives a reference voltage Vths supplied from a constant voltage circuit (not shown) at its non-inverting input terminal (+), and a reference voltage Vth is input to its inverting input terminal (-) (second node). The transistors Mp1 and Mp3 and the reference resistor 12 are connected in series between a power supply voltage node (Vdd) and a ground potential node (Vss). The output signal of the OP amplifier 31 is input to the gates of the transistors Mp1 and Mp3. The reference resistor 12 is connected between the inverting input terminal (-) of the OP amplifier 31 (or the drain of the transistor Mp3) and the ground potential node (Vss). A constant current Irefr flowing through the reference resistor 12 generates the reference voltage Vth. The OP amplifier 31 performs differential amplification so that the reference voltage Vth is equal to the reference voltage Vths, thereby obtaining the constant current Irefr. The transistors Mp2 and Mp4 are connected in series between the power supply voltage node (Vdd) and the output terminal of the constant current circuit 11, and the output signal of the operational amplifier 31 is supplied to the gates of the transistors Mp2 and Mp4.

[0024] The ratio PU (= Pmp1 / Pmp2) of the shape ratio Pmp1 of the transistor Mp1 in the first embodiment to the shape ratio Pmp2 of the transistor Mp2 is made smaller than the ratio PL (= Pmp3 / Pmp4) of the shape ratio Pmp3 of the transistor Mp3 to the shape ratio Pmp4 of the transistor Mp4 (PU <PL).

[0025] As an example, the shape ratio Pmp1 = Wp1 / Lp1 of the transistor Mp1 is made equal to the shape ratio Pmp2 = Wp2 / Lp2 of the transistor Mp2 (Pmp1 = Wp1 / Lp1 = Pmp2 = Wp2 / Lp2), while the shape ratio Pmp3 = Wp3 / Lp3 of the transistor Mp3 is made larger than the shape ratio Pmp4 = Wp4 / Lp4 of the transistor Mp4 (Wp3 / Lp3> Wp4 / Lp4). That is, PU <PL is set. By setting such a shape ratio, the variation of the charging current Irefc with respect to the temperature variation can be suppressed, and thereby the necessity of correcting the oscillation frequency fck0 of the clock signal ck0 can be reduced.

[0026] As another example, when the charging current Irefc is mirrored as a current smaller than the constant current Irefr, for example, Irefc = Irefr / 2, the shape ratio Pmp1 = Wp1 / Lp1 of the transistor Mp1 is made twice the shape ratio Pmp2 = Wp2 / Lp2 of the transistor Mp2 (Pmp1 = Wp1 / Lp1 = 2 · Pmp2 = 2 · Wp2 / Lp2), while the shape ratio Pmp3 = Wp3 / Lp3 of the transistor Mp3 is made larger than twice the shape ratio Pmp4 = Wp4 / Lp4 of the transistor Mp4 (Pmp3 = Wp3 / Lp3> 2 · Pmp4 = 2 · Wp4 / Lp4). Also in this case, PU <PL is set.

[0027] In the constant current circuit 11, it is preferable that the transistors Mp1 and Mp2 are enhancement-type P-type MOS transistors, and the transistors Mp3 and Mp4 are depletion-type P-type MOS transistors. The influence of the channel length modulation effect of the transistors Mp1 and Mp2 is reduced, and an improvement in the current mirror ratio accuracy can be expected similar to that of the cascode current source.

[0028] Next, the temperature characteristics of the constant current Irefr, the charging current Irefc, and the drain-source voltage Vds of the transistors Mp1 and Mp2 in the oscillation circuit 1 of this first embodiment will be described with reference to the graph of FIG. 4. The constant current Irefr is given by Irefr = Vths / R, and can vary due to fluctuations in the resistance value R. When the reference resistor 12 is a polysilicon resistor, its temperature gradient is a negative value. Therefore, as the temperature T rises, the constant current Irefr increases (the temperature gradient is a positive value).

[0029] However, in this first embodiment, the shape ratios of the transistors Mp1 to 4 are set such that PU < PL holds. Therefore, even if the constant current Irefr increases as the temperature T rises, the drain-source voltage Vds_mp4 of the transistor Mp4 becomes larger than the drain-source voltage Vds_mp3 of the transistor Mp3 (Vds_mp4 > Vds_mp3). Consequently, the drain-source voltage Vds_mp1 of the transistor Mp1 becomes larger than the drain-source voltage Vds_mp2 of the transistor Mp2 (Vds_mp1 > Vds_mp2). That is, the slope ΔVds_mp1 of the drain-source voltage Vds_mp1 of the transistor Mp1 with respect to the rise in temperature T becomes larger than the slope ΔVds_mp2 of the drain-source voltage Vds_mp2 of the transistor Mp2 (ΔVds_mp1 > ΔVds_mp2). As a result, the primary temperature coefficient of the constant current Irefr is canceled out, and the temperature characteristic of the charging current Irefc can become a convex-upward curve according to the secondary temperature coefficient of the reference resistor 12, as shown in FIG. 4. Therefore, compared with the conventional case, the temperature change of the charging current Irefc can be suppressed, and a change curve close to flat can be obtained. As a result, the fluctuation of the oscillation frequency fck0 due to temperature can be suppressed.

[0030] [Second Embodiment] Next, the oscillation circuit according to the second embodiment will be described with reference to FIG. 5. Since the structure of the oscillation circuit 1 may be the same as that of the first embodiment (FIG. 1), redundant explanations will be omitted. In this second embodiment, the structure of the constant current circuit 11 is different from that of the first embodiment.

[0031] As shown in FIG. 5, the constant current circuit 11 of the second embodiment includes an OP amplifier 31, a first P-type MOS transistor Mp1, a second P-type MOS transistor Mp2, a third P-type MOS transistor Mp3, a fourth P-type MOS transistor Mp4, and a resistor 21 (hereinafter simply referred to as transistors Mp1 to Mp4). The resistor 21 is connected between the transistors Mp1 and Mp2.

[0032] In this second embodiment, instead of setting the shape ratios of the transistors Mp1 to Mp4 as in the first embodiment (PU < PL), by inserting the resistor 21, the same effect as that of the first embodiment is obtained. The shape ratio Pmp1 = Wp1 / Lp1 of the transistor Mp1 may be equal to the shape ratio Pmp2 = Wp2 / Lp2 of the transistor Mp2 (Pmp1 = Wp1 / Lp1 = Pmp2 = Wp2 / Lp2). Also, the shape ratio Pmp3 = Wp3 / Lp3 of the transistor Mp3 may be equal to the shape ratio Pmp4 = Wp4 / Lp4 of the transistor Mp4 (Wp3 / Lp3 = Wp4 / Lp4). Due to the insertion of the resistor 21, even if the constant current Irefr increases as the temperature T rises, the slope ΔVds_mp1 of the drain-source voltage Vds_mp1 of the transistor Mp1 with respect to the rise in temperature T is larger than the slope ΔVds_mp2 of the drain-source voltage Vds_mp2 of the transistor Mp2 (ΔVds_mp1 > ΔVds_mp2). As a result, the first-order temperature coefficient of the constant current Irefr is canceled, and the temperature characteristic of the charging current Irefc can become a convex-upward curve according to the second-order temperature coefficient of the reference resistor 12, similar to that shown in FIG. 4. Therefore, compared with the conventional case, the temperature change of the charging current Irefc can be suppressed to obtain a nearly flat change curve, and as a result, the variation of the oscillation frequency fck0 due to temperature can be suppressed.

[0033] [others] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. [Explanation of symbols]

[0034] 1...Oscillation circuit 11... Constant current circuit 12...Reference resistor 13, 16...Inverter 14, 17...Capacitor element 15, 18, 31...OP amps 19A, 19B...Transistor 20...Latch circuit 21...Resistor FF1...flip-flop circuit IN1~3...Inverter

Claims

1. An oscillation circuit comprising a reference capacitance, a reference resistance, a constant current circuit for supplying a constant current, and an inverter circuit, wherein an oscillation frequency is determined by a time constant determined by the reference capacitance, the reference resistance, and the constant current, The constant current circuit is a first transistor having one end connected to a first node; a second transistor having one end connected to the first node; a third transistor having one end connected to the other end of the first transistor and the other end connected to a second node; a fourth transistor having one end connected to the other end of the second transistor and the other end connected to an output node; a reference resistor connected between the third transistor and a third node; a differential amplifier circuit that differentially amplifies a difference voltage between a reference voltage and the voltage of the second node and outputs an output signal to the gates of the first to fourth transistors; Equipped with The ratio of the shape ratio of the first transistor to the shape ratio of the second transistor is: The ratio of the shape ratio of the third transistor to the shape ratio of the fourth transistor is smaller than that 1. An oscillator circuit comprising:

2. a geometric ratio of the first transistor is equal to a geometric ratio of the second transistor; The shape ratio of the third transistor is greater than the shape ratio of the fourth transistor.

2. The oscillator circuit according to claim 1 .

3. the threshold voltages of the first transistor and the second transistor are positive values; 3. The oscillation circuit according to claim 1, wherein the threshold voltages of the third transistor and the fourth transistor are negative values.

4. a first transistor having one end connected to a first node; a second transistor having one end connected to the first node; a third transistor having one end connected to the other end of the first transistor via a resistor element and the other end connected to a second node; a fourth transistor having one end connected to the other end of the second transistor and the other end connected to an output node; a reference resistor connected between the third transistor and a third node; a differential amplifier circuit that differentially amplifies a difference voltage between a reference voltage and the voltage of the second node and outputs an output signal to the gates of the first to fourth transistors; An oscillator circuit comprising:

5. the threshold voltages of the first transistor and the second transistor are positive values; 5. The oscillator circuit according to claim 4, wherein the threshold voltages of the third transistor and the fourth transistor are negative values.

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