Image sensor and image sensor manufacturing method

Abstract

To provide an image sensor capable of suppressing leakage current in a charge transfer path from a photodiode to a floating diffusion.SOLUTION: An image sensor 10 includes a photodiode PD, a floating diffusion FD, a ground region GND, a transfer channel TC, and an insulation film GD. The photodiode PD is formed in a lower layer L1 of a substrate Sub. The floating diffusion FD and the ground region GND are formed in an upper layer L3 of the substrate Sub or on top of the upper layer L3. The transfer channel TC has a lower end connected to the photodiode PD. An upper end of the transfer channel TC is connected to the floating diffusion FD. The insulation film GD blocks at least a shortest path D1 between the transfer channel TC and the ground region GND.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] This specification discloses an image sensor and a method for manufacturing the same. [Background technology]

[0002] For example, Patent Documents 1 to 3 disclose image sensors in which a photodiode, a transfer gate, and a floating diffusion are arranged on a horizontal plane, and Patent Document 4 discloses an image sensor in which a photodiode, a transfer gate, and a floating diffusion are arranged vertically. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent No. 8,658,956 [Patent Document 2] Japanese Patent Application Laid-Open No. 2008-300446 [Patent Document 3] US Patent Application Publication No. 2005 / 0121708 [Patent Document 4] US Patent Application Publication No. 2023 / 0197757 Summary of the Invention [Problem to be solved by the invention]

[0004] 30 and 31 are cross-sectional views of a back-illuminated image sensor according to the prior art. Fig. 30 illustrates a ZZ horizontal cross section of Fig. 31. Fig. 31 illustrates a YY vertical cross section of Fig. 30.

[0005] For example, in a back-illuminated image sensor, as illustrated in FIG. 31, a photodiode PD is formed in a lower layer. Furthermore, as illustrated in FIG. 30, functional regions such as a floating diffusion FD and a ground region GND are formed in an upper layer. As pixels become smaller, the inter-region distance (inter-element distance) is reduced, as indicated by distances D100 and D102 in FIG. 30. As a result, when the transfer gate TX applies a voltage, that is, during the process of transferring charge from the photodiode PD to the floating diffusion FD, some of the charge may leak to the functional regions and electrodes, such as the ground region GND and the transfer gate TX.

[0006] Therefore, this specification discloses an image sensor that can suppress leakage current in a charge transfer path from a photodiode to a floating diffusion. [Means for solving the problem]

[0007] The image sensor disclosed herein has a multi-layer substrate. The image sensor includes a photodiode, a floating diffusion, a ground region, a transfer channel, and an insulating film. The photodiode is formed in a lower layer of the substrate. The floating diffusion and the ground region are formed in or on an upper layer of the substrate. The lower end of the transfer channel is connected to the photodiode. The upper end of the transfer channel is connected to the floating diffusion. The insulating film blocks at least the shortest path between the transfer channel and the ground region.

[0008] According to the above configuration, the shortest path between the transfer channel and the ground region is blocked by the insulating film, thereby suppressing leakage current from the transfer channel to the ground region.

[0009] In the above configuration, a trench may be formed in the image sensor. The trench has a frame shape surrounding the transfer channel. A gate insulating film is formed on at least a side surface of the trench. The transfer channel is then cylindrically covered by the gate insulating film.

[0010] By covering the transfer channel in a cylindrical shape with the gate insulating film, leakage current can be suppressed not only in the shortest path between the transfer channel and the ground region, but also in paths that bypass the shortest path.

[0011] In the above configuration, a gate insulating film may be formed on the bottom surface of the trench in addition to the side surfaces. In this case, a transfer gate is formed on the gate insulating film. The depth of the trench exceeds the thickness of the transfer gate. The transfer gate is formed at the bottom of the trench.

[0012] According to the above configuration, the floating diffusion and the transfer gate are separated in the thickness direction.

[0013] In the above structure, the floating diffusion may be an epitaxial layer.

[0014] According to the above configuration, the floating diffusion is formed on the substrate, so that a sufficient separation distance in the thickness direction from the transfer gate can be ensured.

[0015] In the above configuration, the transfer channel may have a lower impurity concentration than the floating diffusion and the photodiode.

[0016] This configuration prevents conduction between the floating diffusion and the photodiode when no voltage is applied by the transfer gate. Also, by doping impurities into the substrate to form a transfer channel, a charge transfer path can be secured.

[0017] In the above configuration, the floating diffusion may be a buried layer, in which case the region of the transfer gate relatively closer to the floating diffusion has a thinner layer thickness than the region relatively farther from the floating diffusion.

[0018] According to the above configuration, the floating diffusion is formed in the substrate, while the region of the transfer gate relatively close to the floating diffusion is formed as a thin layer, thereby allowing the floating diffusion and the transfer gate to be spaced apart in the thickness direction.

[0019] In the above structure, the floating diffusion may be a buried layer, in which case the contact hole extends deeper than the floating diffusion to reach the transfer gate.

[0020] According to the above configuration, the floating diffusion and the transfer gate can be separated in the thickness direction.

[0021] In the above configuration, the image sensor may further include a transfer gate and an insulating film for element isolation. The transfer gate is adjacent to the transfer channel in a planar direction. The insulating film for element isolation surrounds the photodiode. In this structure, the transfer channel is cylindrically covered by the gate insulating film and the insulating film for element isolation.

[0022] According to the above configuration, the transfer channel is cylindrically covered with the gate insulating film and the element isolation insulating film, which makes it possible to suppress leakage current flowing between the transfer channel and other electrodes or functional regions.

[0023] In the above configuration, the image sensor may include a photoelectric conversion unit. The photoelectric conversion unit includes a photodiode, a transfer gate, a gate insulating film, and an insulating film for element isolation. The image sensor further includes a plurality of photoelectric conversion units, a single transfer channel, and a single floating diffusion. The single transfer channel and the single floating diffusion are surrounded by the plurality of photoelectric conversion units.

[0024] According to the above configuration, the transfer channel is cylindrically covered by the gate insulating film and the element isolation insulating film formed on the multiple photoelectric conversion units, thereby suppressing leakage current flowing between the transfer channel and other electrodes or functional regions.

[0025] In the above configuration, the ground region may be an epitaxial layer.

[0026] This specification also discloses a method for manufacturing an image sensor. The image sensor has a substrate with a multilayer structure. In this manufacturing method, a photodiode is formed in a lower layer of the substrate. A transfer channel is formed so that its lower end is connected to the photodiode. A floating diffusion is formed in or on an upper layer of the substrate so that its upper end is connected to the transfer channel. A ground region is further formed in or on the upper layer. In addition, an insulating film is formed to block at least the shortest path between the transfer channel and the ground region.

[0027] In the above-described configuration, a frame-shaped trench may be formed surrounding the transfer channel. In this case, a gate insulating film is formed on at least the side surface of the trench, and the transfer channel is cylindrically covered with the gate insulating film.

[0028] In the above configuration, a gate insulating film may be formed on the bottom surface of the trench in addition to the side surfaces. A transfer gate may be further formed on the gate insulating film. In this case, the depth of the trench exceeds the thickness of the transfer gate. The transfer gate is formed at the bottom of the trench.

[0029] In the above configuration, the floating diffusion may be formed by epitaxial growth.

[0030] In the above configuration, the transfer channel may have a lower impurity concentration than the floating diffusion and the photodiode.

[0031] In the above-described configuration, the floating diffusion may be formed as a buried layer by ion implantation, in which case the thickness of the layer in the transfer gate is thinner in a region relatively closer to the floating diffusion than in a region relatively farther from the floating diffusion.

[0032] In the above structure, the floating diffusion may be formed as a buried layer by ion implantation, and a contact hole may be formed therein. The contact hole may extend deeper than the floating diffusion and reach the transfer gate.

[0033] In the above-described structure, a transfer gate may be formed adjacent to the transfer channel in the planar direction. Furthermore, an insulating film for element isolation may be formed. The insulating film for element isolation surrounds the photodiode. In this structure, the entire periphery of the transfer channel is covered by the gate insulating film and the insulating film for element isolation.

[0034] In the above configuration, a photoelectric conversion unit may be formed in the image sensor. The photoelectric conversion unit includes a photodiode, a transfer gate, a gate insulating film, and an insulating film for element isolation. Furthermore, the image sensor may be formed with a plurality of photoelectric conversion units, a single transfer channel, and a single floating diffusion. The single transfer channel and the single floating diffusion are surrounded by the plurality of photoelectric conversion units.

[0035] In the above configuration, the ground region may be formed by epitaxial growth. [Effects of the Invention]

[0036] According to the image sensor and the method for manufacturing the image sensor disclosed in this specification, it is possible to suppress leakage current in the charge transfer path from the photodiode to the floating diffusion. [Brief explanation of the drawings]

[0037] [Figure 1] 2 is a diagram illustrating a BB cross section of the image sensor according to the first embodiment. FIG. [Figure 2] 2 is a diagram illustrating an example of a vertical cross section of the image sensor according to the first embodiment taken along line AA. FIG. [Figure 3] 2A to 2C are longitudinal cross-sectional views taken along the line AA illustrating a charge transfer process of the image sensor according to the first embodiment. [Figure 4] 1A to 1C are vertical cross-sectional views illustrating a manufacturing process (1 / 9) of the image sensor according to the first embodiment. [Figure 5] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (2 / 9) of the image sensor according to the first embodiment. [Figure 6] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (3 / 9) of the image sensor according to the first embodiment. [Figure 7] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (4 / 9) of the image sensor according to the first embodiment. [Figure 8] 5A to 5C are vertical cross-sectional views illustrating a manufacturing process (5 / 9) of the image sensor according to the first embodiment. [Figure 9] 6A to 6C are vertical cross-sectional views illustrating a manufacturing process (6 / 9) of the image sensor according to the first embodiment. [Figure 10] 7A to 7C are vertical cross-sectional views illustrating a manufacturing process (7 / 9) of the image sensor according to the first embodiment. [Figure 11] 8A to 8C are vertical cross-sectional views illustrating a manufacturing process (8 / 9) of the image sensor according to the first embodiment. [Figure 12] 9A to 9C are vertical cross-sectional views illustrating a manufacturing process (9 / 9) of the image sensor according to the first embodiment. [Figure 13] 10 is a diagram illustrating a DD cross section of an image sensor according to a second embodiment. FIG. [Figure 14] 10 is a diagram illustrating an example of a CC vertical cross section of the image sensor according to the second embodiment. FIG. [Figure 15] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (1 / 6) of an image sensor according to a second embodiment. [Figure 16]10A to 10C are vertical cross-sectional views illustrating a manufacturing process (2 / 6) of the image sensor according to the second embodiment. [Figure 17] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (3 / 6) of the image sensor according to the second embodiment. [Figure 18] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (4 / 6) of the image sensor according to the second embodiment. [Figure 19] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (5 / 6) of the image sensor according to the second embodiment. [Figure 20] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process (6 / 6) of the image sensor according to the second embodiment. [Figure 21] 10 is a diagram illustrating an example of an FF cross section of an image sensor according to a third embodiment. FIG. [Figure 22] 10 is a diagram illustrating an example of an E-E longitudinal cross section of an image sensor according to a third embodiment. FIG. [Figure 23] 10A to 10C are vertical cross-sectional views illustrating a manufacturing process of an image sensor according to a third embodiment. [Figure 24] 10 is a diagram illustrating an example of an HH cross section of an image sensor according to a fourth embodiment. FIG. [Figure 25] 10 is a diagram illustrating an example of a GG longitudinal cross section of an image sensor according to a fourth embodiment. FIG. [Figure 26] 13 is a diagram illustrating a cross section of a JJ of an image sensor according to a fifth embodiment. FIG. [Figure 27] FIG. 13 is a diagram illustrating an example of a II longitudinal cross section of an image sensor according to a fifth embodiment. [Figure 28] FIG. 13 is a diagram illustrating a vertical cross section of an image sensor according to a sixth embodiment. [Figure 29] FIG. 13 is a diagram illustrating a cross section of an image sensor according to a seventh embodiment. [Figure 30] FIG. 1 is a diagram illustrating a ZZ cross section of an image sensor according to the prior art. [Figure 31] FIG. 1 is a diagram illustrating a YY longitudinal cross section of an image sensor according to a conventional technique. DETAILED DESCRIPTION OF THE INVENTION

[0038] The image sensor and its manufacturing method will be described below with reference to the drawings. The shapes, materials, quantities, and values ​​described below are examples for the purpose of explanation. These shapes, etc. can be changed as appropriate depending on the specifications of the image sensor. Furthermore, the same reference numerals will be used to designate equivalent elements in all drawings below.

[0039] 1 to 29 illustrate longitudinal and transverse cross sections. A longitudinal cross section is a cross section parallel to the thickness direction (in other words, the stacking direction) of the image sensor 10. A transverse cross section is a cross section perpendicular to the thickness direction of the image sensor 10.

[0040] Note that cross sections are illustrated in Figures 1, 13, 21, 24, 26, and 29. In these figures, the configurations of plugs P1, P2, P3, etc. that do not intersect with the cross-sectional lines are also illustrated to facilitate understanding of the circuit structure.

[0041] The image sensor 10 illustrated in FIGS. 1 to 29 is, for example, a CMOS image sensor.

[0042] 1. First embodiment 1-1. Structure 1 and 2 illustrate an image sensor 10 according to a first embodiment. Fig. 1 illustrates a cross section taken along line BB in Fig. 2. Fig. 2 illustrates a longitudinal section taken along line AA in Fig. 1. The image sensor 10 is a so-called back-illuminated sensor, in which a photodiode is formed in a lower layer L1 of a substrate Sub.

[0043] Furthermore, a floating diffusion FD and a ground region GND are formed inside or on the upper layer L3 of the substrate Sub. Furthermore, a transfer gate TX is formed in the intermediate layer L2 between the lower layer L1 and the upper layer L3. In this way, the substrate Sub has a vertical multi-layer structure. For example, the substrate Sub is a P-type Si substrate.

[0044] A transfer channel TC is formed across the middle layer L2 and the upper layer L3. The lower end of the transfer channel TC is connected to the photodiode PD. The upper end of the transfer channel TC is connected to the floating diffusion FD. For example, the floating diffusion FD, transfer channel TC, and photodiode PD are linearly arranged in the thickness direction (i.e., vertical direction) of the substrate Sub. Also, for example, the floating diffusion FD, transfer channel TC, and photodiode PD are arranged at the center of the surface of the substrate Sub.

[0045] The photodiode is, for example, a PN diode, a PIN diode, or an avalanche diode. The floating diffusion is made of an epitaxial layer. That is, the floating diffusion is formed on the substrate Sub.

[0046] The transfer channel TC is, for example, a P-type charge transfer channel. The transfer channel TC is doped with, for example, boron as an impurity. The impurity concentration (boron concentration) is higher than the impurity concentration of the P-type substrate Sub and lower than the photodiode PD and the floating diffusion FD. Alternatively, the transfer channel TC is, for example, an N-type charge transfer channel. The transfer channel TC is doped with, for example, arsenic or phosphorus as an impurity. The impurity concentration is lower than the photodiode PD and the floating diffusion FD.

[0047] By making the impurity concentration of the transfer channel TC higher than that of the substrate Sub, the transfer channel TC can be secured as a charge transfer path within the substrate Sub. Furthermore, by making the impurity concentration of the transfer channel TC lower than that of the photodiode PD and the floating diffusion FD, charge transfer from the photodiode PD to the floating diffusion FD can be suppressed when no voltage is applied to the transfer gate TX. Alternatively, even if the transfer channel TC is N-type, by controlling the OFF voltage of the transfer gate TX, charge transfer from the photodiode PD to the floating diffusion FD can be suppressed when the transfer gate TX is OFF.

[0048] The photodiode PD, transfer channel TC, floating diffusion FD, and ground region GND are formed by adding impurities to the interior or surface of the substrate Sub. These regions have various functions for outputting image information. Therefore, hereinafter, these regions will be referred to as "functional regions" as appropriate.

[0049] Further, a trench TR is formed in the substrate Sub. The trench TR cylindrically surrounds the transfer channel TC. For example, the trench TR is formed in a frame shape in a plan view. Furthermore, the groove width of the trench TR is formed relatively wide at the connection point with the plug P2.

[0050] The trench TR is formed from the upper layer L3 of the substrate Sub to the intermediate layer L2. For example, the depth H1 of the trench TR is formed to be equal to or greater than the thickness of the transfer channel TC. For example, the thickness of the transfer channel TC and the depth of the trench TR are equal to each other.

[0051] The surface of the trench TR is covered with a gate insulating film GD. In other words, the gate insulating film GD is formed on both side surfaces and the bottom surface of the trench TR. The gate insulating film GD is made of a so-called high-k material, an oxide film, or a laminated film thereof. For example, the gate insulating film GD is made of a laminated film of HfSiO, HfAlON, HfO2, and SiO2.

[0052] By forming the gate insulating film GD on the side surface of the trench TR, the transfer channel TC is cylindrically covered with the insulating film. For example, the side surface of the transfer channel TC is cylindrically covered with the gate insulating film GD over the entire length in the thickness direction. In this way, by surrounding the transfer channel TC with the insulating film in a cylindrical shape, leakage current between the transfer channel TC and external electrodes or functional regions can be suppressed.

[0053] The lower end portion of the transfer channel TC is disposed near the lower layer L1. That is, a sufficient distance is provided in the thickness direction between the lower end portion of the transfer channel TC and the ground region GND. Since a sufficient inter-region distance (which may also be called inter-element distance) is provided in this manner, the lower end portion of the transfer channel TC does not need to be covered with an insulating film. In other words, it is sufficient that at least the upper portion of the transfer channel TC is covered with an insulating film. The upper portion refers to, for example, a portion disposed in the upper layer L3 of the substrate Sub.

[0054] A transfer gate TX is formed on the gate insulating film GD. The transfer gate TX is composed of, for example, a metal gate. The transfer gate TX is formed in a frame shape along the shape of the trench. The transfer gate TX surrounds the transfer channel TC. The transfer gate TX extends outward from the substrate Sub at the connection point with the plug P2. This allows the plug P2 and the floating diffusion FD to be separated in the planar direction (lateral direction). This reduces the parasitic capacitance that occurs between the plug P2 and the floating diffusion FD.

[0055] Here, the depth H1 of the trench TR exceeds the thickness H2 of the transfer gate TX. Here, the thickness H2 does not include the thickness of the gate insulating film GD. The transfer gate TX is formed at the bottom of the trench TR. In this structure, the transfer gate TX and the floating diffusion FD are spaced apart in the thickness direction, as shown by the distance D2 in FIG. 2.

[0056] In this way, by digging the trench TR deeper than the thickness of the transfer gate TX, the electrode-region distance (inter-element distance) between the transfer gate TX and the floating diffusion FD is ensured. Furthermore, the shortest path D2 between the transfer gate TX and the floating diffusion FD is blocked by the gate insulating film GD. Therefore, leakage current between the floating diffusion FD and the transfer gate TX is suppressed.

[0057] A ground region GND is formed closer to the edge of the substrate Sub than the trench TR. For example, the ground region GND is formed as a buried layer in the upper layer L3 of the substrate Sub. For example, a P+ layer having a higher concentration of P-type impurities such as boron or indium than the P-type substrate Sub becomes the ground region GND. The ground region GND is connected to the plug P3. In other words, the ground region GND is maintained at the ground potential.

[0058] For example, the ground region GND is formed between the transfer gate TX and the element isolation insulating film DTI. Therefore, the gate insulating film GD is disposed between the ground region GND and the transfer channel TC.

[0059] As shown in FIG. 2, the shortest path D1 between the transfer channel TC and the ground region GND is blocked by the gate insulating film GD. Therefore, the leakage current between the transfer channel TC and the ground region GND is suppressed. In addition, the transfer channel TC is cylindrically covered by the gate insulating film GD. Therefore, the path that bypasses the shortest path D1 is also blocked by the gate insulating film GD. As a result, the leakage current between the transfer channel TC and the ground region GND is suppressed.

[0060] Referring to FIG. 3, the charge accumulated in the photodiode PD is transferred to a logic circuit (not shown) via the transfer channel TC and the floating diffusion FD. For example, at the readout timing, a voltage is applied to the transfer gate TX. At this time, a depletion layer is generated in the transfer channel TC surrounded by the frame-shaped transfer gate TX. The charge accumulated in the photodiode PD is drawn out to the floating diffusion FD via the transfer channel TC.

[0061] As described above, in the image sensor according to the first embodiment, the shortest path D1 between the transfer channel TC and the ground region GND is blocked by the gate insulating film GD. Similarly, the shortest path D2 between the floating diffusion FD and the transfer gate TX is blocked by the gate insulating film GD.

[0062] Furthermore, the transfer channel TC is cylindrically covered by the gate insulating film GD. Therefore, the path that bypasses the shortest paths D1 and D2 is also blocked by the gate insulating film GD. This structure suppresses leakage current from the charge transfer path from the photodiode PD to the floating diffusion FD via the transfer channel TC to the surrounding electrodes and functional regions.

[0063] 1-2.Manufacturing process 4 to 12 illustrate a manufacturing process for the image sensor 10 according to the first embodiment. Referring to Fig. 4, a photodiode PD is formed in a lower layer L1 of a substrate Sub. A transfer channel TC is formed across an upper layer L3 and an intermediate layer L2 of the substrate Sub. The lower end of the transfer channel TC is connected to the photodiode PD.

[0064] Furthermore, a hard mask HM is formed on the substrate Sub. The hard mask HM has openings in the areas corresponding to the trenches TR. By etching the substrate Sub in this state, the trenches TR surrounding the transfer channels TC are formed. Furthermore, the surfaces of the trenches TR, i.e., both side surfaces and the bottom surface, are oxidized to obtain the gate insulating film GD.

[0065] Referring to FIG. 5, a gate metal GM is deposited on the substrate Sub. Referring to FIG. 6, the portion above the hard mask HM is planarized by chemical mechanical polishing (CMP). The gate metal GM of the upper layer L3 is then removed by etching. This results in a transfer gate TX whose layer thickness is thinner than the depth of the trench TR.

[0066] 7, an interlayer insulating film ILD is formed on a substrate Sub. For example, the interlayer insulating film ILD is made of SiO2 or Si3N4. Further, referring to FIG. 8, a contact hole CH1 is formed on a transfer channel TC. The contact hole CH1 penetrates the interlayer insulating film ILD and the hard mask HM and reaches the upper end of the transfer channel TC.

[0067] 9, a floating diffusion FD is formed on an upper layer L3 of a substrate Sub by epitaxial growth. For example, the floating diffusion FD is formed by vapor phase epitaxial growth (VBE or CVD).

[0068] 10, a photoresist PR is applied onto the interlayer insulating film ILD. An opening is formed in the photoresist PR at a position corresponding to the ground region GND. A contact hole CH3 is then formed in the interlayer insulating film ILD by further etching. The contact hole CH3 penetrates the interlayer insulating film ILD and the hard mask HM and reaches the upper layer L3 of the substrate Sub.

[0069] Furthermore, a ground region GND is formed in the upper layer L3 by ion implantation. In this way, impurities are implanted into the ground region through the contact hole CH3. Therefore, the diameter of the contact hole CH3 is the diameter of the ground region GND.

[0070] For example, if a ground region GND is to be formed on the substrate Sub without using a contact hole CH3, a photoresist is applied to the substrate Sub. The exposed portion of the photoresist is then opened. If the light source for exposure is, for example, a krypton-fluorine laser (KrF) light source, the opening diameter will be approximately 0.2 μm based on the light source wavelength (248 nm). On the other hand, if the contact hole CH3 is formed by dry etching, for example, a contact hole CH3 with a smaller diameter can be formed than the opening formed by a krypton-fluorine laser. In this way, by making the diameter of the ground region GND small, the increase in the inter-region distance (inter-element distance) is suppressed.

[0071] 11, in addition to contact holes CH1 and CH3, a contact hole CH2 extending to the transfer gate TX is formed in the interlayer insulating film ILD. Furthermore, plugs P1, P2, and P3 are filled in the contact holes CH1, CH2, and CH3. The plugs P1, P2, and P3 are connected to a logic circuit section (not shown).

[0072] 12, an element isolation insulating film DTI is formed at an end of a substrate Sub. As illustrated in FIGS. 1 and 2, the element isolation insulating film DTI surrounds the photodiode PD, the transfer channel TC, the floating diffusion FD, the transfer gate TX, and the ground region GND. The element isolation insulating film DTI separates the image sensor 10 from adjacent image sensors 10. That is, the element isolation insulating film DTI prevents the charge accumulated in the photodiode PD from moving to the adjacent photodiode PD.

[0073] 2. Second embodiment (L-shaped TX) 2-1. Structure 13 to 20 illustrate an image sensor 10 according to the second embodiment. The image sensor 10 according to the second embodiment differs from the image sensor 10 according to the first embodiment in that the floating diffusion FD is composed of a buried layer (see FIG. 14). Furthermore, the vertical cross section of the transfer gate TX is formed in an L-shape. Other than these two points, the configuration is the same as that of the first embodiment.

[0074] 14, the floating diffusion FD, which is a buried layer, is formed in the upper layer L3 of the substrate Sub. In this case, the shortest path D1 between the floating diffusion FD and the transfer channel TC and the ground region GND is blocked by the gate insulating film GD.

[0075] Furthermore, since the floating diffusion FD is formed in the upper layer L3, the transfer gate TX is formed in a shape that ensures a distance in the thickness direction from the floating diffusion FD.

[0076] That is, the transfer gate TX is formed so that its vertical cross section has an L-shape. Referring to Fig. 14, the transfer gate TX includes a main body portion TX1 and a connection portion TX2. The main body portion TX1 is formed in a region relatively close to the floating diffusion FD. For example, the main body portion TX1 is formed in a frame shape along the trench TR.

[0077] The connection portion TX2 is a portion that is connected to the plug P2. The connection portion TX2 is formed in a region that is relatively far from the floating diffusion FD. For example, the connection portion TX2 is a rectangular parallelepiped region that is disposed outside the main body portion TX1.

[0078] The main body portion TX1 is formed to be thinner than the connecting portion TX2. For example, referring to Fig. 14, the thickness H2 of the connecting portion TX2 and the thickness H1 of the main body portion TX1 (H1 < H2) are determined. Note that Fig. 14 illustrates the thicknesses H1 and H2 while ignoring the thickness of the gate insulating film GD.

[0079] As described above, the transfer gate TX is formed at the bottom of the trench TR. By thinning the main body portion TX1, a separation distance in the thickness direction can be secured between the floating diffusion FD, which is a buried layer, and the main body portion TX1. In addition, the connection portion TX2 is separated from the floating diffusion FD in the planar direction (lateral direction). This separation arrangement reduces the parasitic capacitance formed between the transfer gate TX and the floating diffusion FD.

[0080] The connection portion TX2 is separated from the floating diffusion FD in the in-plane direction (the direction perpendicular to the depth direction). Furthermore, by forming the connection portion TX2 to a thickness substantially equal to the depth H1 of the trench, for example, the connection portion TX2 and the plug P2 can be easily connected.

[0081] 2-2.Manufacturing process The manufacturing process of the image sensor 10 according to the second embodiment proceeds to the process of Fig. 15 after passing through the processes of Fig. 4 and Fig. 5. In the process of Fig. 5, after the gate metal GM is deposited, the gate metal GM on the hard mask HM is removed by chemical mechanical polishing (CMP). Then, a photoresist PR is deposited on the hard mask HM.

[0082] 15, a portion of the photoresist PR is opened. That is, an opening is formed in a rectangular region corresponding to the main body portion TX1. Photoresist PR is stacked on the connection portion TX2. Further etching is performed to etch the gate metal in the trench TR. This forms the main body portion TX1.

[0083] 16, after the photoresist PR is removed, an interlayer insulating film ILD is laminated on the hard mask HM. Referring to FIG. 17, contact holes CH1, CH2, and CH3 are formed in the interlayer insulating film ILD. The contact hole CH1 penetrates the hard mask HM and reaches the upper end of the transfer channel TC. The contact hole CH2 reaches the upper end of the connection portion TX2. The contact hole CH3 is formed in the interlayer insulating film ILD at a location corresponding to the ground region GND. The contact hole CH3 penetrates the hard mask HM.

[0084] Photoresist PR is deposited on the interlayer insulating film ILD and in the contact holes CH1 and CH2. A contact hole CH3 is opened in the photoresist PR. Furthermore, a ground region GND is formed by ion implantation. That is, the ground region GND, which is a buried layer, is formed in the upper layer L3 of the substrate Sub.

[0085] The photoresist PR is then temporarily removed. Referring to FIG. 18, next, photoresist PR is again stacked on the interlayer insulating film ILD and in the contact holes CH2 and CH3. The contact hole CH1 is opened in the photoresist PR. Further, a floating diffusion FD is formed by ion implantation. That is, the floating diffusion FD, which is a buried layer, is formed in the upper layer L3 of the substrate Sub.

[0086] 19, after the photoresist PR is removed, plugs P1, P2, and P3 are formed in the contact holes CH1, CH2, and CH3. Furthermore, with reference to Fig. 20, an element isolation insulating film DTI is formed at the end of the substrate Sub.

[0087] 3. Third embodiment (FD is a buried layer) 3-1. Structure 21 and 22 illustrate an image sensor 10 according to a third embodiment. Compared to the first embodiment, in the image sensor 10 according to the third embodiment, the floating diffusion FD is formed by ion implantation instead of by epitaxial growth. In other words, the floating diffusion FD is a buried layer, and is formed in the upper layer L3 of the substrate Sub. The other structures are the same as those of the first embodiment.

[0088] In this embodiment as well, the shortest path D1 between the floating diffusion FD and the transfer channel TC and the ground region GND is blocked by the gate insulating film GD.

[0089] The depth of the trench TR exceeds the thickness of the transfer gate TX, which is formed at the bottom of the trench TR. The contact hole CH2 extends deeper than the floating diffusion FD and reaches the transfer gate TX.

[0090] In this structure, the transfer gate TX and the floating diffusion FD are spaced apart in the thickness direction, as shown by the distance D2 in Fig. 22. That is, the electrode-to-region distance (inter-element distance) between the transfer gate TX and the floating diffusion FD is ensured. Furthermore, the shortest path D2 between the transfer gate TX and the floating diffusion FD is blocked by the gate insulating film GD.

[0091] 3-2. Manufacturing process In the manufacturing process of the image sensor 10 according to the third embodiment, the steps in Fig. 9 are replaced with the steps in Fig. 23. Other steps are the same as those in Figs. 4 to 13.

[0092] 23, ion implantation is performed on the upper end of the transfer channel TC exposed by the contact hole CH1, thereby forming a floating diffusion FD in the upper layer L3 of the substrate Sub.

[0093] 4. Fourth embodiment (GD and DTI surround TC) 24 and 25 illustrate an image sensor 10 according to a fourth embodiment. In the first to third embodiments, the transfer channel TC is cylindrically covered by the gate insulating film GD, but in the fourth embodiment, the transfer channel TC is cylindrically covered by the gate insulating film GD and the element isolation insulating film DTI.

[0094] Note that the image sensor 10 according to the fourth embodiment differs from the image sensor 10 according to the first embodiment in the positions of the transfer channel TC and the floating diffusion FD within the substrate Sub. The shape of the transfer gate TX also differs between the first and fourth embodiments. However, despite these differences in position and shape, the image sensor 10 according to the fourth embodiment is basically manufactured based on the steps shown in FIGS. 4 to 12.

[0095] 24 and 25, a transfer channel TC is formed at a corner of a rectangular substrate Sub in a plan view. A transfer gate TX is further formed adjacent to the transfer channel TC in the planar direction. Here, the planar direction is the direction perpendicular to the thickness direction.

[0096] First, a trench TR is formed near the transfer channel TC. The trench TR is L-shaped in plan view. A gate insulating film GD is formed on the side and bottom surfaces of the trench TR. Furthermore, a transfer gate TX is formed on the gate insulating film GD at the bottom of the trench TR. Based on the shape of the trench TR, the gate insulating film GD and the transfer gate TX are formed in an L-shape in plan view.

[0097] After a floating diffusion FD is formed on the transfer channel TC, an isolation insulating film DTI is formed at the edge of the substrate Sub. The isolation insulating film DTI surrounds the photodiode PD and suppresses charge transfer to an adjacent photodiode. The isolation insulating film DTI is formed so as to contact the edges GD1 and GD2 (see FIG. 24) of the gate insulating film GD.

[0098] With the above configuration, the transfer channel TC is disposed within the rectangular frame-shaped insulating film. The L-shaped structure that is part of the rectangular frame is formed by the gate insulating film GD. The remaining L-shaped structure of the rectangular frame is formed by the element isolation insulating film DTI. In other words, the transfer channel TC is cylindrically covered by the gate insulating film GD and the element isolation insulating film DTI.

[0099] 24, the ground region GND is provided on a diagonal line of the transfer channel TC. Since the substrate Sub is rectangular in plan view, the transfer channel TC is formed at one corner of the rectangular shape, and the ground region GND is formed at the diagonal corner opposite to the corner.

[0100] In this way, the transfer channel TC and the ground region GND are formed on opposite corners of the rectangular substrate Sub, which makes the shortest path D1 between the transfer channel TC and the ground region GND significantly longer than the shortest path D1 of the image sensor 10 according to the first embodiment, as illustrated in FIG.

[0101] Also in the fourth embodiment, the shortest path D1 between the floating diffusion FD and transfer channel TC and the ground region GND is blocked by the gate insulating film GD. Furthermore, the depth of the trench TR exceeds the thickness of the transfer gate TX. The transfer gate TX is formed at the bottom of the trench TR. In this structure, the electrode-region distance (inter-element distance) D2 between the transfer gate TX and the floating diffusion FD is ensured.

[0102] 5. Fifth embodiment (TC is surrounded by multiple TXs) 26 and 27 show an example of an image sensor 10 according to a fifth embodiment. The image sensor 10 includes a plurality of photoelectric conversion units 30.

[0103] The photoelectric conversion unit 30 includes a photodiode PD, a transfer gate TX, a gate insulating film GD, and an element isolation insulating film DTI. For example, the photoelectric conversion unit 30 has a rectangular shape in a plan view. The photodiode PD is surrounded by the element isolation insulating film DTI. The transfer gate TX is provided near one corner of the frame-shaped element isolation insulating film DTI.

[0104] The image sensor 10 includes a plurality of photoelectric conversion units 30, a single transfer channel TC, and a floating diffusion FD. The single transfer channel TC and the floating diffusion FD are surrounded by the plurality of photoelectric conversion units 30.

[0105] More specifically, a total of four photoelectric conversion units 30 are arranged vertically and horizontally, thereby forming a rectangular image sensor 10.

[0106] Furthermore, a transfer channel TC and a floating diffusion FD are formed in the center of the surface of the image sensor 10. Of the element isolation insulating film DTI, a portion 15 extending toward the center of the image sensor 10 terminates at the transfer channel TC.

[0107] Furthermore, a ground region GND is formed in each pixel unit. The ground region GND is provided at a diagonal corner of the transfer channel TC. That is, the ground region GND and the transfer channel TC are formed at positions furthest apart within the pixel unit.

[0108] As illustrated in Figures 26 and 27, a ground region GND is formed at the intersection of the element isolation insulating film DTI, and therefore, as illustrated in Figure 27, the element isolation insulating film DTI is formed in the lower layer L1 of the substrate Sub, but is not formed in the intermediate layer L2 or upper layer L3.

[0109] Therefore, an extension wall 20 may be formed at the end of the portion 15 of the isolation insulating film DTI extending toward the center of the image sensor 10, where the portion 15 reaches the transfer channel TC. The extension wall 20 extends to the hard mask HM within the substrate Sub. As a result, as shown in FIG. 26 , the transfer channel TC is cylindrically covered by the gate insulating film GD and the isolation insulating film DTI.

[0110] Referring to FIG. 27, also in the fifth embodiment, the shortest path D1 between the floating diffusion FD and the transfer channel TC and the ground region GND is blocked by the gate insulating film GD.

[0111] 6. Sixth embodiment (GND formed by epitaxial growth) 28 discloses an image sensor 10 according to a sixth embodiment. The image sensor 10 differs from the image sensor 10 according to the first embodiment in that the ground region GND is formed by epitaxial growth instead of by ion implantation. In other words, in this embodiment, the floating diffusion FD and the ground region GND are both epitaxial layers, and both are formed on the upper layer L3 of the substrate Sub. Even in this embodiment, the shortest path D1 between the transfer channel TC and the ground region GND is blocked by the gate insulating film GD.

[0112] 7. Seventh embodiment (pixel section and logic circuit section arranged in parallel) FIG. 29 illustrates an image sensor 10 according to the seventh embodiment. In this image sensor, a pixel section and a logic circuit section are formed on the same plane. For example, the pixel section has the same structure as in the first embodiment. The logic circuit section is formed adjacent to the pixel section. The logic circuit section has a plurality of logic circuit regions LOG1-LOG6 formed therein. The logic circuit regions LOG1-LOG6 are logic circuit regions of a CMOS image sensor, such as source follower transistors, row selectors, and reset transistors. [Explanation of symbols]

[0113] 10 Image sensor, 15 Element isolation insulating film portion, 20 Extension wall, 30 Photoelectric conversion section, CH Contact hole, D1 Shortest path between transfer channel and ground area, D2 Shortest path between transfer channel and transfer gate, DTI Element isolation insulating film, FD Floating diffusion, GD Gate insulating film, GM Gate metal, GND Ground area, HM Hard mask, ILD Interlayer insulating film, L1 Lower layer of substrate, L2 Middle layer of substrate, L3 Upper layer of substrate, LOG1-LOG5 Logic circuit area, P1-P3 Plug, PD Photodiode, PR Photoresist, Sub Substrate, TC Transfer channel, TR Trench, TX Transfer gate.

Claims

1. An image sensor having a multi-layer substrate, a photodiode formed in a lower layer of the substrate; a floating diffusion and ground region formed in or on an upper layer of the substrate; a transfer channel having a lower end connected to the photodiode and an upper end connected to the floating diffusion; an insulating film that blocks at least the shortest path between the transfer channel and the ground region; An image sensor comprising:

2. 2. The image sensor of claim 1, a frame-shaped trench is formed surrounding the transfer channel; a gate insulating film is formed on at least a side surface of the trench; the transfer channel is cylindrically covered by the gate insulating film; Image sensor.

3. 3. The image sensor according to claim 2, the gate insulating film is formed on the bottom surface as well as the side surface of the trench; a transfer gate is formed on the gate insulating film; the depth of the trench exceeds the thickness of the transfer gate; the transfer gate is formed at the bottom of the trench; Image sensor.

4. 4. The image sensor according to claim 3, The image sensor, wherein the floating diffusion is an epitaxial layer.

5. 2. The image sensor of claim 1, The transfer channel has a lower impurity concentration than the floating diffusion and the photodiode.

6. 4. The image sensor according to claim 3, The floating diffusion is a buried layer, An image sensor, wherein a region of the transfer gate that is relatively close to the floating diffusion has a layer thickness that is thinner than a region that is relatively far from the floating diffusion.

7. 4. The image sensor according to claim 3, The floating diffusion is a buried layer, The image sensor has a contact hole formed therein that extends deeper than the floating diffusion and reaches the transfer gate.

8. 10. The image sensor of claim 1, further comprising: a transfer gate adjacent to the transfer channel in a planar direction; an element isolation insulating film surrounding the photodiode; Equipped with The transfer channel is cylindrically covered by a gate insulating film and the element isolation insulating film.

9. 9. The image sensor of claim 8, a photoelectric conversion unit including the photodiode, the transfer gate, the gate insulating film, and the element isolation insulating film; An image sensor comprising: a plurality of the photoelectric conversion units; and a single transfer channel and a single floating diffusion surrounded by the plurality of the photoelectric conversion units.

10. 5. The image sensor according to claim 4, The image sensor, wherein the ground region is an epitaxial layer.

11. A method for manufacturing an image sensor having a multilayer substrate, comprising: forming a photodiode below the substrate; forming a transfer channel such that a lower end thereof is connected to the photodiode; forming a floating diffusion in or on an upper layer of the substrate so that the upper end of the transfer channel is connected; further forming a ground region in or on the upper layer; A method for manufacturing an image sensor, comprising: The method for manufacturing an image sensor further comprises forming an insulating film that blocks at least the shortest path between the transfer channel and the ground region.

12. 12. A method for manufacturing an image sensor according to claim 11, comprising: forming a frame-shaped trench surrounding the transfer channel; forming a gate insulating film on at least a side surface of the trench; The transfer channel is cylindrically covered with the gate insulating film. Image sensor manufacturing method.

13. 13. A method for manufacturing an image sensor according to claim 12, comprising the steps of: forming the gate insulating film on the bottom surface of the trench in addition to the side surface; forming a transfer gate on the gate insulating film; the depth of the trench exceeds the thickness of the transfer gate; forming the transfer gate at the bottom of the trench; Image sensor manufacturing method.

14. 14. A method for manufacturing an image sensor according to claim 13, comprising the steps of: The method for manufacturing an image sensor includes forming the floating diffusion by epitaxial growth.

15. 12. A method for manufacturing an image sensor according to claim 11, comprising: The method for manufacturing an image sensor, wherein the transfer channel has a lower impurity concentration than the floating diffusion and the photodiode.

16. 14. A method for manufacturing an image sensor according to claim 13, comprising the steps of: forming the floating diffusion as a buried layer by ion implantation; A method for manufacturing an image sensor, wherein a region of the transfer gate that is relatively closer to the floating diffusion has a layer thickness that is thinner than a region that is relatively farther from the floating diffusion.

17. 14. A method for manufacturing an image sensor according to claim 13, comprising the steps of: forming the floating diffusion as a buried layer by ion implantation; A method for manufacturing an image sensor includes forming a contact hole that extends deeper than the floating diffusion and reaches the transfer gate.

18. 12. The method of manufacturing an image sensor according to claim 11, further comprising: forming a transfer gate adjacent to the transfer channel in a surface direction; forming an insulating film for element isolation surrounding the photodiode, the transfer channel, the floating diffusion, and the transfer gate; The method for manufacturing an image sensor includes covering the entire periphery of the transfer channel with the gate insulating film and the element isolation insulating film.

19. 20. A method for manufacturing an image sensor according to claim 18, comprising the steps of: forming a photoelectric conversion unit including the photodiode, the transfer gate, the gate insulating film, and the element isolation insulating film; The method for manufacturing an image sensor further includes forming a plurality of the photoelectric conversion units, and forming a single transfer channel and a single floating diffusion surrounded by the plurality of the photoelectric conversion units.

20. 15. A method for manufacturing an image sensor according to claim 14, comprising the steps of: The method for manufacturing an image sensor includes forming the ground region by epitaxial growth.

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