Deposition apparatus and deposition method using the same

Abstract

To provide a deposition apparatus and a deposition method.SOLUTION: A deposition device includes a deposition source which accommodates a deposition material, a mask MK1 including a first upper electrode pattern UEP1 to which a voltage is applied, a stage to which a deposition target substrate is fixed, and a stage electrode pattern to which a voltage is applied. The voltages having the identical polarity are applied to the stage electrode pattern and the first upper electrode pattern UEP1.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a vapor deposition apparatus and a vapor deposition method using the vapor deposition apparatus. [Background technology]

[0002] Augmented reality is a technology that overlays images from a virtual world onto images from the real world that you are actually seeing, creating a single image. The images from the virtual world are in the form of text or graphics, while the actual images are information about real objects observed in the device's field of view.

[0003] Augmented reality is realized using a head-mounted display (HMD), a head-up display (HUD), etc. When augmented reality is realized using a head-mounted display, it is provided in the form of glasses so that it is easy for a user to carry and put on and take off. In this case, a display device that provides a virtual world for realizing augmented reality can be realized using a microdisplay such as OLEDoS (Organic Light Emitting Diode on Silicon) or LCOS (Liquid Crystal on Silicon). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Korean Patent No. 10-0696551 (KR10-0696551B) [Patent Document 2] Patent Publication No. 2004-183044 (JP2004-183044A) Summary of the Invention [Problem to be solved by the invention]

[0005] SUMMARY OF THE INVENTION An object of the present invention is to provide a vapor deposition apparatus. Another object of the present invention is to provide a vapor deposition method using the vapor deposition apparatus.

[0006] However, the object of the present invention is not limited to the above, and can be expanded in various ways without departing from the spirit and scope of the present invention. [Means for solving the problem]

[0007] In order to achieve the object of the present invention, a deposition apparatus according to the present invention includes a deposition source that accommodates a deposition material, a mask that is disposed on the deposition source and includes a first upper electrode pattern through which the deposition material passes and to which a voltage is applied, a stage that is disposed on the mask and to which a deposition target substrate onto which the deposition material is deposited is fixed, and a stage electrode pattern that is disposed on the mask and to which a voltage is applied, wherein voltages having the same polarity are applied to the stage electrode pattern and the first upper electrode pattern.

[0008] A repulsive force is generated between the stage electrode pattern and the first upper electrode pattern.

[0009] The mask further includes a second upper electrode pattern spaced apart from the first upper electrode pattern, to which a voltage having the same polarity as the voltage applied to the first upper electrode pattern and a different magnitude from the voltage applied to the first upper electrode pattern is applied.

[0010] The mask further includes a second upper electrode pattern having a polarity different from the polarity of the voltage applied to the first upper electrode pattern.

[0011] The first upper electrode pattern is disposed on the outer periphery of the mask, and the second upper electrode pattern is disposed in the center of the mask.

[0012] The mask further includes a lower electrode pattern to which a voltage of a polarity different from that of the voltage applied to the first upper electrode pattern is applied.

[0013] The deposition source electrode pattern is disposed on the deposition source and receives a voltage having the same polarity as that of the voltage applied to the lower electrode pattern.

[0014] The first upper electrode pattern is disposed on the outer periphery of the mask, and the lower electrode pattern is disposed in the center of the mask.

[0015] The mask has a plurality of openings to define deposition regions, and the first upper electrode pattern is disposed between the deposition regions.

[0016] The mask includes silicon.

[0017] In order to achieve the above object, another deposition apparatus of the present invention is characterized by including: a deposition source that accommodates a deposition material; a mask that is disposed on the deposition source and has an electrode material doped therein, through which the deposition material passes and to which a voltage is applied; a stage that is disposed on the mask and on which a deposition target substrate onto which the deposition material is deposited is fixed; and a stage electrode pattern that is disposed on the mask and to which a voltage is applied.

[0018] A voltage of the same polarity is applied to the stage electrode pattern and the electrode material.

[0019] Voltages of different polarities are applied to the stage electrode pattern and the electrode material.

[0020] The doping amount of the electrode material doped in the outer periphery of the mask is the same as the doping amount of the electrode material doped in the center of the mask.

[0021] The doping amount of the electrode material doped on the outer periphery of the mask is smaller than the doping amount of the electrode material doped on the center of the mask.

[0022] To achieve the other object, a deposition method according to the present invention includes the steps of: applying a voltage to an upper electrode pattern included in a mask while the mask is loaded; applying a voltage to a stage electrode pattern disposed on the mask while the mask is loaded; applying a voltage to a lower electrode pattern included in the mask while a deposition process is performed; applying a voltage to a deposition source electrode pattern disposed below the mask while the deposition process is performed; applying a voltage to the upper electrode pattern while the mask is unloaded; and applying a voltage to the stage electrode pattern while the mask is unloaded, wherein voltages of the same polarity are applied to the stage electrode pattern and the upper electrode pattern while the mask is loaded.

[0023] During the deposition process, voltages of the same polarity are applied to the deposition source electrode pattern and the lower electrode pattern.

[0024] While the mask is being unloaded, voltages of the same polarity are applied to the stage electrode pattern and the upper electrode pattern.

[0025] The polarity of the voltage applied to the upper electrode pattern is different from the polarity of the voltage applied to the lower electrode pattern. [Effects of the Invention]

[0026] The deposition apparatus according to the present invention includes a deposition source, a mask, and a stage. An upper electrode pattern (or a lower electrode pattern) is formed on the mask, and a stage electrode pattern (or a deposition source electrode pattern) is formed on the stage (or the deposition source). Voltages having the same polarity are applied to the upper electrode pattern and the stage electrode pattern. This generates a repulsive force between the upper electrode pattern and the stage electrode pattern. Therefore, the distance between the mask and the deposition source (or the stage) can be adjusted, and the mask may not sag.

[0027] However, the effects of the present invention are not limited to the above-mentioned effects, and can be expanded in various ways without departing from the spirit and scope of the present invention. [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 is a diagram illustrating a vapor deposition apparatus according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a plan view illustrating a mask included in the deposition apparatus of FIG. [Figure 3] FIG. 3 is a rear view for explaining the mask of FIG. [Figure 4] FIG. 4 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 5] FIG. 5 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 6] FIG. 6 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 7] FIG. 7 is a plan view illustrating a mask included in a deposition apparatus according to a second embodiment of the present invention. [Figure 8] FIG. 8 is a rear view for explaining the mask of FIG. [Figure 9] FIG. 9 is a diagram illustrating the vapor deposition apparatus of FIG. [Figure 10] FIG. 10 is a plan view illustrating a mask included in a deposition apparatus according to a third embodiment of the present invention. [Figure 11] FIG. 11 is a rear view for explaining the mask of FIG. [Figure 12] FIG. 12 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 13] FIG. 13 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 14] FIG. 14 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 15]FIG. 15 is a plan view illustrating a mask included in a deposition apparatus according to a fourth embodiment of the present invention. [Figure 16] FIG. 16 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 17] FIG. 17 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 18] FIG. 18 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 19] FIG. 19 is a plan view illustrating a mask included in a deposition apparatus according to a fifth embodiment of the present invention. [Figure 20] FIG. 20 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 21] FIG. 21 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 22] FIG. 22 is a diagram illustrating a vapor deposition method using the vapor deposition apparatus of FIG. [Figure 23] FIG. 23 is a perspective view showing an electronic device according to an embodiment of the present invention. [Figure 24] FIG. 24 is a perspective view showing an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used to designate the same components in the drawings, and redundant description of the same components will be omitted.

[0030] FIG. 1 is a diagram illustrating a deposition apparatus according to a first embodiment of the present invention, FIG. 2 is a plan view illustrating a mask included in the deposition apparatus of FIG. 1, and FIG. 3 is a rear view illustrating the mask of FIG. 2.

[0031] 1, a deposition apparatus (DD1) according to a first embodiment of the present invention includes a deposition source (DS), a deposition source electrode pattern (DEP), a mask (MK1), a stage (STG), and a stage electrode pattern (SEP). The mask (MK1) includes a support member 100, a pattern member 200, a first upper electrode pattern (UEP1), and a lower electrode pattern (LEP). The deposition apparatus (DD1) deposits a deposition material on a deposition target substrate (SUB).

[0032] The deposition source (DS) accommodates the deposition material. For example, the deposition source (DS) vaporizes the deposition material, and the vaporized deposition material flows through the mask (MK1) to the deposition target substrate (SUB). In one embodiment, the deposition source (DS) is disposed below the mask (MK1) and faces the deposition target substrate (SUB) across the mask (MK1).

[0033] The deposition source electrode pattern (DEP) is disposed on the deposition source (DS). In one embodiment, the deposition source electrode pattern (DEP) is movably disposed above the deposition source (DS). In another embodiment, the deposition source electrode pattern (DEP) is fixedly disposed above the deposition source (DS). In yet another embodiment, the deposition source electrode pattern (DEP) is built into the deposition source (DS).

[0034] In one embodiment, the deposition source electrode pattern (DEP) is made of a conductive material, for example, a metal material, so that a predetermined voltage is applied to the deposition source electrode pattern (DEP), and the deposition source electrode pattern (DEP) has a predetermined polarity.

[0035] In another embodiment, the deposition source electrode pattern (DEP) is made of a magnetic material through which magnetism can pass.

[0036] The mask (MK1) is disposed on the deposition source (DS), for example, between the deposition source (DS) and the deposition target substrate (SUB), and the deposition material passes through the mask (MK1) through a pattern formed on the mask (MK1).

[0037] In one embodiment, the support member 100 is a wafer containing silicon. For example, the support member 100 includes at least one selected from a silicon wafer (Si wafer), a silicon carbide wafer (SiC wafer), and a silicon single crystal wafer (Si-single crystal wafer).

[0038] In one embodiment, the pattern member 200 is disposed on the support member 100. For example, the pattern member 200 is deposited on both sides of the support member 100. The pattern member 200 may be formed of silicon (Si), silicon nitride (SiNx), silicon oxide (SiOx), or the like.

[0039] In one embodiment, a deposition area (DA) having a plurality of openings is defined in the pattern member 200. For example, a deposition membrane is formed in the pattern member 200, and the mask (MK1) functions as a fine metal mask (FMM).

[0040] The mask (MK1) includes the first upper electrode pattern (UEP1). In one embodiment, the first upper electrode pattern (UEP1) is disposed on the pattern member 200 (or the support member 100). In another embodiment, the first upper electrode pattern (UEP1) is implemented within the pattern member 200 (or the support member 100).

[0041] In one embodiment, the first upper electrode pattern (UEP1) is made of a conductive material. For example, the first upper electrode pattern (UEP1) is made of a metal material. Thus, when a predetermined voltage is applied to the first upper electrode pattern (UEP1), the first upper electrode pattern (UEP1) has a predetermined polarity.

[0042] In another embodiment, the first upper electrode pattern (UEP1) is made of a magnetic material through which magnetism passes.

[0043] The mask (MK1) includes the lower electrode pattern (LEP). In one embodiment, the lower electrode pattern (LEP) is disposed below the pattern member 200 (or the support member 100). In another embodiment, the lower electrode pattern (LEP) is implemented within the pattern member 200 (or the support member 100).

[0044] In one embodiment, the lower electrode pattern (LEP) is made of a conductive material, for example, a metal material, so that a predetermined voltage is applied to the lower electrode pattern (LEP), and the lower electrode pattern (LEP) has a predetermined polarity.

[0045] In another embodiment, the lower electrode pattern (LEP) is made of a magnetic material through which magnetism passes.

[0046] The stage (STG) is placed on the mask (MK1), and the deposition target substrate (SUB) is fixed to the stage (STG).

[0047] The stage electrode pattern (SEP) is disposed on the mask (MK1). In one embodiment, the stage electrode pattern (SEP) is implemented within the stage (STG). In another embodiment, the stage electrode pattern (SEP) is disposed below the stage (STG).

[0048] In one embodiment, the stage electrode pattern (SEP) is made of a conductive material, for example, a metal material, so that a predetermined voltage is applied to the stage electrode pattern (SEP), and the stage electrode pattern (SEP) has a predetermined polarity.

[0049] In another embodiment, the stage electrode pattern (SEP) is made of a magnetic material through which magnetism passes.

[0050] The deposition target substrate (SUB) is disposed below the stage (STG) and fixed to the stage (STG). The deposition target substrate (SUB) is a substrate for manufacturing a display device, and may be a glass substrate, a plastic substrate, a silicon substrate, etc. For example, the deposition target substrate (SUB) may include at least one selected from a silicon wafer, a silicon carbide wafer, and a silicon single crystal wafer.

[0051] As shown in FIG. 2, the first upper electrode pattern (UEP1) is disposed on top of the mask (MK1).

[0052] In one embodiment, a plurality of deposition areas (DA) are defined in the mask (MK1). For example, as shown in Figure 2, nine deposition areas (DA) are arranged in a matrix in the mask (MK1).

[0053] The first upper electrode pattern (UEP1) is disposed between the deposition regions (DA). For example, as shown in FIG. 2, the first upper electrode pattern (UEP1) may be formed in a mesh pattern.

[0054] In one embodiment, the first upper electrode pattern (UEP1) is electrically connected to a first power supply (PS1), which applies a voltage to the first upper electrode pattern (UEP1).

[0055] As shown in FIG. 3, the lower electrode pattern (LEP) is disposed below the mask (MK1).

[0056] In one embodiment, a plurality of deposition areas (DA) are defined in the mask (MK1). For example, as shown in Figure 2, nine deposition areas (DA) are arranged in a matrix in the mask (MK1).

[0057] The lower electrode pattern (LEP) is disposed between the deposition areas (DA). For example, as shown in FIG. 2, the lower electrode pattern (LEP) may be formed in a mesh pattern.

[0058] In one embodiment, the lower electrode pattern (LEP) overlaps the first upper electrode pattern (UEP1).

[0059] In one embodiment, the lower electrode pattern (LEP) is electrically connected to a second power supply (PS2), which applies a voltage to the lower electrode pattern (LEP).

[0060] 4 to 6 are diagrams for explaining a vapor deposition method using the vapor deposition apparatus of FIG.

[0061] As shown in FIG. 4, the deposition target substrate (SUB) is fixed to the stage (STG), and the mask (MK1) is loaded.

[0062] While the mask (MK1) is being loaded, a voltage is applied to the first upper electrode pattern (UEP1) included in the mask (MK1). For example, a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1).

[0063] Also, while the mask (MK1) is being loaded, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0064] By applying a voltage having the same positive polarity (+) to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), a repulsive force is generated between the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK1).

[0065] In addition, the magnitude of the voltage applied to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK1) and the deposition target substrate (SUB).

[0066] As shown in FIG. 5, a deposition process is performed.

[0067] During the deposition process, a voltage is applied to the lower electrode pattern (LEP) included in the mask (MK1). For example, a voltage having a negative polarity (-) is applied to the lower electrode pattern (LEP). That is, the polarity of the voltage applied to the first upper electrode pattern (UEP1) is different from the polarity of the voltage applied to the lower electrode pattern (LEP).

[0068] During the deposition process, a voltage is applied to the deposition source electrode pattern (DEP). For example, while a voltage having a negative polarity (-) is applied to the lower electrode pattern (LEP), a voltage having a negative polarity (-) is applied to the deposition source electrode pattern (DEP).

[0069] By applying a voltage having the same negative polarity (-) to the lower electrode pattern (LEP) and the deposition source electrode pattern (DEP), a repulsive force is generated between the lower electrode pattern (LEP) and the deposition source electrode pattern (DEP), which may prevent the mask (MK1) from sagging.

[0070] In addition, the magnitude of the voltage applied to the lower electrode pattern (LEP) and the deposition source electrode pattern (DEP) can be adjusted, thereby adjusting the distance between the mask (MK1) and the deposition source (DS).

[0071] During the deposition process, a voltage having the same positive polarity (+) is applied to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP).

[0072] As shown in FIG. 6, the mask (MK1) is unloaded.

[0073] While the mask (MK1) is unloaded, a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1). Also, while a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0074] By applying a voltage having the same positive polarity (+) to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), a repulsive force is generated between the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK1).

[0075] FIG. 7 is a plan view illustrating a mask included in a deposition apparatus according to a second embodiment of the present invention, FIG. 8 is a rear view illustrating the mask of FIG. 7, and FIG. 9 is a view illustrating the deposition apparatus of FIG. 7.

[0076] 7, 8, and 9, a deposition apparatus (DD2) according to a second embodiment of the present invention includes a deposition source (DS), a deposition source electrode pattern (DEP), a mask (MK2), a stage (STG), and a stage electrode pattern (SEP). The mask (MK2) includes a support member, a pattern member, a first upper electrode pattern (UEP1), a second upper electrode pattern (UEP2), and a lower electrode pattern (LEP). The deposition apparatus (DD2) deposits a deposition material on a deposition target substrate (SUB).

[0077] In one embodiment, the vapor deposition apparatus (DD2) is the same as the vapor deposition apparatus (DD1) according to the first embodiment, except for the mask (MK2).

[0078] As shown in FIG. 7, the mask (MK2) includes the first upper electrode pattern (UEP1) and the second upper electrode pattern (UEP2).

[0079] In one embodiment, the first upper electrode pattern (UEP1) is disposed on the pattern member 200 (or the support member 100). In another embodiment, the first upper electrode pattern (UEP1) is implemented within the pattern member 200 (or the support member 100).

[0080] In one embodiment, the first upper electrode pattern (UEP1) is made of a conductive material. For example, the first upper electrode pattern (UEP1) is made of a metal material. Thus, when a predetermined voltage is applied to the first upper electrode pattern (UEP1), the first upper electrode pattern (UEP1) has a predetermined polarity.

[0081] In another embodiment, the first upper electrode pattern (UEP1) is made of a magnetic material through which magnetism passes.

[0082] In one embodiment, the second upper electrode pattern (UEP2) is disposed on the pattern member 200 (or the support member 100). In another embodiment, the second upper electrode pattern (UEP2) is implemented within the pattern member 200 (or the support member 100).

[0083] In one embodiment, the second upper electrode pattern (UEP2) is made of a conductive material. For example, the second upper electrode pattern (UEP2) is made of a metal material. Thus, a predetermined voltage is applied to the second upper electrode pattern (UEP2), and the second upper electrode pattern (UEP2) has a predetermined polarity.

[0084] In another embodiment, the second upper electrode pattern (UEP2) is made of a magnetic material through which magnetism passes.

[0085] In one embodiment, the second upper electrode pattern (UEP2) is spaced apart from the first upper electrode pattern (UEP1), i.e., the second upper electrode pattern (UEP2) is electrically insulated from the first upper electrode pattern (UEP1).

[0086] For example, the first upper electrode pattern (UEP1) and the second upper electrode pattern (UEP2) are disposed on the outer periphery of the mask (MK2), and the shape of the second upper electrode pattern (UEP2) is symmetrical to the shape of the first upper electrode pattern (UEP1).

[0087] In one embodiment, the first upper electrode pattern (UEP1) is electrically connected to a first power supply (PS1), and the second upper electrode pattern (UEP2) is electrically connected to a third power supply (PS3).

[0088] The polarity and magnitude of the voltage applied to the first upper electrode pattern (UEP1) can be appropriately set as needed, and the polarity and magnitude of the voltage applied to the second upper electrode pattern (UEP2) can be appropriately set as needed.

[0089] In one embodiment, the polarity of the voltage applied to the first upper electrode pattern (UEP1) is the same as the polarity of the voltage applied to the second upper electrode pattern (UEP2), and the magnitude of the voltage applied to the first upper electrode pattern (UEP1) is different from the magnitude of the voltage applied to the second upper electrode pattern (UEP2).

[0090] 8, the mask (MK2) includes the lower electrode pattern (LEP). In one embodiment, the lower electrode pattern (LEP) is disposed below the pattern member 200 (or the support member 100). In another embodiment, the lower electrode pattern (LEP) is implemented within the pattern member 200 (or the support member 100).

[0091] For example, the lower electrode pattern (LEP) is disposed in the center of the mask (MK2).

[0092] In one embodiment, the lower electrode pattern (LEP) is made of a conductive material, for example, a metal material, so that a predetermined voltage is applied to the lower electrode pattern (LEP), and the lower electrode pattern (LEP) has a predetermined polarity.

[0093] In another embodiment, the lower electrode pattern (LEP) is made of a magnetic material through which magnetism passes.

[0094] In one embodiment, the lower electrode pattern (LEP) is electrically connected to a second power supply (PS2), and the polarity and magnitude of the voltage applied to the lower electrode pattern (LEP) can be appropriately set as needed.

[0095] 9, a voltage having the same positive polarity (+) is applied to the first upper electrode pattern (UEP1), the second upper electrode pattern (UEP2), and the stage electrode pattern (SEP). This generates a repulsive force between the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), and a repulsive force between the second upper electrode pattern (UEP2) and the stage electrode pattern (SEP). This prevents a collision between the deposition target substrate (SUB) and the mask (MK2).

[0096] In addition, a voltage having the same negative polarity (-) is applied to the lower electrode pattern (LEP) and the deposition source electrode pattern (DEP), which generates a repulsive force between the lower electrode pattern (LEP) and the deposition source electrode pattern (DEP), thereby preventing the mask (MK2) from sagging.

[0097] FIG. 10 is a plan view illustrating a mask included in a deposition apparatus according to a third embodiment of the present invention, FIG. 11 is a rear view illustrating the mask of FIG. 10, and FIGS. 12 to 14 are views illustrating a deposition method using the deposition apparatus of FIG. 10.

[0098] 10 and 11, a deposition apparatus (DD3) according to a third embodiment of the present invention includes a deposition source (DS), a mask (MK3), a stage (STG), and a stage electrode pattern (SEP). The mask (MK3) includes a support member, a pattern member, a first upper electrode pattern (UEP1), and a second upper electrode pattern (UEP2). The deposition apparatus (DD3) deposits a deposition material on a deposition target substrate (SUB).

[0099] In one embodiment, the vapor deposition apparatus (DD3) is the same as the vapor deposition apparatus (DD1) according to the first embodiment, except for the mask (MK3).

[0100] As shown in FIG. 10, the mask (MK3) includes the first upper electrode pattern (UEP1) and the second upper electrode pattern (UEP2).

[0101] In one embodiment, the first upper electrode pattern (UEP1) is disposed on the pattern member 200 (or the support member 100). In another embodiment, the first upper electrode pattern (UEP1) is implemented inside the pattern member 200 (or the support member 100).

[0102] In one embodiment, the first upper electrode pattern (UEP1) is made of a conductive material. For example, the first upper electrode pattern (UEP1) is made of a metal material. Thus, when a predetermined voltage is applied to the first upper electrode pattern (UEP1), the first upper electrode pattern (UEP1) has a predetermined polarity.

[0103] In another embodiment, the first upper electrode pattern (UEP1) is made of a magnetic material through which magnetism passes.

[0104] In one embodiment, the second upper electrode pattern (UEP2) is disposed on the pattern member 200 (or the support member 100). In another embodiment, the second upper electrode pattern (UEP2) is implemented within the pattern member 200 (or the support member 100).

[0105] In one embodiment, the second upper electrode pattern (UEP2) is made of a conductive material. For example, the second upper electrode pattern (UEP2) is made of a metal material. Thus, a predetermined voltage is applied to the second upper electrode pattern (UEP2), and the second upper electrode pattern (UEP2) has a predetermined polarity.

[0106] In another embodiment, the second upper electrode pattern (UEP2) is made of a magnetic material through which magnetism passes.

[0107] In one embodiment, the second upper electrode pattern (UEP2) is spaced apart from the first upper electrode pattern (UEP1), i.e., the second upper electrode pattern (UEP2) is electrically insulated from the first upper electrode pattern (UEP1).

[0108] For example, the first upper electrode pattern (UEP1) is disposed on the outer periphery of the mask (MK3), and the second upper electrode pattern (UEP2) is disposed in the center of the mask (MK3). Also, the first upper electrode pattern (UEP1) is disposed to surround the second upper electrode pattern (UEP2).

[0109] In one embodiment, the first upper electrode pattern (UEP1) is electrically connected to a first power supply (PS1), and the second upper electrode pattern (UEP2) is electrically connected to a second power supply (PS2).

[0110] The polarity and magnitude of the voltage applied to the first upper electrode pattern (UEP1) can be appropriately set as needed, and the polarity and magnitude of the voltage applied to the second upper electrode pattern (UEP2) can be appropriately set as needed.

[0111] In one embodiment, the polarity of the voltage applied to the first upper electrode pattern (UEP1) is different from the polarity of the voltage applied to the second upper electrode pattern (UEP2).

[0112] As shown in FIG. 11, the mask (MK3) does not have a lower electrode pattern formed thereon.

[0113] As shown in FIG. 12, the deposition target substrate (SUB) is fixed to the stage (STG), and the mask (MK3) is loaded.

[0114] While the mask (MK3) is being loaded, a voltage is applied to the first upper electrode pattern (UEP1) included in the mask (MK3). For example, a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1).

[0115] Also, while the mask (MK3) is being loaded, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0116] By applying a voltage having the same positive polarity (+) to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), a repulsive force is generated between the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK3).

[0117] In addition, the magnitude of the voltage applied to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK3) and the deposition target substrate (SUB).

[0118] As shown in FIG. 13, a deposition process is performed.

[0119] During the deposition process, a voltage is applied to the second upper electrode pattern (UEP2) included in the mask (MK3). For example, a voltage having a negative polarity (-) is applied to the second upper electrode pattern (UEP2). That is, the polarity of the voltage applied to the second upper electrode pattern (UEP2) is different from the polarity of the voltage applied to the first upper electrode pattern (UEP1).

[0120] During the deposition process, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a negative polarity (-) is applied to the second upper electrode pattern (UEP2), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0121] When voltages having different polarities are applied to the second upper electrode pattern (UEP2) and the stage electrode pattern (SEP), an attractive force is generated between the second upper electrode pattern (UEP2) and the stage electrode pattern (SEP), which may prevent the mask (MK3) from sagging.

[0122] In addition, the magnitude of the voltage applied to the second upper electrode pattern (UEP2) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK3) and the deposition source (DS).

[0123] As shown in FIG. 14, the mask (MK3) is unloaded.

[0124] While the mask (MK3) is unloaded, a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1). Also, while a voltage having a positive polarity (+) is applied to the first upper electrode pattern (UEP1), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0125] By applying a voltage having the same positive polarity (+) to the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), a repulsive force is generated between the first upper electrode pattern (UEP1) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK1).

[0126] FIG. 15 is a plan view illustrating a mask included in a deposition apparatus according to a fourth embodiment of the present invention, and FIGS. 16 to 18 are views illustrating a deposition method using the deposition apparatus of FIG. 15.

[0127] 15, a deposition apparatus (DD4) according to a fourth embodiment of the present invention includes a deposition source (DS), a mask (MK4), a stage (STG), and a stage electrode pattern (SEP). The deposition apparatus (DD4) deposits a deposition material onto a deposition target substrate (SUB).

[0128] In one embodiment, the vapor deposition apparatus (DD4) is the same as the vapor deposition apparatus (DD1) according to the first embodiment, except for the mask (MK4).

[0129] In one embodiment, the mask (MK4) is doped with an electrode material. In one embodiment, the electrode material is a conductive material (e.g., a metal material) that conducts electricity. Thus, a predetermined voltage is applied to the electrode material, and the mask (MK4) has a predetermined polarity.

[0130] In one embodiment, the doping amount of the electrode material is substantially uniform, as shown in Figure 15. For example, the doping amount of the electrode material doped in the outer periphery of the mask (MK4) is substantially the same as the doping amount of the electrode material doped in the center of the mask (MK4).

[0131] In another embodiment, the mask (MK4) is doped with a magnetic material that allows magnetism to pass through.

[0132] As shown in FIG. 16, the deposition target substrate (SUB) is fixed to the stage (STG), and the mask (MK4) is loaded.

[0133] While the mask (MK4) is being loaded, a voltage is applied to the electrode material doped in the mask (MK4). For example, a voltage having a positive polarity (+) is applied to the mask (MK4). Furthermore, since the amount of doping of the electrode material is substantially uniform, the magnitude of the voltage applied to the mask (MK4) is substantially uniform.

[0134] Also, while the mask (MK4) is being loaded, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a positive polarity (+) is applied to the mask (MK4), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0135] By applying a voltage having the same positive polarity (+) to the mask (MK4) and the stage electrode pattern (SEP), a repulsive force is generated between the mask (MK4) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK4).

[0136] In addition, the magnitude of the voltage applied to the mask (MK4) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK4) and the deposition target substrate (SUB).

[0137] As shown in FIG. 17, a deposition process is performed.

[0138] During the deposition process, a voltage is applied to the electrode material included in the mask MK4, for example, a voltage having a negative polarity (-) is applied to the mask MK4.

[0139] During the deposition process, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a negative polarity (-) is applied to the mask (MK4), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0140] By applying voltages having different polarities to the mask MK4 and the stage electrode pattern SEP, an attractive force is generated between the mask MK4 and the stage electrode pattern SEP, which may prevent the mask MK4 from sagging.

[0141] In addition, the magnitude of the voltage applied to the mask (MK4) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK4) and the deposition source (DS).

[0142] As shown in FIG. 18, the mask (MK4) is unloaded.

[0143] While the mask (MK4) is unloaded, a voltage having a positive polarity (+) is applied to the electrode material doped in the mask (MK4). Also, while a voltage having a positive polarity (+) is applied to the mask (MK4), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0144] By applying a voltage having the same positive polarity (+) to the mask (MK4) and the stage electrode pattern (SEP), a repulsive force is generated between the mask (MK4) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK4).

[0145] FIG. 19 is a plan view illustrating a mask included in a deposition apparatus according to a fifth embodiment of the present invention, and FIGS. 20 to 22 are views illustrating a deposition method using the deposition apparatus of FIG. 19.

[0146] 19, a deposition apparatus (DD5) according to a fifth embodiment of the present invention includes a deposition source (DS), a mask (MK5), a stage (STG), and a stage electrode pattern (SEP). The deposition apparatus (DD5) deposits a deposition material onto a deposition target substrate (SUB).

[0147] In one embodiment, the vapor deposition apparatus (DD5) is the same as the vapor deposition apparatus (DD1) according to the first embodiment, except for the mask (MK5).

[0148] In one embodiment, the mask (MK5) is doped with an electrode material. In one embodiment, the electrode material is a conductive material (e.g., a metal material) that conducts electricity. This allows a predetermined voltage to be applied to the electrode material, and the mask (MK5) has a predetermined polarity.

[0149] In one embodiment, the doping amount of the electrode material is substantially non-uniform, as shown in Figure 19. For example, the doping amount of the electrode material doped at the outer edge of the mask (MK5) is less than the doping amount of the electrode material doped at the center of the mask (MK5).

[0150] In another embodiment, the mask (MK5) is doped with a magnetic material that allows magnetism to pass through.

[0151] As shown in FIG. 20, the deposition target substrate (SUB) is fixed to the stage (STG), and the mask (MK5) is loaded.

[0152] While the mask (MK5) is being loaded, a voltage is applied to the electrode material doped in the mask (MK5). For example, a voltage having a positive polarity (+) is applied to the mask (MK5). Also, since the doping amount of the electrode material doped in the center of the mask (MK5) is relatively large, the magnitude of the voltage applied to the center of the mask (MK5) is relatively large.

[0153] Also, while the mask (MK5) is being loaded, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a positive polarity (+) is applied to the mask (MK5), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0154] By applying a voltage having the same positive polarity (+) to the mask (MK5) and the stage electrode pattern (SEP), a repulsive force is generated between the mask (MK5) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK5).

[0155] In addition, the magnitude of the voltage applied to the mask (MK5) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK5) and the deposition target substrate (SUB).

[0156] As shown in FIG. 21, a deposition process is performed.

[0157] During the deposition process, a voltage is applied to the electrode material included in the mask MK5, for example, a voltage having a negative polarity (-) is applied to the mask MK5.

[0158] During the deposition process, a voltage is applied to the stage electrode pattern (SEP). For example, while a voltage having a negative polarity (-) is applied to the mask (MK5), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0159] When voltages having different polarities are applied to the mask (MK5) and the stage electrode pattern (SEP), an attractive force is generated between the mask (MK5) and the stage electrode pattern (SEP), which may prevent the mask (MK5) from sagging.

[0160] In addition, the magnitude of the voltage applied to the mask (MK5) and the stage electrode pattern (SEP) can be adjusted, thereby adjusting the distance between the mask (MK5) and the deposition source (DS).

[0161] As shown in FIG. 22, the mask (MK5) is unloaded.

[0162] While the mask (MK5) is unloaded, a voltage having a positive polarity (+) is applied to the electrode material doped in the mask (MK5). Also, while a voltage having a positive polarity (+) is applied to the mask (MK5), a voltage having a positive polarity (+) is applied to the stage electrode pattern (SEP).

[0163] By applying a voltage having the same positive polarity (+) to the mask (MK5) and the stage electrode pattern (SEP), a repulsive force is generated between the mask (MK5) and the stage electrode pattern (SEP), thereby preventing a collision between the deposition target substrate (SUB) and the mask (MK5).

[0164] 23 and 24 are perspective views showing an electronic device according to an embodiment of the present invention.

[0165] 23 and 24, an electronic device (ED) according to an embodiment of the present invention includes a display module housing 10, a first eyepiece 10a, a second eyepiece 10b, and eyeglass temples 20. For example, the electronic device (ED) may be implemented as a head-mounted display. Therefore, hereinafter, the electronic device (ED) will be described as a head-mounted display.

[0166] The display module housing 10 includes a display module and an optical member. The display module displays an image. The optical member provides the image displayed on the display module to the first and second eyepieces 10a and 10b. For example, the display module is manufactured from the deposition target substrate (SUB) described in FIGS. 1 to 22.

[0167] The first and second eyepieces 10a and 10b are disposed on one side of the display module housing 10. Specifically, the first and second eyepieces 10a and 10b are disposed on the bottom surface of the display module housing 10. For example, the first eyepiece 10a is a left eyepiece where the user's left eye is positioned, and the second eyepiece 10b is a right eyepiece where the user's right eye is positioned. Through the first and second eyepieces 10a and 10b, the user can view images displayed by the display module of the display module housing 10.

[0168] The electronic device (ED) provides the user with an image displayed on the display module of the display module housing 10 through the first and second eyepieces 10a and 10b. As a result, the electronic device (ED) can provide the user with a virtual image displayed by the display module of the display module housing 10. In other words, the electronic device (ED) can realize virtual reality (VR).

[0169] The eyeglass temples 20 are configured to be easily attached and detached by the user. However, the configuration of the present invention is not limited to this, and the electronic device (ED) may include a head-mounted band that can be worn on the head instead of the eyeglass temples 20.

[0170] While the present invention has been described with reference to exemplary embodiments thereof, those skilled in the art will appreciate that various modifications and variations can be made thereto without departing from the spirit and scope of the present invention as set forth in the following claims.

[0171] According to a preferred specific embodiment, it is as follows:

[0172] The background to this case is as follows (i) to (ix). (i) When manufacturing a display panel such as an organic light-emitting display panel in which organic light-emitting elements (OLEDs) are arranged, a light-emitting layer for each color region, a color filter layer, etc. are formed by vapor deposition (Patent Documents 1 and 2).

[0173] (ii) For example, for deposition related to a predetermined color, a deposition mask ("Mask 10, 110" in Patent Document 1) is used that has openings in predetermined areas ("Openings 12, 112" in Patent Document 1) and shields other areas.

[0174] (iii) The deposition mask is typically An aperture array section (the "active display section 12, 112" in Patent Document 1) corresponding to each display panel; a lattice-like or mesh-like open, non-aligned compartment frame portion extending therebetween; and an outer frame portion ("frame 20, 120" in Patent Document 1) that forms the periphery of the deposition mask.

[0175] (iv) On the other hand, with the recent trend toward higher resolution display panels, there is a risk of a problem in which a "shadow" is created near the edge of the aperture due to deposition particles flying at an angle. To address this problem, the thickness of the metal plate that constitutes the deposition mask is being set to be smaller.

[0176] (v) In particular, there is a demand for ultra-high definition display panels in glasses-type displays (for example, Figures 23 to 24 of the present application), which can be considered next-generation displays.

[0177] (vi) However, thin metal plates can sag at the center. (Figure 2 of Patent Document 1) (vii) Therefore, Patent Document 1 proposes placing a "magnet plate 50, 150" above the substrate ("30, 130") to be vapor-deposited, sandwiching a "gap plate 30, 130", and placing a rod-shaped "magnet member 114" in a partitioned section on the underside of the vapor deposition mask ("mask 110").

[0178] (viii) On the other hand, in FIG. 6 of Patent Document 2 and the like, it is proposed to form an electrostatic chuck by alternately arranging positive and negative electrodes on the upper surface of the deposition mask (2A, 2B). (ix) However, with the conventional technologies of Patent Documents 1 and 2, it is not possible to appropriately adjust the sagging depending on the position, such as only at the center, or to observe the degree of sagging during the vapor deposition process and appropriately adjust it over time, and it is therefore thought that the process cannot be optimized.

[0179] According to a particularly preferred embodiment, the following A1 to A5, and / or A6 to A10, and any combination of A1 to A14 are used.

[0180] A1: A lattice- or mesh-like "upper electrode pattern (UEP2)" is provided on the upper surface (the surface facing the substrate SUB to be vapor-deposited) of the vapor deposition mask (mask MK1) so as to surround each opening array area (vapor deposition area (DA)). In particular, it is provided over the entire or part of the frame portion (iii) above. In this deposition mask (mask MK1), at least the frame portion on which the electrode pattern is arranged can be made of a non-conductive material such as an inorganic material.

[0181] A2 The "stage (STG)" that holds the deposition target substrate (SUB) from above is equipped with a grid-like or mesh-like "stage electrode pattern (SEP)" in a position and area on the plane that matches the "upper electrode pattern (UEP2)" on the deposition mask (mask MK1).

[0182] A3 By applying a voltage with the same positive and negative polarity to the "upper electrode pattern (UEP2)" on the deposition mask (mask MK1) and the "stage electrode pattern (SEP)" on the "stage (STG)", a repulsive force is generated between the deposition mask (mask MK1) and the "stage (STG)".

[0183] A4 This allows the distance between the deposition mask (mask MK1) and the "stage (STG)" to be set to a minimum, enabling high-resolution deposition while preventing collisions between the deposition mask (mask MK1) and the deposition target substrate (SUB) and maintaining the distance within an optimal range. In particular, it is possible to prevent the opening arrangement region (deposition region (DA)) of the deposition mask (mask MK1) that is not provided with a backing member ("support member 100") from being damaged by collision. The backing member ("support member 100") may also be provided on the whole or part of a partition frame portion that partitions the opening array areas (deposition areas (DA)) from each other.

[0184] A5 The generation of a repulsive force between a predetermined region of the deposition mask (mask MK1) and the stage (STG) of the deposition target substrate (SUB) can be performed throughout the entire period in which the deposition mask (mask MK1) is loaded (FIG. 4) and the deposition progress period (FIG. 5) after the deposition target substrate (SUB) is fixed to the stage (STG), particularly from start to finish. Furthermore, the repulsive force can also be generated throughout the entire period in which the deposition mask (mask MK1) is unloaded (FIG. 6).

[0185] A6 On the lower surface of the deposition mask (mask MK1) (the surface opposite to the substrate SUB on which deposition is performed), a lattice-like or mesh-like "lower electrode pattern (LEP)") is provided so as to surround each opening array area (deposition area (DA)), similar to the "upper electrode pattern (UEP2)." In particular, it is provided over the entire or part of the frame portion of (iii) above. In this deposition mask (mask MK1), at least the frame portion on which the electrode pattern is arranged can be made of a non-conductive material such as an inorganic material.

[0186] A7 An electrode pattern ("deposition source electrode pattern (DEP)") that corresponds to (particularly, matches in position and area on a plane with) the "lower electrode pattern (LEP)" on the lower surface of the deposition mask (mask MK1) is also provided on the upper surface of the deposition source (DS) (which in this application includes cases such as a sputtering target).

[0187] A8 By applying a voltage with the same positive and negative polarities to the "lower electrode pattern (LEP)" on the bottom surface of the deposition mask (mask MK1) and the electrode pattern ("deposition source electrode pattern (DEP)") on the top surface of the deposition source (DS), a repulsive force is generated between the deposition mask (mask MK1) and the top surface of the deposition source (DS). At this time, to prevent static electricity, the "upper electrode pattern (UEP2)" on the upper surface of the deposition mask (mask MK1) and the "lower electrode pattern (LEP)" on the lower surface of the deposition mask (mask MK1) sandwich the frame from above and below, and voltages of opposite polarities can be applied. In this way, static electricity and the like can be prevented.

[0188] A9 This prevents the deposition mask (mask MK1) from sagging, and the distance between the deposition mask (mask MK1) and the deposition target substrate (SUB) is maintained optimally over the entire area on the plane. In particular, the opening arrangement area (deposition area (DA)) in the deposition mask (mask MK1), which is not provided with a backing member ("support member 100"), can be made to maintain an optimal range of distance between it and the deposition target substrate (SUB). The backing member ("support member 100") may also be provided on the whole or part of a partition frame portion that partitions the opening array areas (deposition areas (DA)) from each other.

[0189] A10 The generation of repulsive force between the deposition mask (mask MK1) and the deposition source (DS) can be carried out during the deposition process, particularly throughout the entire period.

[0190] A11 In order to properly prevent sagging, the "upper electrode pattern (UEP2)" and the "lower electrode pattern (LEP)" can be arranged in different areas on the deposition mask (mask MK1), particularly in different areas with respect to whether they are on the center side or the outside. For example, as shown in Figures 7 to 9 of the present application, an "upper electrode pattern (UEP2)" for generating a repulsive force between the deposition mask (mask MK1) and the stage (STG) of the deposition target substrate (SUB) can be arranged in the outer region of the deposition mask, and a "lower electrode pattern (LEP)" for generating a repulsive force between the deposition mask (mask MK1) and the deposition source (DS) can be arranged in the inner region of the deposition mask.

[0191] A12 In order to appropriately prevent sagging, the method of applying voltage to the "upper electrode pattern (UEP2)" can be made different between the inner region and the outer region of the deposition mask (mask MK1). For example, at least one of the following methods can be used. 12 and 14 of the present application: A voltage is applied only to the outer region so that a repulsive force occurs between the deposition target substrate (SUB) and the stage (STG). FIG. 13 of the present application: During the deposition process, a voltage is applied only to the inner region so that an attractive force occurs between the deposition target substrate (SUB) and the stage (STG).

[0192] A13 Instead of attaching an "upper electrode pattern (UEP2)" or a "lower electrode pattern (LEP)" to the non-conductive frame part of the deposition mask (mask MK1), the deposition mask (mask MK1) or its frame part itself can be made conductive and a voltage can be applied to it. For example, when the deposition mask (mask MK1) or its frame portion is made of a non-metallic inorganic material, it can be made conductive by doping it with ion irradiation or the like. In this case, too, as shown in FIGS. 17 to 19 of the present application, a voltage can be applied in the same manner as in FIGS. 5 and 6 of the present application. Also in this case, as shown in FIGS. 20 to 22 of the present application, a voltage can be applied in the same manner as in FIGS. 12 to 14 of the present application.

[0193] A14 By varying the degree of doping or the degree of voltage application in the above A13 between the inner and outer regions, the curves of the magnitude of the repulsive and attractive forces (function curves with respect to the distance from the center) can be made to have a smooth dome shape, as shown in Figure 19 of the present application. [Industrial Applicability]

[0194] The present invention can be applied to a deposition apparatus for manufacturing display modules, for example, display modules included in high-resolution smartphones, mobile phones, smart pads, smart watches, tablet PCs, vehicle navigation systems, televisions, computer monitors, notebook computers, etc. [Explanation of symbols]

[0195] DD1, DD2, DD3, DD4, DD5: Vapor deposition equipment DS: Deposition source STG: Stage SUB: Deposition target substrate SEP: Stage electrode pattern MK1, MK2, MK3, MK4, MK5: Mask UEP1: First upper electrode pattern LEP: Bottom Electrode Pattern DEP: Deposition source electrode pattern

Claims

1. a deposition source containing a deposition material; a mask including a first upper electrode pattern disposed on the deposition source, through which the deposition material passes and to which a voltage is applied; a stage disposed on the mask and on which a deposition target substrate onto which the deposition material is deposited is fixed; a stage electrode pattern disposed on the mask and to which a voltage is applied; The deposition apparatus, wherein a voltage having the same polarity is applied to the stage electrode pattern and the first upper electrode pattern.

2. The deposition apparatus of claim 1 , wherein a repulsive force is generated between the stage electrode pattern and the first upper electrode pattern.

3. 2. The deposition apparatus of claim 1, wherein the mask further comprises a second upper electrode pattern spaced apart from the first upper electrode pattern, the second upper electrode pattern having a voltage applied thereto, the voltage having the same polarity as the voltage applied to the first upper electrode pattern but a voltage having a different magnitude from the voltage applied to the first upper electrode pattern.

4. 2. The deposition apparatus according to claim 1, wherein the mask further includes a second upper electrode pattern having a polarity different from that of the voltage applied to the first upper electrode pattern.

5. the first upper electrode pattern is disposed on the outer periphery of the mask; The deposition apparatus according to claim 4 , wherein the second upper electrode pattern is disposed at the center of the mask.

6. 2. The deposition apparatus according to claim 1, wherein the mask further includes a lower electrode pattern to which a voltage having a polarity different from that of the voltage applied to the first upper electrode pattern is applied.

7. The deposition apparatus according to claim 6 , further comprising a deposition source electrode pattern disposed on the deposition source and to which a voltage having the same polarity as that of the voltage applied to the lower electrode pattern is applied.

8. the first upper electrode pattern is disposed on the outer periphery of the mask; The deposition apparatus of claim 6 , wherein the lower electrode pattern is disposed at the center of the mask.

9. The mask defines a deposition region having a plurality of openings formed therein; The deposition apparatus according to claim 1 , wherein the first upper electrode pattern is disposed between the deposition regions.

10. The deposition apparatus of claim 1 , wherein the mask comprises silicon.

11. a deposition source containing a deposition material; a mask disposed on the deposition source, through which the deposition material passes and to which a voltage is applied, the mask having an electrode material doped therein; a stage disposed on the mask and on which a deposition target substrate onto which the deposition material is deposited is fixed; and a stage electrode pattern disposed on the mask and to which a voltage is applied.

12. The deposition apparatus of claim 11, wherein voltages of the same polarity are applied to the stage electrode pattern and the electrode material.

13. The deposition apparatus of claim 11, wherein voltages of different polarities are applied to the stage electrode pattern and the electrode material.

14. 12. The deposition apparatus of claim 11, wherein the doping amount of the electrode material doped on the outer periphery of the mask is the same as the doping amount of the electrode material doped on the center of the mask.

15. 12. The deposition apparatus of claim 11, wherein the doping amount of the electrode material doped on the outer periphery of the mask is smaller than the doping amount of the electrode material doped on the center of the mask.

16. applying a voltage to an upper electrode pattern included in the mask while the mask is loaded; applying a voltage to a stage electrode pattern disposed on the mask while the mask is being loaded; applying a voltage to a lower electrode pattern included in the mask during a deposition process; applying a voltage to an evaporation source electrode pattern disposed under the mask during the deposition process; applying a voltage to the upper electrode pattern while the mask is unloaded; applying a voltage to the stage electrode pattern while the mask is unloaded; The deposition method, wherein voltages of the same polarity are applied to the stage electrode pattern and the upper electrode pattern while the mask is being loaded.

17. The deposition method of claim 16, wherein voltages of the same polarity are applied to the deposition source electrode pattern and the lower electrode pattern during the deposition process.

18. 17. The deposition method of claim 16, wherein voltages of the same polarity are applied to the stage electrode pattern and the upper electrode pattern while the mask is unloaded.

19. 17. The deposition method of claim 16, wherein the polarity of the voltage applied to the upper electrode pattern is different from the polarity of the voltage applied to the lower electrode pattern.

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