Nonlinear circuit

The nonlinear circuit design with a transistor back gate connected to a transmission line of specific length addresses output degradation at high frequencies by improving impedance matching, thereby enhancing output power.

JP2025140230APending Publication Date: 2025-09-29INSTITUTE OF SCIENCE TOKYO
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Patent Information

Application Number
JP2024039460
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-13
Publication Date
2025-09-29

AI Technical Summary

Technical Problem

Nonlinear circuits, such as those disclosed in Patent Document 1, experience a decrease in output when operating at high frequency bands.

Method used

A nonlinear circuit design incorporating a transistor with its back gate connected to a transmission line, where the transmission line's total length is set between 0.8×λ/4 and 1.2×λ/4, facilitating impedance matching and enhancing output power.

Benefits of technology

The proposed configuration increases output power by achieving appropriate impedance matching, particularly at high frequencies, surpassing conventional structures in output power performance.

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Abstract

To solve a problem with a nonlinear circuit in which the output power decreases when the frequency band of the generated signal becomes high.SOLUTION: In a nonlinear circuit having a nonlinear element portion, the nonlinear element portion includes a transistor and a transmission line, the back gate of the transistor is connected to the transmission line, the transmission line is connected to ground, and has a total length based on the wavelength λ of a transmission signal transmitted to the nonlinear circuit, and the total length is equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a nonlinear circuit. [Background technology]

[0002] For example, a sine wave clock signal in analog or digital communication can be generated from an oscillator circuit, but a nonlinear circuit such as a multiplier circuit may be used to stably extract a higher frequency output signal from the oscillator circuit.Patent Document 1 discloses a multiplier circuit (nonlinear circuit) having a nonlinear element such as a transistor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-149708 Summary of the Invention [Problem to be solved by the invention]

[0004] A nonlinear circuit such as that disclosed in Patent Document 1 has a problem in that the output decreases when the frequency band of the generated signal becomes high frequency.

[0005] An object of the present invention is to provide a high-output nonlinear circuit. [Means for solving the problem]

[0006] According to the present invention, there is provided a nonlinear circuit including a nonlinear element section, the nonlinear element section having a transistor and a transmission line, the back gate of the transistor being connected to the transmission line, the transmission line being connected to ground, and the nonlinear circuit having a total length based on the wavelength λ of a transmission signal transmitted to the nonlinear circuit, the total length being equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4.

[0007] According to the present invention, the back gate of the transistor in the nonlinear circuit is connected to a transmission line whose total length is equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4 (λ is the wavelength of the transmission signal), thereby achieving appropriate impedance matching and enabling the output of the nonlinear circuit to be increased. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram showing an example of a circuit configuration of a nonlinear circuit 100 according to an embodiment. [Figure 2] FIG. 2 is an explanatory diagram that schematically shows how a signal u having a frequency doubled from a sine wave signal s1 is generated in the nonlinear element (transistor 2A) of the nonlinear circuit 100 shown in FIG. [Figure 3] FIG. 3 is a graph showing the results of evaluating the relationship between input power and output power for a conventional nonlinear circuit and the nonlinear circuit according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Various features shown in the following embodiments can be combined with each other. Furthermore, each feature can be an invention independently.

[0010] 1. Description of the configuration of the embodiment In the embodiment, a case where the nonlinear circuit 100 is a frequency multiplier (multiplier) will be described as an example. There are various configurations of multiplier circuits, but in the embodiment, a case where the nonlinear circuit element of the nonlinear circuit is a source-grounded MOSFET transistor will be described as an example. The circuit configuration of the nonlinear circuit is not limited to that shown in FIG. 1 , and the present invention can be applied to, for example, a mixer circuit or other nonlinear circuits having MOSFETs.

[0011] In the embodiment, the nonlinear circuit 100 as a multiplier circuit is described as an example of a doubling multiplier circuit that doubles the frequency of an input signal (a signal generated in an input section), but is not limited to this and can be applied to an n-fold multiplier circuit (n is 2 or more).

[0012] As shown in FIG. 1, the nonlinear circuit 100 includes an input section 1, a nonlinear section 2, and an output section 3.

[0013] 1-1. Input section 1 The input section 1 has an input terminal 1A, a capacitor 1B, and a transformer 1C. The input terminal 1A has a predetermined impedance Z S and is, for example, a terminal portion to which an input signal is input. One side of the capacitor 1B is connected to the input terminal 1A, and the other side is connected to the transformer 1C. The transformer 1C has a first inductor 1C1 (first coil) and a second inductor 1C2 (second coil). The transformer 1C has a function of dividing the power supplied from the capacitor 1B side into a first-phase sine wave signal s1 and a second-phase sine wave signal s2 that is in the opposite phase to the first phase. In other words, the transformer 1C is configured so that the midpoint of the second inductor 1C2 is at a predetermined potential Vm and can generate sine wave signals s1 and s2 that are inverted in phase with each other.

[0014] The frequency (GHz) of the signal generated by the input unit 1 specifically includes, for example, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160, 170, 180, 190, 200, 210, 220, 230, 240, 250, 260, 270, 280, 290, 300, 310, 320, 330, 340, 350, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, and 1500, and may be within a range between any two of the values ​​exemplified here. Preferably, the frequency of the transmission signal is, for example, 10 GHz or higher. In the embodiment, since the nonlinear circuit 100 is a doubling multiplier circuit, the frequency of the signal generated by the output unit 3 is doubled to the values ​​listed above and the upper and lower limits of the ranges. If the nonlinear circuit 100 is an n-times multiplier circuit, the frequency will be n times.

[0015] It should be noted that the sine wave signal s1 and the sine wave signal s2 may also contain unwanted frequency components, which are therefore removed by a band-pass filter in the output unit 3, which will be described later.

[0016] 1-2.Nonlinear section 2 The nonlinear section 2 includes a nonlinear element section. In this embodiment, the nonlinear element section includes a transistor 2A and a transmission line 2B.

[0017] In this embodiment, the transistor 2A is an NMOS, and has a source S, a gate G, a drain D, and a back gate B. The back gate B of the transistor 2A is connected to a transmission line 2B.

[0018] Specifically, the transistor 2A includes a first transistor 2A1 and a second transistor 2A2. The first transistor 2A1 and the second transistor 2A2 are each a common-source NMOS transistor, and their drains are connected to each other. The transmission line 2B includes a first transmission line 2B1 and a second transmission line 2B2 that is separate from the first transmission line 2B1. The first transmission line 2B1 and the second transmission line 2B2 are each connected to ground.

[0019] The source S of the first transistor 2A1 and the source S of the second transistor 2A2 are both grounded (connected to the ground). The gate G of the first transistor 2A1 is connected to one side of the second inductor 1C2 of the transformer 1C, and the gate G of the second transistor 2A2 is connected to the other side of the second inductor 1C2 of the transformer 1C. Note that, although various inductors have been described in the embodiments, the inductors may be replaced with transmission lines. The drain D of the first transistor 2A1 is connected to the drain D of the second transistor 2A2. The back gate B of the first transistor 2A1 is connected to the first transmission line 2B1, and the back gate B of the second transistor 2A2 is connected to the second transmission line 2B2.

[0020] 2, the first transistor 2A1 has the function of generating a half-wave t1 from a sine-wave signal s1, and the second transistor 2A2 has the function of generating a half-wave t2 from a sine-wave signal s2. Because the phases of the sine-wave signals s1 and s2 are opposite, the timings of the half-waves t1 and t2 are shifted. Therefore, when the outputs of the first transistor 2A1 and the second transistor 2A2 (half-wave t1 and half-wave t2) are combined, a signal u with double the frequency is generated.

[0021] Here, the transmission line 2B (each of the first transmission line 2B1 and the second transmission line 2B2) is connected to ground and has a total length L based on the wavelength λ of the transmission signals (sine wave signal s1 and s2) of the nonlinear circuit 100. The total length L preferably corresponds to the wavelength λ / 4, but does not have to match exactly. Specifically, the total length L can be, for example, 0.80×λ / 4, 0.85×λ / 4, 0.90×λ / 4, 0.95×λ / 4, 1.0×λ / 4, 1.05×λ / 4, 1.10×λ / 4, 1.15×λ / 4, or 1.20×λ / 4, and may be within a range between any two of the values ​​exemplified here. For example, the total length L is preferably equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4. By basing the total length L of the transmission line 2B on the wavelength λ in this manner, impedance matching in the transistor 2A can be properly achieved, and the output (output power) of the nonlinear section 2 can be increased, which in turn makes it possible to increase the output (output power) of the nonlinear circuit 100.

[0022] It is preferable that the entire transmission line 2B (each of the first transmission line 2B1 and the second transmission line 2B2) is formed linearly. In other words, it is preferable that the transmission line 2B is formed linearly from one end connected to the back gate B to the other end connected to the ground. This allows appropriate impedance matching.

[0023] 1-3. Output section 3 The output section 3 has an inductor 3A, a capacitor 3B, and an output terminal 3C. One end of the inductor 3A is at a predetermined potential Vs, and the other end is connected to the capacitor 3B. That is, the nonlinear circuit 100 further includes a band-pass filter unit, which is connected to the output side of the nonlinear circuit 100. In the embodiment, the band-pass filter unit is connected to the output unit (drain D) of the transistor 2A. The band-pass filter unit has the function of removing unnecessary components as the output and extracting signals of frequency components required by the nonlinear circuit 100. The output terminal 3C has a predetermined impedance Z L , which is, for example, a terminal portion for extracting an output signal.

[0024] 2. Description of the effects of the embodiment In the field of communications, frequency multipliers are used to generate radio wave signals of a single frequency. Similar to frequency conversion, frequency multipliers utilize nonlinear elements such as diodes and transistors. However, noise and loss of output power relative to the input power occur before and after frequency conversion. Conventional approaches to reduce this loss and improve conversion efficiency include improving the oscillator itself, stabilizing the output signal using a PLL (Phase Locked Loop) circuit, and applying a ground voltage to the back gate of an NMOS transistor. However, as frequency bands become higher (such as the gigahertz and terahertz bands), these improvements alone are limited in the performance required of multipliers.

[0025] The nonlinear circuit 100 (multiplier circuit) according to the embodiment is configured to achieve impedance matching by arranging a transmission line 2B having a total length based on the wavelength λ of the transmission signal (preferably 0.8×λ / 4 or more, 1.2×λ / 4 or less, and most preferably λ / 4) at the back gate of the NMOS transistor. This allows for improved performance by increasing the output power compared to nonlinear circuits with conventional structures. Specifically, with conventional structures, inter-terminal isolation (electrical isolation) becomes ineffective as the frequency increases, and power may leak to ground via the back gate. However, with the configuration of the embodiment, the above-described configuration allows for impedance matching, thereby improving the output power of the nonlinear circuit 100.

[0026] The relationship between input power and output power was evaluated for a conventional nonlinear circuit (multiplier circuit) and the nonlinear circuit 100 (multiplier circuit) according to the embodiment, and the results will be briefly described below with reference to Fig. 3. The conventional nonlinear circuit has the same configuration as the nonlinear circuit 100 according to the embodiment, except that the back gate B does not have a transmission line 2B. The conditions for evaluation are as follows: The frequency of the input IN was set to 140 (GHz). The frequency of the output OUT was set to 280 (GHz). The input complex impedance was set to 4.266+j13.19(Ω). The output complex impedance was set to 3.486+j4.831(Ω). The potential Vm at the midpoint of the second inductor 1C2 was set to 0.3 (V). The predetermined potential Vs in the inductor 3A was set to 1 (V). The inventors have confirmed that the output power of the nonlinear circuit 100 according to the embodiment is higher than that of the conventional nonlinear circuit over the entire range of input power evaluated. For example, it can be seen that the maximum output power when the input power is 10 dBm is about 0.7 dB higher than that of the conventional nonlinear circuit.

[0027] Various embodiments are exemplified below, and the embodiments shown below can be combined with each other. [Appendix 1] A nonlinear circuit including a nonlinear element section, the nonlinear element section includes a transistor and a transmission line, a back gate of the transistor is connected to the transmission line; the transmission line is connected to ground and has a total length based on a wavelength λ of a transmission signal in the nonlinear circuit; A nonlinear circuit, wherein the total length is equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4. [Appendix 2] 10. The nonlinear circuit of claim 1, Further provided with a band pass filter section, The bandpass filter unit is connected to the output side of the nonlinear circuit. [Appendix 3] 1. The nonlinear circuit according to claim 1 or 2, The nonlinear circuit, wherein the transmission signal is 10 GHz or higher. [Appendix 4] A nonlinear circuit according to any one of Supplementary Note 1 to Supplementary Note 3, the transistor includes a first transistor and a second transistor; the transmission path includes a first transmission path and a second transmission path separate from the first transmission path, each of the first transmission line and the second transmission line is connected to the ground and has the total length; the back gate of the first transistor is connected to the first transmission line; The back gate of the second transistor is connected to the second transmission line. [Appendix 5] 5. The nonlinear circuit of claim 4, a first transistor and a second transistor, each of which is a common-source NMOS transistor, and whose drains are connected to each other; [Explanation of symbols]

[0028] 100: Nonlinear circuits 1: Input section 1A: Input terminal 1B: Capacitor 1C: Transformer 1C1: First inductor 1C2: Second inductor 2: Nonlinear section 2A: Transistor 2A1: First transistor 2A2: Second transistor B: Back gate D: Drain G: Gate S: Sauce 2B: Transmission line 2B1: First transmission line 2B2: Second transmission line 3: Output section 3A: Inductor 3B: Capacitor 3C: Output end

Claims

1. A nonlinear circuit including a nonlinear element section, the nonlinear element section includes a transistor and a transmission line, a back gate of the transistor is connected to the transmission line; the transmission line is connected to ground and has a total length based on a wavelength λ of a transmission signal in the nonlinear circuit; A nonlinear circuit, wherein the total length is equal to or greater than 0.8×λ / 4 and equal to or less than 1.2×λ / 4.

2. 2. The nonlinear circuit of claim 1, Further provided with a band pass filter section, The bandpass filter unit is connected to the output side of the nonlinear circuit.

3. 3. The nonlinear circuit according to claim 1 or 2, A nonlinear circuit, wherein the transmission signal is 10 GHz or higher.

4. 3. The nonlinear circuit according to claim 1 or 2, the transistor includes a first transistor and a second transistor; the transmission path includes a first transmission path and a second transmission path separate from the first transmission path, each of the first transmission line and the second transmission line is connected to the ground and has the total length; the back gate of the first transistor is connected to the first transmission line; The back gate of the second transistor is connected to the second transmission line.

5. 5. The nonlinear circuit according to claim 4, a first transistor and a second transistor, each of which is a common-source NMOS transistor, and whose drains are connected to each other;

Citation Information

Patent Citations

  • Frequency multiplier

    JP2016149708A