Automobile electronic control device and memory management device
The electronic control device with a main and auxiliary memory system and dynamic data transfer ensures high-speed access to large-capacity RAM, addressing page fault-induced waiting times and enabling real-time vehicle control.
Patent Information
- Application Number
- JP2024039649
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-14
- Publication Date
- 2025-09-29
AI Technical Summary
Existing memory management methods for automotive ECUs with large-capacity RAMs cause unnecessary waiting times due to page faults, which can hinder applications requiring responsiveness from processing within the required response time.
An electronic control device with a main memory and an auxiliary memory, where RAM data for each application is pre-arranged in the main storage device, and a memory management unit dynamically transfers data from the main memory to the auxiliary memory before application execution, ensuring high-speed access.
This approach allows applications to access large-capacity RAM without unnecessary waiting, enabling real-time vehicle control by processing applications within the required response time.
Smart Images

Figure 2025140318000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an electronic control unit and a memory management unit for an automobile, and in particular to a memory management unit that realizes high-speed access to a large-capacity RAM (Random Access Memory), and an electronic control unit for an automobile that realizes real-time processing using the memory management unit. [Background technology]
[0002] In recent years, the market for autonomous driving and driver assistance functions known as AD (Autonomous Driving) / ADAS (Advanced Driver Assistance Systems) has expanded, and automotive electronic control devices such as ECUs (Electrical Control Units) that realize these functions are required to be more advanced, multifunctional, and integrated. Accordingly, SoCs (System on Chip) or MCUs (Micro Controller Units) equipped with multiple CPU cores are becoming more prevalent in automotive ECUs. Meanwhile, software applications that realize automotive control, not limited to AD / ADAS, often require responsiveness, completing processing within a predetermined time.
[0003] Patent document 1 discloses a memory management device that has multiple software applications and uses a virtual page group consisting of multiple virtual pages, a page prefetching means, and an auxiliary storage device to achieve high-speed access to a large-capacity RAM virtually. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Publication No. 5-53913 Summary of the Invention [Problem to be solved by the invention]
[0005] However, the above memory management method has the following problems.
[0006] When a page fault (page fault: an interrupt that occurs when a page that does not exist in physical memory is accessed) occurs, it is necessary to detect and recover from the page fault. This causes unnecessary waiting time in the application, and there is a risk that applications that require responsiveness will not be able to process within the response time.
[0007] The object of the present invention is to provide a technology (electronic control device and memory management device for automobiles) that can realize real-time vehicle control while using large-capacity RAM by realizing a method for high-speed access to large-capacity RAM for applications. [Means for solving the problem]
[0008] An electronic control device for an automobile according to one aspect of the present invention includes: An electronic control unit for an automobile having a control unit including a plurality of CPU cores for processing a plurality of applications requiring responsiveness, a main memory having a relatively large storage capacity and a relatively slow access speed, and an auxiliary memory having a smaller storage capacity and a faster access speed than the main memory, All of the RAM data that each of the plurality of applications processes independently is pre-arranged in the main storage device, the auxiliary storage device has a plurality of logically divided storage areas, the plurality of applications includes a target application that is executed in accordance with an execution order of the plurality of applications based on a priority order method; By providing a memory management unit that dynamically transfers the RAM data that the target application processes alone from the main memory device to one of the multiple memory areas of the auxiliary memory device before the target application is executed, the target application can quickly access the RAM data during execution. [Effects of the Invention]
[0009] According to an embodiment of the present invention, an electronic control device for an automobile can realize a method for high-speed access to a large-capacity RAM for an application, thereby realizing real-time vehicle control while using a large-capacity RAM. In other words, since unnecessary waiting time does not occur in the application, an application that requires high responsiveness can be processed within the response time.
[0010] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments. [Brief explanation of the drawings]
[0011] [Figure 1] FIG. 1 is a configuration diagram of an electronic control device for an automobile according to a first embodiment. [Figure 2] 10 is a flowchart illustrating a process when an application is running. [Figure 3] 10 is a flowchart illustrating processing by a memory management unit. [Figure 4] FIG. 10 is a configuration diagram of an electronic control device for an automobile according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0012] Hereinafter, an embodiment will be described with reference to the drawings. [Example]
[0013] According to a first embodiment of the present invention, an example of the configuration of an electronic control device for an automobile that realizes real-time vehicle control while using a large-capacity RAM by realizing access to a large-capacity RAM for an application without causing unnecessary waiting time for the application will be described. The present invention can also be applied to a memory management device for a control device other than an electronic control device for an automobile.
[0014] [Configuration example 1] FIG. 1 is a configuration diagram of an automotive electronic control unit (ECU) according to this embodiment. As shown in FIG. 1, the automotive electronic control unit (ECU) has a control system (SoC) 000. The SoC 000 has a CPU core A 100, a CPU core B 200, a CPU core C 300, an auxiliary memory 400, and a main memory 500. The SoC 000 can be referred to as a processing device configured as an SoC (System on Chip) or an MCU (Micro Controller Unit) formed on a single semiconductor substrate. The main memory 500 may be built into the SoC 000 or may be configured to be connected to the outside of the SoC 000. The automotive electronic control unit (ECU) can also be referred to as a memory management device.
[0015] The SoC 000 is a processing device configured to include multiple CPU cores (100, 200, 300) and peripheral devices (not shown). The multiple CPU cores (100, 200, 300) process multiple applications that require high responsiveness.
[0016] CPU core A100 and CPU core B200 are provided as hardware on SoC000 and are configured independently of each other and CPU core C300. CPU core A100 has App-A101, App-B102, App-C103, and OS-A104. CPU core B200 has App-D201, App-E202, App-F203, and OS-B204.
[0017] Each of App-A101 to App-F203 is, for example, a software application (hereinafter referred to as an application) for controlling a vehicle. App-A101 to App-F203 each require an independent RAM area that is not shared between applications. However, CPU core A100 and CPU core B200 include applications other than App-A101 to App-F203 that do not require an independent RAM area that is not shared between applications.
[0018] OS-A104 and OS-B204 are parts that manage the startup and shutdown of App-A101 to App-F203 in accordance with an execution order determined in units of a predetermined period, based on the priorities (priority order method) previously set for App-A101 to App-F203.
[0019] CPU core C300 is provided as hardware on SoC000 and is configured independently of CPU core A100 and CPU core B200. CPU core C300 has a memory management unit 301. Memory management unit 301 is an application for managing memory access to auxiliary storage device 400 accessed by App-A101 to App-F203, and between auxiliary storage device 400 and main storage device 500.
[0020] The auxiliary storage device 400 is provided as hardware on the SoC000 and is configured independently of the main storage device 500. The auxiliary storage device 400 is a random access memory (RAM; hereinafter, also referred to as RAM memory) that has a smaller storage capacity and a faster access speed than the main storage device 500 and can be shared by each CPU core (100, 200, 300). The auxiliary storage device 400 has a first bank unit (Bank-X401, Bank-Y402) and a status storage unit 403. The first bank unit (Bank-X401, Bank-Y402) is a plurality of RAM areas that are logically divided in advance and accessed by App-A101 to App-F203. The first bank units (Bank-X401, Bank-Y402) as a plurality of RAM areas can be regarded as a plurality of logically divided storage areas. The state storage unit 403 is a logically divided RAM area so that App-A 101 to App-F 203 and the memory management unit 301 can share various memory management information for memory access.
[0021] The main memory device 500 is provided as hardware on the SoC000 and is configured independently of the auxiliary memory device 400. The main memory device 500 is a RAM memory with a larger storage capacity and slower access speed than the auxiliary memory device 400, and has the characteristics of being able to be shared by each CPU core (100, 200, 300). The main memory device 500 has second banks (Bank-A 501, Bank-B 502, Bank-C 503, Bank-D 504, Bank-E 505, Bank-F 506). The second banks (Bank-A 501, Bank-B 502, Bank-C 503, Bank-D 504, Bank-E 505, Bank-F 506) are logically partitioned RAM areas that are not shared between applications and are required independently by App-A 101 to App-F 203. These Bank-A501 to Bank-F506 have a one-to-one relationship with App-A101 to App-F203, respectively. The area size (storage capacity size) of each of Bank-A501 to Bank-F506 is assumed to be predetermined. In the main memory device 500, all RAM data processed independently by each of the multiple applications (App-A101 to App-F203) is assumed to be pre-stored in the second bank section (Bank-A501, Bank-B502, Bank-C503, Bank-D504, Bank-E505, Bank-F506) of the main memory device 500.
[0022] That is, the main memory device 500 has a relatively large storage capacity and a relatively slow access speed, while the auxiliary memory device 400 has a smaller storage capacity than the main memory device 500 and a faster access speed.
[0023] [Control method] In this embodiment, as shown in the flowcharts of Figures 2 and 3, App-A101 to App-F203 in CPU core A100 and CPU core B200 virtually access the RAM area required by each application in main memory 500 via auxiliary memory 400.
[0024] [Control 1] FIG. 2 shows a flowchart of a process in which App-A 101 to App-F 203 in the CPU core A 100 and the CPU core B 200 access Bank-X 401 and Bank-Y 402 in the auxiliary storage device 400.
[0025] (Step S101) In step S101, OS-A10 and OS-B204 register (update) information about the next application scheduled to be launched using the auxiliary storage device 400 in the status memory unit 403, which is a logically divided RAM area so that they can share memory management information within the auxiliary storage device 400, in accordance with an execution order based on a pre-set priority order.
[0026] (Step S102) In step S102, OS-A 104 and OS-B 204 start the application.
[0027] (Step S103, Step S110) Next, in step S103, it is determined whether the started application uses the auxiliary storage device 400.
[0028] If the started application does not use auxiliary storage device 400 (No), the process proceeds to step S110. In step S110, the application is processed as usual. Thereafter, the process proceeds to step S109.
[0029] If the launched application uses the auxiliary storage device 400 (Yes), the process proceeds to the next step S104. Note that the applications launched by OS-A 104 and OS-B 204 are executed in a predetermined execution order or according to a predetermined execution order rule. In other words, the execution order rule for multiple applications is predetermined within a specific cycle, and the execution order rule is executed for each of the multiple applications according to a specific cycle.
[0030] (Step S104) In step S104, the application accesses the status memory unit 403 in the auxiliary storage device 400 and obtains various information, such as information about the Bank to be accessed, such as Bank-X401 or Bank-Y402, which stores the information necessary to process the application, the state of the Bank to determine whether it is okay to access the target Bank, and the address offset value to access the target Bank.
[0031] (Step S105, Step S111) In step S105, to determine whether the application can access the target Bank acquired in step S104, the state information of the target Bank and the application application information of the target Bank are used to determine whether the target Bank can be accessed (i.e., whether the state of the target Bank is "waiting for use" and whether the application of the target Bank is the target application (App)). If the state of the target Bank is "waiting for use," which indicates that the application can access it, and the application matches the application currently being processed (Yes), then the application is determined to be accessible and the process proceeds to step S106.
[0032] However, if the above conditions are not satisfied (No) in step S105, it is determined that access is not permitted and the process proceeds to step S111. In step S111, the application switches the target Bank in the auxiliary storage device 400, for example, from Bank-X 401 to Bank-Y 402. Thereafter, the process proceeds to step S104, where step S104 is executed again and the application acquires various information from the state storage unit 403.
[0033] (Step S106) In step S106, to indicate to other resources such as the memory management unit 301 that the application is accessing the target bank, the application registers (updates) the state of the target bank as "in use" in the state storage unit 403. Therefore, other resources such as the memory management unit 301 can determine that the bank cannot be accessed.
[0034] (Step S107) Thereafter, in step S107, the auxiliary storage device 400 is accessed using the offset value acquired in step S104, and the application is processed. The RAM data accessed at this time is independent RAM data that is not shared between applications.
[0035] (Step S108) In step S108, when the application completes processing and is about to terminate, the status of the target bank is set to "waiting for transfer" in the status memory unit 403, allowing the memory management unit 301 to determine that the RAM data stored in that bank can be transferred to the main memory device 500.
[0036] (Step S109) Then, in step S109, OS-A 104 ends the application.
[0037] However, the above flowchart is an example of a flowchart for the process in which an application accesses the auxiliary storage device 400, and the control and roles of OS-A, OS-B, and applications vary depending on the software architecture, etc., so the present invention is not necessarily limited to the above.
[0038] [Control 2] FIG. 3 shows a flowchart of a process in which the memory management unit 301 in the CPU core C300 manages RAM data in the auxiliary storage device 400, Bank-X 401, Bank-Y 402, and the main storage device 500, Bank-A 501 to Bank-F 506.
[0039] (Step S201) In step S201, in order to share memory management information within the auxiliary storage device 400, the memory management unit 301 obtains information about the next application scheduled to be launched that will use the auxiliary storage area 400 and the state of the bank to determine whether it is okay to access the target bank from the state memory unit 403, which is a logically divided RAM area, in accordance with an execution order based on a pre-set priority order.
[0040] (Step S202) In step S202, the memory management unit 301 compares the information about the application scheduled to be started next, acquired in step S201, with the information about the previous application scheduled to be started next, which was previously stored in the memory management unit 301. If the comparison results in a match (Yes), it is determined that the progress state of the application in CPU core A100 or CPU core B200 is the same as the previous time, and the process returns to step S201. If the comparison results in a mismatch (No), it is determined that the progress state of the application in CPU core A100 or CPU core B200 has progressed since the previous time, and the process proceeds to step S203.
[0041] (Step S203) In step S203, the memory management unit 301 determines whether or not access to the target Bank is permitted based on the Bank status information acquired in step S201 for determining whether access to the target Bank, Bank-X 401 or Bank-Y 402, is permitted. If the target Bank's status is "waiting for transfer" (Yes), the memory management unit 301 determines that the target Bank is accessible, and proceeds to step S204. If the target Bank's status is not "waiting for transfer" (No), it determines that access is not permitted, and proceeds to step S210.
[0042] (Step S204) In step S204, the memory management unit 301 registers (updates) the state of the target bank as "transferring" in the state storage unit 403 to indicate to other resources such as the CPU core A100 that the target bank is being accessed. Therefore, other resources such as the CPU core A100 can determine that the bank cannot be accessed.
[0043] (Step S205) In step S205, the memory management unit 301 dynamically transfers RAM data from the target Bank in the auxiliary storage device 400 to the corresponding Bank-A 501 to Bank-F 506 in the main storage device 500. Note that the determination of which of Bank-A 501 to Bank-F 506 the data corresponds to will be obvious to the memory management unit 301 in step S206, which will be described later. Furthermore, the RAM data transferred at this time is independent RAM data that is not shared between applications.
[0044] (Step S206) In step S206, the memory management unit 301 dynamically transfers RAM data from the corresponding Bank-A 501 to Bank-F 506 in the main memory device 500 to the target Bank in the auxiliary memory device 400. The determination of which of Bank-A 501 to Bank-F 506 the data corresponds to is based on the information obtained in step S201 about the application that is scheduled to be started next and uses the auxiliary memory device 400. The RAM data transferred at this time is independent RAM data that is not shared between applications.
[0045] (Step S207) In step S207, the memory management unit 301 registers (updates) the application information to be applied to the target Bank in the status memory unit 403 to indicate to which application, App-A101 to App-F203, the RAM data transferred to the target Bank in step S206 is to be applied.
[0046] (Step S208) In step S208, in order for an application to access a dynamically switching target Bank, the memory management unit 301 registers (updates) an address offset value in the state memory unit 403 according to the target Bank, Bank-X401 or Bank-Y402, and the applicable application, App-A101 to App-F203.
[0047] (Step S209) In step S209, the memory management unit 301 registers (updates) the status information of the target bank in the status storage unit 403 as "waiting for use" to indicate that the memory management unit 301 has completed the transfer of RAM data between the target bank and the main memory device 500 in steps S205 and S206 and that the target bank is available for use by other resources such as the CPU core A100. Therefore, it can be determined that other resources such as the CPU core A100 can access the bank.
[0048] (Step S210) In step S210, the target Bank in the auxiliary storage device 400 is switched, for example, from Bank-X 401 to Bank-Y 402. Then, the process returns to step S201, and the processes from step S201 to step S209 are repeatedly executed. Here, the memory management unit 301 determines the order of RAM data transfer between the auxiliary storage device 400 and the main storage device 500 according to the execution order of multiple applications.
[0049] That is, before the target application is executed, the memory management unit 301 dynamically transfers RAM data that the target application processes independently from the main memory device 500 to one of the multiple memory areas (Bank-X 401 to Bank-Y 402) of the auxiliary memory device 400. This allows the target application to access the RAM data at high speed during execution.
[0050] Therefore, the automotive electronic control unit ECU according to the first embodiment does not cause unnecessary waiting time in the application, and can process the application that requires high response time within the response time. As a result, an automotive electronic control unit can be provided that does not cause unnecessary waiting time in the application, virtually realizes access to the main memory device 500, which is a large-capacity RAM, for the application, using the auxiliary memory device 400, and realizes real-time vehicle control while using the large-capacity RAM (500). [Example]
[0051] According to a second embodiment of the present invention, an example of an automotive electronic control device that supports functional safety is described, which enables an application to access a large-capacity RAM without causing an unnecessary waiting time for the application, and realizes real-time vehicle control while using a large-capacity RAM. Note that the second embodiment is not limited to vehicle control, and can also be applied to a memory management device that supports functional safety and realizes real-time control in a factory, for example.
[0052] [Configuration example 2] FIG. 4 is a configuration diagram of an automotive electronic control unit ECU according to a second embodiment. The automotive electronic control unit ECU of FIG. 4 differs from the automotive electronic control unit ECU of the first embodiment in that it includes, on an auxiliary storage device 400, Bank-M 404 and Bank-N 405, which are pre-logically divided RAM areas grouped for each application according to the functional safety level. Similarly to Bank-M 404 and Bank-N 405, Bank-X 401 and Bank-Y 402 are also grouped for each application according to the functional safety level. The other configurations of the automotive electronic control unit ECU of FIG. 4 are the same as those of the automotive electronic control unit ECU of the first embodiment, and therefore, redundant description may be omitted.
[0053] The auxiliary storage device 400 is configured as hardware on the SoC000, independent of the main storage device 500. The auxiliary storage device 400 is a RAM memory with a smaller storage capacity and faster access speed than the main storage device 500, and has the characteristics of being able to be shared by each CPU core (100, 200, 300). For example, in FIG. 4, the auxiliary storage device 400 has Bank-X 401 and Bank-Y 402, which are pre-logically partitioned RAM areas for access by App-A 101 to App-C 103, which are a group with a low functional safety level. The auxiliary storage device 400 also has Bank-M 404 and Bank-N 405, which are pre-logically partitioned RAM areas for access by App-D 201 to App-F 203, which are a group with a high functional safety level. The auxiliary storage device 400 also has a status storage unit 403, which is a logically partitioned RAM area for sharing the grouped various memory management information for memory access by the memory management unit 301.
[0054] The RAM area logically divided in advance on the auxiliary storage device 400 does not necessarily have to be divided into two groups, but may be further divided into groups according to the functional safety level of each application to be installed.
[0055] [control] In the control of this embodiment 2, as described in the flowcharts of Figures 2 and 3, App-A101 to App-F203 in CPU core A100 and CPU core B200 virtually access the RAM area required by each application in main memory device 500 via auxiliary memory device 400.
[0056] The control in the second embodiment differs from the control in the first embodiment in that, in steps S111 and S210, the target Bank in the auxiliary storage device 400 is switched according to the group based on the high or low functional safety level of the target App or the application scheduled to be started next. That is, for example, if the target App or the application scheduled to be started next is App-A101 (or App-B102 or App-C103) belonging to a group with a low functional safety level, Bank-X401 or Bank-Y402 is switched as the target Bank. Also, if the target App or the application scheduled to be started next is App-D201 (or App-E202 or App-F203) belonging to a group with a high functional safety level, Bank-M404 or Bank-N405 is switched as the target Bank.
[0057] This makes it possible to provide an automotive electronic control unit that supports functional safety, which allows applications to access large-capacity RAM without causing unnecessary waiting times for applications and realizes real-time vehicle control while using large-capacity RAM. Also, it makes it possible to provide a memory management device that supports functional safety, which allows applications to access large-capacity RAM without causing unnecessary waiting times for applications and realizes real-time control while using large-capacity RAM.
[0058] [Objectives and Supplementary Information] The first and second embodiments are primarily intended to be applied to systems or devices that require a control device (SoC or MCU) equipped with multiple applications and multiple CPU cores, such as automotive electronic control devices that require large RAM capacity and responsiveness, particularly autonomous driving systems and autonomous driving assistance systems.
[0059] Furthermore, the memory management unit 301 does not necessarily have to be installed in the CPU core C300, but may be installed in a CPU core (100, 200) on which another application is installed. In this case, however, the execution timing of the memory management unit 301 must be fully considered, including the scheduling of other applications installed on the same CPU core.
[0060] Furthermore, the auxiliary storage device 400 does not necessarily have to be configured as a single piece of hardware, but may be configured as multiple pieces of hardware. In this case, however, the design should be appropriate, taking into full consideration the characteristics of the storage device, such as access speed and RAM storage capacity.
[0061] Furthermore, the logically divided banks in the auxiliary storage device 400 are not necessarily limited to Bank-X 401 or Bank-Y 402 or Bank-X 401 to Bank-N 405, but multiple banks may be provided. Furthermore, each bank may be grouped not only for functional safety purposes but also for memory protection purposes. The size of each bank is to be appropriately designed according to the RAM storage capacity of the auxiliary storage device 400 and the RAM storage capacity used by each application.
[0062] Furthermore, the main memory device 500 does not necessarily have to be built into the SoC or MCU, but may be, for example, an external memory that is installed on the same mounting board as the SoC or MCU and connected to the SoC or MCU. Furthermore, the main memory device 500 does not necessarily have to be configured as a single piece of hardware, but may be configured as multiple pieces of hardware.
[0063] Furthermore, the RAM data transfer process in steps S205 and S206 does not necessarily have to be executed by the CPU core C300, and may be executed by using a peripheral function such as DMA (Direct Memory Access). [Explanation of symbols]
[0064] 000:SoC 100: CPU core A 101:App-A 102: App-B 103:App-C 104:OS-A 200: CPU core B 201:App-D 202:App-E 203:App-F 204:OS-B 300: CPU core C 301: Memory management unit 400:Auxiliary storage device 401:Bank-X 402:Bank-Y 403: State memory unit 404:Bank-M 405:Bank-N 500: Main memory 501:Bank-A 502:Bank-B 503:Bank-C 504:Bank-D 505:Bank-E 506:Bank-F.
Claims
1. An electronic control unit for an automobile having a control unit including a plurality of CPU cores for processing a plurality of applications requiring high responsiveness, a main memory having a relatively large storage capacity and a relatively slow access speed, and an auxiliary memory having a smaller storage capacity and a faster access speed than the main memory, All of the RAM data that each of the plurality of applications processes independently is pre-arranged in the main storage device, the auxiliary storage device has a plurality of logically divided storage areas, the plurality of applications includes a target application that is executed in accordance with an execution order of the plurality of applications based on a priority order method; An electronic control device for an automobile, characterized in that it is provided with a memory management unit that dynamically transfers the RAM data that the target application processes alone from the main memory device to one of the multiple memory areas of the auxiliary memory device before the target application is executed, thereby allowing the target application to quickly access the RAM data during execution.
2. 2. The electronic control device for an automobile according to claim 1, wherein the order of transfer of said RAM data between said auxiliary storage device and said main storage device is determined in accordance with the execution order of said plurality of applications.
3. The plurality of applications have a predetermined rule for the order of execution within a specific period, 2. The electronic control device for an automobile according to claim 1, wherein the rule is executed for each of the plurality of applications in accordance with the specific period.
4. In the auxiliary storage device, a functional safety level that is predetermined for each of the plurality of applications; the plurality of applications are grouped according to the functional safety level; the plurality of storage areas used by the plurality of applications are determined according to the grouping of the functional safety levels; 4. The electronic control device for an automobile according to claim 1, wherein the plurality of applications determine which storage area to access in accordance with the functional safety level.
5. A memory management device having a control device including a plurality of CPU cores that process a plurality of applications that require high responsiveness, a main memory device that has a relatively large storage capacity and a relatively slow access speed, and an auxiliary memory device that has a smaller storage capacity and a faster access speed than the main memory device, All of the RAM data that each of the plurality of applications processes independently is pre-arranged in the main storage device, the auxiliary storage device has a plurality of logically divided storage areas, the plurality of applications includes a target application that is executed in accordance with an execution order of the plurality of applications based on a priority order method; A memory management device characterized by having a memory management unit that dynamically transfers the RAM data that the target application processes alone from the main memory device to one of the multiple memory areas of the auxiliary memory device before the target application is executed, thereby allowing the target application to quickly access the RAM data during execution.
6. In the auxiliary storage device, a functional safety level that is predetermined for each of the plurality of applications; the plurality of applications are grouped according to the functional safety level; the plurality of storage areas used by the plurality of applications are determined according to the grouping of the functional safety levels; 6. The memory management device according to claim 5, wherein the plurality of applications determine the storage area to be accessed in accordance with the functional safety level.
Citation Information
Patent Citations
Memory managing device
JP1993053913A