Electro-optical device, display module, and electronic apparatus
The electro-optical device addresses the issue of temperature rise due to strong light by using a lattice-shaped configuration with high thermal conductivity insulating and conductive layers to dissipate heat, maintaining the liquid crystal layer's integrity and extending the device's lifespan.
Patent Information
- Application Number
- JP2024043240
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-19
- Publication Date
- 2025-10-02
AI Technical Summary
Strong light incident on electro-optical devices, particularly in projection display devices, increases the temperature of the liquid crystal layer, leading to changes in electro-optical response and deterioration, thereby shortening the device's lifespan.
The electro-optical device incorporates a first substrate, a second substrate with a liquid crystal layer in between, a first insulating layer, a second insulating layer with higher thermal conductivity, and a conductive layer between the pixel electrodes, facilitating heat dissipation through a lattice-shaped configuration.
This configuration effectively suppresses temperature rise in the liquid crystal layer, preventing changes in electro-optical response and deterioration, thereby extending the device's lifespan.
Smart Images

Figure 2025143801000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an electro-optical device, a display module, and an electronic device. [Background technology]
[0002] For example, in an electro-optical device using a liquid crystal element, a liquid crystal layer is sandwiched between a pair of substrates spaced apart by a certain gap. More specifically, pixel electrodes are arranged in a matrix on one substrate, the element substrate, and a common electrode is provided on the other substrate, the opposing substrate, so that the pixel electrodes and the common electrode are common to all pixels, and the liquid crystal layer is sandwiched between them. In such electro-optical devices, a technique is known in which an intermediate refractive index film is provided between the alignment film and the pixel electrode in order to prevent a decrease in light utilization efficiency (see, for example, the technique described in Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2022-62752 Summary of the Invention [Problem to be solved by the invention]
[0004] When an electro-optical device is applied to a projection display device or the like, strong light from a light source is incident on the electro-optical device. In particular, increasing the light utilization efficiency as in the above-mentioned technology means that strong light is incident on the electro-optical device. The incident light increases the temperature of various parts of the electro-optical device, particularly the liquid crystal layer. When the temperature of the liquid crystal layer increases, not only does the electro-optical response of the liquid crystal layer change, but the liquid crystal layer also deteriorates, resulting in a shortened lifespan of the electro-optical device. [Means for solving the problem]
[0005] In order to solve the above problem, an electro-optical device according to one embodiment of the present disclosure includes a first substrate, a second substrate opposite the first substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a first insulating layer provided between the first substrate and the liquid crystal layer, a first pixel electrode and a second pixel electrode provided between the first insulating layer and the liquid crystal layer, a second insulating layer provided in a region between the first pixel electrode and the second pixel electrode in a planar view and having a higher thermal conductivity than the first insulating layer, and a conductive layer provided in contact with the second insulating layer between the second insulating layer and the first substrate in a cross-sectional view in the region between the first pixel electrode and the second pixel electrode in a planar view. [Brief explanation of the drawings]
[0006] [Figure 1] FIG. 1 is a perspective view showing an electro-optical device according to an embodiment. [Figure 2] FIG. 1 is a cross-sectional view of an electro-optical device. [Figure 3] FIG. 2 is a cross-sectional view of the electro-optical device housed in a housing. [Figure 4] FIG. 1 is a block diagram showing a configuration of an electro-optical device. [Figure 5] FIG. 2 is a diagram illustrating a configuration of a pixel circuit in an electro-optical device. [Figure 6] 5A and 5B are diagrams illustrating the operation of the electro-optical device. [Figure 7] FIG. 2 is a partially enlarged plan view of an element substrate of the electro-optical device. [Figure 8] FIG. 2 is a partially enlarged cross-sectional view showing a main part of the electro-optical device. [Figure 9] FIG. 2 is a plan view showing a heat conduction path in the electro-optical device. [Figure 10] FIG. 2 is a cross-sectional view showing a heat conduction path in the electro-optical device. [Figure 11] 1 is a diagram showing a projection display device to which an electro-optical device according to an embodiment is applied; [Figure 12] FIG. 10 is a partially enlarged plan view of an element substrate of an electro-optical device according to a comparative example. [Figure 13]FIG. 10 is a partially enlarged cross-sectional view showing a main part of an electro-optical device according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION
[0007] Projection display devices according to embodiments will be described below with reference to the drawings. In each drawing, the dimensions and scale of each part are appropriately different from those of the actual device. The embodiments described below are preferred examples, and therefore various technically preferable limitations are applied. However, the scope of the present disclosure is not limited to these embodiments unless otherwise specified in the following description to the effect that the present disclosure is limited.
[0008] 1 is a perspective view showing a display module 1. The display module 1 includes an electro-optical device 100 according to an embodiment. The electro-optical device 100 is a transmissive liquid crystal panel used, for example, as a light valve in a projection display device. The electro-optical device 100 is housed in a frame-shaped housing 70 having a rectangular opening 71. The opening 71 is defined by an opening edge Ap1. Because the electro-optical device 100 is transmissive, another opening is provided in the housing 70 on the opposite side of the opening 71 relative to the electro-optical device 100. One end of an FPC board 82 is connected to the electro-optical device 100. FPC is an abbreviation for Flexible Printed Circuits. The other end of the FPC board 82 is provided with a plurality of terminals 84, which are connected to a higher-level circuit (not shown).
[0009] The display control circuit 20, which is a semiconductor chip, is mounted on the FPC board 82 by face-down bonding, and video data is supplied from a higher-level circuit in synchronization with a synchronization signal via multiple terminals 84. The video data defines the gradation of pixels in the image to be displayed, for example, in 8 bits.
[0010] In the drawing, the X direction is the longitudinal direction of the display area, that is, the direction in which the scanning lines extend, and the Y direction is the lateral direction of the display area, that is, the direction in which the data lines extend.
[0011] When the electro-optical device 100 is used as a light valve in a projection display device, transmitted images from three electro-optical devices 100 corresponding to the primary colors R (red), G (green), and B (blue) are synthesized to display a color image, as will be described later. Therefore, a pixel, which is the smallest unit of a color image, is expressed by additive color mixing of a red subpixel formed by an electro-optical device corresponding to R, a green subpixel formed by an electro-optical device corresponding to G, and a blue subpixel formed by an electro-optical device corresponding to B. However, when it is not necessary to specify the color of the red, green, and blue subpixels or when only brightness is an issue, there is no need to refer to them as subpixels. Therefore, in this description, the red, green, and blue subpixels will also be referred to simply as "pixels."
[0012] The synchronization signals include a vertical synchronization signal that instructs the pixels arranged in the display area to start vertical scanning, a horizontal synchronization signal that instructs the pixels to start horizontal scanning, and a clock signal that indicates the timing of one pixel of video data. The display control circuit 20 processes the video data and synchronization signals, and outputs data signals and control signals necessary for driving the electro-optical device 100. The data signals are analog signals obtained by converting the video data, and the control signals are signals for controlling vertical scanning and horizontal scanning in the electro-optical device 100. The display control circuit 20 may be provided in a higher-level circuit, rather than being mounted on the FPC board 82, and the video signal and control signal may be supplied via the terminals 84.
[0013] 2 is a cross-sectional view of the display region of the electro-optical device 100 taken along the X direction. As shown in the figure, the electro-optical device 100 is configured such that an element substrate 102 and an opposing substrate 104 are bonded together with a sealant 90 so that their electrode-carrying surfaces face each other while maintaining a certain gap between them, and a liquid crystal layer 60 is sandwiched in the gap.
[0014] A pixel electrode 126 is provided on the surface of the element substrate 102 facing the counter substrate 104. The pixel electrode 126 is provided by patterning a light-transmitting conductive layer such as ITO (Indium Tin Oxide). As will be described later, the pixel electrode 126 is patterned into a substantially square shape in a plan view. The pixel electrode 126 is connected to a drain node of a transistor, which will be described later, via a contact hole or wiring, which is not shown.
[0015] In this description, a plan view refers to viewing one of the element substrate 102 and the counter substrate 104 from the other substrate, and more specifically, a plan view of the element substrate 102 refers to viewing from the counter substrate 104. A cross-sectional view refers to viewing the substrate by cutting it along the direction perpendicular to the substrate surface.
[0016] In the display region, the pixel electrodes 126 are provided in the insulating layer 120 in areas other than the trenches Tr. In other words, in the display region, the insulating layer 120 in areas other than the pixel electrodes 126 is etched to form trenches Tr with a depth D. The insulating layer 120 is made of SiN, SiO2, or the like. As described above, the pixel electrodes 126 are substantially square in plan view and are arranged in a matrix in the X and Y directions. Therefore, in the display region, the trenches Tr have a lattice shape surrounding the pixel electrodes 126 in plan view. In addition, in regions other than the display region, the insulating layer 120 is etched to the same depth D as the trenches Tr.
[0017] A conductive layer 122 is provided at the bottom of the trench Tr in the insulating layer 120. The conductive layer 122 is made of, for example, a simple element such as Al or Cu, or an alloy containing these. Note that the conductive layer 122 is preferably not only conductive but also reflective. Because the thickness h of the conductive layer 122 is thinner than the depth D of the trench Tr, the trench Tr is not filled with the conductive layer 122 alone, and the upper surface of the conductive layer 122 is lower than the lower surface of the pixel electrode 126. As a result, the conductive layer 122 and the pixel electrode 126 are not in contact with each other.
[0018] The conductive layer 122 is a wiring layer that is not in contact with the pixel electrodes 126 but is located at a small distance. Therefore, when the potential of the conductive layer 122 fluctuates, the potential fluctuation propagates to the pixel electrodes 126 via parasitic capacitance, affecting the potential of the pixel electrodes 126 and reducing the display quality. For this reason, the conductive layer 122 is maintained at a constant potential via wiring (not shown). The potential is preferably at the ground level (zero voltage) because the conductive layer 122 comes into contact with the housing (described later).
[0019] The trenches Tr that are not filled with the conductive layer 122 are filled with an insulating layer 124. The insulating layer 124 is made of a material that has higher thermal conductivity than the insulating layer 120, such as AlN (aluminum nitride). In the display region, the trenches Tr are provided in a lattice shape surrounding the pixel electrodes 126 in a plan view, and therefore the conductive layer 122 and the insulating layer 124 are also provided in a lattice shape surrounding the pixel electrodes 126. In regions other than the display region, the conductive layer 122 and the insulating layer 124 are provided on top of the etched insulating layer 120, and extend to the side end faces of the element substrate 102. The surfaces of the pixel electrodes 126 and the insulating layer 124 are planarized by, for example, CMP (Chemical Mechanical Polishing). Furthermore, an alignment film for defining the initial alignment state of the liquid crystal layer 60 is provided on the surfaces of the insulating layer 124 and the pixel electrodes 126 that come into contact with the liquid crystal layer 60, but this is omitted in the drawing.
[0020] A microlens 142 is provided on the surface of the counter substrate 104 facing the element substrate 102. The microlens 142 is provided to collect incident light from the counter substrate 104 onto the pixel electrode 126. The insulating layer 144 covers the microlenses 142. The surface of the insulating layer 144 covering the microlenses 142 is planarized. A common electrode 146 is provided on the planarized insulating layer 144. The common electrode 146 is electrically connected to the element substrate 102 via conductive materials provided at the four corners of the sealing material 90, and a potential LCcom is applied to the common electrode 146. Furthermore, an alignment film is provided on the surface of the common electrode 146 that contacts the liquid crystal layer 60, but is omitted in the drawing.
[0021] 3 is a cross-sectional view of the electro-optical device 100 housed in the housing 70. The electro-optical device 100 is incorporated into a projection display device, which will be described later, while housed in the housing 70. Because the electro-optical device 100 is a transmissive liquid crystal panel, the housing 70 has two rectangular openings 71 and 72 that correspond to the display area. The opening 71 is defined by an opening edge Ap1 and is located on the light incident side, and the opening 72 is defined by an opening edge Ap2 and is located on the light exit side.
[0022] The housing 70 is made of, for example, aluminum (Al), which has high heat dissipation properties. The housing 70 is provided with a protrusion 76. When the electro-optical device 100 is housed in the housing 70, the protrusion 76 comes into contact with the conductive layer 122 and the insulating layer 124 of the electro-optical device 100, as shown in the figure. Therefore, the conductive layer 122 has the same potential as the housing 70.
[0023] Note that the example shown in the figure is one in which the protrusion 76 directly contacts the conductive layer 122 and the insulating layer 124, but this configuration is not limited to this, and the protrusion 76 may also be configured to indirectly contact the conductive layer 122 and the insulating layer 124 via grease that has thermal conductivity and electrical conductivity. In the illustrated example, the housing 70 is made up of two pieces, for example, an incident-side piece 70a and an exit-side piece 70b, and the electro-optical device 100 is housed by being sandwiched between the pieces 70a and 70b.
[0024] The housing 70 may be provided with fins or a heat sink to promote heat dissipation, and the housing 70 may be further cooled by a fan.
[0025] 4 is a block diagram showing the electrical configuration of the display module 1. The display module 1 includes the electro-optical device 100 and a display control circuit 20 described above.
[0026] The display area of the electro-optical device 100 is an area in which pixel circuits 50 corresponding to the pixels of the image to be displayed are arranged in a matrix. More specifically, in the display area 10, m scanning lines 12 are provided extending horizontally in the figure, and n columns of data lines 14 are provided extending vertically in the figure, and are electrically insulated from the scanning lines 12. Pixel circuits 50 are provided at intersections of the m scanning lines 12 and the n data lines 14. Therefore, in this embodiment, the pixel circuits 50 are arranged in a matrix of m rows and n columns.
[0027] Here, m is an integer of 2 or more, and n is an integer of 2 or more. In this embodiment, m <nとしている。 An integer i between 1 and m is used to generally describe the rows of the scanning lines 12 and the rows in the matrix-arranged pixel circuits 50. For example, the scanning lines 12 may be referred to as rows 1, 2, 3, ..., (i-1), i, ..., (m-1), and m from top to bottom in the figure. Similarly, an integer j between 1 and n is used to generally describe the columns of data lines 14 and the columns in the matrix-arranged pixel circuits 50. For example, to distinguish the data lines 14, they may be referred to as 1, 2, 3, ..., j, ..., (n-1), nth column in order from the left in the drawing. For convenience of explanation, the configuration of the pixel circuit 50 will be described.
[0028] FIG. 5 is a diagram showing an equivalent circuit of four pixel circuits 50 (2×2) corresponding to the intersections of two adjacent scanning lines 12 and two adjacent data lines 14. As shown in the figure, the pixel circuit 50 includes a transistor 130 and a liquid crystal element 55. The transistor 130 is, for example, an N-channel thin film transistor. In the pixel circuit 50, the gate node of the transistor 130 is connected to the scan line 12, the source node thereof is connected to the data line 14, and the drain node thereof is connected to the pixel electrode 126.
[0029] In this description, "connection" means a direct or indirect connection or coupling between two or more elements, and includes, for example, coupling between two or more elements in a semiconductor substrate through different wiring layers and contact holes, even if the elements are not directly connected to each other.
[0030] A common electrode 146 is provided on the counter substrate 104 in common to all pixels so as to face the pixel electrode 126. The common electrode 146 is maintained at a substantially constant potential LCcom over time. A liquid crystal layer 60 is sandwiched between the pixel electrode 126 and the common electrode 146. Therefore, for each pixel circuit 50, a liquid crystal element 55 is formed by the pixel electrode 126, the common electrode 146, and the liquid crystal layer 60. Furthermore, a storage capacitor 135 is provided electrically in parallel with the liquid crystal element 55. One end of the storage capacitor 135 is connected to the pixel electrode 126, and the other end is connected to a capacitance line 107. The capacitance line 107 is maintained at a constant potential over time, for example, the same potential LCcom as that of the common electrode 146.
[0031] Returning to the explanation of Figure 4, the display control circuit 20 processes the video data and synchronization signals supplied from the higher-level circuit, supplies control signals to the scanning line drive circuit 30, and supplies control signals and data signals to the data signal output circuit 40.
[0032] The scanning line driving circuits 30 are provided on the outside of two sides of the display area 10 along the Y direction, respectively, and supply scanning signals from both ends of the scanning lines 12. The reason for this configuration is that the effect of delay in the scanning signals on the display can be reduced compared to when the scanning signals are supplied from only one end.
[0033] The display control circuit 20 supplies data signals of potentials corresponding to the grayscale levels of the n columns of the scanning lines 12 selected by the scanning line driving circuit 30 to the data signal output circuit 40 in a time-division manner. The data signal output circuit 40 is provided on the outer side of the side of the display area 10 along the X direction, on the side to which the FPC board 82 is connected. The data signal output circuit 40 demultiplexes the data signals supplied from the display control circuit 20 and distributes them to the corresponding data lines 14.
[0034] FIG. 6 is a timing chart showing the operation of the electro-optical device 100. As shown in FIG. In the electro-optical device 100, m scanning lines 12 are scanned one by one in the order of 1, 2, 3, . . . (i-1), i, . . . , (m-1), m-th row during one frame (V) period. Here, the scanning signals supplied to the 1st, 2nd, 3rd, ..., (i-1), i, ..., (m-1), and mth scanning lines 12 are expressed in order as Gwr(1), Gwr(2), ..., Gwr(i-1), Gwr(i), ..., Gwr(m-1), and Gwr(m). The scanning signals Gwr(1) to Gwr(m) are sequentially and exclusively set to H level by the scanning line driving circuit 30 for each horizontal scanning period (H).
[0035] In this embodiment, the periods during which adjacent scanning signals Gwr(1) to Gwr(m) are at H level are separated in time. Specifically, after scanning signal Gwr(i-1) changes from H level to L level, the next scanning signal Gwr(i) becomes H level after a period. This period corresponds to the horizontal blanking interval. Note that the L level of scanning signals Gwr(1) to Gwr(m) is the ground level with zero voltage.
[0036] In this description, the period of one frame (V) refers to the period required to display one frame of an image specified by video data supplied from a higher-level circuit. If the length of the period of one frame (V) is the same as the vertical synchronization period, for example, if the frequency of the vertical synchronization signal included in the synchronization signal Sync is 60 Hz, it is 16.7 milliseconds, which corresponds to one cycle of the vertical synchronization signal. Furthermore, the horizontal scanning period (H) is the time interval during which the scanning signals Gwr(1) to Gwr(m) sequentially go to H level, but for convenience in the figure, the start timing of the horizontal scanning period (H) is shown to be approximately the center of the horizontal blanking period.
[0037] When one of the scanning signals Gwr(1) to Gwr(m), for example the scanning signal Gwr(i) for the ith row, goes high, the transistor 130 of the pixel circuit 50 located in the ith row is turned on. As a result, in the pixel circuit 50, one end of the liquid crystal element 55 and one end of the storage capacitor 135 are electrically connected to the corresponding data line 14. In the case of the pixel circuit 50 located in the ith row and jth column, one end of the liquid crystal element 55 and one end of the storage capacitor 135 in the pixel circuit 50 are electrically connected to the jth column data line 14.
[0038] In this description, the "on state" of a transistor means that the source node and drain node of the transistor are electrically closed, resulting in a low impedance state, and the "off state" of a transistor means that the source node and drain node are electrically open, resulting in a high impedance state.
[0039] During the period when the scanning signal Gwr(i) is at H level, the display control circuit 20 outputs data signals in a time-division manner, the data signals having potentials corresponding to the grayscale levels of the pixels in the i-th row and 1st to nth columns and corresponding to the write polarity. The data signal output circuit 40 sequentially distributes the data signals of the 1st to nth columns to the 1st to nth columns of data lines 14. For example, during a period in which the scanning signal Gwr(i) is at H level, the data signal output circuit 40 distributes a data signal corresponding to the pixel circuit 50 in the i-th row and j-th column to the j-th column of data line 14.
[0040] The data signal supplied to the j-th data line 14 is applied to one end of the liquid crystal element 55 and one end of the storage capacitor 135 in the pixel circuit 50 in the ith row and jth column. The data signal applied to one end of the liquid crystal element 55 is held by the capacitance of the liquid crystal element 55 and the storage capacitor 135 even after the horizontal scanning period for the ith row ends, the scanning signal Gwr(i) goes to L level, and the transistor 130 in the ith row and jth column turns off.
[0041] As is well known, in the liquid crystal element 55, the orientation of the liquid crystal molecules changes in response to the electric field generated by the pixel electrode 126 and the common electrode 146. Therefore, the liquid crystal element 55 has a transmittance that corresponds to the effective value of the applied voltage. In this embodiment, the transmittance is minimum when the voltage applied to the liquid crystal element 55 is zero, and the transmittance increases as the applied voltage increases, in a normally black mode.
[0042] During the period when the scanning signal Gwr(i) is at H level, the data signal supplied to the j-th data line 14 has a potential corresponding to the gradation of the i-th row and j-th column, and a potential corresponding to the write polarity. When driving the liquid crystal element 55, AC driving is required to prevent deterioration of the liquid crystal layer 60. For this reason, a positive potential higher than the potential LCcom of the common electrode 146 and a negative potential lower than the potential LCcom of the common electrode 146 are alternately applied to the pixel electrode 126, for example, every period of one frame (V).
[0043] The range that the positive polarity potential can take is indicated by Rng(+). The range Rng(+) is, for example, from the potential Vwt(+) when the gradation is at its highest value to the potential Vbk(+) when the gradation is at its lowest value. The range that the negative polarity potential can take is indicated by Rng(-). The range Rng(-) is, for example, from the potential Vwt(-) when the gradation is at its highest value to the potential Vbk(-) when the gradation is at its lowest value.
[0044] Here, the jth column in the horizontal scanning period of the i-th row has been described, but the same operation is performed in the first to n-th columns in the same way. Although the horizontal scanning period for the i-th row has been described, similar operations are performed for the 1st, 2nd, 3rd, ..., and mth rows in that order. When horizontal scanning for the mth row is completed, the next frame period begins, and horizontal scanning starts again from the 1st row. During the next frame period, the display control circuit 20 inverts the potential polarity of the data signal.
[0045] Next, before describing how the temperature rise in the liquid crystal layer 60 is suppressed in the electro-optical device 100 according to the embodiment, an electro-optical device according to a comparative example will be described.
[0046] Fig. 12 is a partially enlarged plan view of an electro-optical device according to a comparative example, particularly the periphery of a pixel electrode, and Fig. 13 is a partially enlarged cross-sectional view of the electro-optical device according to the comparative example, particularly showing the incident path of light. In the comparative example, the pixel electrodes are substantially square in plan view, and are arranged in a matrix along the X and Y directions, similar to the embodiment. Here, adjacent pixel electrodes are designated by the symbols 126a and 126b to distinguish them from each other. In the comparative example, unlike the embodiment, no trench Tr is provided in the insulating layer 120, and no trench is provided in the insulating layer 124. That is, in the comparative example, only the underlying insulating layer 120 is exposed in the region between the pixel electrodes 126a and 126b adjacent to each other in plan view.
[0047] 13, light incident from above, specifically from the surface of the counter substrate 104 opposite to the surface facing the element substrate 102, is collected by the microlens 142 onto the pixel electrode 126a as indicated by the arrows. Although not shown in the figure, the light is also collected onto the pixel electrode 126b. The pixel electrodes 126a and 126b generate heat due to the light collection, and some of the heat is transferred to the insulating layer 120 and the liquid crystal layer 60. This causes the temperature of the liquid crystal layer 60 to rise. Therefore, in the comparative example, not only does the electro-optical response of the liquid crystal layer 60 change, but the liquid crystal layer 60 also deteriorates, resulting in a shortened lifespan. Next, how the temperature rise in the liquid crystal layer 60 in the electro-optical device 100 according to this embodiment is suppressed will be described.
[0048] Figure 7 is a partially enlarged plan view of the electro-optical device 100 according to the embodiment, particularly the periphery of the pixel electrode, and Figure 8 is a partially enlarged cross-sectional view of the electro-optical device 100, particularly showing the path of incident light. In contrast to the comparative example, in the electro-optical device 100 according to this embodiment, the region between the pixel electrodes 126a and 126b adjacent to each other in plan view is filled with an insulating layer 124. A conductive layer 122 is provided below the insulating layer 124.
[0049] 8, light incident from above is collected onto pixel electrode 126a as indicated by the arrow in the figure by microlens 142. Although not shown in FIG. 8, light is also collected onto pixel electrode 126b by microlens 142. Furthermore, in a configuration in which the conductive layer 122 is reflective, as shown in the figure, light incident on the area between the pixel electrodes 126a and 126b is reflected by the conductive layer 122, which is expected to reduce the temperature rise of the liquid crystal layer 60.
[0050] FIG. 9 is a plan view showing heat dissipation in the pixel electrode 126, and FIG. 10 is a cross-sectional view showing heat dissipation in the pixel electrode 126. As shown in FIG. The pixel electrodes 126a and 126b generate heat due to the light collection, and the heat propagates to the insulating layer 124, which has high thermal conductivity and surrounds the pixel electrodes 126a and 126b in a planar view, as shown by the arrows. The heat propagated to the insulating layer 124 also propagates to the conductive layer 122. The conductive layer 122 and the insulating layer 124 extend to the side end surfaces of the element substrate 102 and contact the housing 70, thereby efficiently dissipating heat. This suppresses heat generation in the pixel electrodes 126a and 126b, reducing the temperature rise in the liquid crystal layer 60. Therefore, according to this embodiment, changes in the electro-optical response of the liquid crystal layer 60 and deterioration of the liquid crystal layer are suppressed, and the lifespan is not shortened.
[0051] In this description, the element substrate 102 is an example of a "first substrate," the opposing substrate 104 is an example of a "second substrate," the insulating layer 120 is an example of a "first insulating layer," and the insulating layer 124 is an example of a "second insulating layer." Also, the pixel electrode 126a is an example of a "first pixel electrode," and the pixel electrode 126b is an example of a "second pixel electrode."
[0052] Next, a projection display device will be described as an example of an electronic device to which the electro-optical device 100 according to the embodiment is applied.
[0053] 11 is a diagram showing the optical configuration of a projection display device 200. As shown in the figure, the projection display device 200 includes electro-optical devices 100R, 100G, and 100B. The electro-optical devices 100R, 100G, and 100B are incorporated into the projection display device 200 while being housed in the housing 70, but since the figure shows the optical configuration, the explanation will be focused on the electro-optical devices 100R, 100G, and 100B.
[0054] A lamp unit 2102 consisting of a white light source such as a halogen lamp or an LED is provided inside the projection display device 200. Light emitted from the lamp unit 2102 is separated into three primary colors, red (R), green (G), and blue (B), by three mirrors 2106 and two dichroic mirrors 2108 arranged inside. Of these, the R light enters the electro-optical device 100R, the G light enters the electro-optical device 100G, and the B light enters the electro-optical device 100B. Since the optical path of B is longer than the optical paths of R and G, it is necessary to prevent loss in the optical path of B. For this reason, a relay lens system 2121 consisting of an input lens 2122, a relay lens 2123, and an output lens 2124 is provided in the optical path of B.
[0055] The electro-optical devices 100R, 100G, and 100B are common to the electro-optical device 100 according to the embodiment, but because the colors of the incident light are different, they are distinguished by symbols for convenience. The liquid crystal elements of the electro-optical device 100R are driven based on a data signal corresponding to R supplied from a higher-level circuit, and have a transmittance that corresponds to the voltage of the data signal. Therefore, in the electro-optical device 100R, an R transmission image is generated by individually controlling the transmittance of the liquid crystal elements. Similarly, in the electro-optical device 100G, a G transmission image is generated based on a data signal corresponding to G, and in the electro-optical device 100B, a B transmission image is generated based on a data signal corresponding to B.
[0056] The transmitted images of each color generated by the electro-optical devices 100R, 100G, and 100B are incident on the dichroic prism 2112 from three directions. In the dichroic prism 2112, the R and B light are refracted at 90 degrees, while the G light travels straight. Therefore, the dichroic prism 2112 combines the images of each color. The combined image formed by the dichroic prism 2112 is incident on the projection lens 2114. The projection lens 2114 enlarges and projects the combined image onto the screen Scr.
[0057] The transmission images of the electro-optical devices 100R and 100B are projected after being reflected by the dichroic prism 2112, whereas the transmission image of the electro-optical device 100G is projected in a straight line. Therefore, the transmission images of the electro-optical devices 100R and 100B are left-right inverted relative to the transmission image of the electro-optical device 100G.
[0058] Furthermore, although a projection display device 200 has been used as an example of an electronic device here, the present invention is not limited to this and can also be applied to, for example, the display panel of a head-mounted display, an electronic viewfinder in a video camera or a digital camera with interchangeable lenses, a personal digital assistant, a display part of a wristwatch, and the like.
[0059] From the above-described exemplary embodiments, the following embodiments can be understood: Note that, in order to facilitate understanding of each embodiment, reference numerals in the drawings are written in parentheses for convenience, but this is not intended to limit the embodiments to those shown in the drawings.
[0060] In order to solve the above problem, an electro-optical device (100) according to one aspect of the present disclosure includes a first substrate (102), a second substrate (104) facing the first substrate (102), a liquid crystal layer (60) disposed between the first substrate (102) and the second substrate (104), a first insulating layer (120) provided between the first substrate (102) and the liquid crystal layer (60), and a first pixel electrode (126a) and a second pixel electrode (126b) provided between the first insulating layer (120) and the liquid crystal layer (60). (126b), a second insulating layer (124) provided in a region between the first pixel electrode (126a) and the second pixel electrode (126b) in a planar view and having a thermal conductivity higher than that of the first insulating layer (120), and a conductive layer (122) provided in contact with the second insulating layer (124) between the first pixel electrode (126a) and the second pixel electrode (126b) in a cross-sectional view and between the second insulating layer (124) and the first substrate (102).
[0061] According to the first aspect, heat generated in the first pixel electrode and the second pixel electrode is conducted to the second insulating layer and the conductive layer, thereby making it possible to suppress a rise in the temperature of the liquid crystal layer.
[0062] In the electro-optical device (100) according to a specific aspect 2 of aspect 1, the second insulating layer (124) is made of AlN.
[0063] In the electro-optical device (100) according to another specific aspect 3 of aspect 1, the conductive layer (122) contains Al or Cu.
[0064] In an electro-optical device (100) according to a fourth specific aspect of the first aspect, the conductive layer (122) and the second insulating layer (124) are lattice-shaped in plan view.
[0065] In the electro-optical device (100) according to another specific aspect 5 of aspect 1, a constant potential is applied to the conductive layer (122).
[0066] In the electro-optical device (100) according to a sixth specific aspect of the fifth aspect, the conductive layer (122) is grounded.
[0067] In an electro-optical device (100) relating to a specific alternative embodiment 7 of embodiment 1, the conductive layer (122) is provided at the bottom of a trench (Tr) in the second insulating layer (120), and the depth (D) of the trench (Tr) is greater than the thickness (h) of the conductive layer (122).
[0068] The display module (1) of aspect 8 includes an electro-optical device (10) of any one of aspects 1 to 7 and a housing (70) that houses the electro-optical device (10), and the conductive layer (122) and the second insulating layer (124) are in contact with the housing (70).
[0069] The electronic device (200) according to the ninth aspect includes the display module (1) according to the eighth aspect. [Explanation of symbols]
[0070] 1...display module, 12...scanning line, 14...data line, 20...display control circuit, 50...pixel circuit, 60...liquid crystal layer, 70...casing, 102...element substrate, 104...opposing substrate, 120, 124...insulating layer, 122...conductive layer, 126...pixel electrode, 200...projection display device
Claims
1. a first substrate; a second substrate facing the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate; a first insulating layer provided between the first substrate and the liquid crystal layer; a first pixel electrode and a second pixel electrode provided between the first insulating layer and the liquid crystal layer; a second insulating layer provided in a region between the first pixel electrode and the second pixel electrode in a plan view and having a thermal conductivity higher than that of the first insulating layer; a conductive layer provided in contact with the second insulating layer between the second insulating layer and the first substrate in a cross-sectional view in a region between the first pixel electrode and the second pixel electrode in a plan view; An electro-optical device having:
2. The second insulating layer is made of AlN. The electro-optical device according to claim 1 .
3. The conductive layer contains Al or Cu. The electro-optical device according to claim 1 .
4. The conductive layer and the second insulating layer have a lattice shape in a plan view. The electro-optical device according to claim 1 .
5. A constant potential is applied to the conductive layer. The electro-optical device according to claim 1 .
6. The conductive layer is grounded The electro-optical device according to claim 5 .
7. The conductive layer is a second insulating layer at the bottom of the trench; The depth of the trench is greater than the thickness of the conductive layer. The electro-optical device according to claim 1 .
8. an electro-optical device according to any one of claims 1 to 7; a housing that houses the electro-optical device; Including, The conductive layer and the second insulating layer are in contact with the housing. Display module.
9. An electronic device comprising the display module according to claim 8.
Citation Information
Patent Citations
Liquid crystal device, method for manufacturing liquid crystal device, and electronic apparatus
JP2022062752A