Substrate processing method, semiconductor device manufacturing method, processing apparatus and program

Abstract

To provide a semiconductor device manufacturing method, a semiconductor device, a substrate processing apparatus, and a program that suppress the generation of voids when embedding an underfill material between a substrate and a semiconductor chip.SOLUTION: A manufacturing method of a semiconductor device 101 includes a step A of forming microbumps 14 on a first surface of a substrate 10 on the bonding side with a semiconductor chip 12 and on a second surface of the semiconductor chip 12 on the bonding side with the substrate 10 when bonding the semiconductor chip 12 onto the substrate 10, a step B of forming an insulating film 16 on the first surface, the second surface, and the microbumps 14, a step C of removing the insulating film 16 formed on the connection surfaces of the microbumps 14, a step D of bonding the connection surfaces of the microbumps 14 on the first surface and the second surface, and a step E of filling an underfill material between the substrate 10 and the semiconductor chip 12 bonded by the microbumps 14 to form an underfill film 18.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device manufacturing method, a semiconductor device, a substrate processing apparatus, and a program. [Background technology]

[0002] BACKGROUND ART One step in the manufacturing process of a semiconductor device is to supply a processing gas to a substrate in a processing chamber to form a film on the substrate (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2022 / 064586 Summary of the Invention [Problem to be solved by the invention]

[0004] Voids may occur during one step in the manufacturing process of a semiconductor device, in which an underfill material is filled between a substrate and a semiconductor chip.

[0005] The present disclosure provides a technique that can suppress the occurrence of voids when an underfill material is embedded between a substrate and a semiconductor chip. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, When bonding a semiconductor chip onto a substrate, forming microbumps on a first surface of the substrate on a bonding side with the semiconductor chip; forming microbumps on a second surface of the semiconductor chip on a bonding surface side with the substrate; forming an insulating film on the first surface, the second surface, and the microbumps; removing the insulating film formed on the connection surfaces of the microbumps; bonding connecting surfaces of the microbumps on the first surface and the second surface; The present invention provides a technique having: [Effects of the Invention]

[0007] According to the present disclosure, it is possible to suppress the occurrence of voids when filling an underfill material between a substrate and a semiconductor chip. [Brief explanation of the drawings]

[0008] [Figure 1] 1(A) to 1(E) are conceptual diagrams illustrating a step in the manufacturing process of a semiconductor device according to one embodiment of the present disclosure. [Figure 2] FIG. 2 is a schematic configuration diagram of a substrate processing apparatus used in an insulating film forming process according to one embodiment of the present disclosure. [Figure 3] FIG. 3 is a block diagram illustrating a control configuration of a substrate processing apparatus used in an insulating film forming process according to one embodiment of the present disclosure. [Figure 4] FIG. 4 is a flowchart showing an example of an insulating film forming step according to one embodiment of the present disclosure. [Figure 5] 5(A) to 5(D) are conceptual diagrams illustrating one step in the manufacturing process of the semiconductor device according to the second embodiment of the present disclosure. [Figure 6] 6(A) to 6(D) are conceptual diagrams illustrating one step in the manufacturing process of the semiconductor device according to the third embodiment of the present disclosure. [Figure 7] 7(A) to 7(D) are conceptual diagrams illustrating one step in the manufacturing process of the semiconductor device according to the fourth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, one embodiment of the present disclosure will be described mainly with reference to FIGS. 1 to 7. It should be noted that the drawings used in the following description are all schematic, and the dimensional relationships, ratios, etc. of the elements shown in the drawings do not necessarily correspond to the actual ones. Furthermore, the dimensional relationships, ratios, etc. of the elements between the multiple drawings do not necessarily correspond to the actual ones. Furthermore, substantially identical elements between multiple drawings are denoted by the same reference numerals, and each element is described in the drawing in which it first appears, and its description is omitted in subsequent drawings unless particularly necessary. Furthermore, the present disclosure is not limited to the following embodiments, and can be implemented with appropriate modifications within the scope of the present disclosure.

[0010] (1) Semiconductor device manufacturing process

[0011] First, one step in the manufacturing process of a semiconductor device 101 according to one aspect of the present disclosure will be described in detail with reference to FIGS. 1(A) to 1(E).

[0012] (Microbump formation process, step S1) As shown in FIG. 1A, microbumps 14 are provided (also referred to as formed) on the surface of the substrate 10 that is bonded to the semiconductor chip 12 (hereinafter referred to as the surface or first surface of the substrate 10) and the surface of the semiconductor chip 12 that is bonded to the substrate 10 (hereinafter referred to as the surface or second surface of the semiconductor chip 12). Although not shown, the surfaces of the substrate 10 and the semiconductor chip 12 are each formed with multiple types of films, such as insulating films and metal films, and further have elements and other components mounted thereon, resulting in different surface materials on the first and second surfaces. Microbumps 14 are provided on the surface of the substrate 10 at the same spacing as the microbumps 14 on the surface of the semiconductor chip 12 to be bonded, and at positions corresponding to the microbumps 14 on the surface of the semiconductor chip 12. The microbumps 14 are made of, for example, a tin (Sn)-containing alloy, a silver (Ag)-containing alloy, an AgSn alloy, or the like. Here, the surface of the substrate 10 that is bonded to the semiconductor chip 12 is also referred to as the first surface. The first surface includes at least the surface of the substrate, but is not limited to this, and may include at least any surface of multiple types of films and elements, such as insulating films and metal films, that exist on the surface of the substrate. The surface of the semiconductor chip 12 that is bonded to the substrate 10 is also called the second surface. The second surface includes at least the surface of the semiconductor chip 12, but is not limited to this, and may include at least any surface of multiple types of films and elements, such as insulating films and metal films, that exist on the surface of the semiconductor chip 12.

[0013] (Insulating film formation process, step S2) 1(B), for example, using a substrate processing apparatus 100 described later, an insulating film 16 is formed on the first surface, the second surface, and the microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor chip 12, respectively, on which the microbumps 14 are provided, by a film formation method such as ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition). The thickness of the insulating film 16 formed in this process is 50 nm or less. The insulating film 16 formed in this process is a film that can be formed on insulating films, metal films, microbumps 14, etc. on the surface of the substrate 10 and the surface of the semiconductor chip 12.

[0014] (Insulating film removal process, step S3) Next, as shown in FIG. 1(C), the insulating film 16 formed on the top portions of the microbumps 14, which serve as the connection surfaces of the microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor chip 12, is removed to expose the top portions of the microbumps 14. The insulating film 16 formed on the top portions of the microbumps 14 is removed by CMP (Chemical Mechanical Polishing). This process is not limited to CMP; the insulating film 16 formed on the top portions of the microbumps 14 may also be removed by dry etching. Dry etching is performed, for example, by forming a resist on the portions of the microbumps 14 excluding the top portions, and then removing the insulating film 16 formed on the top portions where no resist is formed.

[0015] (Bonding process, step S4) 1(D), the connecting surfaces of the microbumps 14 on the first and second surfaces, i.e., the tops of the microbumps 14 on the substrate 10 and the tops of the microbumps 14 on the semiconductor chip 12, are bonded together. At this time, an insulating film 16 is formed on the surface of the substrate 10 that is bonded to the semiconductor chip 12, the surface of the semiconductor chip 12 that is bonded to the substrate 10, and the exposed surfaces of the microbumps 14 that will be filled with an underfill material.

[0016] (Underfill film formation process, step S5) 1(E), an insulating film 16 is formed on the exposed surface where the underfill material will be embedded, and the underfill material is embedded between the substrate 10 and the semiconductor chip 12, which are joined by the microbumps 14, to form an underfill film 18. The underfill material is, for example, a resin. For example, an epoxy resin is used as the resin.

[0017] As a result of the above, the surfaces of the substrate 10 and the semiconductor chip 12 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 and the surfaces of the microbumps 14 are covered with the insulating film 16, and a semiconductor device 101 is formed in which the surface of the insulating film 16 is filled with an underfill film 18.

[0018] Here, when an underfill material is embedded between the substrate 10 and the semiconductor chip 12 while they are bonded with the microbumps 14, voids resulting in insufficient embedding may occur. This is thought to be due to the presence of multiple components on the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14, i.e., the exposed surfaces where the underfill material is embedded. When attempting to embed the underfill material, these multiple components become obstacles, making it difficult to embed the underfill material uniformly. This may result in differences in the wettability of the underfill material. These phenomena are thought to become more pronounced as the pitch between the substrate 10 and the semiconductor chip 12 where the underfill material is embedded becomes finer. In the present disclosure, before embedding the underfill material, an insulating film 16 is formed on the surfaces where the underfill material is embedded, i.e., the exposed surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14. This ensures that at least the surfaces where the underfill material is embedded are covered with an insulating film, allowing the underfill material to be uniformly applied. Therefore, it is possible to prevent differences in wettability between the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14, and to suppress the occurrence of voids when filling with underfill material. As a result, the strength, heat dissipation, etc. of the semiconductor device 101 can be increased, and an increase in electrical resistance can be suppressed, thereby improving the durability, electrical characteristics, etc. of the semiconductor device 101.

[0019] (2) Configuration of the substrate processing equipment 2 is a configuration diagram showing an example of a substrate processing apparatus 100 used in the insulating film forming process of step S2 described above. Note that the substrate processing apparatus 100 can process the substrate 10 and the semiconductor chip 12 separately or simultaneously in the process of forming insulating films on the surfaces of the substrate 10 and the semiconductor chip 12 described above. The following description will be given using the case where the substrate 10 is processed.

[0020] The substrate processing apparatus 100 includes a container 202. Within the container 202, there are formed a processing space 205 for processing the substrate 10, and a transfer space 206 through which the substrate 10 passes when being transferred to the processing space 205. The container 202 is composed of an upper container 202a and a lower container 202b. A partition plate 208 is provided between the upper container 202a and the lower container 202b.

[0021] A substrate loading / unloading port 148 adjacent to a gate valve 149 is provided on the side of the lower vessel 202b, and the substrate 10 is transferred to and from a transfer chamber (not shown) through the substrate loading / unloading port 148. A plurality of lift pins 207 are provided on the bottom of the lower vessel 202b. Furthermore, the lower vessel 202b is grounded.

[0022] A substrate support part 210 that supports the substrate 10 is disposed in the processing space 205. The substrate support part 210 mainly includes a substrate mounting surface 211 on which the substrate 10 is placed, a substrate mounting table 212 having the substrate mounting surface 211 on its surface, and a heater 213 as a heating part provided within the substrate mounting table 212. The substrate mounting table 212 is provided with through holes 214, through which the lift pins 207 pass, at positions corresponding to the lift pins 207.

[0023] The substrate mounting table 212 is supported by a shaft 217. The shaft 217 passes through the bottom of the container 202 and is connected to an elevating mechanism 218 outside the container 202.

[0024] The substrate mounting table 212 is configured to be able to raise and lower the substrate 10 placed on the substrate mounting surface 211 by operating the lifting mechanism 218 to raise and lower the shaft 217 and the substrate mounting table 212. The lower end of the shaft 217 is surrounded by a bellows 219, which keeps the processing space 205 airtight.

[0025] When transporting the substrate 10, the substrate mounting table 212 is lowered to a position where the substrate mounting surface 211 faces the substrate loading / unloading port 148, and when processing the substrate 10, it is raised until the substrate 10 is at a processing position within the processing space 205, as shown in Figure 1.

[0026] A shower head 230 serving as a gas dispersion mechanism is provided above (upstream of) the processing space 205. A through-hole 231a is provided in a lid 231 of the shower head 230. The through-hole 231a communicates with a common gas supply pipe 242, which will be described later. A buffer chamber 232a having a buffer space 232 therein is provided within the shower head 230. Gas is supplied to the processing space 205 via the buffer space 232.

[0027] A rectifying plate 270 is provided in the buffer space 232. The rectifying plate 270 has a conical shape that widens in diameter from the gas inlet 241 toward the radial direction of the substrate 10. The lower end of the edge of the rectifying plate 270 is configured to be located closer to the outer periphery than the end of the substrate 10. The rectifying plate 270 is configured to efficiently move the supplied gas toward the dispersion plate 234, which will be described later.

[0028] The upper vessel 202a has a flange, and a support block 233 is placed on and fixed to the flange. A dispersion plate 234 having a plurality of gas supply holes formed therein is placed on and fixed to the support block 233. Furthermore, the lid 231 is fixed to the top surface of the support block 233.

[0029] Next, a description will be given of the gas supply system 240 serving as a gas supply unit. A first gas supply pipe 243a, a second gas supply pipe 244a, a third gas supply pipe 245a, and a fourth gas supply pipe 248a are connected to a common gas supply pipe 242.

[0030] The first gas supply pipe 243a is provided with, in order from the upstream direction, a first gas source 243b, a mass flow controller (MFC) 243c which is a flow rate controller (flow rate control part), and a valve 243d which is an on-off valve.

[0031] The first gas source 243b is a supply source of a source gas, which is one of the process gases.

[0032] The first gas supply pipe 243a, the MFC 243c, and the valve 243d mainly constitute a first gas supply system 243 (also referred to as a source gas supply system or a silicon-containing gas supply system). The first gas supply system 243 may include a first gas source 243b.

[0033] The second gas supply pipe 244a is provided with a second gas source 244b, an MFC 244c, and a valve 244d in this order from the upstream direction.

[0034] The second gas source 244b supplies a reactive gas that reacts with the source gas. The reactive gas is one of the process gases.

[0035] The second gas supply pipe 244a, the MFC 244c, and the valve 244d mainly constitute a second gas supply system 244 (also referred to as a reactive gas supply system, an oxidizing gas supply system, or an oxygen-containing gas supply system). The second gas supply system 244 may also include a second gas source 244b.

[0036] The third gas supply pipe 245a is provided with a third gas source 245b, an MFC 245c, and a valve 245d in this order from the upstream direction.

[0037] The third gas source 245b is a source of reducing gas, which is one of the process gases.

[0038] The third gas supply pipe 245a, the MFC 245c, and the valve 245d mainly constitute a third gas supply system 245 (also referred to as a reducing gas supply system). The third gas supply system 245 may include a third gas source 245b.

[0039] The fourth gas supply pipe 248a is provided with a fourth gas source 248b, an MFC 248c, and a valve 248d in this order from the upstream direction.

[0040] The fourth gas source 248b is a source of inert gas.

[0041] The fourth gas supply pipe 248a, the MFC 248c, and the valve 248d mainly constitute a fourth gas supply system 248 (also referred to as an inert gas supply system). The fourth gas supply system 248 may include a fourth gas source 248b.

[0042] The inert gas supplied from the fourth gas source 248b acts as a purge gas for purging gas remaining in the container 202 and the shower head 230 in the substrate processing step.

[0043] In this embodiment, any one of the first gas supply system 243, the second gas supply system 244, the third gas supply system 245, and the fourth gas supply system 248, or any combination thereof, is called a gas supply system.

[0044] The processing space 205 is connected to an exhaust pipe 262 via an exhaust buffer structure 261. The exhaust buffer structure 261 is provided circumferentially so as to surround the outer periphery of the substrate 10. In this embodiment, it is disposed between the partition plate 208 and the upper chamber 202a.

[0045] The exhaust pipe 262 is connected to the upper vessel 202a above the exhaust buffer structure 261 so as to communicate with the processing space 205 via the exhaust buffer structure 261. An APC (Auto Pressure Controller) 266, which is a pressure controller that controls the pressure inside the processing space 205 to a predetermined level, is provided in the exhaust pipe 262. The APC 266 has a valve element (not shown) whose opening is adjustable, and adjusts the conductance of the exhaust pipe 262 in response to an instruction from a controller 400 (described later).

[0046] A valve 267 is provided on the exhaust pipe 262 upstream of the APC 266. Furthermore, a vacuum pump 269 is provided downstream of the exhaust pipe 262. The vacuum pump 269 exhausts the atmosphere in the processing space 205 through the exhaust pipe 262. The exhaust pipe 262, the valve 267, and the APC 266 are collectively referred to as an exhaust system. The exhaust system may include the vacuum pump 269.

[0047] (3) Control configuration Next, the controller 400 as a control section (control means) that controls the operation of each section of the substrate processing apparatus 100 will be described.

[0048] 3 shows an outline of the controller 400. The controller 400 is configured as a computer including a CPU (Central Processing Unit) 401, a RAM (Random Access Memory) 402, a storage device 403 as a storage unit, and an I / O port 404. The RAM 402, the storage device 403, and the I / O port 404 are configured to be able to exchange data with the CPU 401 via an internal bus 405.

[0049] The controller 400 is configured so that an input / output device 281 configured as, for example, a keyboard, and an external storage device 282 can be connected thereto.

[0050] The display device 284 displays data detected by each monitor unit. In this embodiment, the display device 284 is described as a separate component from the input / output device 281, but this is not limiting. For example, if the input / output device also functions as a display screen such as a touch panel, the input / output device 281 and the display device 284 may be combined into one component.

[0051] The storage device 403 is configured with, for example, a flash memory, an HDD (Hard Disk Drive), etc. The storage device 403 readably stores process recipes, which describe procedures and conditions for substrate processing (described later), as well as recipe programs and tables serving as control programs for controlling the operation of the substrate processing apparatus to implement the process recipes. The recipe programs are programs that cause the controller 400 to execute procedures in the substrate processing steps (described later) and combine them to obtain predetermined results, and function as a program. Hereinafter, the recipe programs, control programs, etc. are collectively referred to simply as programs. In this specification, the term "program" may refer to a process recipe alone, a control program alone, or both. The RAM 402 is configured as a memory area (work area) for temporarily storing programs, data, etc. read by the CPU 401.

[0052] The I / O port 404 is connected to each component of the substrate processing apparatus 100, such as the gate valve 149, the lifting mechanism 218, the APC 266, the vacuum pump 269, the MFCs 243c, 244c, 245c, and 248c, the valves 243d, 244d, 245d, 248d, and 267, and the heater 213.

[0053] The CPU 401 is configured to read and execute a control program from the storage device 403, and also to read a recipe program from the storage device 403 in response to input of an operation command from the input / output device 281. The CPU 401 is configured to be able to control the opening and closing operation of the gate valve 149, the lifting and lowering operation of the lifting mechanism 218, the opening and closing operation of the APC 266, the on / off control of the vacuum pump 269, the flow rate adjustment operation of the MFCs 243c, 244c, 245c, and 248c, the opening and closing operation of the valves 243d, 244d, 245d, 248d, and 267, the temperature control of the heater 213, and the like, in accordance with the contents of the read recipe program.

[0054] The controller 400 according to this embodiment can be configured by installing the program into a computer using an external storage device 282 (for example, a magnetic disk such as a hard disk, an optical disk such as a DVD, a magneto-optical disk such as an MO, or a semiconductor memory such as a USB memory) that stores the program. The means for supplying the program to the computer is not limited to supplying the program via the external storage device 282. For example, the program may be supplied via a communication means such as the Internet or a dedicated line, without going through the external storage device 282. The storage device 403 and the external storage device 282 are configured as computer-readable recording media on which the program is recorded. Hereinafter, these will be collectively referred to as recording media. In this specification, the term "recording medium" may refer to the storage device 403 alone, the external storage device 282 alone, or both.

[0055] (4) Substrate processing process Next, as one step in the semiconductor manufacturing process, the step of forming the insulating film 16 in step S2 described above using the substrate processing apparatus 100 described above will be described in detail. In the following description, the operation of each part of the substrate processing apparatus 100 is controlled by a controller 400. The step of forming the insulating film 16 on the surface of the substrate 10 is similar to the step of forming the insulating film 16 on the surface of the semiconductor chip 12, and in the following description, the term "substrate 10" can be replaced with the term "semiconductor chip 12." The step of forming the insulating film 16 on the surface of the substrate 10 will be described below.

[0056] In this specification, the term "substrate" may mean "the substrate itself" or "a laminate (assembly) of the substrate and a predetermined layer, film, etc. formed on its surface" (i.e., the substrate may include the predetermined layer, film, etc. formed on the surface). In addition, in this specification, the term "surface of the substrate" may mean "the surface (exposed surface) of the substrate itself" or "the surface of the predetermined layer, film, etc. formed on the substrate, i.e., the outermost surface of the substrate as a laminate."

[0057] Therefore, in this specification, when it is stated that "a predetermined gas is supplied to a substrate," it may mean that "a predetermined gas is supplied directly to the surface (exposed surface) of the substrate itself," or that "a predetermined gas is supplied to a layer, film, etc. formed on the substrate, i.e., to the outermost surface of the substrate as a laminate." Furthermore, in this specification, when it is stated that "a predetermined layer (or film) is formed on a substrate," it may mean that "a predetermined layer (or film) is formed directly on the surface (exposed surface) of the substrate itself," or that "a predetermined layer (or film) is formed on a layer, film, etc. formed on the substrate, i.e., on the outermost surface of the substrate as a laminate."

[0058] In this specification, the use of the word "wafer" is the same as the use of the word "substrate," and in that case, the "substrate" in the above explanation can be replaced with "wafer."

[0059] (Substrate loading and placement process) By lowering the substrate mounting table 212 to the transfer position, the lift pins 207 are inserted through the through-holes 214 of the substrate mounting table 212. As a result, the lift pins 207 protrude a predetermined height from the surface of the substrate mounting table 212. Next, the gate valve 149 is opened, and the substrate 10 is loaded into the processing space 205 using the substrate transfer machine, and the substrate 10 is transferred onto the lift pins 207. As a result, the substrate 10 is supported in a horizontal position on the lift pins 207 protruding from the surface of the substrate mounting table 212.

[0060] After the substrate 10 is carried into the container 202, the substrate transfer machine is retracted to the outside of the container 202, and the gate valve 149 is closed to seal the inside of the container 202. Thereafter, the substrate placement table 212 is raised, and the substrate 10 is placed on the substrate placement surface 211 provided on the substrate placement table 212.

[0061] When the substrate 10 is loaded into the container 202, it is preferable to supply an inert gas from the fourth gas supply system 248 into the container 202 while evacuating the container 202 using an exhaust system. That is, it is preferable to operate the vacuum pump 269, open the APC 266 to evacuate the container 202, and then open at least the valve 248d of the fourth gas supply system 248 to supply the inert gas into the container 202. Furthermore, the vacuum pump 269 is kept in operation at all times from at least the substrate loading / placing step until the substrate unloading step described below is completed.

[0062] (Film formation process, S10) [Source gas supply, S101] After the substrate mounting table 212 is moved to the substrate processing position, the atmosphere is exhausted from the processing space 205 via the exhaust pipe 262 to adjust the pressure in the processing space 205 .

[0063] While adjusting the pressure to a predetermined value, when the temperature of the substrate 10 reaches a predetermined temperature, for example, 200°C or less, the valve 243d is opened, and the supply of the source gas into the processing space 205 is started via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 243c is adjusted so that the flow rate of the source gas becomes a predetermined flow rate. At this time, the atmosphere is exhausted via the exhaust pipe 262. The supplied source gas forms a first layer on the substrate 10. After a predetermined time has elapsed since the start of the supply of the source gas, the valve 243d is closed, and the supply of the source gas is stopped.

[0064] Next, the valve 248d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230, thereby purging the processing space 205.

[0065] Here, the source gas is, for example, a Si-containing gas containing silicon (Si). Specifically, the Si-containing gas may be, for example, tetraethoxysilane (Si(OC2H5)4:TEOS) gas, monosilane (SiH4) gas, dichlorosilane (SiH2Cl2:DCS) gas, hexachlorodisilane (Si2Cl6:HCDS) gas, etc. One or more of these may be used as the Si-containing gas.

[0066] For example, a Si-containing gas is supplied to the substrate 10, and an Si-containing layer is formed on the surface of the substrate 10 as a first layer.

[0067] The inert gas may be, for example, nitrogen (N2) gas or a rare gas such as argon (Ar) gas, helium (He) gas, neon (Ne) gas, or xenon (Xe) gas. One or more of these may be used as the inert gas. This also applies to each step described below.

[0068] [Reaction gas supply, S102] Next, the valve 244d is opened to start supplying the reactive gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 244c is adjusted so that the flow rate of the reactive gas becomes a predetermined flow rate. The supplied reactive gas reacts with the first layer on the substrate 10, and a second layer is formed on the substrate 10.

[0069] After the second layer is formed on the substrate 10, the valve 244d is closed to stop the supply of the reaction gas into the processing chamber.

[0070] Next, the valve 248d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230, thereby purging the processing space 205.

[0071] Here, the reactive gas is, for example, an O-containing gas (also called an oxidizing gas) containing oxygen (O). Examples of O-containing gases that can be used include oxygen (O2) gas, ozone (O3) gas, O2 gas + hydrogen (H2) gas, water vapor (H2O gas), hydrogen peroxide (H2O2) gas, nitrous oxide (N2O) gas, nitric oxide (NO) gas, nitrogen dioxide (NO2) gas, carbon monoxide (CO) gas, and carbon dioxide (CO2) gas. One or more of these can be used as the O-containing gas.

[0072] When, for example, an O-containing gas is supplied to the substrate 10, the Si-containing layer on the substrate 10 is oxidized, and a silicon oxide layer (SiO layer) is formed on the substrate 10.

[0073] [Perform the specified number of times] By repeating the cycle of steps S101 and S102 a predetermined number of times (n times, where n is an integer of 1 or greater), an insulating film 16 having a desired thickness is formed on the substrate 10. For example, a silicon oxide film (SiO film) is formed as the insulating film 16. The thickness of the insulating film 16 formed in this step is, for example, 50 nm or less.

[0074] In the above-described film formation process in step S10, an example has been described in which an SiO film is formed as the insulating film 16. However, the present invention is not limited to this. An N-containing gas (also called nitriding gas) supply system containing nitrogen (N) may be further provided to form the insulating film 16 such as a silicon oxynitride film (SiON film).

[0075] In the film formation process S10 in step S10 described above, the case where the source gas and the reactive gas are cyclically supplied has been described as an example, but the source gas and the reactive gas may be supplied simultaneously, or the insulating film 16 may be formed by supplying the source gas without using the reactive gas.

[0076] (Reduction step, S11) Next, the valve 245d is opened to start supplying reducing gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230. At this time, the MFC 245c is adjusted so that the flow rate of the reducing gas becomes a predetermined flow rate. At this time, the atmosphere is exhausted via the exhaust pipe 262. The supplied reducing gas exposes the substrate 10 on which the insulating film 16 is formed to a reducing atmosphere. After a predetermined time has elapsed since the start of the supply of reducing gas, the valve 245d is closed to stop the supply of reducing gas. In this process, the base metal film oxidized by performing the film forming process S10 is reduced.

[0077] Next, the valve 248d is opened to supply an inert gas into the processing space 205 via the common gas supply pipe 242 and the shower head 230, thereby purging the processing space 205.

[0078] Here, the reducing gas is, for example, a H-containing gas that contains hydrogen (H). For example, hydrogen (H2) gas or the like is used as the H-containing gas.

[0079] (Performed a specified number of times, S12) The cycle of steps S10 and S11 is repeated a predetermined number of times (m times, where m is an integer of 1 or 2 or more), at least once.

[0080] As described above, the insulating film 16 is formed by the ALD method or the CVD method on the surface of the substrate 10 on which the microbumps 14 are provided, the surface on which the semiconductor chip 12 is bonded, and on the surface of the semiconductor chip 12 on which the substrate 10 is bonded. In the insulating film forming process, the film forming process of step S10 and the reduction process of step S11 are performed a predetermined number of times, thereby forming the insulating film 16 on the surfaces of the microbumps 14, the substrate 10, and the semiconductor chip 12 while suppressing oxidation of the microbumps 14.

[0081] (Substrate unloading process) The substrate mounting table 212 is lowered, and the substrate 10 is supported on the lift pins 207 protruding from the surface of the substrate mounting table 212. Thereafter, the gate valve 149 is opened, and the substrate 10 is carried out of the container 202 using the substrate transfer machine.

[0082] (5) Other aspects Next, a detailed description will be given of another aspect of the manufacturing process of the above-described semiconductor device 101. In the following aspect, only the points that are different from the above-described aspect will be described in detail.

[0083] [Second aspect] 5(A) to 5(D) are diagrams showing the manufacturing process of a semiconductor device 102 in the second embodiment. In the second embodiment, the following processes are performed after the microbump formation process of step S1 and the insulating film formation process of step S2. The following description will focus on the differences, and will omit a description of the same configuration as the above embodiment.

[0084] (Conductive film formation process, S21) 5(A), a conductive film 21 is formed on the surface of a substrate 10 and a semiconductor chip 12, on which microbumps 14 are respectively provided and insulating films 16 are formed on the surface. That is, the conductive film 21 is formed on the insulating films 16 formed on the substrate 10, the semiconductor chip 12, and the microbumps 14. The conductive film 21 is formed, for example, by providing a metal-containing gas supply system containing a metal element in the above-described substrate processing apparatus 100 and supplying a metal-containing gas.

[0085] (Conductive film and insulating film removal process, S22) 5(B), the conductive film 21 and insulating film 16 formed on the tops of the microbumps 14, which serve as the connection surfaces of the microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor chip 12, are removed, respectively, to expose the tops of the microbumps 14. The conductive film 21 and insulating film 16 formed on the tops of the microbumps 14 are removed by CMP. As described above, this process is not limited to CMP, and they may also be removed by dry etching. That is, in this embodiment, the conductive film formation process of step S21 described above is performed between the insulating film formation process of step S2 and the insulating film removal process of step S3 described above, and the conductive film 21 and insulating film 16 formed on the connection surfaces of the microbumps 14 are removed in the insulating film removal process of step S3.

[0086] (Joining process, S23) 5(C), the connecting surfaces of the microbumps 14 are joined together, that is, the tops of the microbumps 14 on the substrate 10 and the tops of the microbumps 14 on the semiconductor chip 12. At this time, a conductive film 21 is formed on the surface of the substrate 10 that faces the semiconductor chip 12, the surface of the semiconductor chip 12 that faces the substrate 10, and the exposed surfaces of the microbumps 14 that will be filled with an underfill material.

[0087] (Underfill film formation process, S24) Next, as shown in Figure 5(D), a conductive film 21 is formed on the exposed surface where the underfill material will be embedded, and the underfill material is embedded between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0088] As a result of the above, the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 are covered with the insulating film 16, a conductive film 21 is formed on the insulating film 16, and a semiconductor device 102 is formed in which the surface of the conductive film 21 is filled with an underfill film 18.

[0089] This embodiment also provides the same effects as the above-described embodiment. That is, because the exposed surface for embedding the underfill material is only one type, the conductive film 21, differences in surface wettability can be prevented when embedding the underfill material, and the occurrence of voids can be suppressed. Furthermore, in this embodiment, the conductive film 21 with high thermal emissivity can be formed between the insulating film 16 and the underfill film 18 on the insulating film 16 on the surfaces of the substrate 10 and the semiconductor chip 12. Therefore, heat accumulation during operation of the semiconductor device 102 is suppressed, enabling high-voltage operation and improving operating speed.

[0090] [Third aspect] 6(A) to 6(D) are diagrams showing the manufacturing process of the semiconductor device 103 in the third embodiment. In the third embodiment, the following processes are performed after the microbump formation process of step S1, the insulating film formation process of step S2, and the conductive film formation process of step S21.

[0091] (Organic group-containing insulating film forming step, S211) 6(A), an organic group-containing insulating film 26 is formed on the surface of a substrate 10 on which microbumps 14 are respectively provided and a conductive film 21 is formed on the surface, and on the surface of a semiconductor chip 12. That is, the organic group-containing insulating film 26 is formed on the conductive film 21 formed on each of the substrate 10, the semiconductor chip 12, and the microbumps 14. The organic group-containing insulating film 26 is formed, for example, by providing an organic group-containing raw material gas supply system containing an organic group-containing raw material in the above-mentioned substrate processing apparatus 100 and supplying an organic group-containing raw material gas.

[0092] (Organic group-containing insulating film, conductive film, and insulating film removal process, S212) 6(B), the organic group-containing insulating film 26, the conductive film 21, and the insulating film 16 formed on the tops of the microbumps 14, which serve as the connection surfaces of the microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor chip 12, are removed, respectively, to expose the tops of the microbumps 14. The organic group-containing insulating film 26, the conductive film 21, and the insulating film 16 formed on the tops of the microbumps 14 are removed by CMP. As mentioned above, this step is not limited to CMP, and dry etching may also be used for removal. That is, in this embodiment, the organic group-containing insulating film forming step of step S211 is performed between the conductive film forming step of step S21 and the conductive film and insulating film removing step of step S22, and the organic group-containing insulating film 26, the conductive film 21, and the insulating film 16 formed on the connection surfaces of the microbumps 14 are removed in the conductive film and insulating film removing step of step S22.

[0093] (Joining process, S213) 6(C), the connecting surfaces of the microbumps 14 are joined together, i.e., the tops of the microbumps 14 on the substrate 10 and the tops of the microbumps 14 on the semiconductor chip 12. At this time, an organic group-containing insulating film 26 is formed on the surface of the substrate 10 that faces the semiconductor chip 12, the surface of the semiconductor chip 12 that faces the substrate 10, and the exposed surfaces of the microbumps 14 that will be filled with an underfill material.

[0094] (Underfill film formation process, S214) Next, as shown in Figure 6(D), an organic group-containing insulating film 26 is formed on the exposed surface where the underfill material will be embedded, and the underfill material is embedded between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0095] As a result of the above, the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 are covered with the insulating film 16, a conductive film 21 and an organic group-containing insulating film 26 are formed on the insulating film 16, and a semiconductor device 103 is formed in which the surface of the organic group-containing insulating film 26 is filled with an underfill film 18.

[0096] This embodiment also achieves the same effects as the above-described embodiment. Specifically, since the exposed surface where the underfill material is embedded does not contain multiple components but only one type, the organic group-containing insulating film 26, differences in surface wettability can be prevented when the underfill material is embedded, thereby suppressing the generation of voids. Furthermore, in this embodiment, by forming the organic group-containing insulating film 26, which has high water repellency and high wettability, on the exposed surface where the underfill material is embedded, the generation of voids when the underfill material is embedded can be further suppressed. Furthermore, in this embodiment, by forming the conductive film 21 with high thermal emissivity between the insulating film 16 on the surface of the substrate 10 and the semiconductor chip 12 and the organic group-containing insulating film 26, heat accumulation during operation of the semiconductor device 103 is suppressed, enabling high-voltage operation and improving operating speed.

[0097] [Fourth aspect] 7(A) to 7(D) are diagrams showing the manufacturing process of the semiconductor device 104 in the fourth embodiment. In the fourth embodiment, the following steps are performed after the microbump formation step of step S1 and the insulating film formation step of step S2.

[0098] (Organic group-containing insulating film forming step, S25) 7(A), an organic-group-containing insulating film 26 is formed on the surface of a substrate 10 and a semiconductor chip 12, on which microbumps 14 are respectively provided and an insulating film 16 is formed on the surface. That is, the organic-group-containing insulating film 26 is formed on the insulating films 16 formed on the substrate 10, the semiconductor chip 12, and the microbumps 14. The organic-group-containing insulating film 26 is formed, for example, by providing an organic-group-containing raw material gas supply system containing an organic-group-containing raw material in the above-mentioned substrate processing apparatus 100 and supplying an organic-group-containing raw material gas. The total thickness of the insulating film 16 and the organic-group-containing insulating film 26 formed in this step is, for example, 50 nm or less.

[0099] (Organic group-containing insulating film and insulating film removal process, S26) 7(B), the organic group-containing insulating film 26 and the insulating film 16 formed on the tops of the microbumps 14, which serve as the connection surfaces of the microbumps 14 on the surface of the substrate 10 and the surface of the semiconductor chip 12, are removed, respectively, to expose the tops of the microbumps 14. The organic group-containing insulating film 26 and the insulating film 16 formed on the tops of the microbumps 14 are removed by CMP. As mentioned above, this step is not limited to CMP, and they may also be removed by dry etching. That is, in this embodiment, the organic group-containing insulating film forming step of step S25 described above is performed between the insulating film forming step of step S2 and the insulating film removing step of step S3 described above, and the organic group-containing insulating film 26 and the insulating film 16 formed on the connection surfaces of the microbumps 14 are removed in the insulating film removing step of step S3.

[0100] (Joining process, S27) 7(C), the connecting surfaces of the microbumps 14 are joined together, i.e., the tops of the microbumps 14 on the substrate 10 and the tops of the microbumps 14 on the semiconductor chip 12. At this time, an organic group-containing insulating film 26 is formed on the surface of the substrate 10 that faces the semiconductor chip 12, the surface of the semiconductor chip 12 that faces the substrate 10, and the exposed surfaces of the microbumps 14 that will be filled with an underfill material.

[0101] (Underfill film formation process, S28) Next, as shown in Figure 7(D), an organic group-containing insulating film 26 is formed on the exposed surface where the underfill material will be embedded, and the underfill material is embedded between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 to form an underfill film 18.

[0102] As a result of the above, the surfaces of the substrate 10, the semiconductor chip 12, and the microbumps 14 between the substrate 10 and the semiconductor chip 12 joined by the microbumps 14 are covered with the insulating film 16, an organic group-containing insulating film 26 is formed on the insulating film 16, and a semiconductor device 104 is formed in which the surface of the organic group-containing insulating film 26 is filled with an underfill film 18.

[0103] This embodiment also provides the same effects as the above-described embodiment. That is, because the exposed surface into which the underfill material is embedded is made of only one type of organic group-containing insulating film 26, it is possible to prevent differences in surface wettability when the underfill material is embedded, thereby suppressing the occurrence of voids. Furthermore, in this embodiment, by further forming the organic group-containing insulating film 26, which has high water repellency and high wettability, on the exposed surface into which the underfill material is embedded, it is possible to further suppress the occurrence of voids when the underfill material is embedded.

[0104] [Other aspects] Although each aspect has been specifically described above, the present invention is not limited to the above-described aspects, and various modifications are possible without departing from the spirit of the present invention.

[0105] In the above-described embodiment, an example of film processing using a single-wafer substrate processing apparatus that processes one or several substrates at a time has been described. The present disclosure is not limited to the above-described embodiment and can be suitably applied, for example, to film processing using a batch-type substrate processing apparatus that processes several substrates at a time. Furthermore, in the above-described embodiment, an example of film processing using a substrate processing apparatus having a cold-wall processing furnace has been described. The present disclosure is not limited to the above-described embodiment and can be suitably applied to film processing using a substrate processing apparatus having a hot-wall processing furnace.

[0106] When using these substrate processing apparatuses, each process can be performed using the same processing procedures and conditions as in the above-described embodiments and modifications, and the same effects as in the above-described embodiments and modifications can be obtained.

[0107] It is also preferable that recipes used for each process are individually prepared according to the process content and stored in the storage device 403 via an electric communication line or the external storage device 282. Then, when starting each process, it is preferable that the CPU 401 appropriately selects an appropriate recipe according to the process content from among the multiple recipes stored in the storage device 403. This makes it possible to form films with various film types, composition ratios, film qualities, and film thicknesses with good reproducibility using a single substrate processing apparatus. It also reduces the burden on the operator, and allows each process to be started quickly while avoiding operational errors.

[0108] The above-mentioned recipes do not necessarily have to be newly created, but may be prepared by modifying an existing recipe already installed in the substrate processing apparatus. When modifying a recipe, the modified recipe may be installed in the substrate processing apparatus via an electric communication line or a recording medium on which the modified recipe is recorded. Alternatively, an existing recipe already installed in the substrate processing apparatus may be directly modified by operating the input / output device 281 provided in the existing substrate processing apparatus.

[0109] The above-described embodiments can be used in combination as appropriate. The processing procedures and processing conditions in this case can be the same as those of the above-described embodiments, for example. [Explanation of symbols]

[0110] 10 Substrate 12 Semiconductor chips 14 Microbumps 16. Insulating film 101, 102, 103, 104 Semiconductor device

Claims

1. A step of forming microbumps on the first surface of the substrate on the side where it is bonded to the semiconductor chip when bonding a semiconductor chip to the substrate, A step of forming microbumps on the second surface of the semiconductor chip on the side where it is bonded to the substrate, A step of forming an insulating film on the first surface, the second surface, and the microbumps, A step of removing the insulating film formed on the connection surface of the microbump, A step of joining the connecting surfaces of the microbumps on the first surface and the second surface, A substrate processing method having the following characteristics.

2. The substrate processing method according to claim 1, wherein the thickness of the insulating film is 50 nm or less.

3. Between the step of forming the insulating film and the step of removing the insulating film, The process includes forming a conductive film on the insulating film. The substrate processing method according to claim 1.

4. In the step of removing the insulating film, the conductive film and the insulating film formed on the connection surface of the microbump are removed. The substrate processing method according to claim 3.

5. The substrate processing method according to claim 1, wherein the step of removing the insulating film is to remove the insulating film formed on the connection surface of the microbump by CMP or etching.

6. The substrate processing method according to claim 1, further comprising the step of forming an underfill film between the substrate and the semiconductor chip after the step of joining the connection surfaces.

7. The substrate processing method according to claim 1, wherein the insulating film is a film that can be formed on the insulating films of the first surface and the second surface, a metal film, and microbumps.

8. The step of forming the insulating film is, A first insulating film forming step of forming an insulating film as a first insulating film on the first surface and the microbumps, or forming an insulating film as the first insulating film on the second surface and the microbumps, The substrate processing method according to claim 1, further comprising a second insulating film formation step of forming an organic group-containing insulating film as a second insulating film on the first insulating film.

9. The substrate processing method according to claim 8, further comprising the step of forming a conductive film between the step of forming the insulating film and the step of forming the organic group-containing insulating film.

10. In the step of removing the insulating film, the conductive film formed on the connection surface of the microbump, the first insulating film, and the second insulating film are removed. The substrate processing method according to claim 9.

11. In the process of forming the insulating film, A step of forming an insulating film on the first surface, the second surface, and the microbumps by supplying a raw material gas to the first surface, the second surface, and the microbumps, A step of exposing the insulating film to a reducing atmosphere, The substrate processing method according to claim 1, wherein the first surface, the second surface, and the microbumps are formed by performing the first step at least once.

12. The substrate processing method according to claim 1, wherein the insulating film is formed such that there is no difference in wettability between the surface of the semiconductor chip and the surface of the microbump, or between the surface of the substrate and the surface of the microbump.

13. The substrate processing method according to claim 6, wherein the step of forming the underfill film is performed in a state in which the insulating film which is the first insulating film is exposed on the substrate, or in a state in which the conductive film formed on the first insulating film is exposed, or in a state in which the organic insulating film which is the second insulating film containing organic matter formed on the conductive film is exposed, or in a state in which the second insulating film formed on the first insulating film is exposed.

14. The substrate processing method according to claim 6, wherein the step of forming the underfill film is performed in a state in which the insulating film which is a first insulating film is formed on the substrate, or in a state in which a conductive film is formed on the first insulating film, or in a state in which an organic insulating film which is a second insulating film containing organic matter is formed on the conductive film, or in a state in which the second insulating film is formed on the insulating film.

15. The substrate processing method according to claim 1, wherein the insulating film is an inorganic insulating film.

16. An insulating film is formed on the first surface of the substrate to which the semiconductor chip is bonded, and on the microbumps provided on the first surface, Alternatively, the process may include forming an insulating film on the second surface of the semiconductor chip to which the substrate is joined, and on microbumps provided on the second surface. Substrate processing method.

17. In the process of forming the insulating film, A step of forming an insulating film on the first surface and the microbumps by supplying a raw material gas to the first surface and the microbumps, or a step of forming an insulating film on the second surface and the microbumps by supplying a raw material gas to the second surface and the microbumps, A step of exposing the insulating film to a reducing atmosphere, The substrate processing method according to claim 16, wherein the process is performed at least once to form an insulating film on the first surface and the microbumps, or on the first surface and the microbumps.

18. The substrate having a first surface on which semiconductor chips are bonded and an insulating film formed on microbumps provided on the first surface, Alternatively, a step of preparing a semiconductor chip in which an insulating film is formed on a second surface on which the substrate of the semiconductor chip is joined and on microbumps provided on the second surface, A step of forming a metal-containing film on the insulating film, has Substrate processing method.

19. An insulating film is formed on the first surface of the substrate to which the semiconductor chip is bonded, and on the microbumps provided on the first surface, Alternatively, the process may include forming an insulating film on the second surface of the semiconductor chip to which the substrate is joined, and on microbumps provided on the second surface. A method for manufacturing a semiconductor device.

20. A substrate having a first surface on which a semiconductor chip is bonded and microbumps provided on the first surface, or a substrate support portion that supports a semiconductor chip having a second surface on which the substrate is bonded and microbumps provided on the second surface, A gas supply unit that supplies raw material gas to the substrate support unit, A control unit is configured to control the gas supply unit so as to form an insulating film on the first surface and the microbumps provided on the first surface, or to form an insulating film on the second surface and the microbumps provided on the second surface, A processing device.

21. An insulating film is formed on the first surface of the substrate, which is the side that connects to the semiconductor chip, and on the microbumps provided on the first surface, Alternatively, a procedure for forming an insulating film on the second surface of a semiconductor chip that is joined to the substrate and on microbumps provided on the second surface. A program that causes a computer to execute a command on a processing unit.

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