Wafer joint structure, inertia sensor, and manufacturing method of wafer joint structure

The wafer bonding structure with a through-hole in the second wafer addresses the space constraint issue, enabling increased chip density and miniaturization by optimizing internal pressure adjustment, thus improving manufacturing yield.

JP2025152673APending Publication Date: 2025-10-10PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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Patent Information

Application Number
JP2024054683
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-28
Publication Date
2025-10-10

AI Technical Summary

Technical Problem

The existing wafer-level package design requires a ventilation path for adjusting internal cavity pressure that occupies space on the silicon substrate, hindering miniaturization and reducing chip yield.

Method used

A wafer bonding structure with a through-hole in the second wafer positioned to overlap the cavity in the thickness direction of the first wafer, eliminating the need for peripheral space and allowing for miniaturization and increased chip density.

Benefits of technology

The solution enables a higher number of chips per wafer and miniaturization by optimizing internal pressure adjustment without occupying peripheral space, enhancing manufacturing efficiency.

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Abstract

To provide a wafer joint structure which enables increase of the number of chips per wafer.SOLUTION: A wafer joint structure 1 includes a first wafer 3 and a second wafer 4. The first wafer 3 has a major surface 3s. The major surface 3s is provided with a first cavity 3b. The second wafer 4 is joined to the major surface 3s of the first wafer 3 so as to cover the first cavity 3b. In the second wafer 4, through holes 43 for adjusting an inner pressure in the first cavity 3b are provided at positions overlapping with the first cavity 3b in a thickness direction D1 of the first wafer 3.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure generally relates to a wafer bonding structure, an inertial sensor, and a method for manufacturing a wafer bonding structure, and more particularly to a wafer bonding structure for bonding a first wafer and a second wafer, an inertial sensor including the wafer bonding structure, and a method for manufacturing the wafer bonding structure. [Background technology]

[0002] The wafer-level package described in Patent Document 1 includes a silicon substrate and a glass lid. The silicon substrate includes multiple MEMS (Micro Electro Mechanical Systems) elements. The bottom surface of the glass lid is bonded to the top surface of the silicon substrate. The glass lid includes a cavity, a groove, and a through-hole. The cavity is provided on the bottom surface of the glass lid and accommodates the multiple MEMS elements. The groove is provided on the bottom surface of the glass lid, with one end connected to the cavity and the other end extending to the outer periphery of the cavity. The through-hole is connected to the other end of the groove and penetrates to the top surface of the glass lid. In this wafer-level package, the internal pressure of the cavity is adjusted by an L-shaped ventilation path formed by the groove and the through-hole. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-289953 Summary of the Invention [Problem to be solved by the invention]

[0004] In the wafer-level package described in Patent Document 1, the ventilation path for adjusting the internal pressure of the cavity is drawn to the outer periphery of the cavity by a groove. Therefore, it is necessary to secure an area on the silicon substrate for drawing the ventilation path (groove) to the outer periphery of the cavity. This makes it difficult to miniaturize the wafer-level package. Furthermore, the yield per wafer of chips including the wafer-level package decreases.

[0005] An object of the present disclosure is to provide a wafer bonding structure that allows an increased number of chips per wafer, an inertial sensor including the wafer structure, and a method for manufacturing the wafer bonding structure. [Means for solving the problem]

[0006] A wafer bonding structure according to one embodiment of the present disclosure includes a first wafer and a second wafer. The first wafer has a main surface. A cavity is provided on the main surface of the first wafer. The second wafer is bonded to the main surface of the first wafer so as to cover the cavity. The second wafer has a through-hole at a position overlapping the cavity in the thickness direction of the first wafer, for adjusting the internal pressure of the cavity.

[0007] An inertial sensor according to one aspect of the present disclosure includes the wafer bonding structure. The second wafer has an anchor portion, a mass portion, and a capacitance detection portion. The mass portion is supported so as to be displaceable relative to the anchor portion. The capacitance detection portion is fixed relative to the anchor portion, forms a capacitance between the mass portion and the capacitance detection portion, and detects the formed capacitance.

[0008] A manufacturing method of a wafer bonded structure according to one embodiment of the present disclosure includes a first step, a second step, a third step, and a fourth step. In the first step, a wafer member is bonded in a vacuum to a main surface of a first wafer on which a cavity is formed so as to cover the cavity. In the second step, the wafer member is thinned to form a second wafer. In the third step, a first through-hole penetrating the second wafer is formed by etching at a position in the second wafer that overlaps with the cavity in the thickness direction of the first wafer, and a recess is formed by etching at a position in the bottom surface of the cavity that overlaps with the first through-hole in the thickness direction of the first wafer. In the fourth step, a second through-hole is formed in the second wafer, having an opening area larger than the opening area of ​​the first through-hole and including the first through-hole in a plan view from the thickness direction of the first wafer. [Effects of the Invention]

[0009] The wafer bonded structure, inertial sensor, and method for manufacturing the wafer bonded structure disclosed herein have the advantage of being able to increase the number of chips per wafer. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a cross-sectional view of an inertial sensor including a wafer bonding structure according to an embodiment. [Figure 2] FIG. 2 is a plan view of a second wafer included in the wafer bonding structure. [Figure 3] 3A to 3C are explanatory views illustrating each step of the method for manufacturing the wafer bonded structure. [Figure 4] 4A to 4C are other explanatory views illustrating other steps of the method for manufacturing the wafer bonded structure. [Figure 5] 5A to 5C are other explanatory views illustrating other steps of the method for manufacturing the wafer bonded structure. [Figure 6] 6A and 6B are other explanatory views illustrating other steps of the method for manufacturing the wafer bonded structure. [Figure 7]7A to 7C are explanatory diagrams illustrating the steps of a method for manufacturing a wafer bonded structure according to a comparative example. [Figure 8] FIG. 8 is a cross-sectional view of an inertial sensor including a wafer bonding structure according to the first modification. [Figure 9] FIG. 9 is an explanatory diagram illustrating a method for manufacturing the wafer bonding structure. [Figure 10] FIG. 10 is a cross-sectional view of an inertial sensor including a wafer bonding structure according to the second modification. [Figure 11] 11A to 11C are explanatory views illustrating each step of the method for manufacturing the wafer bonded structure. [Figure 12] 12A and 12B are other explanatory views illustrating other steps of the method for manufacturing the wafer bonded structure. [Figure 13] FIG. 13 is an explanatory diagram illustrating the arrangement of the first through holes formed by the method for manufacturing a wafer bonded structure according to the third modification. DETAILED DESCRIPTION OF THE INVENTION

[0011] (1) Implementation form Hereinafter, a wafer bonding structure, an inertial sensor, and a method for manufacturing the wafer bonding structure according to this embodiment will be described with reference to the drawings.

[0012] (1-1) Overview 1, the wafer bonding structure 1 according to this embodiment includes a first wafer 3 and a second wafer 4. The first wafer 3 has a main surface 3s, and a first cavity 3b is provided on the main surface 3s. The second wafer 4 is bonded to the main surface 3s of the first wafer 3 so as to cover the first cavity 3b. The second wafer 4 is provided with a through-hole 43 for adjusting the internal pressure of the first cavity 3b at a position overlapping with the first cavity 3b in the thickness direction D1 of the first wafer 3.

[0013] According to this configuration, the second wafer 4 has through holes 43 at positions that overlap with the first cavities 3b in the thickness direction D1 of the first wafer 3. That is, in a plan view from the thickness direction D1 of the first wafer 3, the through holes 43 are not provided on the outer periphery of the first cavities 3b. Therefore, there is no need to secure an area for providing the through holes 43 on the outer periphery of the first cavities 3b. As a result, the number of chips including the wafer bonded structure 1 per wafer can be increased.

[0014] (2)Details An inertial sensor 2 including a wafer bonding structure 1 according to this embodiment will be described with reference to the drawings.

[0015] The inertial sensor 2 according to this embodiment is a sensor that uses inertial force to measure the movement of the inertial sensor 2. The inertial sensor 2 is, for example, an acceleration sensor, a gyro sensor, or a motion sensor. Therefore, the inertial sensor 2 can measure the movement of an object on which the inertial sensor 2 is installed.

[0016] 1, the inertial sensor 2 includes a wafer bonding structure 1. The wafer bonding structure 1 includes a first wafer 3, a second wafer 4, and a third wafer 5.

[0017] The first wafer 3 constitutes, for example, a first lid (e.g., a lower lid) of the inertial sensor 2. The first wafer 3 is, for example, a rectangular, flat substrate. The thickness of the first wafer 3 is, for example, several hundred μm. The first wafer 3 is, for example, a silicon substrate. The first wafer 3 has a main surface 3s. The main surface 3s is one of the main surfaces on both sides of the first wafer 3 that faces the second wafer 4 (e.g., the upper surface). The first wafer 3 has a first cavity 3b. The first cavity 3b is a portion that covers a sensor unit (weight portion 41 and capacitance detection unit 42) of the second wafer 4, which will be described later, from one side (lower side) of the second wafer 4 in the thickness direction D1. The first cavity 3b is recessed in the main surface 3s of the first wafer 3. The first cavity 3b has, for example, a rectangular bottom surface 3c. At least one recess 3d (one in the example of FIG. 1) is provided in the bottom surface 3c. The recess 3d is provided at a position in the thickness direction D1 of the first wafer 3 that overlaps with a through-hole 43 of the second wafer 4, which will be described later.

[0018] The second wafer 4 is, for example, a rectangular flat substrate. The second wafer 4 is, for example, a silicon substrate. The thickness of the second wafer 4 is, for example, 100 μm.

[0019] The second wafer 4 includes a sensor portion of the inertial sensor 2. The sensor portion is configured by MEMS (Micro Electro Mechanical Systems). As shown in Fig. 2, the second wafer 4 includes, as the sensor portion, a weight portion 41, a plurality of (for example, four) capacitance detection portions 42, a plurality of (for example, four) through holes 43, a plurality of (for example, four) anchor portions 44, and a plurality of (for example, four) support portions 45.

[0020] Plummet 41 is a portion that displaces relative to the multiple anchor portions 44. Plummet 41 forms the center of second wafer 4. Plummet 41 has, for example, a rectangular plate shape when viewed from above in thickness direction D1 of first wafer 3. Plummet 41 has multiple sides (for example, four sides) when viewed from above in thickness direction D1 of first wafer 3. Plummet 41 is connected to the multiple anchor portions 44 by multiple support portions 45.

[0021] The plurality of capacitance detection units 42 form capacitances with the mass portion 41 and detect the formed capacitances. The plurality of capacitance detection units 42 are arranged around the mass portion 41. The plurality of capacitance detection units 42, together with the plurality of anchor portions 44, form the peripheral portion of the second wafer 4. The plurality of capacitance detection units 42 correspond one-to-one to the plurality of (for example, four) sides of the mass portion 41 and are arranged at intervals from the corresponding sides. Each capacitance detection unit 42 forms a capacitance with the mass portion 41 by being arranged at an interval (space) from the mass portion 41.

[0022] The plurality of through holes 43 constitute the above-mentioned interval between the weight portion 41 and the plurality of capacitance detection units 42. The plurality of through holes 43 correspond one-to-one to the plurality of sides of the weight portion 41 and are arranged between the corresponding sides and the capacitance detection units 42 adjacent to the sides. The plurality of through holes 43 include portions formed linearly along the corresponding sides of the weight portion 41 and extending between both ends of the sides. The plurality of through holes 43 are arranged in the second wafer 4 at positions overlapping with the first cavities 3b of the first wafer 3 in the thickness direction D1 of the first wafer 3. The plurality of through holes 43 penetrate the second wafer 4 in the thickness direction of the second wafer 4 (i.e., the thickness direction D1 of the first wafer 3). The plurality of through holes 43 adjust the pressure within the first cavities 3b of the first wafer 3.

[0023] The plurality of anchor portions 44 are base portions for supporting the weight portion 41. The plurality of anchor portions 44, together with the plurality of capacitance detection portions 42, form the peripheral portion of the second wafer 4. The plurality of anchor portions 44 are arranged around the periphery of the weight portion 41. More specifically, the plurality of anchor portions 44 are arranged between the capacitance detection portions 42 adjacent to each other in the circumferential direction (i.e., at the plurality of corner portions of the second wafer 4).

[0024] The plurality of support portions 45 are portions that elastically support the weight portion 41. The plurality of support portions 45 correspond one-to-one to the plurality of anchor portions 44, and connect the corresponding anchor portions 44 to the weight portion 41. The plurality of support portions 45 elastically support the weight portion 41, so that the weight portion 41 can be displaced relative to the anchor portions 44.

[0025] The plurality of capacitance detection units 42 and the plurality of anchors 44 are arranged around the mass unit 41. The mass unit 41 is supported by the plurality of support units 45 and is arranged inside the plurality of capacitance detection units 42 arranged in a ring shape. The mass unit 41 is displaceable in the thickness direction D1 of the first wafer 3 and in any direction perpendicular to the thickness direction D1. When the mass unit 41 is displaced relative to the plurality of capacitance detection units 42 in the above-mentioned any direction due to inertial force, the distance between the mass unit 41 and each capacitance detection unit 42 changes, and the capacitance between the mass unit 41 and each capacitance detection unit 42 changes. Each capacitance detection unit 42 detects the capacitance between itself and the mass unit 41. The movement of the inertial sensor 2 is detected based on the detection result of each capacitance detection unit 42.

[0026] The second wafer 4 has a first main surface 4s and a second main surface 4t that face each other in the thickness direction. The first main surface 4s faces the first wafer 3. The second main surface 4t faces the third wafer 5. A peripheral edge 4v of the first main surface 4s of the second wafer 4 is bonded to a peripheral edge 3v of the main surface 3s of the first wafer 3. In this bonded state, the first cavity 3b of the first wafer 3 covers the weight portion 41 and the multiple through-holes 43 of the second wafer 4.

[0027] The third wafer 5 constitutes, for example, a second lid (e.g., an upper lid) of the inertial sensor 2. The third wafer 5 is, for example, a rectangular, flat substrate when viewed from above in the thickness direction D1 of the first wafer 3. The thickness of the third wafer 5 is, for example, several hundred μm. The third wafer 5 is, for example, a silicon substrate. The third wafer 5 has a main surface 5s. The main surface 5s is the main surface (e.g., the lower surface) of both main surfaces of the third wafer 5 that faces the second wafer 4. The third wafer 5 has a second cavity 5b. The second cavity 5b is a portion that covers the sensor portion of the second wafer 4 from one side (the upper side). The second cavity 5b is recessed in the main surface 5s of the third wafer 5. A peripheral portion 5v of the main surface 5s of the third wafer 5 is bonded to a peripheral portion 4u of the second main surface 4t of the second wafer 4.

[0028] (3) Manufacturing method of inertial sensor 3 to 7, a method for manufacturing the inertial sensor 2 will be described. This method for manufacturing the inertial sensor 2 includes a method for manufacturing the wafer bonding structure 1 according to this embodiment.

[0029] As shown in Fig. 3A, a first wafer 3 is prepared. Then, as shown in Fig. 3B, a first cavity 3b is formed in a recessed shape at a predetermined location (for example, the center) on the main surface 3s of the first wafer 3 by etching (for example, dry etching).

[0030] Next, as shown in FIG. 3C, in a chamber whose internal pressure is set to vacuum pressure, a wafer member 50 made of an SOI (Silicon on Insulator) substrate is bonded to the main surface 3s of the first wafer 3. More specifically, a peripheral edge 3v of the main surface 3s of the first wafer 3 is bonded to a peripheral edge 50v of the main surface 50s of the wafer member 50. The main surface 50s is the main surface on the first wafer 3 side of the main surfaces of the wafer member 50. The first cavity 3b is sealed by the wafer member 50, and the internal pressure of the first cavity 3b is maintained at vacuum pressure. Then, the wafer member 50 is polished to a predetermined thickness under atmospheric pressure, thereby thinning the wafer member 50. The thinned wafer member 50 is formed into the second wafer 4. The thinned wafer member 50 (i.e., the second wafer 4) becomes flexible and bends inward into the first cavity 3b due to atmospheric pressure (see FIG. 4A).

[0031] Next, as shown in FIG. 4B, a resist 51 is formed on the second main surface 4t of the second wafer 4. The second main surface 4t is the main surface (upper main surface) of both main surfaces of the second wafer 4 opposite to the first wafer 3. The resist 51 has an opening 51a. The opening 51a is an opening for forming a first through hole 47, which will be described later, and is arranged at a predetermined position of the resist 51 (a position overlapping with the first cavity 3b of the first wafer 3).

[0032] Next, as shown in FIG. 4C, the portion of the second wafer 4 that overlaps with the opening 51a is removed by etching (e.g., dry etching). As a result, a first through-hole 47 is formed in the portion of the second wafer 4 that overlaps with the opening 51a. The first through-hole 47 penetrates the second wafer 4. The first through-hole 47 changes the internal pressure of the first cavity 3b from vacuum pressure to atmospheric pressure. As a result, the second wafer 4 that had been warped toward the inside of the first cavity 3b no longer warps and returns to a flat shape.

[0033] 4C, the etching not only forms the first through-holes 47 but also forms recesses 3d at predetermined positions on the bottom surface 3c of the first cavity 3b. More specifically, the etching time is set to be slightly longer to ensure that the first through-holes 47 penetrate the second wafer 4. As a result, etching gas enters the first cavity 3b for a certain period of time after the first through-holes 47 are penetrated, and the entered etching gas forms recesses 3d on the bottom surface 3c of the first cavity 3b. The recesses 3d are formed on the bottom surface 3c of the first cavity 3b at positions that overlap the first through-holes 47 in the thickness direction D1 of the first wafer 3. That is, the recesses 3d are formed together with the formation of the first through-holes 47 by etching.

[0034] Next, as shown in FIG. 5A, the resist 51 is removed.

[0035] Next, as shown in FIG. 5B , a resist 52 is formed on the second main surface 4t of the second wafer 4. The resist 52 has openings 52a. The openings 52a are openings for forming second through holes 43, which will be described later, and are arranged at predetermined positions in the resist 52. The opening area W2 of the openings 52a is larger than the opening area W1 of the first through holes 47. The multiple openings 52a include openings 52b that overlap to include the entire first through holes 47 in a plan view from the thickness direction D1 of the first wafer 3.

[0036] Next, as shown in FIG. 5C , the portion of the second wafer 4 that overlaps with the opening 52a is removed by etching (e.g., dry etching). As a result, a second through hole 43 (i.e., the through hole 43 in FIG. 1) having an opening area W2 is formed in the portion of the second wafer 4 that overlaps with the opening 52a. At this time, the first through hole 47 that overlapped with the opening 52b is reformed into the second through hole 43 having a larger opening area W2. As a result, the first through hole 47 disappears. By forming the second through hole 43 in the second wafer 4, a weight portion 41 and an anchor portion 44 are formed in the second wafer 4.

[0037] Furthermore, by etching to form the openings 52a, the capacitance detection portions 42 are formed on the periphery of the second wafer 4 at the same time as the openings 52a are formed.

[0038] Next, as shown in FIG. 6A, the resist 52 is removed.

[0039] Next, as shown in FIG. 6B , the third wafer 5 is bonded to the second main surface 4t of the second wafer 4. A second cavity 5b is provided, for example, in the center of the main surface 5s of the third wafer 5. When the second wafer 4 and the third wafer 5 are bonded together, the second cavity 5b of the third wafer 5 faces the first cavity 3b of the first wafer 3 with the second wafer 4 interposed therebetween in the thickness direction D1 of the first wafer 3. The second cavity 5b of the third wafer 5 overlaps the second through-hole 43 in the thickness direction D1 of the first wafer 3. A peripheral portion 5v of the main surface 5s of the third wafer 5 is bonded to a peripheral portion 4u of the second main surface 4t of the second wafer 4.

[0040] As described above, in this embodiment, by forming the first through-holes 47 in the second wafer 4 and adjusting the internal pressure of the first cavity 3b, the second wafer 4 that has warped inside the first cavity 3b is returned to a flat shape (see FIGS. 4C and 5A), and then the second through-holes 43 are formed in the second wafer 4 by etching (see FIGS. 5B to 6A). This makes it possible to form with high precision the pattern of the resist 52 for forming the second through-holes 43 in the second wafer 4. As a result, the second through-holes 43 can be formed with high precision in the second wafer 4.

[0041] (4) Manufacturing method for comparative example A method for manufacturing the inertial sensor 2 according to the comparative example will be described with reference to FIG.

[0042] The method for manufacturing the inertial sensor according to the comparative example is similar to the method for manufacturing the inertial sensor 2 according to this embodiment, and first includes the steps shown in Fig. 3A to Fig. 4A. The steps following Fig. 4A will be described with reference to Figs. 7A to 7C. The step shown in Fig. 7A is the same as the step shown in Fig. 4A.

[0043] As shown in FIG. 7A, when the thinned wafer member 50 (ie, the second wafer 4) is placed under atmospheric pressure, the atmospheric pressure causes the second wafer 4 to bend inwardly into the first cavity 3b.

[0044] Next, as shown in Fig. 7B, a resist 52 is formed on the second main surface 4t of the second wafer 4. The resist 52 has a plurality of openings 52a (for example, two in the example of Fig. 7B). The openings 52a are openings for forming the second through holes 43, and are arranged at predetermined positions of the resist 52 (positions overlapping with the first cavities 3b of the first wafer 3).

[0045] Next, as shown in FIG. 7C , the intermediate product 200 with the resist 52 formed thereon is placed in a chamber whose internal pressure is set to vacuum pressure for etching. When the intermediate product 200 is placed in the chamber, the air pressure outside the first wafer 3 drops from atmospheric pressure to vacuum pressure. That is, both the internal and external pressures of the first cavity 3b become vacuum pressure. This causes the second wafer 4 to return to a flat shape from its recessed shape inside the first cavity 3b of the first wafer 3. When the second wafer 4 returns to its flat shape, the resist 52 is lifted by the second wafer 4, causing the resist 52 to distort. This distortion deforms the opening 52a of the resist 52. Therefore, even if an attempt is made to form a second through-hole 43 by etching (e.g., dry etching) in the portion of the second wafer 4 that overlaps the opening 52a, the second through-hole 43 cannot be formed accurately because the opening 52a of the resist 52 is deformed.

[0046] In contrast to this, in this embodiment, as described above, the first through-holes 47 are formed in the second wafer 4 to adjust the internal pressure of the first cavity 3b, thereby returning the second wafer 4 that has warped inside the first cavity 3b to a flat shape (see FIGS. 4C and 5A), and then the second through-holes 43 are formed in the second wafer 4 by dry etching (see FIGS. 5B to 6A). This makes it possible to form with high precision the pattern of the resist 52 for forming the second through-holes 43 in the second wafer 4. As a result, the second through-holes 43 can be formed with high precision in the second wafer 4.

[0047] (5) Effects As described above, the wafer bonding structure 1 according to this embodiment includes a first wafer 3 and a second wafer 4. The first wafer 3 has a main surface 3s. The first wafer 3 has a first cavity 3b formed on the main surface 3s. The second wafer 4 is bonded to the main surface 3s of the first wafer 3 so as to cover the first cavity 3b. The second wafer 4 has a through-hole 43 for adjusting the internal pressure of the first cavity 3b at a position overlapping the first cavity 3b in the thickness direction D1 of the first wafer 3.

[0048] According to this configuration, the second wafer 4 has a through hole 43 at a position overlapping the first cavity 3b in the thickness direction D1 of the first wafer 3. That is, the through hole 43 is not provided on the outer periphery of the first cavity 3b. Therefore, there is no need to secure an area for providing the through hole 43 on the outer periphery of the first cavity 3b. As a result, the chip including the wafer bonding structure 1 can be made smaller. Furthermore, the number of chips including the wafer bonding structure 1 per wafer can be increased.

[0049] Furthermore, in the wafer bonding structure 1 according to this embodiment, a recess 3d is provided in the bottom surface 3c of the first cavity 3b at a position overlapping with the through-hole 43 in the thickness direction D1 of the first wafer 3. According to this configuration, the recess 3d can be used as a location for arranging the getter material 53a.

[0050] The wafer bonding structure 1 according to this embodiment further includes a third wafer 5. The third wafer 5 is bonded to the second main surface 4t of the second wafer 4, which is opposite to the first wafer 3. A second cavity 5b, which is different from the first cavity 3b, is provided on the main surface 5s of the third wafer 5 facing the second wafer 4. The second cavity 5b is disposed so as to overlap with the through hole 43 in the thickness direction D1 of the first wafer 3. This configuration, in a configuration including the third wafer 5, allows the chip including the wafer bonding structure 1 to be miniaturized and the number of chips per wafer to be increased.

[0051] The inertial sensor 2 according to this embodiment also includes the wafer bonding structure 1. The second wafer 4 has an anchor portion 44, a mass portion 41, and a capacitance detection portion 42. The mass portion 41 is supported so as to be displaceable relative to the anchor portion 44. The capacitance detection portion 42 is fixed relative to the anchor portion 44, forms a capacitance between it and the mass portion 41, and detects the formed capacitance. This configuration makes it possible to provide an inertial sensor 2 that has the effects of the wafer bonding structure 1.

[0052] Furthermore, in the inertial sensor 2 according to this embodiment, the through holes 43 are arranged symmetrically around the periphery of the mass 41 in a plan view from the thickness direction D1 of the first wafer 3. With this configuration, the detection sensitivity of the inertial sensor 2 can be made symmetrical with respect to the symmetrical movement of the mass 41 of the inertial sensor 2.

[0053] The manufacturing method of the wafer bonded structure 1 according to this embodiment includes a first step, a second step, a third step, and a fourth step. In the first step, a wafer member 50 is bonded to a main surface 3s of a first wafer 3, on which a first cavity 3b (cavity) is formed, in a vacuum so as to cover the first cavity 3b. In the second step, the wafer member 50 is thinned to form a second wafer 4. In the third step, a first through-hole 47 penetrating the second wafer 4 is formed by etching at a position overlapping the first cavity 3b in the second wafer 4 in the thickness direction D1 of the first wafer 3, and a recess 3d is formed by etching at a position overlapping the first through-hole 47 in the bottom surface 3c of the first cavity 3b in the thickness direction D1 of the first wafer 3. In the fourth step, the second through hole 43 is provided in the second wafer 4 so as to have an opening area W2 larger than the opening area W1 of the first through hole 47 and to include the first through hole 47 in a plan view from the thickness direction D1 of the first wafer 3. This configuration provides a manufacturing method for manufacturing the wafer bonded structure 1.

[0054] (6) Variations A modification of the above embodiment will be described. In the following description, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof may be omitted.

[0055] (6.1) Variation 1 (6.1.1) Composition As shown in FIG. 8, the inertial sensor 2 according to the first modification has the same configuration as the inertial sensor 2 according to the above embodiment, except that it further includes a getter material 53a.

[0056] The getter material 53a is a member for absorbing gas present inside the first cavity 3b to maintain the internal pressure of the first cavity 3b at a vacuum pressure. The getter material 53a is, for example, Ti (titanium), Mo (molybdenum), Cr (chromium), Hf (crystalline hafnium), Zr (zirconium), Ta (metallic tantalum), V (metallic vanadium), Nb (metallic niobium), Mn (metallic manganese), P (platinum), Ni (nickel), Au (gold), Al (aluminum), La (metallic lanthanum), Ru (ruthenium), or a mixture thereof.

[0057] The getter material 53a is disposed in the recess 3d of the first cavity 3b of the first wafer 3.

[0058] (6.1.2) Inertial sensor manufacturing method 9, a method for manufacturing the inertial sensor 2 according to the first modification will be described. This method for manufacturing the inertial sensor 2 includes a method for manufacturing the wafer bonding structure 1 according to the first modification.

[0059] In the manufacturing method of the inertial sensor 2 according to the first modification, the steps from FIG. 3A to FIG. 4C are performed, as in the above embodiment. In the first modification, the step of FIG. 9 is performed after the step of FIG. 4C. In the step of FIG. 9, a layer of getter material 53 is formed on the main surface 51s of the resist 51 so as to cover at least the opening 51a of the resist 51. At this time, the portion of the layer of getter material 53 that is located at the opening 51a passes through the opening 51a of the resist 51 and the first through-hole 47 of the second wafer 4 and falls into the first cavity 3b, and then into the recess 3d on the bottom surface 3c of the first cavity 3b. In this way, the getter material 53a that was part of the getter material 53 is disposed in the recess 3d. The subsequent steps are the same as those described in the above embodiment (i.e., the steps from FIG. 5A to FIG. 6B). In this manner, the inertial sensor 2 shown in FIG. 8 is manufactured.

[0060] (6.1.3) Effect The wafer bonding structure 1 according to the first modification further includes a getter material 53a disposed inside the recess 3d. With this configuration, the getter material 53a is provided inside the recess 3d, and is therefore positioned and fixed by the recess 3d. This prevents the getter material 53a from interfering with the second wafer 4.

[0061] (6.2) Variation 2 (6.2.1) Composition As shown in FIG. 10, the inertial sensor 2 according to the second modification has the same configuration as the inertial sensor 2 according to the first modification, except that it further includes a getter material 55a.

[0062] The getter material 55a, like the getter material 53a, is a member that absorbs gas present inside the first cavity 3b to maintain the internal pressure of the first cavity 3b at a vacuum pressure. The getter material 55a is, for example, titanium (Ti), molybdenum (Mo), chromium (Cr), crystalline hafnium (Hf), zirconium (Zr), tantalum (Ta), vanadium (V), niobium (Nb), manganese (Mn), platinum (P), nickel (Ni), gold (Au), aluminum (Al), lanthanum (La), ruthenium (Ru), or a mixture thereof. The getter material 55a may be made of the same material as the getter material 53a, or may be made of a different material.

[0063] The getter material 55a is disposed at a predetermined position on the bottom surface 3c of the first cavity 3b of the first wafer 3. The getter material 55a is disposed at a position on the bottom surface 3c of the first cavity 3b that overlaps with the second through-hole 43 in the thickness direction D1 of the first wafer 3. The multiple getter materials 55a include a getter material 55a disposed on top of a getter material 53a.

[0064] (6.2.2) Inertial sensor manufacturing method A method for manufacturing the inertial sensor 2 according to the second modification will be described with reference to FIGS.

[0065] In the manufacturing method of the inertial sensor 2 according to the second modification, the steps from FIG. 3A to FIG. 4C are performed, as in the above embodiment. In the second modification, the step of FIG. 11A is performed after the step of FIG. 4C. In the step of FIG. 11A, a layer of getter material 53 is formed on the main surface 51s of the resist 51 so as to cover at least the opening 51a of the resist 51. At this time, the portion of the layer of getter material 53 that is located in the opening 51a passes through the opening 51a of the resist 51 and the first through-hole 47 of the second wafer 4 and falls into the first cavity 3b, and then into the recess 3d in the bottom surface 3c of the first cavity 3b. In this way, the getter material 53a that was part of the getter material 53 is disposed in the recess 3d.

[0066] Next, as shown in FIG. 11B, the resist 51 and the getter material 53 are removed.

[0067] 11C, resist 52 is formed on the main surface 50s of the wafer member 50. The resist 52 has openings 52a. The openings 52a are openings for forming second through holes 43, which will be described later, and are arranged at predetermined positions in the resist 52. The opening area W2 of the openings 52a is larger than the opening area W1 of the first through holes 47. The multiple openings 52a include openings 52b that overlap to include the entire first through holes 47 in a plan view from the thickness direction D1 of the first wafer 3.

[0068] 12A, the portion of the second wafer 4 that overlaps with the opening 52a is removed by etching (e.g., dry etching). As a result, the second through hole 43 (i.e., the through hole 43 in FIG. 10) is formed in the portion of the second wafer 4 that overlaps with the opening 52a. At this time, the first through hole 47 that overlapped with the opening 52b is reformed into the second through hole 43 having a larger opening area W2. As a result, the first through hole 47 disappears.

[0069] 12B, a getter material 55 is formed in a layer on the main surface 52s of the resist 52 so as to cover at least the opening 52a of the resist 52. At this time, the portion of the getter material 55 formed in a layer that is positioned in the opening 52a passes through the opening 52a of the resist 52 and the second through-hole 43 of the second wafer 4 and falls to a predetermined position on the bottom surface 3c of the first cavity 3b. That is, the getter material 55a that was part of the getter material 55 on the bottom surface 3c of the first cavity 3b is now positioned on the bottom surface 3c of the first cavity 3b.

[0070] The getter material 55a that falls into the first cavity 3b through the opening 52b of the resist 52 is placed on the getter material 53a placed in the recess 3d. Then, the resist 52 and the getter material 53 are removed. The subsequent steps are the same as those described in the above embodiment (i.e., the step in FIG. 6B). In this manner, the inertial sensor 2 shown in FIG. 10 is manufactured.

[0071] (6.2.3) Effect The wafer bonding structure 1 according to the second modification further includes a getter material 55a disposed on top of the getter material 53a. With this configuration, the getter materials 53a and 55a are disposed on top of each other, so that the gas adsorption effect of the getter material can be further enhanced.

[0072] (6.3) Variation 3 As shown in Figure 13, the manufacturing method of the inertial sensor 2 of variant example 3 is configured in the same way as the manufacturing method of the inertial sensor 2 of variant example 1 (see Figure 8), except that in the process of forming the first through holes 47 in the second wafer 4, multiple first through holes 47 are provided in the second wafer 4, and when viewed in a plane from the thickness direction D1 of the first wafer 3, the multiple first through holes 47 are arranged in a ring shape around the first region M1 of the second wafer 4.

[0073] In the third modification, as described above, in the step of forming the first through holes 47 in the second wafer 4, a plurality of first through holes 47 are provided in the second wafer 4, and the plurality of first through holes 47 are arranged in a ring shape around a first region M1 of the second wafer 4 in a plan view from the thickness direction D1 of the first wafer 3. The first region M1 is a region where the weight portion 41 will be formed in a later step. The plurality of first through holes 47 are arranged symmetrically around the first region M1. In the example of FIG. 13 , the plurality of first through holes 47 are arranged symmetrically (left-right symmetrically) on both sides of the first direction (the left-right direction on the paper surface of FIG. 13 ) in a plan view from the thickness direction of the first wafer 3, and are arranged symmetrically (up-down symmetrically) on both sides of the second direction (the up-down direction on the paper surface of FIG. 13 ) that is perpendicular to the first direction.

[0074] More specifically, in Modification 3, the first through holes 47 are arranged in a ring shape within the second regions M2 that are symmetrically arranged around the first region M1. The second regions M2 are regions where the second through holes 43 will be formed in a later step.

[0075] Furthermore, in Modification 3, a plurality of recesses 3d are formed in the bottom surface 3c of the first cavity 3b of the first wafer 3 in conjunction with the formation of the plurality of first through holes 47. The plurality of recesses 3d are arranged in the bottom surface 3c of the first cavity 3b at positions that overlap the plurality of first through holes 47 in the thickness direction D1 of the first wafer 3. That is, like the plurality of first through holes 47, the plurality of recesses 3d are arranged in an annular shape and are arranged symmetrically in the first direction and the second direction.

[0076] Moreover, in Modification 3, a getter material 53a is disposed in each of the plurality of recesses 3d. That is, the inertial sensor 2 according to Modification 3 includes a plurality of getter materials 53a. This makes it possible to more effectively suppress an increase in the internal pressure of the first cavity 3b of the first wafer 3. Furthermore, since the plurality of getter materials 53a are disposed in an annular shape and symmetrically in the first direction and the second direction, it is possible to maintain a more uniform vacuum internal pressure in the first cavity 3b.

[0077] (6.4) Variation 4 In the above embodiment, the recess 3d in the bottom surface 3c of the first cavity 3b of the first wafer 3 is formed in conjunction with the formation of the first through hole 47 by etching (see FIG. 4C). However, the recess 3d in the bottom surface 3c of the first cavity 3b of the first wafer 3 may be formed in conjunction with the formation of the second through hole 43 by etching, rather than in conjunction with the formation of the first through hole 47 by etching. In this case, the recess 3d is provided in the bottom surface 3c of the first cavity 3b of the first wafer 3 in a portion that overlaps with the second through hole 43 in the thickness direction D1 of the first wafer 3 (more specifically, a portion that overlaps with the first through hole 47). The width (area) of the recess 3d is approximately the same as the width (area) of the overlapping first through hole 47.

[0078] In Modification 4, when forming the first through holes 47 by etching, etching is performed for a time sufficient to penetrate the first through holes 47. When forming the second through holes 43 by etching, etching is performed until the second through holes 43 are formed and further until recesses 3d are formed in the bottom surface 3c of the first cavities 3b of the first wafer 3. In this manner, the recesses 3d are not formed in conjunction with the formation of the first through holes 47 by etching, but are formed in conjunction with the formation of the second through holes 43 by etching.

[0079] (7) Mode The present specification discloses the following aspects.

[0080] The wafer bonding structure (1) of the first aspect includes a first wafer (3) and a second wafer (4). The first wafer (3) has a main surface (3s). The first wafer (3) has a cavity (3b) on the main surface (3s). The second wafer (4) is bonded to the main surface (3s) of the first wafer (3) so as to cover the cavity (3b). The second wafer (4) has a through-hole (43) for adjusting the internal pressure of the cavity (3b) at a position overlapping the cavity (3b) in the thickness direction (D1) of the first wafer (3).

[0081] According to this configuration, the second wafer (4) has a through-hole (43) at a position overlapping the cavity (3b) in the thickness direction (D1) of the first wafer (3). That is, the through-hole (43) is not provided on the outer periphery of the cavity (3b). Therefore, there is no need to secure an area for providing the through-hole (43) on the outer periphery of the cavity (3b). As a result, the chip including the wafer bonded structure (1) can be made smaller. Furthermore, the number of chips per wafer can be increased in the chip including the wafer bonded structure (1).

[0082] In the second embodiment of the wafer bonding structure (1), in the first embodiment, a recess (3d) is provided on the bottom surface (3c) of the cavity (3b) at a position that overlaps with the through hole (43) in the thickness direction (D1) of the first wafer (3).

[0083] According to this configuration, the recess (3d) can be used as a location for disposing the getter material (53a).

[0084] The wafer bonded structure (1) of the third embodiment is the same as that of the second embodiment, and further comprises a getter material (53a) disposed inside the recess (3d).

[0085] According to this configuration, the getter material (53a) is provided inside the recess (3d), and therefore the getter material (53a) is positioned and fixed by the recess (3d), thereby preventing the getter material (53a) from interfering with the second wafer (4).

[0086] The wafer bonding structure (1) of the fourth aspect is any one of the first to third aspects, further comprising a third wafer (5). The third wafer (5) is bonded to a main surface (4t) of the second wafer (4) opposite to the first wafer (3). A second cavity (5b) different from the first cavity (3b), which is the cavity (3b), is provided on the main surface (5s) of the third wafer (5) facing the second wafer (4). The second cavity (5b) is arranged so as to overlap with the through-hole (43) in the thickness direction (D1) of the first wafer (3).

[0087] An inertial sensor (2) of a fifth aspect includes the wafer bonding structure (1) of any one of the first to fourth aspects. The second wafer (4) has an anchor portion (44), a weight portion (41), and a capacitance detection portion (42). The weight portion (41) is supported so as to be displaceable relative to the anchor portion (44). The capacitance detection portion (42) is fixed relative to the anchor portion (44), forms a capacitance between itself and the weight portion (41), and detects the formed capacitance.

[0088] According to this configuration, it is possible to provide an inertial sensor (2) that has the effect of the wafer bonding structure (1) according to any one of the first to fourth aspects.

[0089] In the inertial sensor (2) of the sixth aspect, in the fifth aspect, the through holes (43) are arranged symmetrically around the weight portion (41) when viewed in a plan view from the thickness direction (D1) of the first wafer (3).

[0090] According to this configuration, the detection sensitivity of the inertial sensor (2) can be made symmetrical with respect to the movement of the weight part (41) of the inertial sensor (2).

[0091] A seventh aspect of the manufacturing method for a wafer bonded structure (1) includes a first step, a second step, a third step, and a fourth step. In the first step, a wafer member (50) is bonded in a vacuum to a main surface (3s) of a first wafer (3) on which a cavity (3b) is formed so as to cover the cavity (3b). In the second step, the wafer member (50) is thinned to form a second wafer (4). In the third step, a first through-hole (47) penetrating the second wafer (4) is formed by photoresist at a position overlapping the cavity (3b) in the second wafer (4) in the thickness direction (D1) of the first wafer (3), and a recess (3d) is formed by etching at a position overlapping the first through-hole (47) in the bottom surface (3c) of the cavity (3b) in the thickness direction (D1) of the first wafer (3). In the fourth step, a second through hole (43) is provided in the second wafer (4) so ​​as to have an opening area (W2) larger than the opening area (W1) of the first through hole (47) and to include the first through hole (47) when viewed in a planar view from the thickness direction (D1) of the first wafer (3).

[0092] According to this configuration, the wafer bonding structure (1) of the first aspect can be manufactured. [Explanation of symbols]

[0093] 1 Wafer bonded structure 2 Inertial Sensors 3. First wafer 3s main surface 3b First cavity 3c Bottom 3d recess 4. Second wafer 4t main surface 5. Third wafer 5b Second cavity 5s main surface 41 Weight 42 Capacitance detection unit 43 Through hole, second through hole 44 Anchor part 47 First through hole 53a Getter material D1 thickness direction

Claims

1. a first wafer having a main surface and a cavity formed in the main surface; a second wafer bonded to the main surface of the first wafer so as to cover the cavity, a through-hole for adjusting an internal pressure of the cavity is provided in the second wafer at a position overlapping with the cavity in a thickness direction of the first wafer; Wafer bonded structure.

2. a recess is provided in a bottom surface of the cavity at a position overlapping with the through hole in a thickness direction of the first wafer; The wafer bonding structure of claim 1 .

3. Further comprising a getter material disposed within the recess. The wafer bonding structure of claim 2 .

4. a third wafer bonded to a main surface of the second wafer opposite to the main surface of the first wafer, a second cavity different from the first cavity, which is the cavity, is provided on a main surface of the third wafer facing the second wafer; the second cavity is disposed so as to overlap the through hole in the thickness direction of the first wafer. The wafer bonding structure according to claim 1 or 2.

5. The wafer bonding structure according to claim 1 or 2 is provided, The second wafer is Anchor part and a weight portion supported so as to be displaceable relative to the anchor portion; a capacitance detection section that is fixed relatively to the anchor section, forms a capacitance between the anchor section and the weight section, and detects the formed capacitance; Inertial sensors.

6. the through holes are arranged symmetrically around the weight portion in a plan view in a thickness direction of the first wafer. The inertial sensor according to claim 5 .

7. a first step of bonding, in a vacuum, a wafer member to a main surface of a first wafer on which a cavity is formed so as to cover the cavity; a second step of thinning the wafer member to form a second wafer; a third step of forming a first through-hole penetrating the second wafer by etching at a position in the second wafer that overlaps with the cavity in a thickness direction of the first wafer, and forming a recess by etching at a position in the bottom surface of the cavity that overlaps with the first through-hole in the thickness direction of the first wafer; and a fourth step of providing a second through hole in the second wafer, the second through hole having an opening area larger than an opening area of ​​the first through hole and including the first through hole in a plan view in a thickness direction of the first wafer. Method for manufacturing wafer bonded structures.

Citation Information

Patent Citations

  • Wafer-level package, wafer-level package manufacturing method, and MEMS device manufacturing method

    JP2009289953A