Systems and methods for processing semiconductor wafers using front-end processed wafer geometry metrics

Abstract

To provide a system and a method for processing semiconductor wafers using flatness inspection measurements of a front-end processed wafer.SOLUTION: A method for processing semiconductor wafers includes: obtaining measurement data from a surface of a semiconductor wafer processed by a front-end process tool; determining a center plane of the wafer based on the measurement data, generating raw shape profiles, and generating ideal shape profiles; and generating Gapi profiles based on the raw shape profiles and the ideal shape profiles and calculating a Gapi value of the semiconductor wafer based on the Gapi profiles. The generated Gapi profiles and / or the calculated Gapi value is used to tune the front-end process tool and / or sort the semiconductor wafer for polishing. Systems include at least a front-end process tool, a flatness measurement tool, and a computing device.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 260295, filed August 16, 2021, the disclosure of which is incorporated by reference in its entirety into this application.

[0002] The present disclosure relates generally to semiconductor wafer processing, and more particularly to systems and methods for processing semiconductor wafers using front-end processed wafer metrics. [Background technology]

[0003] Semiconductor wafers are typically used to manufacture integrated circuit (IC) chips, on which the circuits are printed. The circuits are printed as miniaturized identical integrated circuits ("die") onto the surface of the wafer in a multi-step manufacturing process. Specifically, the process involves various stages of electron beam lithography or photolithography processing steps ("lithography") and chemical or physical processing steps (e.g., chemical-mechanical polishing, etching, or passivation). At each stage, a new patterned layer is added to the surface of the wafer or an existing layer is modified. Precise alignment of the layers ("overlay") is critical to the final performance of the chip.

[0004] Chip manufacturers require wafers with extremely flat and parallel surfaces to reduce or eliminate overlay errors and ensure the maximum number of chips can be produced from each wafer. Wafers are first obtained from a single crystal ingot of a suitable material (e.g., silicon). Wafers may be cut from the ingot using, for example, a wire saw. The raw wafer surface is then pre-planarized and etched using additional front-end processing tools, such as grinding tools, lapping tools, or etching tools. Edges may be ground and / or rounded using a chamfering tool. The surface is then polished to produce a smooth, highly reflective, mirror-like wafer surface.

[0005] Conventional metrology tools are sometimes used to determine whether polished wafers meet shape (e.g., shape and / or flatness) specifications prior to lithography. Shape is the long-wavelength component of the wafer's shape in an uncucked state and is defined as the deviation of the wafer's mid-surface from a best-fit central reference surface. It is characterized by global parameters such as bow, which is the sum of the maximum positive and negative deviations from the best-fit plane, and warp, which is the distance between the surface at the center of the wafer and the best-fit plane. Flatness is the variation of wafer thickness relative to a reference plane. It can be characterized by global parameters such as the maximum wafer thickness variation from an ideal flat back surface (GBIR), or local parameters such as site flatness, front reference surface, least-squares reference plane, and range (SFQR).

[0006] With existing wafer metrics, these measurements are only sufficient to predict overlay errors early in the manufacturing process (during the first patterned layer). As more layers are formed on the wafer, elastic deformation occurs, which can change the wafer's shape. Overlay errors can be characterized by in-plane and out-of-plane distortion of the wafer. Patterned wafer shape measurement systems (such as those manufactured by KLA-Tencor) can measure these distortions between patterning steps and provide wafer metrics to account for overlay errors. However, these existing systems use high-precision inspection tools that require polished surfaces and perform measurements after at least part of the manufacturing process has begun. No solutions exist that use flatness inspection measurements of front-end processed wafers to provide a predictive indicator of wafer distortion before manufacturing.

[0007] This Background section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to better understand the various aspects of the present disclosure. As such, it should be understood that these statements are to be read in this light, and not as admissions of prior art. Summary of the Invention

[0008] In one aspect, a method for processing a semiconductor wafer includes providing a first semiconductor wafer processed by a front-end processing tool and acquiring measurement data from scan lines along a surface of the first semiconductor wafer. The measurement data for each scan line includes a thickness profile and a surface profile. The method includes determining a center plane of the wafer based on the measurement data for the scan line, generating a raw shape profile for each scan line based on the measurement data for the scan line and the center plane of the wafer, and generating an ideal shape profile for each scan line based on a polynomial regression of the raw shape profile. The method further includes generating a Gapi profile for each scan line based on the raw shape profile and the ideal shape profile, and calculating a Gapi value for the first semiconductor wafer based on the Gapi profile for the scan line. The method includes determining whether the Gapi value of the first semiconductor wafer is within a predetermined threshold. If the Gapi value of the first semiconductor wafer is not within the predetermined threshold, the method includes adjusting the front-end processing tool based on at least one of the Gapi profiles of the scan line of the first semiconductor wafer and processing a second semiconductor wafer using the adjusted front-end processing tool.If the Gapi value of the first semiconductor wafer is within the predetermined threshold, the method includes sorting the first semiconductor wafer for polishing.

[0009] In another aspect, a system for processing semiconductor wafers includes a front-end processing tool for front-end processing of semiconductor wafers and a flatness inspection tool for acquiring measurement data from scan lines along a surface of the front-end processed wafer. The measurement data for each scan line includes a thickness profile and a surface profile. The system includes a computing device connected to the flatness inspection tool and the front-end processing tool. The computing device is configured to receive the measurement data for the scan lines from the flatness inspection tool, determine a center plane of the wafer based on the measurement data for the scan lines, generate a raw shape profile for each scan line based on the measurement data for the scan line and the center plane of the wafer, and generate an ideal shape profile for each scan line based on a polynomial regression of the raw shape profile. The computing device is configured to generate a Gapi profile for each scan line based on the raw shape profile and the ideal shape profile, calculate a Gapi value for the front-end processed wafer based on the Gapi profile for the scan line, and determine whether the Gapi value for the front-end processed wafer is within a predetermined threshold. The computing device is configured to modify the front-end processing tool based on at least one of the Gapi profiles of the scan line if the Gapi value of the first semiconductor wafer is not within the predetermined threshold.

[0010] In yet another aspect, a method for processing semiconductor wafers includes providing a first semiconductor wafer processed by a front-end processing tool and acquiring measurement data of an edge profile of the first semiconductor wafer. The method includes determining an edge profile center point based on the measurement data, generating a raw height profile based on the measurement data and the edge profile center point, and generating an ideal edge profile based on polynomial regression of the raw height profile. The method also includes generating a Gapi edge profile of the first semiconductor wafer based on the raw height profile and the ideal edge profile, calculating a Gapi edge value of the first semiconductor wafer based on the Gapi edge profile, and determining whether the Gapi edge value of the first semiconductor wafer is within a predetermined threshold. If the Gapi edge value of the first semiconductor wafer is not within the predetermined threshold, the method includes adjusting the front-end processing tool based on the Gapi edge profile of the first semiconductor wafer and processing a second semiconductor wafer using the adjusted front-end processing tool. If the Gapi edge value of the first semiconductor wafer is within the predetermined threshold, the method includes sorting the first semiconductor wafer for polishing.

[0011] In yet another aspect, a system for processing semiconductor wafers includes a front-end processing tool for front-end processing of semiconductor wafers and a flatness inspection tool for acquiring measurement data of an edge profile of the front-end processed wafer. The system includes a computing device connected to the flatness inspection tool and the front-end processing tool. The computing device is configured to receive the measurement data from the flatness inspection tool, determine an edge profile center point based on the measurement data, generate a raw height profile based on the measurement data and the edge profile center point, and generate an ideal edge profile based on a polynomial regression of the raw height profile. The computing device is configured to generate a Gapi edge profile based on the raw height profile and the ideal edge profile, calculate a Gapi edge value for the front-end processed wafer based on the Gapi edge profile, and determine whether the Gapi edge value for the front-end processed wafer is within a predetermined threshold. If the Gapi edge value for the front-end processed wafer is not within the predetermined threshold, the computing device is configured to modify the front-end processing tool based on the Gapi edge profile of the front-end processed wafer.

[0012] Various refinements exist to the features described in connection with the above-described aspects. Likewise, additional features may be incorporated into the above-described aspects. These refinements and additional features may exist individually or in any combination. For example, various features described below in connection with any of the illustrated embodiments may be incorporated into any of the above-described aspects, alone or in any combination. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a process flow of a method for processing wafers using polished wafer shape metrics. [Figure 2] FIG. 1 is a process flow of a method for processing wafers using shape metrics of front-end processed wafers according to the present disclosure. [Figure 3] FIG. 3 is a schematic diagram of four scan lines on a front-end processed wafer surface used to acquire shape measurement data for the front-end processed wafer by a shape measurement tool. [Figure 4] FIG. 4 is a schematic diagram of eight scan lines on a front-end processed wafer surface used to acquire shape measurement data for a front-end processed wafer by a shape measurement tool. [Figure 5] FIG. 5 is a schematic illustration of a spiral scan over a front-end processed wafer surface used to acquire shape measurement data for a front-end processed wafer by a shape measurement tool. [Figure 6] FIG. 6 is a schematic cross-sectional view of a wafer that has been front-end processed. [Figure 7A] 7a and 7b are a set of plots generated using the measurement data obtained from the shape measurement tool and the wafer surface scans of FIGS. 3-5. [Figure 7B] 7a and 7b are a set of plots generated using the measurement data obtained from the shape measurement tool and the wafer surface scans of FIGS. 3-5. [Figure 8] FIG. 8 is a process flow of a method for calculating Gapi values ​​for front-end processed wafers according to the present disclosure. [Figure 9] FIG. 9 is a contour map of a front-end processed wafer showing the raw profile of the wafer. [Figure 10] FIG. 10 is a contour map of the front-end processed wafer of FIG. 9 showing the Gapi profile of the wafer. [Figure 11] FIG. 11 is a contour map of the front-end processed wafer of FIG. 9 showing the in-plane distortion (IPD) of the wafer. [Figure 12]FIG. 12 is a plot showing the correlation between Gapi values ​​calculated for front-end processed wafers and IPD root mean square values ​​calculated for the wafers. [Figure 13] FIG. 13 is a bar graph showing the relationship between the calculated Gapi values ​​of front-end processed wafers and the back-end yield rate of the wafers. [Figure 14] FIG. 14 is a process flow of a method for adjusting front-end processing tools based on Gapi values. [Figure 15] FIG. 15 is a contour map of a front-end processed wafer showing the raw profile of the wafer before adjusting the front-end processing tool. [Figure 16] FIG. 16 is a plot generated using measurement data of the front-end processed wafer of FIG. 15 obtained by a shape measurement tool and scanning the wafer surface along a scan line. [Figure 17] FIG. 17 is a contour map of the front-end processed wafer of FIG. 15 showing the Gapi profile of the wafer and the Gapi values ​​calculated from the Gapi profile. [Figure 18] FIG. 18 is a contour map of the front-end processed wafer of FIG. 15 showing the wafer's IPD profile and the IPD root-mean-square value calculated from the IPD profile. [Figure 19] FIG. 19 is a contour map of a front-end processed wafer showing the raw profile of the wafer after adjusting the front-end processing tools. [Figure 20] FIG. 20 is a plot generated using measurement data of the front-end processed wafer of FIG. 19 obtained by a shape measurement tool and scanning the wafer surface along a scan line. [Figure 21] FIG. 21 is a contour map of the front-end processed wafer of FIG. 19 showing the Gapi profile of the wafer and the Gapi values ​​calculated from the Gapi profile. [Figure 22]FIG. 22 is a contour map of the front-end processed wafer of FIG. 19 showing the wafer's IPD profile and the IPD root-mean-square value calculated from the IPD profile. [Figure 23] FIG. 23 is a process flow of a method for calculating Gapi edge values ​​for front-end processed wafers according to the present disclosure. [Figure 24] FIG. 24 is a plot of the edge profile of a front-end processed wafer. [Figure 25] FIG. 25 is a plot of the edge profile of a front-end processed wafer. [Figure 26] FIG. 26 is a plot of the edge profile of a front-end processed wafer. [Figure 27] FIG. 27 is a block diagram of an example system for processing wafers using shape metrics for front-end processed wafers according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0014] Exemplary systems and methods use Gapi wafer shape metrics generated and / or calculated from measurement data of semiconductor wafers. Generally, and in embodiments of the present disclosure, suitable semiconductor wafers (sometimes referred to as "wafers" or "silicon wafers") include monocrystalline silicon wafers, such as substrate wafers obtained by slicing wafers from ingots formed by the Czochralski or float-zone processes. Each semiconductor wafer includes a central axis, a front surface, and a back surface parallel to the front surface. The front and back surfaces are generally perpendicular to the central axis. The front and back surfaces are joined by a periphery. The semiconductor wafers may be of any diameter suitable for use by those skilled in the art, including, for example, 200 mm diameter wafers, 300 mm diameter wafers, wafers greater than 300 mm diameter, or 450 mm diameter wafers.

[0015] The Gapi metric may be used as an in-plane distortion (IPD) predictor and may be used to sort semiconductor wafers based on a correlation between predicted in-plane distortion and expected back-end yield. The Gapi metric may preferably be generated and / or calculated from metrology data of front-end processed semiconductor wafers, but may also be used for other purposes. The Gapi metric may be utilized to tune front-end processing tools or otherwise sort wafers having Gapi metrics that are applicable for further processing.

[0016] FIG. 1 shows a conventional general process flow 100 for processing semiconductor wafers. In step 102, a front-end processed wafer is provided for further processing. As used herein, "front-end processed" refers to a wafer processed by a front-end processing tool, including, for example, a wafer cut from a single crystal ingot of semiconductor material (e.g., silicon). Front-end processed wafers may have one or both surfaces etched, lapped, or polished, and / or edges rounded. Examples of front-end processing tools include wire saws, lapping tools, grinding tools, chamfering tools, and etching tools.

[0017] The surface condition of the front-end processed wafer provided in step 102 is still relatively rough and generally not suitable for lithography processing, particularly where a flat surface is required. In step 104, the front-end processed wafer is polished. The polishing operation in step 104 may be an intermediate polishing operation and / or a finish polishing operation. In the intermediate polishing operation, the front surface of the front-end processed wafer is polished to improve flatness and remove handling scratches. In the finish polishing operation, the front surface of the wafer is finish polished to remove fine or "micro" scratches from the front surface and produce a highly reflective, damage-free front surface of the wafer. As used herein, "in-process" refers to a wafer that has an intermediate polished and / or finish polished front surface, and optionally has undergone one or more patterning processing steps, as described below. After polishing in step 104, and optionally after additional patterning processing steps, a high-precision inspection tool (e.g., a WaferSight 2 or 2+ bare wafer profilometry system manufactured by KLA-Tencor Corporation) may be used to determine the shape and flatness of the in-process wafer, as well as other parameters such as nanotopography. From these measurements, conventional metrics may be used in step 106 to predict overlay errors for at least the first patterning step.

[0018] In step 108, a series of patterning process steps, including lithography and other chemical and / or mechanical processes (e.g., chemical-mechanical polishing, etching, passivation, diffusion, etc.), are performed to form integrated circuits ("dies") on the wafer. Various layers, which may include, for example, a photomask resist pattern, an oxide layer, and a metal layer, are deposited on the wafer. Each layer formed on the surface may have non-uniform intrinsic stress, resulting in elastic deformation of the wafer shape (e.g., IPD). To mitigate the impact of overlay errors on product yield, steps 106 and 108 may be repeated sequentially, thereby correcting in-process overlay errors by adjusting the lithography tool. However, as the design rules for lithography patterns continue to shrink (e.g., to 10 nm or less), in-process control of overlay errors becomes more difficult. Uncorrectable overlay errors occur when no corrective action is taken by the lithography tool. As a result, the back-end yield of high-quality wafers decreases in wafer grading step 110.

[0019] Referring to FIG. 2, an exemplary general flow 200 for processing semiconductor wafers with improved overlay and process control is shown. A wafer is provided in step 202, similar to step 102 described above in process 100. Process 200 includes an additional processing step 204 in which grading of the front-end processed wafer is performed before further processing and / or fabrication of the wafer. For example, front-end wafer grading step 204 may be performed before wafer polishing step 208 and / or before patterning and layer formation step 212. In step 204, a wafer metric, such as the Gapi metric described in more detail herein, is determined based on the shape and / or flatness of the front-end processed wafer. The wafer is then sorted in step 206 based on this metric. For example, if a wafer is determined to fall outside of a desired specification based on the metric, it may be discarded or identified for further front-end processing in step 206. If the wafer is determined to meet the desired specification, the wafer may be further processed, for example, from polishing step 208. The desired specification may be, for example, an acceptable level of predicted IPD during wafer processing based on correlated back-end yield.

[0020] One advantage of process 200 is that wafer grading is performed before certain irreversible processing steps occur. Out-of-specification wafers identified in step 206 may be salvaged by further processing using front-end processing tools to bring wafer metrics within desired specifications. For example, lapping or grinding processes may be repeated to adjust the wafer's shape and / or flatness. Additionally, by identifying out-of-specification wafers early in wafer processing, improved back-end yields of processed wafers can be achieved in wafer grading step 214. This increases the amount of high-quality die ultimately formed and reduces costs associated with uncorrectable overlay errors that occur during manufacturing. Additionally, the need for in-process overlay control can be reduced or eliminated because wafers to be further processed have been thoroughly inspected for predicted IPD. In this regard, more efficient sequencing between overlay control in step 210 and wafer patterning in step 212 is achieved.

[0021] Referring to FIGS. 3 through 8, an example method for determining the Gapi metric for a front-end processed wafer 300 is described. FIG. 8 illustrates a process flow 400 for determining the Gapi metric. In step 402, a shape measurement tool (also referred to herein as a flatness inspection tool) is used to obtain measurement data from the front-end processed wafer 300 (see FIGS. 3 through 6). Examples of suitable shape measurement tools include a Kobelco SBW series tool, a Kobelco LGW series tool, and a Kobelco LSW series tool. The shape measurement tool preferably uses a capacitance probe or an interferometer to obtain measurement data for one or both surfaces of the wafer 300, including surface height and thickness at points along the one or both surfaces. In one example, the shape measurement tool is a Kobelco SBW-330 tool.

[0022] 3-5, a shape measurement tool can acquire measurement data by scanning along diameter lines 302 (also referred to herein as scan lines 302 or scanned diameter lines 302) extending across a surface 304 (e.g., front surface) of a wafer 300 (FIGS. 3 and 4) or by helical scanning of the surface 304 of the wafer 300 (FIG. 5). The shape measurement tool may acquire measurement data by scanning two or more diameter lines 302, such as four diameter lines 302 (shown in FIG. 3) or eight diameter lines 302 (shown in FIG. 4). The wafer 300 being measured may be unchucked (i.e., freestanding).

[0023] The measurement data acquired by the shape measurement tool includes surface profiles of the wafer 300. Each surface profile is acquired along a corresponding scan diameter line 302 by measuring the surface height at points on the surface 304 (see FIG. 6 ) located along the corresponding scan diameter line 302. For example, each surface profile may include surface heights measured at more than 100 points, more than 200 points, or more than 290 points along the corresponding diameter line 302. Each point has a position along the diameter line 302 extending across the surface 304, measured as a distance (in millimeters, mm) from the center 306 of the surface 304. The surface height measured at each point is expressed as H n (x), where n identifies the scan diameter line and x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n. The surface height is expressed as a reference height, or H ref = 0. The surface profile obtained by scanning along each diameter line 302 includes a range of surface heights measured at points along the corresponding diameter line 302. In one embodiment, the surface profile is obtained by scanning the diameter line 302 only along the surface 304 (e.g., the front surface) of the wafer 300. In another embodiment, the surface profile is obtained by scanning the diameter line 302 along both the surface 304 and the surface 308 (i.e., the front and back surfaces) of the wafer 300 (shown in FIG. 6 ).

[0024] The measurement data acquired by the shape measurement tool includes thickness profiles of the wafer 300. Each thickness profile is acquired along a corresponding scan diameter line 302 by measuring the thickness at a point along the scan diameter line 302. The thickness at each point along each diameter line 302 is measured as the distance between that point and a corresponding point at the same location on another surface 308 of the wafer 300. Thus, the thickness is expressed as the surface height H of the point on the surface 304. n (x) and the surface height of the corresponding point on the surface 308. The thickness at each point along the diameter line 302 can be determined by T n (x), where n identifies the scan diameter line and x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n. The thickness profile obtained by scanning along each diameter line 302 includes a range of thickness values ​​measured at points along each corresponding diameter line 302.

[0025] 8, in step 404, a center plane CP (shown in FIG. 6) of the wafer 300 is determined based on the thickness profile and the surface profile obtained by scanning along the diameter line 302. The center plane CP may be based on a thickness plane TP (shown in FIG. 6) of the wafer 300. The thickness plane TP is located between the front surface 304 and the back surface 308 of the wafer 300. In one example, the thickness plane TP is determined by the surface height H at each point along the scanned diameter line 302. n (x) with thickness T n (x) plus one-half (x). In this regard, the thickness plane TP includes points corresponding to the measurement points of each of the scan lines 302 along the surfaces 304, 308 of the wafer 300. The center plane CP may be determined based on a regression analysis of the points along the thickness plane TP by a least-squares best fit, a moving average, or a polynomial fit. In one example embodiment, the center plane CP is determined by a least-squares best fit of the points along the thickness plane TP.

[0026] 6 is a schematic cross-sectional view of a front-end processed and scanned wafer 300 having a front surface 304 and a back surface 308, along one of the diameter lines 302. Measurement data, including the surface and thickness profile of the wafer 300, is collected by measuring the surface height H at points along the scanned diameter line 302 (shown in FIGS. 3 and 4) extending across the front surface 304 and, optionally, across the back surface 308. n (x) and thickness T n (x) at each point. n (x) is the distance between a point on the front surface 304 and a corresponding point on the back surface 308. The thickness plane TP of the wafer 300 is the surface height H n (x) and thickness T n (x) and (x). The central plane CP of the wafer 300 is determined by regression analysis of points along the thickness plane TP, as described above. The diagram shown in Figure 6 is for reference only and is not intended to depict to scale the surface height or thickness at the measured points on the wafer.

[0027] 8, in step 406, a raw shape profile of the wafer 300 is generated along each scan diameter line 302. Each raw shape profile is generated based on the acquired measurement data, including the surface profile and thickness profile along the corresponding scan diameter line 302, and the determined center plane CP of the wafer 300. Each raw shape profile includes raw shape values ​​calculated at each scan point along the corresponding scan diameter line 302. The raw shape includes a surface height H n (x) and thickness T n (x) and the height of the corresponding point at the same location on the central plane CP. n is calculated at each point using the following formula: RS n (x)=H n (x)+0.5*(T n (x)-CP n (x)) where n identifies the scan diameter line, x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n, and H n (x) is the measured surface height of the point at x along the scan diameter line n, and T n (x) is the measured thickness of the point at x along the scan diameter line n, and CP n (x) is the height of the point on the central plane corresponding to the point at x along the scan diameter line n.

[0028] In some embodiments, the raw shape profile may be smoothed by a moving average. For example, defined windows may be set for the raw shape profile in a direction along each corresponding scan diameter line 302. The windows may have a size of less than 10 mm, less than 5 mm, or less than 3 mm. A moving average of the raw shapes of the points within the window is calculated for each window. The raw shape of the points within each window is then set as the calculated moving average of the window.

[0029] In step 408, an ideal shape profile of the wafer 300 is generated along each scan diameter line 302. Each ideal shape profile is generated based on a polynomial regression of raw shape profiles generated for the corresponding scan diameter line 302. In one example, each ideal shape profile is generated based on a second-order polynomial fitting of raw shape values ​​calculated at points along the corresponding scan diameter line 302. Each ideal shape profile includes ideal shape values ​​calculated at each scan point along the corresponding scan diameter line 302. In one example, the ideal shape IS n is calculated at each point using the following formula: IS n (x)=a*(RS n (x)) 2 +b*(RS n (x))+c where n identifies the scan diameter line, x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n, and RS nwhere (x) is the raw shape value generated for scan diameter line n at x, a and b are polynomial coefficients, and c is the error determined by polynomial fit analysis, which is performed, for example, using Python's NumPy (i.e., the np.polyfit curve fitting function).

[0030] In step 410, a Gapi profile of the wafer 300 is generated along each scan diameter line 302. Each Gapi profile may be generated based on the ideal shape profile and the raw shape profile generated for the corresponding scan diameter line 302. In one example, each Gapi profile is generated by generating a differential shape profile for the corresponding scan diameter line 302. Each differential shape profile includes differential shape values ​​calculated at points along the corresponding scan diameter line 302. Each differential shape may be calculated by comparing the ideal shape and the raw shape at each point along the corresponding scan diameter line 302. In one example, the differential shape DS n is calculated at each point using the following formula: DS n (x)=IS n (x)-RS n (x) where n identifies the scan diameter line, x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n, and RS n (x) is the raw shape value generated for scan diameter line n at x, and IS n (x) is the ideal shape value generated for scan diameter line n at x. A differential shape profile can describe the wafer shape and flatness for each scan diameter line 302 by quantifying the deviation of each of the generated raw shape profiles from their respective corresponding ideal height profiles. In some embodiments, each Gapi profile is generated based solely on the differential shape profile generated for each corresponding scan diameter line 302.

[0031] Each Gapi profile may be based on a differential shape profile generated for the corresponding scan diameter line 302 and a weighting factor applied to the differential shape profile. The weighting factor may be applied (e.g., multiplied by the differential shape value) to account for certain variations (e.g., shape variations and slope changes) in the differential shape profile that significantly affect wafer deformation (e.g., IPD distortion) during processing. The differential shape profile variation may be quantified as a standard variation, variance, or range based on the differential shape values ​​within a moving window defined along the direction of each corresponding scan diameter line 302. A threshold value may be predetermined for the amount of variation allowed before applying the weighting factor. For example, if the differential shape profile variation (e.g., shape variations or slope changes) determined based on the differential shape values ​​within the defined window exceeds a predetermined threshold, a weighting factor may be applied to each differential shape value within the defined window.

[0032] The weighting factors may be applied based on the area variation within a moving window defined along the direction of each corresponding scan diameter line 302. High area variation within a relatively narrow (e.g., less than 20 mm) window can cause wafer distortion because the wafer is more susceptible to high chucking pressure within that window. The area variation may be quantified, for example, as the standard variation, variance, or range of the area of ​​the differential shape profile within the defined window. The defined window may have a size of, for example, less than 20 mm, less than 15 mm, or 11 mm. The weighting factor may be applied to the differential shape value within the window if the area variation of the differential shape profile within the window exceeds a predetermined threshold. In an example embodiment, the area variation is quantified as the standard variation, and the threshold is 0.3 or greater, 0.4 or greater, or 0.5 or greater. The weighting factor may be the standard variation itself in these embodiments. Thus, in one example, if the standard deviation in the defined window is greater than or equal to 0.4, a weighting factor of 0.4 is applied, and if the standard deviation in the defined window is less than 0.4, no weighting factor is applied (i.e., the weighting factor is zero).

[0033] The weighting factor may be applied based on the slope change of the differential shape profile within a moving window defined along the direction of each corresponding scan diameter line 302. A large turning point in the wafer surface profile within a relatively narrow (e.g., less than 10 mm) window may cause wafer distortion because the wafer becomes more susceptible to high chucking pressure within that window. The slope change of the differential shape profile may be quantified, for example, by comparing the direction and the amount of slope in two adjacent defined windows. Each of the adjacent defined windows may have a size of, for example, less than 20 mm, less than 10 mm, or less than 5 mm. The weighting factor is applied to the differential shape value within the defined window if the slope change is outside a predetermined threshold. In one embodiment, the slope is compared by multiplying the slope, and the threshold is less than −0.3, less than −0.35, less than −0.4, less than −0.45, less than −0.5, or a negative value (representing a slope change) less than −0.5. The weighting factor, in these embodiments, may be greater than 1 and up to 3, or from 1.1 to 2, or from 1.2 to 1.4, or 1.3. The weighting factor may be set to 1 if a threshold is not met. Thus, in one example, if the slope change is determined to be less than −0.4, a weighting factor of 1.3 is applied, and if the slope change is determined not to be less than −0.4, a weighting factor of 1 is applied.

[0034] Both the area variation and the slope variation of the differential shape profile within the defined window may be used to determine weighting factors to be applied to the differential shape profile when generating the Gapi profile. In these embodiments, the weighting factors to be applied (e.g., multiplied by the differential shape values ​​within the appropriate window) may be determined by multiplying the weighting factors determined for the area variation and the slope variation. For example, each weighting factor SW applied to the differential shape values ​​calculated for the corresponding scan diameter line 302 within the defined window may be n (x) may be calculated by the following formula: SW n(x)=(SV n (x)+1)*(SC n (x)) where n identifies the scan diameter line, x is the relative distance (mm) of the point from the center 306 of the wafer 300 measured along the scan diameter line n, and SV n (x) is the weighting factor applied based on the standard variation of the point at x within the appropriate window, and SC n (x) is a weighting factor applied based on the gradient change when the point at x is within the appropriate window. In this example, SC n (x) is either 1 (the default if no weighting factor is applied) or greater than 1 (i.e., the determined weighting factor).

[0035] Referring to FIGS. 7a and 7b, an example set of plots is shown, generated using measurement data acquired by a shape measurement tool according to the present disclosure (e.g., by scanning the surface 304 of a wafer 300 along the scan lines shown in FIGS. 3-5). Scan profiles were acquired by scanning a front-end processed wafer surface along eight diameter lines (shown as lines 0 to 7 in FIGS. 7a and 7b). Raw and ideal shape profiles were generated for each scanned diameter line and are shown in each plot. A differential shape profile (not shown) for each diameter line was generated based on the raw and ideal shape profiles, as described above. Weighting factors were determined, in this example, based on the shape deviation and / or slope change of the differential shape profile within a defined window. A Gapi profile (shape difference * shape weighting) for each diameter line was generated by applying the weighting factors to the differential shape values ​​in the appropriate window.

[0036] Referring back to FIG. 8 , in step 412, a Gapi value for the wafer is calculated based on the Gapi profile generated for the scanned diameter line 302. The Gapi value is a global metric that can be used to describe the overall variation in the flatness and / or shape of the wafer relative to an ideal flat surface. The Gapi value can be calculated based on the Gapi profile, for example, as the root mean square value of the values ​​contained in the Gapi profile. As such, the Gapi value may be referred to herein as the "Gapi root mean square" or "Gapi rms."

[0037] 9 through 12 show that the Gapi values ​​calculated for front-end processed wafers correlate well with the IPD prediction metrics provided by a patterned wafer geometry (PWG) metrology system (such as the WaferSight PWGt platform manufactured by KLA-Tencor). The PWG metrology system uses raw PWG data acquired from a high-precision inspection tool (such as the WaferSight 2 or 2+ bare wafer metrology system manufactured by KLA-Tencor) to evaluate in-process distortion and predict overlay errors based on wafer geometry changes. Figure 9 shows a contour map of the raw local geometry features of a front-end processed wafer. As shown in Figures 10 and 11, the contour map of the Gapi profile generated for a front-end processed wafer (Figure 10) and the IPD map generated using a PWG metrology system based on in-process wafer data (Figure 11) demonstrate that IPD can be predicted based on the Gapi profile generated for a front-end processed wafer. More specifically, the generated Gapi profile features of the wafer in Figure 10 (with a Gapi value of 4.324) correlate well with the calculated IPD site root mean square metric and IPD map in Figure 11 of the same wafer (with the local topography features shown in Figure 9), the IPD metric and IPD map being determined after the final polishing step. Figure 12 shows that the calculated global metric of the Gapi profile (both taken as the root mean square of the local values) and the IPD values ​​have a strong correlation, with an R of greater than 0.7 for a variety of wafer topologies. 2 It indicates that it has a value.

[0038] Referring to FIG. 13 , the Gapi value of a front-end processed wafer may be used to predict the back-end yield of a high-quality wafer. The graph in FIG. 13 shows that a high back-end yield of over 50% can be achieved at a Gapi value of 4 or less, particularly at a Gapi value of 3.6 or less, and more particularly at a Gapi value of 3.2 or less. The back-end yield rate may be obtained from empirical data from wafer grading or from wafer metrics based on in-process wafer distortion (such as a yield rate based on an IPD metric for polished wafers). Because Gapi metrics according to the present disclosure have a strong correlation with in-process wafer metrics, it is expected that predicted back-end yield rates correlated to in-process wafer metrics will also correlate to their corresponding Gapi metrics. A front-end processed wafer may be culled (e.g., in step 206 of process 200) if the wafer's calculated Gapi value does not meet a predetermined threshold. The threshold may be set to a Gapi value that correlates with a high back-end yield rate (e.g., greater than 50%, greater than 60%, or greater than 70%). In this regard, advantages such as improved back-end yield, reduced need for overlay error control, and salvage of poor quality wafers can be achieved.

[0039] 14, an example process flow 500 for adjusting a front-end processing tool based on a calculated Gapi value is shown. In step 502, a wafer is processed by a front-end processing tool (e.g., front-end processing tool 702 shown in FIG. 27). For example, the wafer may be cut from a single crystal ingot of semiconductor material (e.g., silicon) using a wire saw. The wafer may also be cut to a desired thickness using a front-end processing tool such as a lapping tool or grinding tool.

[0040] In step 504, a Gapi value for a wafer that has undergone front-end processing (e.g., wire sawing, lapping, and / or grinding) is calculated according to the present disclosure (e.g., by process 400 shown in FIG. 8 ). In step 506, the Gapi value is compared to a predetermined threshold. The predetermined threshold may be based on historical data correlating Gapi values ​​with back-end yield rates. For example, the threshold may be set to a Gapi value that correlates with a back-end yield rate greater than 50%. In one example embodiment, the threshold is set based on the data shown in the graph of FIG. 13 . In some embodiments, the predetermined threshold Gapi value is less than 6, less than 5.5, less than 5, less than 4.5, e.g., less than 4, or less than 3.5. If the Gapi value is within the predetermined threshold (e.g., less than or equal to a threshold Gapi value, such as 5 or less), the front-end processed wafer is selected for polishing in step 508.

[0041] If the Gapi value is not within the predetermined threshold (e.g., greater than the threshold Gapi value), the wafer may not be selected for polishing. In step 510, after it is determined that the Gapi value of the front-end processed wafer is not within the predetermined threshold, one or more of the front-end processing tools may be adjusted (e.g., adjusted and / or modified). The one or more front-end processing tools may be adjusted based on at least one of the Gapi profiles of the wafers having Gapi values ​​outside the predetermined threshold.

[0042] Expanding upon step 510 of process 500, additional reference is made to FIGS. 15 through 22. FIGS. 15 through 18 show a contour map of raw local shape features ( FIG. 15 ), a chart of plots of the raw shape profile, ideal shape profile, and Gapi profile for a single scan diameter line ( FIG. 16 ), a contour diagram of the Gapi profile ( FIG. 17 ), and an IPD contour map ( FIG. 18 ) for a front-end processed wafer having a Gapi value of 5.41 (which, in this example embodiment, is not within (e.g., greater than) the predetermined threshold for step 506 of process flow 500). Thus, the front-end processed wafers of FIGS. 15 through 18 are not selected for polishing in step 508.

[0043] In step 510, one or more front-end processing tools may be adjusted (e.g., modified and / or adjusted) based on at least one of the Gapi profiles used to calculate the Gapi values ​​shown in FIG. 17, such as the Gapi profile shown in FIG. 16. In this example embodiment, a wire saw may be adjusted based on at least one Gapi profile of a wafer. The Gapi profile plot in FIG. 16 shows the Gapi profile of a diameter line (i.e., line: 5) of the wafer that is parallel (or substantially parallel) to the cutting direction of the wire saw. It is observed that relatively high Gapi values ​​of the Gapi profile are located at specific points along the diameter line in the direction of the scanning diameter line, close to the radial edge of the wafer, as shown in FIG. 16. Based on this observation, the wire saw may be adjusted to correct high variations at these points. For example, the values ​​of the slurry temperature or bearing temperature at locations corresponding to these high variation points close to the radial edge of the wafer may be adjusted to obtain a smoother wafer shape at the entrance and exit of the wire when the wafer is cut from the single crystal ingot.

[0044] In step 512, the adjusted front-end processing tool is then used to provide a second front-end processed wafer. FIGS. 19-22 show a contour map of raw local shape features ( FIG. 19 ), a plot chart of the raw shape profile, ideal shape profile, and Gapi profile for a single scanned diameter line ( FIG. 20 ), a contour map of the Gapi profile ( FIG. 21 ), and an IPD contour map ( FIG. 22 ) for the second front-end processed wafer after the front-end processing tool has been adjusted based on the observations from FIGS. 15-18 . As shown in FIGS. 19-22 , the adjustment of the front-end processing tool resulted in an improved Gapi profile (less variation at the radial edge), a lower Gapi value (3.42), and a lower root-mean-square IPD value (16.45) for the second front-end processed wafer. The second front-end processed wafer provided after the adjustment step may be the same wafer processed in step 502, salvaged by repeating the front-end processing step. The second front-end processed wafer processed in the tuned front-end processing tool may be a different wafer.

[0045] One advantage of process 500 is that metrics generated and / or calculated early in wafer processing (e.g., before polishing) can be used to more quickly and efficiently adjust and / or correct front-end processing tools. Existing metrics used to predict wafer deformation during manufacturing require wafers to be polished to obtain high-quality wafer shape and / or flatness data. Processing anomalies in front-end tools (e.g., wire saws, lapping tools, or grinding tools) cannot be identified until the front-end processed wafers are polished. Typically, a significant amount of time (hours, days, or weeks) passes between front-end processing and wafer polishing. During that time, a large number of wafers may be processed by the front-end processing tool, thus risking surface variations and unacceptable Gapi values ​​that are not identified until the initial wafers are polished and scanned. In this regard, process 500 can offer a significant improvement by providing early detection of processing anomalies in front-end processing, which can be corrected by adjusting the front-end processing tool, thereby affecting fewer wafers.

[0046] 23 through 26, a method for determining a Gapi edge metric for a front-end processed wafer is described. In addition to the Gapi metric used in accordance with the present disclosure, a Gapi edge metric may be used to characterize the wafer edge profile. Wafer edge conditions are known to have a significant impact on edge die yield. For example, problems related to film layer separation (i.e., delamination), particle contamination, and photoresist offset error, each of which adversely affect edge die yield, are known to result from defects at the wafer edge. Using the Gapi edge metric in accordance with the present disclosure can ensure the production of wafers with sufficiently smooth edges, and therefore can provide similar improvements in back-end yield, as discussed above with respect to the Gapi metric.

[0047] 23 illustrates a process 600 for calculating Gapi edge values ​​for a front-end processed wafer. In step 602, measurement data of the edge profile of the front-end processed wafer is obtained. For example, the edge profile data may be obtained using a commercially available 3D microscope such as a coherence scanning interferometer microscope (such as those manufactured by Zygo, Olympus, or Keyence), a confocal laser scanning microscope, or a laser scanning microscope. The measured wafer may be in an unchucked (i.e., freestanding) state.

[0048] In step 604, a simplification algorithm is used to convert the edge profile data into a simplified curve by reducing the set of points included in the edge profile. For example, the simplified curve of the edge profile data may be generated based on the Ramer-Douglas-Peucker algorithm (i.e., an iterative endpoint fit algorithm). In this example, the amount of points that make up the edge profile can be set by adjusting the epsilon (ε) parameter used in the Ramer-Douglas-Peucker algorithm, as will be understood by those skilled in the art. In one embodiment, ε is adjusted so that the number of curves is reduced to three points. The profile center point is determined as the middle point on the simplified curve. For example, the profile center point is determined as the middle of three points on the simplified curve in one embodiment.

[0049] In step 606, a centered raw height profile is generated based on the edge profile data acquired in step 602 and the profile center point determined in step 604. The raw height profile is extracted from the edge profile based on the profile center point. For example, raw height points located at + / - N (number of points) from the edge profile center point are extracted. N is adjusted to screen out front or tail points. For example, N may be greater than 200 points but less than 400 points, greater than 300 points but less than 375 points, or even 350 points. Because the number of raw points extracted on both sides of the profile center point is the same value N, the edge profile center point becomes a turning point of the curve (as shown in FIGS. 24 to 26).

[0050] In step 608, an ideal edge profile is generated based on the centered raw height profile. The ideal edge profile may be generated based on a polynomial regression of the centered raw height profile. In one example, the ideal height profile includes ideal edge values ​​calculated based on a third-order polynomial fitting of the raw height values ​​of the points included in the centered raw height profile. Each ideal edge value can be expressed by the following exemplary equation: IE(x)=a*(RH(x)) 3 +b*(RH(x)) 2 +c*(RH(x))+d where x is the relative distance along the centered edge profile direction from the reference point x=0, RH(x) is the raw height value of the centered raw height edge profile at x, a, b, and c are polynomial coefficients, and d is the error determined by a polynomial fit analysis. The polynomial fit analysis is performed, for example, using Python's NumPy (i.e., the np.polyfit curve fitting function).

[0051] In step 610, a Gapi edge profile is generated for the wafer. The Gapi edge profile may be generated based on the ideal edge profile and the centered raw height profile. In one example embodiment, the Gapi profile is generated by generating a differential edge profile. The differential edge profile includes differential edge values ​​that may be calculated by comparing the ideal edge value and the raw height value at each point along the centered raw height profile. For example, the differential edge profile may be expressed by the following equation: DE(x)=IE(x)-RH(x) where x is the relative distance along the centered edge profile direction from a reference point x=0, RH(x) is the raw height value of the centered raw height edge profile at x, and IE(x) is the ideal edge value of the ideal edge profile at x. The differential edge profile can describe the wafer edge condition of the wafer by quantifying the deviation of the centered raw height profile from the ideal edge profile. In some embodiments, the Gapi edge profile is generated based solely on the differential edge profile.

[0052] The Gapi edge profile may be based on the generated differential edge profile and a weighting factor applied to the differential edge profile. The weighting factor may be applied (e.g., multiplied by the differential edge value) to account for certain variations (e.g., shape variations and slope changes) in the differential edge profile that may significantly affect wafer deformation (e.g., IPD distortion) during processing. The differential edge profile variation may be quantified as a standard variation, variance, or range based on the differential edge profile within a moving window defined along the centered edge profile direction. A threshold may be predetermined for the amount of variation or slope change in the differential edge profile that is tolerated before applying the weighting factor. For example, if the variation change determined based on the differential edge values ​​within the defined window exceeds a predetermined threshold, a weighting factor may be applied to each differential edge value within the defined window.

[0053] The weighting factor may be applied based on the area variation within a defined window along the centered edge profile direction. High area variation in the edge profile within a relatively narrow (e.g., less than 20 points) window may cause wafer distortion because the wafer may be more susceptible to high chucking pressure within that window. The area variation may be quantified, for example, as the standard variation, variance, or range of the area of ​​the differential edge profile within the defined window. The defined window may have a size of, for example, less than 20 points, less than 15 points, or 11 points. The weighting factor is applied to the differential edge value within the window if the area variation of the differential edge profile within the window exceeds a predetermined threshold. In an example embodiment, the area variation is quantified as the standard variation, and the threshold is 800 nm or more, 900 nm or more, 1000 nm or more, 1100 nm or more, or 1200 nm or more. The weighting factor in these embodiments may be calculated by dividing the standard variation itself by the threshold value. Thus, in one example, if the standard variation (SV) is greater than or equal to 1000 nm in the defined window, a weighting factor of (SV / 1000) is applied, and if the standard variation is less than 1000 nm in the defined window, no weighting factor is applied (i.e., the weighting factor is zero).

[0054] A weighting factor may be applied based on the slope change of the differential edge profile within a defined window along the direction of the centered edge profile. A large turning point in the wafer edge profile along a relatively narrow (e.g., less than 70 points) window size may cause wafer distortion because the wafer becomes more susceptible to high chucking pressure in that window. The slope change of the differential edge profile may be quantified, for example, by comparing the direction and the amount of slope in two adjacent defined windows. Each of the adjacent defined windows may have a size of, for example, less than 50 points, less than 40 points, or less than 33 points. A weighting factor is applied to differential edge values ​​within the defined window if the slope change is outside a predetermined threshold. In one example embodiment, the slope is compared by multiplying the slope, and the threshold is a negative value (representing a slope change) of less than -0.3, less than -0.35, less than -0.4, less than -0.45, less than -0.5, or less than -0.55. The weighting factor may be 3 to 9, or 4 to 8, or 6 in these embodiments. If the threshold is not met, the weighting factor may be set to 1. Thus, in one example, if the slope change is determined to be less than -0.45, a weighting factor of 6 is applied, and if the slope change is determined not to be less than -0.45, a weighting factor of 1 is applied.

[0055] Both the area variation and the slope variation of the differential edge profile within the defined window may be used to determine weighting factors to be applied to the differential edge profile when generating the Gapi edge profile. In these embodiments, the weighting factors to be applied (e.g., multiplied by the differential edge values ​​within the appropriate window) may be determined by multiplying the weighting factors determined for the area variation and slope variation. For example, each weighting factor SW applied to the differential edge values ​​within the defined window may be E may be calculated by the following formula: SW E (x)=(SV E (x) / 1000+1)*(SCE (x)) where x is the relative distance along the direction of the centered edge profile from the reference point x=0, and SV E (x) is the weighting factor applied based on the standard variation of the differential edge profile if the point at x is within the appropriate window, and SC E (x) is a weighting factor that is applied based on the gradient change of the differential edge profile if the point at x is within the appropriate window. In this example, SC E (x) is either 1 (the default if no weighting factor is applied) or greater than 1 (i.e., the determined weighting factor).

[0056] 24-26, an example of a set of plots generated according to process 600 is shown. In particular, Gapi edge plots are shown for a wafer edge with the worst edge profile, a wafer edge with a poor edge profile, and a wafer edge with an ideal edge profile. Measurement data for the edge profile of each wafer edge was acquired using a commercially available 3D microscope (such as the microscope described above in step 602). A centered raw height profile and an ideal edge profile generated for each wafer edge are shown in each plot. A differential edge profile (not shown) for each wafer edge was generated based on the centered raw height profile and the ideal edge profile. As described above, weighting factors were determined in this example based on shape variations and / or slope changes in the differential edge profile of each wafer edge within a defined window. A Gapi edge profile (edge ​​difference * edge weighting factor) for each wafer edge was generated by applying the weighting factor to the differential edge value in the appropriate window.

[0057] 23 , in step 412, a Gapi edge value for the wafer is calculated based on the Gapi edge profile of the wafer edge. The Gapi edge value is a global metric that can be used to describe the overall variation of the wafer edge profile relative to an ideal plane. In one example embodiment, the Gapi value edge can be calculated based on the Gapi edge profile, for example, as the root mean square value of the values ​​that make up the Gapi edge profile (also referred to as "Gapi edge root mean square" or "Gapi edge rms"). In another example embodiment, the Gapi edge value is calculated as the maximum edge value of the Gapi edge profile (also referred to as "Gapi edge maximum value" or "Gapi edge max").

[0058] As shown in FIGS. 24-26 , a Gapi edge value calculated as the root mean square value and / or maximum value of the Gapi edge profile can describe a wafer edge profile. For example, a good edge profile can be characterized as having a Gapi edge value within a predetermined threshold (e.g., a Gapi edge maximum of less than 90 and / or a Gapi edge rms of less than 10). The predetermined threshold may be determined, for example, by correlating the Gapi edge profile with back-end yield rates, as described above. In some examples, the predetermined threshold for the Gapi edge value calculated as the root mean square value of the Gapi edge profile may be less than 10, less than 9, less than 8, less than 7, less than 6, less than 5, less than 4, or less than 3. In some embodiments, the predetermined threshold for the Gapi edge value calculated as the maximum value of the Gapi edge profile may be less than 90, less than 80, less than 70, less than 60, less than 50, less than 40, less than 30, less than 20, or less than 10.

[0059] Referring again to FIG. 14 , a process flow 500 for adjusting a front-end processing tool may include adjusting the front-end processing tool using a Gapi edge value calculated as described herein. In step 502, a first wafer is processed by a front-end processing tool (e.g., front-end processing tool 702 shown in FIG. 27 ) as described above. In step 504, a Gapi edge value for the first front-end processed wafer is calculated in accordance with the present disclosure (e.g., by process 600 shown in FIG. 23 ). In step 506, the Gapi edge value is compared to a predetermined threshold. If the Gapi edge value is within the predetermined threshold (e.g., less than or equal to a Gapi edge maximum threshold, such as less than or equal to 90, or less than or equal to a Gapi edge rms threshold, such as less than or equal to 10), the first front-end processed wafer is selected for polishing in step 508. If the Gapi edge value is not within the predetermined threshold (e.g., greater than a Gapi edge maximum or Gapi edge rms value threshold), the first wafer may not be selected for polishing. In step 510, one or more of the front-end processing tools may be adjusted (e.g., adjusted and / or modified) after it is determined that the Gapi edge value of a first front-end processed wafer is not within a predetermined threshold. The one or more front-end processing tools may be adjusted based on the Gapi edge profile of the wafer having a Gapi edge value outside the predetermined threshold. In step 512, the adjusted front-end processing tool is used to provide a second front-end processed wafer, which may be the same wafer as the first front-end processed wafer or may be a different wafer.

[0060] 27, a block diagram of a system 700 for processing wafers using shape metrics of front-end processed wafers in accordance with the present disclosure is shown. The system 700 includes a front-end processing tool 702, a flatness inspection tool 704, and a computing device 706 connected or communicatively coupled to the front-end processing tool 702 and / or the flatness inspection tool 704.

[0061] The front-end processing tool 702 may be any machining tool configured to provide a front-end processed wafer according to the present disclosure. In one example embodiment, the front-end processing tool 702 is a wire saw. In other embodiments, the front-end processing tool 702 may be a grinding tool, a lapping tool, a chamfering tool, or an etching tool.

[0062] The flatness inspection tool 704 is a wafer shape measurement tool configured to acquire measurement data from a front-end processed wafer. For example, the flatness inspection tool 704 may acquire measurement data by scanning the surface of the front-end processed wafer (e.g., by scanning diameter lines on the wafer 300 as shown in FIGS. 3 and 4 or by a spiral scan as shown in FIG. 5) using a capacitance probe or an interferometer. The measurement data acquired by scanning the surface of one or both sides of the wafer includes surface profile data and thickness profile data of the wafer. In one example, the flatness inspection tool 704 is a Kobelco SBW-330 tool. The flatness inspection tool 704 may have the same functionality as the shape measurement tool described in detail above with respect to FIGS. 3 through 5. In another example, the flatness inspection tool 704 acquires measurement data of the wafer's edge profile. In this example, the flatness inspection tool 704 may be a commercially available 3D microscope suitable for acquiring wafer edge profile data, such as a coherence scanning interferometer microscope, a confocal laser microscope, or a laser scanning microscope.

[0063] Computing device 706 includes a processor 708 for executing instructions. In some embodiments, executable instructions are stored in memory area 710. Processor 708 may include one or more processing units (e.g., a multi-core configuration). Memory area 710 is any device that allows for the storage and retrieval of information, such as executable instructions and / or data. Memory area 710 may include one or more computer-readable storage devices or other computer-readable media, including transitory and non-transitory computer-readable media.

[0064] Computing device 706 includes at least one media output component 712 for presenting information to a user (e.g., an end user of the wafers, a quality control person, etc.). Media output component 712 is any component capable of communicating information to a user. In some embodiments, media output component 712 includes an output adapter, such as a video adapter and / or an audio adapter. The output adapter is operably connected to processor 708 and operably connected to an output device, such as a display device (e.g., a liquid crystal display (LCD), an organic light-emitting diode (OLED) display, a cathode ray tube (CRT), or an “electronic ink” display) or an audio output device (e.g., speakers or headphones). In some embodiments, at least one of the display device and / or audio device is included in media output component 712.

[0065] In some embodiments, computing device 706 includes input device(s) 714 for accepting input from a user. Input device(s) 714 may include, for example, a keyboard, a pointing device, a mouse, a stylus, a touch panel (e.g., a touchpad or touchscreen), a gyroscope, an accelerometer, a position detector, or an audio input device. A single component, such as a touchscreen, may function as both an output device for media output component 712 and as input device 714.

[0066] Computing device 706 may include a communications interface 716 that can be communicatively coupled to one or more remote devices. Communications interface 716 may include, for example, a wired or wireless network adapter or a wireless data receiver for use with a cellular network (e.g., Global System for Mobile communications (GSM), 3G, 4G, or Bluetooth) or other mobile data network (e.g., Worldwide Interoperability for Microwave Access (WIMAX)).

[0067] Memory area 710 stores processor-executable instructions for, for example, receiving and processing input from flatness inspection tool 704 and modifying front-end processing tool 702 based on the processed input received from flatness inspection tool 704. For example, memory area 710 may store instructions that cause processor 708 to perform process 400 shown in FIG. 8, process 500 shown in FIG. 14, and / or process 600 shown in FIG. 23, each of which are described in detail above.

[0068] Memory area 710 may include, but is not limited to, any computer operating hardware suitable for storing and / or retrieving processor-executable instructions and / or data. Memory area 710 may include random access memory (RAM), such as dynamic RAM (DRAM) or static RAM (SRAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and nonvolatile RAM (NVRAM). Memory area 710 may also include multiple storage devices, such as hard disks or solid-state disks in a redundant array of inexpensive disks (RAID) configuration. Memory area 710 may also include a storage area network (SAN) and / or a network-attached storage (NAS) system. In some embodiments, memory area 710 may include memory integrated with computing device 706. For example, computing device 706 may include one or more hard disk drives as memory area 710. Memory area 710 may also include memory external to computing device 706 that can be accessed by multiple computing devices. The memory types listed above are exemplary and thus not limiting of the types of memory that may be used to store processor-executable instructions and / or data.

[0069] When introducing elements of the present disclosure or embodiments of the present disclosure, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the elements. The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements.

[0070] Because various changes may be made in the structure and methods described above without departing from the scope of the present disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings be interpreted as illustrative and not in a limiting sense.

Claims

1. 1. A method for processing a semiconductor wafer, comprising: The method comprises: providing a first semiconductor wafer processed by a front-end processing tool; acquiring measurement data from scan lines along a surface of the first semiconductor wafer, wherein the measurement data for each scan line includes a thickness profile and a surface profile; determining a center plane of the wafer based on the measurement data of the scan line; generating a raw shape profile for each scan line based on the measurement data for the scan line and the central plane of the wafer; generating an ideal shape profile for each scan line based on a polynomial regression of the raw shape profile; generating a Gapi profile for each scan line based on the raw shape profile and the ideal shape profile; Calculating a Gap value of the first semiconductor wafer based on the Gap profile of the scan line; determining whether the Gapi value of the first semiconductor wafer is within a predetermined threshold; if the Gapi value of the first semiconductor wafer is not within the predetermined threshold value; adjusting the front-end processing tool based on at least one of the Gapi profiles of the scan line of the first semiconductor wafer; processing a second semiconductor wafer using the conditioned front-end processing tool; If the Gapi value of the first semiconductor wafer is within the predetermined threshold, the first semiconductor wafer is selected for polishing. A method comprising:

2. The method of claim 1 , wherein determining the central plane of the wafer is based on a regression analysis of the measurement data of the scan lines.

3. The method of claim 2 , wherein the regression analysis comprises least squares fitting.

4. The method of claim 1 , wherein the raw shape profile for each scan line is smoothed with a moving average before generating the ideal shape profile for each scan line.

5. The method of claim 1 , wherein generating the ideal shape profile for each scan line is based on a second-order polynomial regression of the raw shape profile.

6. generating a differential shape profile by comparing the raw shape profile with the ideal shape profile for each scan line; For each scan line, generate a weighted shape profile based on the variation of the differential shape profile along the direction of the scan line. Furthermore, The method of claim 1 , wherein the Gapi profile for each scanline is generated based on the differential shape profile and the weighting profile.

7. 7. The method of claim 6, wherein the weighted shape profile is generated based on at least one of a shape variation and a gradient variation of the differential shape profile, each of the shape variation and the gradient variation being determined within a moving window defined along the direction of the scan line.

8. The method of claim 1 , wherein the front-end processing tool is selected from the group consisting of a wire saw, a lapping tool, and a grinding tool.

9. The method of claim 1 , wherein the Gapi value of the first semiconductor wafer is calculated based on a root mean square value of the Gapi profile.

10. The method of claim 9 , wherein the predetermined threshold for the Gapi root mean square value is 6 or less.

11. 10. The method of claim 1, wherein the second semiconductor wafer is the same wafer as the first semiconductor wafer.

12. 1. A system for processing semiconductor wafers, comprising: The system comprises: a front-end processing tool for front-end processing of semiconductor wafers; a flatness inspection tool for acquiring measurement data from scan lines along a surface of the front-end processed wafer, wherein the measurement data for each scan line includes a thickness profile and a surface profile; a computing device connected to the flatness inspection tool and the front-end processing tool; Equipped with the computing device, receiving the measurement data for the scan line from the flatness inspection tool; determining a center plane of the wafer based on the measurement data of the scan line; generating a raw shape profile for each scan line based on the measurement data for the scan line and the central plane of the wafer; generating an ideal shape profile for each scan line based on a polynomial regression of the raw shape profile; generating a Gapi profile for each scan line based on the raw shape profile and the ideal shape profile; Calculating a Gap value for the front-end processed wafer based on the Gap profile of the scan line; determining whether the Gapi value of the front-end processed wafer is within a predetermined threshold; If the Gap value of the first semiconductor wafer is not within the predetermined threshold, modifying the front-end processing tool based on at least one of the Gap profile of the scan line. The system is configured as follows:

13. 13. The system of claim 12, wherein the computing device is configured to determine the center plane of the wafer based on a regression analysis of the measurement data of the scan lines.

14. The system of claim 13 , wherein the regression analysis comprises least squares fitting.

15. 13. The system of claim 12, wherein the computing device is configured to smooth the raw shape profile of each scan line with a moving average before generating the ideal shape profile for each scan line.

16. The system of claim 12 , wherein the computing device is configured to generate the ideal shape profile for each scan line based on a second-order polynomial analysis of the raw shape profile.

17. the computing device, generating a differential shape profile by comparing the raw shape profile with the ideal shape profile for each scan line; For each scan line, generate a weighted shape profile based on the variation of the differential shape profile along the direction of the scan line. It is further structured as follows: The system of claim 12 , wherein the Gapi profile for each scanline is generated based on the differential shape profile and the weighting profile.

18. The system of claim 12 , wherein the front-end processing tool is selected from the group consisting of a wire saw, a lapping tool, and a grinding tool.

19. 13. The system of claim 12, wherein the computing device is further configured to calculate the Gapi value of the front-end processed wafer based on a root mean square value of the Gapi profile.

20. 20. The system of claim 19, wherein the predetermined threshold for the Gapi root mean square value is 6 or less.

21. 1. A method for processing a semiconductor wafer, comprising: The method comprises: providing a first semiconductor wafer processed by a front-end processing tool; acquiring measurement data of an edge profile of the first semiconductor wafer; determining an edge profile center point based on the measurement data; generating a raw height profile based on the measurement data and the edge profile center points; generating an ideal edge profile based on a polynomial regression of the raw height profile; generating a Gapi edge profile for the first semiconductor wafer based on the raw height profile and the ideal edge profile; Calculating a Gapi edge value of the first semiconductor wafer based on the Gapi edge profile; determining whether the Gapi edge value of the first semiconductor wafer is within a predetermined threshold; the Gapi edge value of the first semiconductor wafer is not within the predetermined threshold; adjusting the front-end processing tool based on the Gapi edge profile of the first semiconductor wafer; processing a second semiconductor wafer using the conditioned front-end processing tool; If the Gapi edge value of the first semiconductor wafer is within the predetermined threshold, the first semiconductor wafer is selected for polishing. A method comprising:

22. determining the edge profile center point includes applying a simplification algorithm to convert the edge profile measurement data into a simplified curve including three points; The method of claim 21 , wherein the edge profile center point is the middle point of the three points.

23. 23. The method of claim 22, wherein the simplification algorithm is an iterative endpoint fit algorithm.

24. The method of claim 21 , wherein generating the raw height profile includes extracting an equal number of raw height points on either side of the edge profile center point.

25. 22. The method of claim 21, wherein generating the ideal height profile is based on the third order polynomial fitting of the raw height profile.

26. generating a differential edge profile by comparing the raw height profile with the ideal height profile; generating a weighting profile based on the variation of the difference edge profile along the direction of the edge profile; Furthermore, The method of claim 21 , wherein the Gapi edge profile is generated based on the difference edge profile and the weighting profile.

27. 27. The method of claim 26, wherein the weighting profile is generated based on at least one of a shape variation and a gradient variation of the difference edge profile, each of the shape variation and the gradient variation being determined within a moving window defined along the direction of the edge profile.

28. 22. The method of claim 21, wherein the front-end processing tool is selected from the group consisting of a wire saw, a lapping tool, and a grinding tool.

29. 22. The method of claim 21, wherein the Gapi edge value of the first semiconductor wafer is calculated based on a root mean square value of the Gapi edge profile.

30. 30. The method of claim 29, wherein the predetermined threshold for the Gapi Edge Root Mean Square value is less than or equal to 10.

31. 22. The method of claim 21, wherein the Gapi edge value of the first semiconductor wafer is calculated based on a maximum value of the Gapi edge profile.

32. 32. The method of claim 31 , wherein the predetermined threshold for the Gapi edge maximum is less than or equal to 90.

33. 22. The method of claim 21, wherein the second semiconductor wafer is the same wafer as the first semiconductor wafer.

34. 1. A system for processing semiconductor wafers, comprising: The system comprises: a front-end processing tool for front-end processing of semiconductor wafers; a flatness inspection tool for obtaining measurement data of an edge profile of the front-end processed wafer; a computing device connected to the flatness inspection tool and the front-end processing tool; Equipped with the computing device, receiving the measurement data from the flatness inspection tool; determining an edge profile center point based on the measurement data; generating a raw height profile based on the measurement data and the edge profile center points; generating an ideal edge profile based on a polynomial regression of the raw height profile; generating a Gapi edge profile based on the raw height profile and the ideal edge profile; Calculating a Gapi edge value for the front-end processed wafer based on the Gapi edge profile; determining whether the Gapi edge value of the front-end processed wafer is within a predetermined threshold; If the Gapi edge value of the front-end processed wafer is not within the predetermined threshold, modifying the front-end processing tool based on the Gapi edge profile of the front-end processed wafer. The system is configured as follows:

35. the computing device is configured to determine the edge profile center point by applying an iterative endpoint fit algorithm to convert the edge profile measurement data into a simplified curve containing three points; 35. The system of claim 34, wherein the edge profile center point is a central point of the three points.

36. 35. The system of claim 34, wherein the computing device is configured to generate a raw height profile by extracting an equal number of raw height points on either side of the edge profile center point.

37. 35. The system of claim 34, wherein the computing device is configured to generate the ideal height profile based on a third order polynomial fitting of the raw height profile.

38. the computing device, generating a differential edge profile by comparing the raw height profile with the ideal height profile; generating a weighting profile based on at least one of a shape variation and a gradient variation of the difference edge profile along a direction of the edge profile, wherein each of the shape variation and the gradient variation is determined within a moving window defined along the direction of the edge profile; It is further structured as follows:

35. The system of claim 34, wherein the Gapi edge profile is generated based on the difference edge profile and the weighting profile.

39. the computing device is configured to calculate the Gapi edge value for the front-end processed wafer based on a root mean square value of the Gapi edge profile; 35. The system of claim 34, wherein the predetermined threshold for the Gapi Edge Root Mean Square value is less than or equal to 10.

40. the computing device is further configured to calculate the Gapi edge value for the front-end processed wafer based on a maximum value of the Gapi edge profile; 35. The system of claim 34, wherein the predetermined threshold for the Gapi edge maximum is 90 or less.

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