Semiconductor integrated circuit and ecu

Abstract

To provide a semiconductor integrated circuit capable of performing AI processing at high speed.SOLUTION: According to an embodiment, a semiconductor integrated circuit comprises a first storage circuit that is a non-volatile memory storing parameters of an AI model, an arithmetic circuit that performs arithmetic processing on input data using the parameters, and a control circuit that controls the first storage circuit and the arithmetic circuit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor integrated circuit and an ECU. [Background technology]

[0002] In recent years, development of semiconductor integrated circuits (IC chips) for performing AI processing has progressed. For example, Cited Document 1 discloses an artificial intelligence processing unit comprising a plurality of identical artificial intelligence processing dies, each of which includes at least one inter-die input block and at least one inter-die output block, and which is communicatively coupled to other of the plurality of identical artificial intelligence processing dies via one or more communication paths from the at least one inter-die output block of the artificial intelligence processing die to the at least one inter-die input block of the artificial intelligence processing die, and which corresponds to at least one layer of a neural network. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-137046 Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional semiconductor integrated circuits, AI parameters are stored in random access memory (RAM) so that they can be updated. However, parameters for large-scale models such as large language models (LLMs), which have become popular in recent years, typically require large amounts of data and are therefore stored in external dynamic RAM (DRAM). However, this poses a problem in that the speed of AI processing is limited by the data transfer speed (bandwidth) of the DRAM.

[0005] The present invention has been made in view of the above-mentioned problems, and has an object to provide a semiconductor integrated circuit capable of executing AI processing at high speed. [Means for solving the problem]

[0006] According to one embodiment, a semiconductor integrated circuit includes a first storage circuit that is a non-volatile memory that stores parameters of an AI model, an arithmetic circuit that performs arithmetic processing on input data using the parameters, and a control circuit that controls the first storage circuit and the arithmetic circuit. [Effects of the Invention]

[0007] According to one embodiment, it is possible to provide a semiconductor integrated circuit capable of executing AI processing at high speed. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a block diagram showing an example of the configuration of a semiconductor integrated circuit 1. FIG. [Figure 2] 1 is a flowchart showing an example of processing executed by the semiconductor integrated circuit 1. [Figure 3] 10 is a flowchart showing another example of the processing executed by the semiconductor integrated circuit 1. [Figure 4] 1 is a block diagram showing an example of the configuration of a semiconductor integrated circuit 1A. [Figure 5] FIG. 2 is a block diagram showing an example of the configuration of a semiconductor integrated circuit 1B. [Figure 6] FIG. 2 is a block diagram showing an example of the configuration of a semiconductor integrated circuit 1C. [Figure 7] FIG. 2 is a block diagram showing an example of an ECU 100. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, each embodiment of the present invention will be described with reference to the accompanying drawings. Note that, in the description of the specification and drawings relating to each embodiment, components having substantially the same functional configuration are designated by the same reference numerals, and redundant description will be omitted.

[0010] <Configuration of semiconductor integrated circuit 1> First, the configuration of a semiconductor integrated circuit 1 according to this embodiment will be described. The semiconductor integrated circuit 1 is an IC (Integrated Circuit) chip that executes arithmetic processing (AI processing) using an AI model. The AI ​​model is, for example, a large-scale model such as an LLM, but is not limited to this.

[0011] 1 is a block diagram showing an example of a semiconductor integrated circuit 1. As shown in FIG. 1, the semiconductor integrated circuit 1 includes a communication circuit 11, a control circuit 12, an arithmetic circuit 13, a ROM (Read Only Memory) 13, an SRAM 15, and a memory controller 16.

[0012] The communication circuit 11 is a circuit capable of communicating with an external device. The communication circuit 11 is, for example, PCIe (Peripheral Component Interconnect Express), but is not limited to this. In the example of FIG. 1, a host 2 and a conversion circuit 3 are external devices that are communicably connected to the semiconductor integrated circuit 1 via the communication circuit 11. The external devices are not limited to the host 2 and the conversion circuit 3. The host 2 and the conversion circuit 3 will be described later.

[0013] The control circuit 12 is connected to each component of the semiconductor integrated circuit 1 and controls the entire semiconductor integrated circuit 1. Specifically, the control circuit 12 is connected to the communication circuit 11, the arithmetic circuit 13, the ROM 14, the SRAM 15, and the memory controller 16, and controls these components to execute AI processing. Specifically, the control circuit 12 starts AI processing in response to a request from the host 2, modifies parameters or calculation results using update data read from the SRAM 15, causes the arithmetic circuit 13 to read parameters from the ROM 15 and execute calculation processing, and acquires the calculation results of the arithmetic circuit 13 and outputs them to an external device.

[0014] The arithmetic circuit 13 is a circuit that executes arithmetic processing (AI processing) using an AI model. Specifically, the arithmetic circuit 13 reads parameters of the AI ​​model, executes arithmetic processing using the parameters on input data, and outputs the arithmetic results. The arithmetic processing includes mathematical operations such as matrix operations and exponential operations. In the example of FIG. 1, the semiconductor integrated circuit 1 includes four arithmetic circuits 13, but may include any number of arithmetic circuits 13.

[0015] The ROM 14 is an example of a first storage circuit, and is a non-volatile memory that stores parameters of an AI model. The ROM 14 is, for example, a mask ROM or a PROM (Programmable ROM), but is not limited to these. In the example of FIG. 1, the semiconductor integrated circuit 1 includes four ROMs 14, but may include any number of ROMs 14. In addition, in the example of FIG. 1, one arithmetic circuit 13 is connected to one ROM 14, but multiple arithmetic circuits 13 may be connected to one ROM 14, or multiple ROMs 14 may be connected to one arithmetic circuit 13.

[0016] 1, the ROM 14 is preferably arranged adjacent to the arithmetic circuit 13. This arrangement shortens the transmission path between the arithmetic circuit 13 and the ROM 14, thereby suppressing transmission loss.

[0017] Furthermore, it is preferable that the ROM 14 is an ECC memory with an ECC (Error Check and Correct) function, which can prevent a decrease in the yield of the ROM 14 even when the ROM 14 has a large capacity (when the parameters stored in the ROM 14 are large).

[0018] SRAM (Static Random Access Memory) 15 is an example of a second storage circuit, and is a volatile memory that stores update data for the AI ​​model. SRAM 15 temporarily stores not only update data but also various data used in AI processing (for example, tokens currently being processed by AI and past tokens that have already been processed by AI). In the example of FIG. 1, the semiconductor integrated circuit 1 includes four SRAMs 15, but may include any number of SRAMs 15. Also, in the example of FIG. 1, one ROM 14 is connected to one SRAM 15, but multiple ROMs 14 may be connected to one SRAM 15, or multiple SRAMs 15 may be connected to one ROM 14.

[0019] The update data is data for updating (fine-tuning) the AI ​​model. The update data may be data indicating updated parameters, or may be data for correcting the calculation results using the parameters stored in ROM 14 to the calculation results of the updated AI model. By using the update data, even if the AI ​​model whose parameters are stored in ROM 14 is updated, the semiconductor integrated circuit 1 can output the calculation results of the updated AI model.

[0020] The second storage circuit may be a DRAM. However, since the amount of update data is smaller than the amount of parameter data, the second storage circuit does not require a large memory capacity. For this reason, the second storage circuit is preferably an SRAM 15, which has a smaller memory capacity than a DRAM but a faster data transfer rate (wider bandwidth).

[0021] The memory controller 16 controls the reading and writing of data from and to the SRAM 15 and the exchange of data with an external storage device in response to a request from the control circuit 12. Specifically, the memory controller 16 reads updated data stored in the DRAM 5 and writes it to the SRAM 15. The memory controller 16 also writes (saves) data (e.g., tokens) stored in the SRAM 15 to the DRAM 5 and reads (restores) data saved from the DRAM 5 to the SRAM 15. In the example of FIG. 1, the external storage device is the DRAM 5, but is not limited to this. The DRAM 5 will be described later.

[0022] The host 2 is any information processing device connected to the semiconductor integrated circuit 1. The host 2 is connected to the semiconductor integrated circuit 1 via a communication circuit 11. The host 2 is, for example, but not limited to, a PC (Personal Computer), a smartphone, a tablet terminal, a server device, a microcomputer, or an IC chip. The host 2 requests the semiconductor integrated circuit 1 to execute AI processing and obtains the calculation results of the semiconductor integrated circuit 1.

[0023] The conversion circuit 3 is a circuit that acquires input data from the input device 4, converts the acquired input data into tokens that can be processed by the AI ​​model, and inputs the tokens to the semiconductor integrated circuit 1. The conversion circuit 3 is connected to the semiconductor integrated circuit 1 via the communication circuit 11. The input data is, for example, video data, audio data, text data, or sensor data, but is not limited to these. When there is a plurality of input data, one conversion circuit 3 that converts the plurality of input data into tokens may be provided, or multiple conversion circuits corresponding to the respective input data may be provided. The conversion circuit is, for example, an encoder, but is not limited to this. The conversion circuit 3 may be included in the host 2.

[0024] The input device 4 is any device that outputs input data that is the subject of AI processing by the semiconductor integrated circuit 1. The input device 4 is, for example, a mouse, a keyboard, a touch panel, a microphone, a scanner, a photographing device (camera), various sensors, or an operation button, but is not limited to these.

[0025] DRAM 5 is an external storage device that stores update data for an AI model that has been updated outside of semiconductor integrated circuit 1. The AI ​​model, whose parameters are stored in ROM 14, is updated as needed by a device external to semiconductor integrated circuit 1. The update data for the updated AI model is saved in DRAM 5 via a network. The network may be, but is not limited to, a wired LAN, a wireless LAN, the Internet, a public line network, a mobile data communication network, a CAN (Controller Area Network), or a LIN (Local Interconnect Network). DRAM 5 may also be included in host 2.

[0026] <Processing of semiconductor integrated circuit 1> Next, a description will be given of the processing executed by the semiconductor integrated circuit 1. Fig. 2 is a flowchart showing an example of the processing executed by the semiconductor integrated circuit 1.

[0027] (Step S101) In response to a request from the control circuit 12, the memory controller 16 checks whether update data is stored in the DRAM 5, and if update data is stored, acquires the update data from the DRAM 5 and stores it in the SRAM 15 (step S101). Here, it is assumed that the update data is data indicating updated parameters. The data indicating the updated parameters may be the updated parameters themselves, or may be data that can be calculated with the original parameters to obtain the updated parameters.

[0028] (Step S102) The arithmetic circuit 13 reads out the parameters of the AI ​​model from the corresponding ROM 14 (step S102).

[0029] (Step S103) The control circuit 12 checks whether the update data is stored in the SRAM 15 (step S103). If the update data is stored (step S103: YES), the process proceeds to step S104. If the update data is not stored (step S103: NO), the process proceeds to step S106.

[0030] (Step S104) The control circuit 12 reads the update data from the SRAM 15 (step S104).

[0031] (Step S105) The control circuit 12 updates the parameters read by the arithmetic circuit 13 with the update data and acquires the updated parameters (step S105). If the update data is the updated parameters themselves, the control circuit 12 replaces some of the parameters read by the arithmetic circuit 13 with the updated parameters. If the update data is data that can be calculated with the original parameters to obtain the updated parameters, the control circuit 12 calculates the updated parameters based on the parameters read by the arithmetic circuit 13 and the update data. As a result, the updated parameters are held in the arithmetic circuit 13.

[0032] (Step S106) The semiconductor integrated circuit 1 acquires input data (step S106). Specifically, first, output data (such as video data) from the input device 4 is input to the conversion circuit 3. The conversion circuit 3 converts the input output data from the input device 4 into tokens and outputs them. The tokens output by the conversion circuit 3 are input as input data to the control circuit 12 via the communication circuit 11. The control circuit 12 inputs the tokens input from the conversion circuit 3 to the arithmetic circuit 13.

[0033] (Step S107) The arithmetic circuit 13 uses the updated parameters to perform arithmetic processing on the tokens input from the control circuit 12, and outputs the arithmetic results (tokens) (step S107).

[0034] (Step S108) The semiconductor integrated circuit 1 outputs the calculation result of the arithmetic circuit 13 (step S108). Specifically, the control circuit 12 may acquire the calculation result and output it as is to an external device such as the host 2 via the communication circuit 11. Alternatively, the semiconductor integrated circuit 1 may include a circuit (such as a decoder) that converts the calculation result into a format appropriate for the output destination, and the calculation result acquired by the control circuit 12 may be converted by the circuit and then output to an external device such as the host 2 via the communication circuit 11.

[0035] FIG. 3 is a flowchart showing another example of the processing executed by the semiconductor integrated circuit 1. In FIG.

[0036] (Step S201) The memory controller 16 acquires the update data from the DRAM 5 and stores it in the SRAM 15 (step S201). Here, the update data is assumed to be data for correcting the calculation results using the parameters stored in the ROM 14 to the calculation results of the updated AI model.

[0037] (Step S202) The arithmetic circuit 13 reads out the parameters of the AI ​​model from the corresponding ROM 14 (step S202).

[0038] (Step S203) The semiconductor integrated circuit 1 acquires input data (step S203). Specifically, first, output data (such as video data) from the input device 4 is input to the conversion circuit 3. The conversion circuit 3 converts the input output data from the input device 4 into tokens and outputs them. The tokens output by the conversion circuit 3 are input as input data to the control circuit 12 via the communication circuit 11. The control circuit 12 inputs the tokens input from the conversion circuit 3 to the arithmetic circuit 13.

[0039] (Step S204) The arithmetic circuit 13 executes arithmetic processing on the token input from the control circuit 12 using the parameters read from the ROM 14, and outputs the arithmetic result (step S204).

[0040] (Step S205) The control circuit 12 checks whether the update data is stored in the SRAM 15 (step S205). If the update data is stored (step S205: YES), the process proceeds to step S206. If the update data is not stored (step S205: NO), the process proceeds to step S208.

[0041] (Step S206) The control circuit 12 reads the update data from the SRAM 15 (step S206).

[0042] (Step S207) The control circuit 12 corrects the calculation result output by the arithmetic circuit 13 using the update data (step S207). Specifically, the control circuit 12 causes the arithmetic circuit 13 to perform further calculation using the calculation result output by the arithmetic circuit 13 in step S204 and the update data, and corrects the calculation result output by the arithmetic circuit 13 in step S204 to the calculation result of the updated AI model. The correction of the calculation result may be performed by the arithmetic circuit 13.

[0043] (Step S208) The semiconductor integrated circuit 1 outputs the corrected operation result (step S208). Specifically, the control circuit 12 may acquire the corrected operation result and output the operation result as is to an external device such as the host 2 via the communication circuit 11. Alternatively, the semiconductor integrated circuit 1 may include a circuit (such as a decoder) that converts the corrected operation result into a format appropriate for the output destination, and the corrected operation result acquired by the control circuit 12 may be converted by the circuit and then output to an external device such as the host 2 via the communication circuit 11.

[0044] <Summary> In conventional semiconductor integrated circuits, parameters are stored in volatile memory such as SRAM. However, when parameters are stored in SRAM, there is a problem that the memory capacity of SRAM is small and there is insufficient capacity to store parameters for large-scale models such as LLMs. Furthermore, when parameters are stored in DRAM electrically connected to the semiconductor integrated circuit outside the semiconductor integrated circuit to solve the memory capacity problem, the narrow bandwidth of DRAM results in slow data transfer speeds, making it unsuitable for applications requiring real-time AI processing.

[0045] In contrast, the semiconductor integrated circuit 1 of this embodiment includes a first memory circuit (ROM 14) which is a non-volatile memory that stores parameters of an AI model, an arithmetic circuit 13 that performs arithmetic processing on input data using the parameters, and a control circuit 12 that controls the first memory circuit and the arithmetic circuit.

[0046] The first storage circuit (non-volatile memory) has a larger memory capacity (can be implemented at a higher density) than volatile memory, making it possible to realize a compact semiconductor integrated circuit 1 capable of executing AI processing. Furthermore, as a result of the large memory capacity, even when the amount of parameter data is large, a wide bandwidth can be used as internal memory, enabling high-speed data transfer. As a result, this semiconductor integrated circuit 1 can be suitably used in applications where AI processing of large-scale models such as LLMs is executed at the edge, or where real-time AI processing is executed at the edge. Examples of such applications include autonomous control of moving objects (vehicles, humanoids, etc.) and voice assistants in mobile devices such as smartphones.

[0047] Furthermore, the AI ​​model whose parameters are stored in the first storage circuit (non-volatile memory) is updated as needed with update data, the amount of which is smaller than the parameters. Because the update data is stored in SRAM 15, it is possible to read the update data without increasing the size of the semiconductor integrated circuit 1. Furthermore, because the update data is stored in SRAM 15, each time the latest update parameters are stored in DRAM 5, the latest update parameters can be saved and used for calculation processing.

[0048] The following describes modifications of the semiconductor integrated circuit 1. Descriptions of configurations similar to those of the semiconductor integrated circuit 1 will be omitted.

[0049] <Variation 1> Fig. 4 is a block diagram showing an example of a semiconductor integrated circuit 1A which is a first modified example of the semiconductor integrated circuit 1. The semiconductor integrated circuit 1A in Fig. 4 further includes a conversion circuit 3. The semiconductor integrated circuit 1A acquires output data (moving image data, etc.) of an input device 4 as input data.

[0050] With this configuration, the semiconductor integrated circuit 1A achieves the same effects as the semiconductor integrated circuit 1. Furthermore, the semiconductor integrated circuit 1A and the input device 4 can be connected without providing a conversion circuit separate from the semiconductor integrated circuit 1A.

[0051] <Variation 2> 5 is a block diagram showing an example of a semiconductor integrated circuit 1B that is a second modified example of the semiconductor integrated circuit 1. The semiconductor integrated circuit 1B in FIG. 5 includes a flash memory 14B as a first storage circuit instead of the ROM 14. The flash memory 14B is a NAND flash memory or a NOR flash memory. The flash memory 14B is preferably a NAND flash memory with a large memory capacity.

[0052] With this configuration, the semiconductor integrated circuit 1B achieves the same effects as the semiconductor integrated circuit 1. However, providing the ROM 14 as the first storage circuit instead of the flash memory 14B is advantageous in terms of size reduction and speed increase.

[0053] <Variation 3> FIG. 6 is a block diagram showing an example of a semiconductor integrated circuit 1C that is a third modified example of the semiconductor integrated circuit 1. The semiconductor integrated circuit 1C in FIG. 6 includes a flash memory 14C as the first and second storage circuits, instead of the ROM 14 and SRAM 15. That is, the flash memory 14C functions as the first and second storage circuits. The flash memory 14C is a NAND flash memory or a NOR flash memory. The flash memory 14C is preferably a NAND flash memory with a large memory capacity.

[0054] With this configuration, the semiconductor integrated circuit 1C achieves the same effects as the semiconductor integrated circuit 1. It is also possible to directly update the parameters stored in the flash memory 14C with update data obtained from the DRAM 5. However, providing the ROM 14 rather than the flash memory 14C as the first storage circuit is advantageous in terms of size reduction and speed increase.

[0055] <Applications of semiconductor integrated circuit 1> Here, an ECU 100 including the semiconductor integrated circuit 1 will be described as an example of an application of the semiconductor integrated circuit 1. The ECU 100 is a control device that controls a vehicle. FIG. 7 is a block diagram showing an example of the ECU 100. The ECU 100 in FIG. 7 includes the semiconductor integrated circuit 1, a host 2, a conversion circuit 3, and a DRAM 5. The ECU 100 is, for example, an in-vehicle ECU for controlling an automobile, or an autonomous driving ECU for controlling the autonomous driving function of the vehicle.

[0056] The host 2 is, for example, a CPU (Central Processing Unit), which generates and outputs a control signal for controlling the vehicle based on the calculation result (token), which is output data of the semiconductor integrated circuit 1. The input device 4 is, for example, an ECU for vehicle control other than the ECU 100, a vehicle prime mover, steering device, lighting and other devices related to driving and safety, an in-vehicle sensor, an HMI (Human Machine Interface), an IVI (In-Vehicle Infotainment), etc.

[0057] The ECU 100 can perform AI processing using LLM in real time on video data acquired from an in-vehicle camera, and control the vehicle based on the results of the LLM calculations. Furthermore, by using a single-chip semiconductor integrated circuit 1, the ECU 100 can be made smaller.

[0058] <Additional Notes> The present embodiment includes the following disclosure.

[0059] (Appendix 1) a first storage circuit that is a non-volatile memory that stores parameters of an AI model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; A semiconductor integrated circuit comprising:

[0060] (Appendix 2) The first storage circuit is a ROM. 10. The semiconductor integrated circuit of claim 1.

[0061] (Appendix 3) The first memory circuit is a NAND flash memory. 10. The semiconductor integrated circuit of claim 1.

[0062] (Appendix 4) The AI ​​model further includes a second storage circuit that is a volatile memory that stores update data for the AI ​​model. 10. The semiconductor integrated circuit of claim 1.

[0063] (Appendix 5) The second memory circuit is an SRAM. 5. The semiconductor integrated circuit according to claim 4.

[0064] (Appendix 6) The control circuit checks whether the update data is stored in the second storage circuit before the calculation by the calculation circuit, and if the update data is stored, updates the parameters stored in the first storage circuit and then causes the calculation circuit to execute the calculation. The semiconductor integrated circuit according to claim 4.

[0065] (Appendix 7) The arithmetic circuit executes the arithmetic processing by using updated parameters obtained by updating some of the parameters with the update data. 5. The semiconductor integrated circuit according to claim 4.

[0066] (Appendix 8) The arithmetic circuit further processes output data of the arithmetic processing using the parameters using the updated data. 5. The semiconductor integrated circuit according to claim 4.

[0067] (Appendix 9) The first memory circuit is disposed adjacent to the arithmetic circuit. 10. The semiconductor integrated circuit of claim 1.

[0068] (Appendix 10) The second storage circuit is disposed adjacent to the arithmetic circuit on the opposite side of the first storage circuit. 10. The semiconductor integrated circuit according to claim 9.

[0069] (Appendix 11) The input data is video data, audio data, text data, sensor data, or tokens converted from these. 10. The semiconductor integrated circuit of claim 1.

[0070] (Appendix 12) a conversion circuit for converting the input data into the tokens; 12. The semiconductor integrated circuit according to claim 11.

[0071] (Appendix 13) The AI ​​model is a large-scale language model. 10. The semiconductor integrated circuit of claim 1.

[0072] (Appendix 14) The first memory circuit, the arithmetic circuit, and the control circuit are included in a single IC chip. 10. The semiconductor integrated circuit of claim 1.

[0073] (Appendix 15) the semiconductor integrated circuit according to Supplementary Note 1; a host that controls a mobile object by using output data from the semiconductor integrated circuit; ECU equipped with.

[0074] (Appendix 16) a first storage circuit that is a non-volatile memory that stores parameters of an AI model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; a second storage circuit that is a volatile memory that stores update data for the AI ​​model; A method performed by a semiconductor integrated circuit comprising: a step in which the arithmetic circuit reads out the parameters from the first storage circuit; a step in which the arithmetic circuit executes an arithmetic process on input data using the parameters; the control circuit reading the update data from the second storage circuit; a step in which the control circuit modifies the parameter or the calculation result of the calculation circuit using the update data; A method comprising:

[0075] (Appendix 17) a first storage circuit that is a non-volatile memory that stores parameters of an AI model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; a second storage circuit that is a volatile memory that stores update data for the AI ​​model; A semiconductor integrated circuit comprising: a step in which the arithmetic circuit reads out the parameters from the first storage circuit; a step in which the arithmetic circuit executes an arithmetic process on input data using the parameters; the control circuit reading the update data from the second storage circuit; a step in which the control circuit modifies the parameter or the calculation result of the calculation circuit using the update data; A program for executing a method including the steps of:

[0076] The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the above meaning, and is intended to include all modifications within the meaning and scope of the claims. Furthermore, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present invention. [Explanation of symbols]

[0077] 1: Semiconductor integrated circuit 2: Host 3: Conversion circuit 4: Input device 5: DRAM 11: Communication circuit 12: Control circuit 13: Arithmetic circuit 14:ROM 15:SRAM 16: Memory controller

Claims

1. a first storage circuit that is a nonvolatile memory that stores parameters of the AI ​​model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; A semiconductor integrated circuit comprising:

2. The first memory circuit is a ROM.

2. The semiconductor integrated circuit according to claim 1.

3. The first memory circuit is a NAND flash memory.

2. The semiconductor integrated circuit according to claim 1.

4. The second memory circuit is a volatile memory that stores update data for the AI ​​model.

2. The semiconductor integrated circuit according to claim 1.

5. The second memory circuit is an SRAM.

5. The semiconductor integrated circuit according to claim 4.

6. The control circuit checks whether the update data is stored in the second storage circuit before the calculation by the calculation circuit, and if the update data is stored, updates the parameters stored in the first storage circuit and then causes the calculation circuit to execute the calculation.

5. The semiconductor integrated circuit according to claim 4.

7. The arithmetic circuit executes the arithmetic processing by using updated parameters obtained by updating some of the parameters with the update data.

5. The semiconductor integrated circuit according to claim 4.

8. The arithmetic circuit further processes output data of the arithmetic processing using the parameters using the updated data.

5. The semiconductor integrated circuit according to claim 4.

9. The first memory circuit is disposed adjacent to the arithmetic circuit.

2. The semiconductor integrated circuit according to claim 1.

10. The second storage circuit is disposed adjacent to the arithmetic circuit on the opposite side of the first storage circuit.

10. The semiconductor integrated circuit according to claim 9.

11. The input data is video data, audio data, text data, sensor data, or tokens converted from these.

2. The semiconductor integrated circuit according to claim 1.

12. a conversion circuit for converting the input data into the tokens; The semiconductor integrated circuit according to claim 11.

13. The AI ​​model is a large-scale language model 2. The semiconductor integrated circuit according to claim 1.

14. The first memory circuit, the arithmetic circuit, and the control circuit are included in a single IC chip.

2. The semiconductor integrated circuit according to claim 1.

15. The semiconductor integrated circuit according to claim 1 ; a host that controls a mobile object by using output data from the semiconductor integrated circuit; ECU equipped with.

16. a first storage circuit that is a nonvolatile memory that stores parameters of the AI ​​model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; a second storage circuit that is a volatile memory that stores update data for the AI ​​model; A method performed by a semiconductor integrated circuit comprising: the calculation circuit reading the parameters from the first storage circuit; a step in which the arithmetic circuit executes an arithmetic process on input data using the parameters; the control circuit reading the update data from the second storage circuit; a step in which the control circuit modifies the parameter or the calculation result of the calculation circuit using the update data; A method comprising:

17. a first storage circuit that is a nonvolatile memory that stores parameters of the AI ​​model; an arithmetic circuit that executes arithmetic processing on input data using the parameters; a control circuit that controls the first memory circuit and the arithmetic circuit; a second storage circuit that is a volatile memory that stores update data for the AI ​​model; A semiconductor integrated circuit comprising: the calculation circuit reading the parameters from the first storage circuit; a step in which the arithmetic circuit executes an arithmetic process on input data using the parameters; the control circuit reading the update data from the second storage circuit; a step in which the control circuit modifies the parameter or the calculation result of the calculation circuit using the update data; A program for executing a method including the steps of:

Images