Calibrated measurement of overlay error using small targets

Abstract

To provide products for improved measurement using overlay targets.SOLUTION: There is provided a product comprising semiconductor substrate, a first film layer and a second film layer. The first and second film layers are deposited on the semiconductor substrate such that the second film layer overlies the first film layer. The first and second film layers are deposited at the first position on the semiconductor substrate. The first and second film layers are patterned to define: a first overlay target comprising a first target feature formed in the first film layer and a second target feature formed in the second film layer in a position adjacent to the first target feature; and a second overlay target disposed in a second location on the semiconductor substrate and comprising a first part, which is identical to the first overlay target, and a second part, which is disposed adjacent to the first part such that the second overlay target has rotational symmetry of 180° around a normal to the semiconductor substrate.SELECTED DRAWING: Figure 5A

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Patent Application No. 63 / 299,010, filed January 13, 2022, which is incorporated herein by reference.

[0002] The present invention relates generally to semiconductor device manufacturing, and more particularly to methods and target features for semiconductor circuit metrology. [Background technology]

[0003] Semiconductor circuits are typically fabricated using photolithography, which involves depositing a thin layer of photosensitive polymer (photoresist) onto a semiconductor substrate and then patterning the layer with light or other radiation, leaving portions of the substrate covered with photoresist. The photoresist is patterned by a scanner, typically using ultraviolet radiation, projecting an image of a reticle onto the photoresist. After patterning, the substrate is modified by methods such as etching or ion bombardment, which change its physical properties and / or surface shape (topography), but leave the portions of the substrate covered with photoresist unaffected.

[0004] The properties of this patterned photoresist, such as the surface shape and position of patterned features, are measured using semiconductor circuit metrology. To achieve high yields in the photolithography process, it is important that the position of patterned features in the photoresist is accurate relative to the process layer that was previously patterned. The error (misalignment) in the alignment of the patterned photoresist with the process layer below is called "overlay error." As an example, for a typical semiconductor circuit with a minimum line width of 10-14 nm (the so-called 10-nm design rule), the maximum allowable overlay error is 2-3 nm. In cutting-edge semiconductor circuits, line widths have narrowed to 5 nm, and the maximum allowable overlay error has accordingly decreased.

[0005] Overlay error is typically measured using optical overlay metrology equipment (so-called optical overlay metrology tools). This is because optical radiation at visible and infrared wavelengths can penetrate not only photoresist layers but also the dielectric layers underneath. Furthermore, infrared wavelengths can penetrate semiconductor substrates, such as silicon, allowing measurements through the semiconductor substrate. Overlay error is measured based on overlay targets located on the semiconductor substrate's scribe lines (the lines separating adjacent dies) and / or within the dies.

[0006] Commonly used overlay metrology tools fall into one of two categories: scatterometry tools and image processing tools. Scatterometry tools, such as the ATL100® tool from KLA Corporation (Milpitas, California, USA), capture a diffracted (scatterometry) image of the periodic target features on the overlay target from the exit pupil of the metrology tool's objective lens. This scatterometry image, which shows the angular distribution of optical radiation scattered from the target features, is then processed to measure the overlay error.

[0007] An imaging tool, such as the Archer® series of tools from KLA Corporation (Milpitas, CA, USA), images an overlay target (such as a KLA AIM® overlay target). Image analysis algorithms are applied to the resulting image to identify the location of the center of symmetry of the target feature in the process layer and the center of symmetry of the target feature in the photoresist layer. The overlay error is calculated based on the displacement between the centers of symmetry of the target features in these two layers. As used herein and in the claims, the terms "optical radiation" and "light" generally refer to all visible, infrared and ultraviolet radiation. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] U.S. Patent Application Publication No. 2005 / 0193362 [Patent Document 2] U.S. Patent Application Publication No. 2013 / 0107259 Summary of the Invention [Problem to be solved by the invention]

[0009] Embodiments of the present invention described below provide methods and systems for improved metrology using overlay targets, as well as targets for use in such methods. [Means for solving the problem]

[0010] Thus, in accordance with one embodiment of the present invention, there is provided a method for semiconductor metrology, comprising depositing a first thin film layer on a semiconductor substrate, depositing a second thin film layer on the first thin film layer, and patterning the first and second thin film layers to define a first overlay target and a second overlay target. The first overlay target is disposed at a first location on the semiconductor substrate and includes a first target feature formed in the first thin film layer and a second target feature formed in the second thin film layer adjacent to the first target feature. The second overlay target is disposed at a second location on the semiconductor substrate and includes a first portion identical to the first overlay target and a second portion adjacent to the first portion such that the second overlay target has 180° rotational symmetry about a normal to the semiconductor substrate. The method further includes capturing a first image of the second overlay target using an imaging assembly, processing the first image to determine a target calibration function based on both the first and second portions of the second overlay target, capturing a second image of the first overlay target using the imaging assembly, and processing the second image while applying the target calibration function to estimate an overlay error between patterns of the first and second thin film layers at the first location.

[0011] In some embodiments, the second portion of the second overlay target comprises a rotated copy of the first portion.

[0012] In another embodiment, the first overlay target is one of a plurality of first overlay targets, each of the first overlay targets including the first and second target features disposed at a different respective location on the semiconductor substrate, and processing the second image includes applying the target calibration function to each of the first overlay targets.

[0013] In another embodiment, processing the first image includes estimating a first overlay error between patterns of the first and second thin film layers using both the first and second portions of the second overlay target in the first image, estimating a second overlay error between patterns of the first and second thin film layers using only the first portion of the second overlay target, and calculating the target calibration function corresponding to a difference between the first overlay error and the second overlay error.

[0014] In another embodiment, using both the first and second portions includes estimating the first overlay error by detecting a displacement between a first center of symmetry of each of the first and second target features in both the first and second portions of the second overlay target, and using only the first portion includes estimating the second overlay error by detecting a displacement between a second center of symmetry of each of the first and second target features in only the first portion of the second overlay target.

[0015] In some embodiments, the first image is captured at a first orientation of the semiconductor substrate, and the method includes capturing a third image of the second overlay target at a second orientation of the semiconductor substrate, the second orientation being rotated 180° about a normal to the substrate relative to the first orientation, and processing the first image includes processing both the first and third images to estimate first and second overlay errors, respectively, at the first and second orientations, and calculating the target calibration function based on the first and second overlay errors.

[0016] In another embodiment, the semiconductor substrate includes dies separated by scribe lines, the first overlay target is disposed in a device area of ​​the dies, and the second overlay target is disposed in the scribe lines.

[0017] In another embodiment, the first target feature includes a first linear grating oriented along a first direction in the first thin film layer, and the second target feature includes a second linear grating oriented along the first direction in the second thin film layer.

[0018] In another embodiment, the first target feature further includes a third linear grating oriented along a second direction within the first thin film layer, the second direction being non-parallel to the first direction, and the second target feature further includes a fourth linear grating oriented in the second thin film layer in the second direction.

[0019] In some embodiments, the method includes measuring an angular shift of the semiconductor substrate, and applying the target calibration function includes correcting for the angular shift when estimating the overlay error.

[0020] In another embodiment, the first overlay target is one of a plurality of first overlay targets disposed at different respective locations on the semiconductor substrate, and measuring the angular misalignment includes estimating and compensating for a local angular misalignment at each of the different locations.

[0021] Further, in accordance with one embodiment of the present invention, there is provided an article of manufacture comprising a semiconductor substrate and first and second thin film layers, the first and second thin film layers disposed on the substrate such that the second thin film layer overlies the first thin film layer. The first and second thin film layers are patterned to define a first overlay target and a second overlay target. The first overlay target is disposed at a first location on the semiconductor substrate and includes a first target feature formed in the first thin film layer and a second target feature formed in the second thin film layer adjacent to the first target feature. The second overlay target is disposed at a second location on the semiconductor substrate and includes a first portion identical to the first overlay target and a second portion disposed adjacent to the first portion such that the second overlay target has 180° rotational symmetry about a normal to the semiconductor substrate.

[0022] Additionally, in accordance with one embodiment of the present invention, there is provided an apparatus for semiconductor metrology, including an imaging assembly configured to capture images of a semiconductor substrate, wherein first and second thin film layers are disposed on the semiconductor substrate such that the second thin film layer overlies the first thin film layer. The first and second thin film layers are patterned to define a first overlay target and a second overlay target. The first overlay target is disposed at a first location on the semiconductor substrate and includes a first target feature formed in the first thin film layer and a second target feature formed in the second thin film layer adjacent to the first target feature. The second overlay target is disposed at a second location on the semiconductor substrate and includes a first portion identical to the first overlay target and a second portion adjacent to the first portion such that the second overlay target has 180° rotational symmetry about a normal to the semiconductor substrate. The apparatus further includes a processor configured to process a first image of the second overlay target captured by the imaging assembly to calculate a target calibration function based on both the first and second portions of the second overlay target, and to process a second image of the first overlay target captured by the imaging assembly while applying the target calibration function to estimate an overlay error between patterns of the first and second thin film layers at the first position.

[0023] The present invention will be better understood from the following detailed description of the embodiments taken in conjunction with the drawings. [Brief explanation of the drawings]

[0024] [Figure 1] 1 is a schematic side view of an imaging overlay metrology apparatus for measuring overlay errors on a semiconductor wafer, in accordance with one embodiment of the present invention; [Figure 2A] FIG. 2 is a schematic diagram of a half target for overlay error measurement, according to one embodiment of the present invention. [Figure 2B] FIG. 2 is a schematic diagram of a half target for overlay error measurement, according to one embodiment of the present invention. [Figure 3A] FIG. 2 is a schematic diagram of a half target for overlay error measurement, according to one embodiment of the present invention. [Figure 3B] FIG. 2 is a schematic diagram of a half target for overlay error measurement, according to one embodiment of the present invention. [Figure 4] FIG. 1 is a schematic diagram of a half target for overlay error measurement illustrating a method for correcting angular misalignment of the half target in accordance with an embodiment of the present invention. [Figure 5A] FIG. 1 is a schematic diagram of a full target for overlay metrology, according to one embodiment of the present invention. [Figure 5B] FIG. 1 is a schematic diagram of a full target for overlay metrology, according to one embodiment of the present invention. [Figure 6] 1 is a flowchart that schematically illustrates a method for calibrating measurements of overlay error, in accordance with an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0025] overview Overlay metrology overlay targets are typically used to precisely and accurately measure overlay errors between successive pattern layers on a semiconductor substrate. Such successive pattern layers may include, for example, a process layer and a photoresist layer (photoresist), or, in post-etch applications, two process layers. Accordingly, while the following description of some exemplary embodiments is based on a process layer and a photoresist layer, the principles of these embodiments may also apply, mutatis mutandis, to a first process layer and a second process layer. In some multiple patterning applications, the first and second process layers may comprise the same material. In some multilayer applications, multiple target features of a single overlay target may be formed in multiple layers, which may include three or more layers.

[0026] Commonly used imaging overlay targets typically have dimensions of 20 μm by 20 μm. Due to their relatively large size, these overlay targets cannot be placed within the functional device areas of the semiconductor circuits formed on the dies defined on the substrate, but are placed within the scribe lines separating adjacent dies. In embodiments of the present invention, smaller targets can be placed within the device areas for the purpose of measuring overlay errors within the device areas. These smaller targets are referred to herein as "half targets" because they contain only a portion of the target features of a full overlay target that are within the scribe lines.

[0027] However, a single overlay measurement using a half target can introduce measurement errors due to at least three sources: 1) angular misalignment of the half target with respect to the Cartesian coordinates that represent the overlay error, 2) aberrations in the optical system of the overlay measurement tool, and 3) uncertainty in the actual optical magnification of the overlay tool.Calibration is performed by measuring the target in two orientations rotated by 180° and is typically performed for a full target, but because a half target does not have 180° rotational symmetry (in contrast to a full target), calibration of its measurement error is not feasible.

[0028] The embodiments described below address this half-target metrology error calibration problem using full targets on the same substrate. Each such full target includes one half target and is supplemented with additional target features to provide 180° rotational symmetry. In one embodiment, such a full target includes a half target and a copy of the half target that is rotated 180° about the substrate normal relative to the non-rotated half target. In alternative embodiments, the additional target features may be different from the half target.

[0029] To derive the parameters of the calibration function for the half target, the overlay error is measured from the full target in two ways:

[0030] 1) A first overlay error measurement is performed using the entire full target, which can be performed, for example, at two 180° rotated orientations of the full target, and a so-called TIS-corrected overlay error is calculated, as described in more detail below.

[0031] 2) A second overlay error is measured using one of the half targets that make up the full target. In this case, a target calibration function is calculated (i.e., the parameters of the target calibration function are calculated) as the difference between the first overlay error and the second overlay error, and the target calibration function is then used to correct the overlay error measured by the half target placed on the device area.

[0032] In additional embodiments, the substrate angular misalignment measurement is used to correct for the overlay target angular misalignment as an additional correction to the overlay target calibration function described above, or this angular misalignment correction method can be used separately from the overlay target calibration function.

[0033] In some embodiments disclosed herein, a method for semiconductor metrology includes depositing a first thin film layer on a semiconductor substrate and depositing a second thin film layer on the first thin film layer. The first and second thin film layers are patterned to define a half target at a first location (e.g., a device region) on the semiconductor substrate and a full target at a second location (e.g., a scribe line). The half target includes a first target feature formed in the first thin film layer and a second target feature formed in the second thin film layer adjacent to the first target feature. In some embodiments, the full target includes a first portion that is identical to the half target and a second portion that includes a rotated copy of the first portion. The second portion is disposed adjacent to the first portion such that the full target has 180° rotational symmetry about a normal to the semiconductor substrate. Alternatively, other full target designs can be used, as long as they include the half target and have 180° rotational symmetry about the normal.

[0034] An imaging assembly captures images of the half target and the full target, the full target image is processed to determine a target calibration function based on both the first and second portions of the full target, and the half target image is processed while applying the target calibration function to estimate an overlay error between patterns of the first and second thin film layers at the half target.

[0035] Overlay measurement equipment 1 is a schematic side view of an imaging overlay metrology apparatus 10 for measuring overlay error on a semiconductor wafer 12, according to one embodiment of the present invention. Apparatus 10 is shown as an example to illustrate the use and calibration methods of overlay targets described herein. Alternatively, such targets can be used in other types of overlay metrology systems.

[0036] The imaging overlay metrology apparatus 10 includes an imaging assembly 14, an illumination assembly 16, a controller 18, and a table 20 on which the wafer 12 is mounted. The imaging assembly 14 includes an objective lens 22, a cube beam splitter 24, and an imaging lens 26. The imaging assembly 14 also includes a two-dimensional sensor array 28, which may include, for example, a complementary metal-oxide semiconductor (CMOS) detector including a two-dimensional array of pixels 30. The imaging lens 26 images the top surface of the wafer 12 onto the sensor array 28.

[0037] The illumination assembly 16 comprises a light source 32 that emits optical radiation and a lens 34. The table 20 is disposed near the objective lens 22 and comprises an actuator controlled by the controller 18, which allows the table to be translated linearly in the x, y, and z directions (relative to Cartesian coordinates 36) and to be rotated about the z axis.

[0038] In the illustrated embodiment, a first thin film layer 38 is deposited on the semiconductor wafer 12 and patterned in a photolithography process. In a subsequent process step, a second thin film layer 40 comprising photoresist is deposited on top of the first thin film layer 38. In this embodiment, the first thin film layer 38 is referred to as the "process layer," and the second thin film layer 40 is referred to as the "photoresist layer." In alternative embodiments, such as post-etch applications, both the first and second thin film layers may comprise a process layer. Layers 38 and 40 contain the pattern of the semiconductor circuitry as well as the pattern of the overlay target formed in the photolithography process.

[0039] Controller 18 is coupled to sensor array 28 and table 20. Controller 18 typically includes a programmable processor and digital and / or analog interfaces suitable for connection to other elements of device 10. The programmable processor is programmed in software and / or firmware to perform the functions described herein. Alternatively or additionally, controller 18 includes hardwired and / or programmable hardware logic circuitry that performs at least a portion of its functions. While controller 18 is shown in FIG. 1 as a single, monolithic functional block for simplicity, in practice it may include multiple control units interconnected by interfaces suitable for receiving and outputting signals as shown in the figures and described herein.

[0040] To capture an image of the overlay targets in thin film layers 38 and 40, wafer 12 is positioned on table 20 so that the targets are within the field of view (FOV) of objective lens 22. A beam of optical radiation is projected from light source 32 onto lens 34, which in turn projects it onto cube beamsplitter 24, which reflects it to objective lens 22, which projects it onto wafer 12, illuminating the overlay targets. Radiation incident on wafer 12 is reflected back into objective lens 22 and imaged by lens 26 onto sensor array 28. This image is captured and processed by controller 18 to measure the overlay error.

[0041] Half Target 2A and 2B are schematic diagrams of two half targets 100, 102, respectively, formed on a semiconductor substrate for one-dimensional overlay error measurement, according to one embodiment of the present invention. Both half targets 100 and 102 are used to measure overlay error in the x-direction, as indicated by coordinate axis 36 (axis labeling is arbitrary).

[0042] Half target 100 includes a first target feature, a process grating 104 formed in process layer 38, and a second target feature, a photoresist grating 106 formed in photoresist layer 40. Each grating includes six parallel, equally spaced, equal-width bars oriented in the y-direction. In the illustrated example, the photoresist grating is positioned above the process grating (i.e., in the positive direction along the y-axis). Because this arrangement is asymmetric, other similar half targets (not shown) can be formed on the semiconductor substrate in which the process grating is above the photoresist grating.

[0043] In an ideal lithography process, the bars of the two gratings 104 and 106 should be aligned with each other in the x-direction, which corresponds to a nominal x-overlay error of zero (in this description, the term "nominal" refers to the dimensions and patterns that an ideal lithography process would print according to the design of the masks used to pattern the two thin film layers). However, due to process and lithography errors, the gratings 104 and 106 may have an OVL x 1. The process gratings 104 and 106 are displaced relative to each other in the x direction by the amount of the x overlay error indicated as (for clarity, the displacement between the process grating 104 and the photoresist grating 106 is exaggerated in the figure).

[0044] To measure this x-direction overlay error using half target 100, two regions of interest (ROIs) 108 and 110 are defined on process grating 104 and photoresist grating 106, respectively. (ROIs 108 and 110 are shown encompassing the entire half target, but smaller ROIs encompassing only a portion of the half target could alternatively be used.) Half target 100 is imaged onto sensor array 28 (FIG. 1), and the portions of the image within ROIs 108 and 110 are processed by controller 18. Based on the ROI 108, the controller 18 calculates the location of the center of symmetry 112 of the process grating 104, and based on the ROI 110, the controller similarly calculates the location of the center of symmetry 114 of the photoresist grating 106 (the x-direction locations of the centers of symmetry 112 and 114 are determined by the centers of symmetry of the respective gratings 104 and 106, and the y-direction locations of the centers of symmetry 112 and 114 are determined by the y-direction locations of the respective ROIs 108 and 110). The centers of symmetry 112 and 114 are projected onto projections 118 and 120, respectively, on the x-axis 116, and the overlay error OVL in the x-direction is determined as the distance between these two projections. x is calculated.

[0045] Like half target 100, half target 102 also includes a first target feature, a process grating 122 formed in process layer 38, and a second target feature, a photoresist grating 124 formed in photoresist layer 40, each grating including six parallel bars. However, gratings 122 and 124 are arranged side-by-side in the x-direction rather than the y-direction as in half target 100. To measure overlay error in the x-direction using half target 102, two ROIs 126 and 128 are defined on process grating 122 and photoresist grating 124, respectively. Also like half target 100, the locations of centers of symmetry 130 and 132 are calculated by controller 18 from a captured image of half target 102 and projected onto projected images 136 and 138, respectively, on x-axis 134, with a spacing Δ XHowever, unlike the spacing between the projections 118 and 120 of the half target 100, the spacing Δ X is the nominal x-distance D between the centers of symmetry 130 and 132 nominal,x and overlay error OVL x The sum of Δ X =D nominal,x +OVL x Therefore, the overlay error is X From the measured value of D nominal,x By subtracting OVL x =Δ X -D nominal,x It is calculated as follows.

[0046] To measure overlay error in the y-direction, half targets similar to half targets 100 and 102 can be used, rotated by 90°.

[0047] Although half targets 100 and 102 are shown in the figures as including a grid of six parallel bars, grids with fewer or more bars may be used in alternative embodiments. In other embodiments, the first target feature in process layer 38 and the second target feature in photoresist layer 40 may include any other pattern that satisfies the following symmetry conditions: the target feature used to measure the x-overlay error must have mirror symmetry about the y-axis, and the target feature used to measure the y-overlay error must have mirror symmetry about the x-axis. Alternatively, one or each of these target features should be symmetrical about a 180° rotation about the z-axis. Furthermore, the first and second target features may be different from one another, so long as the above symmetry conditions are met.

[0048] Alternatively, the half target may comprise a moiré target, in which first and second target features each comprise a linear photoresist grating overlaid on a process grating. For each target feature, the two gratings have slightly different spatial frequencies, and thus the captured image has a spatial frequency equal to the difference between the grating frequencies. By designing the two target features to have a spatial frequency difference that is equal in magnitude but opposite in sign, the controller 18 can process the captured images of the first and second target features to estimate the overlay error between the process layer 38 and the photoresist layer 40.

[0049] 3A and 3B are schematic diagrams of two half targets 200, 202, respectively, for two-dimensional overlay error measurement, according to another embodiment of the present invention.

[0050] Half target 200 includes four target features 204, 206, 208, and 210. Target features 204 and 206 each include six parallel bars oriented in the y-direction, similar to target features 122 and 124 of half target 102 (FIG. 2B), and are formed in process layer 38 and photoresist layer 40, respectively. Target features 208 and 210 are also formed in process layer 38 and photoresist layer 40, respectively, and are similar to target features 204 and 206, but are oriented in the x-direction. Alternatively, the target features used to measure overlay in the x and y directions may be associated with two different process layers. For example, target feature 208 may be formed in process layer 38, and target feature 204 may be formed in a different process layer. x-overlay error OVL x and y overlay error OVL y can be estimated by the controller 18 from a captured image of the half target 200 using the method described above with reference to FIG. 2B.

[0051] Although the bars of target features 204, 206, 208, and 210 are aligned along the Cartesian x- and y-axes in this illustration, in alternative embodiments, this alignment may be relaxed. For example, the bars of target features 208 and 210 may be oriented in another direction, as long as this direction is not parallel to the y-direction.

[0052] Half target 202 includes target features 212 and 214, each of which includes two target features from half target 200 in an overlapping "hatched" configuration. Thus, target feature 212 includes target features 206 and 208 in half target 200, and target feature 214 includes target features 204 and 210. In estimating x and y overlay errors from half target 202, controller 18 identifies bars in two orthogonal directions in each captured image of target features 212 and 214, and then uses the method described above.

[0053] Similar to Figure 3A, target features 212 and 214 are shown with bars oriented in two orthogonal directions. In an alternative embodiment, this arrangement may be relaxed. For example, the bars oriented in the x direction in Figure 3B may be oriented in another direction, as long as this direction is not parallel to the y direction.

[0054] Error sources for half targets 100 and 102 Figure 4 shows the error Δ angular 2 is a schematic diagram of a half target 220 showing the difference between the angle of the target and the target angle . This error is due to angular misalignment and is corrected according to one embodiment of the present invention.

[0055] Half target 220 is similar to half target 100 (FIG. 2A) and includes a process grating 222 and a photoresist grating 224. To highlight errors due to angular misalignment, gratings 222 and 224 are aligned with each other with zero overlay error. That is, if the x-overlay error is measured with no angular misalignment, the OVL x= 0. Half target 220 is displaced relative to Cartesian coordinates 36 by an angular displacement α (for clarity, the angle is exaggerated in this illustration; however, angular displacement in optical overlay metrology systems such as apparatus 10 is typically very small, so the small-angle approximation is used below to determine its effect).

[0056] Similar to measuring overlay error using half target 100, two ROIs 226 and 228 are defined on process grating 222 and photoresist grating 224, respectively. Controller 18 captures images of gratings 222 and 224 within ROIs 226 and 228 and calculates their respective centers of symmetry 230 and 232. Centers of symmetry 230 and 232 are projected onto projections 234 and 236, respectively, on x-axis 238 (in Cartesian coordinate system 36). The distance Δ between these two projections is angular is entirely due to the angular deviation α of the half target 220. If the distance between the projections 234 and 236 is x, the overlay error OVL x If we consider it as a measurement value of Δ angular There should be only one difference.

[0057] Error Δ along the x direction due to rotation of the symmetry centers 230 and 232 angular is Δ angular = α × D ROI,y where D ROI,y is the separation distance between the symmetry centers 230 and 232 in the y direction, i.e., the separation distance between the centers of the two ROIs 226 and 228 (this description uses the small angle approximation because this kind of angular deviation is usually very small, such as a few milliradians). For example, D ROI,y Using values ​​of =5μm and α=1mrad, Δ angular =5nm error.

[0058] Similar angular misalignment errors also affect the overlay error measurements when using two-dimensional half targets, such as half target 200 (FIG. 3A). However, for half targets, such as half target 102 (FIG. 2B), whose center of symmetry has a rotation direction perpendicular to the overlay error measurements, small angular misalignments do not have a significant effect.

[0059] Optical aberrations in the overlay metrology tool can cause displacements of the bars of gratings 104 and / or 106 of half target 100 in the x-direction, possibly even in opposite directions. As a result, the aberrations can affect the measured grating displacement in the x-direction and therefore the measured x-overlay error. The same grating bar displacements can also affect the measured grating displacements of gratings 122 and / or 124 of half target 102.

[0060] The uncertainty ΔM in the actual optical magnification M of the overlay metrology tool is expressed as the uncertainty ΔM in the nominal x-distance D between the centers of symmetry 130 and 132 of the half targets 102 (FIG. 2B). nominal,x Error Δ Mag This error can cause Δ Mag =(ΔM / M)×D nominal,x This error can be calculated as Δ X and D nominal,x OVL calculated as the difference between x For example, the nominal value D nominal,x = 5 μm, the relative error of magnification ΔM / M is 10 -3 In the case of , the error Δ Mag =5nm.

[0061] Similar errors due to uncertainty in the actual optical magnification M can occur when using two-dimensional half targets such as half target 200 (FIG. 3A). However, for half targets such as half target 100 (FIG. 2A), the nominal separation between centers of symmetry 112 and 114 in the direction of overlay error measurement is zero, and therefore uncertainty in the optical magnification does not introduce significant errors.

[0062] Full Target 5A and 5B are schematic diagrams illustrating full targets 300, 302 formed from half targets 100 (FIG. 2A), 200 (FIG. 3A), respectively, according to embodiments of the present invention. In the described embodiment, the full target is formed by combining the half target with a copy of it rotated 180° about the normal to the semiconductor substrate 12 (FIG. 1). Thus, the full target is symmetric about the 180° rotation about the normal to the semiconductor substrate 12. Alternatively, other designs for the full target can be used, as explained above.

[0063] The rotational symmetry of full targets 300 and 302 allows for accurate measurement of overlay error by apparatus 10 by capturing and processing images of the targets rotated 0° and 180° relative to one another. In this manner, tool-induced shift (TIS) due to metrology tool inaccuracies can be calibrated and therefore separated from actual overlay error. Thus, the term "accurate" is used in this description to refer to TIS-calibrated overlay measurements.

[0064] As described in more detail below, in addition to accurately measuring x-overlay error, the full target 300 can also be used to calibrate the x-overlay error measured using the half target 100. In addition to accurately measuring overlay error in both the x and y directions, the full target 302 can also be used to calibrate the x- and y-direction overlay error measured using the half target 200.

[0065] Calibrating a Half Target 100 with a Full Target 300 Full target 300 includes a first portion 304 and a second portion 306, where the first portion is identical to half target 100 and the second portion is a copy of half target 100 rotated 180° around the normal to substrate 12 (around the z-axis). Thus, full target 300 includes a first target pattern formed by process layer gratings 308 and 310 and a second target pattern formed by photoresist layer gratings 312 and 314.

[0066] Using the full target 300, the x overlay error is measured independently at two orientations of the semiconductor substrate 12 rotated by 180°. At the first orientation (referred to as the 0° orientation), the x overlay error OVL x,0 To determine the location of the first center of symmetry 316 of the first target pattern, two corresponding ROIs 318, 320 are defined on the process layer gratings 308 and 310, respectively, of the image of the full target 300 captured by the apparatus 10 (FIG. 1). The controller 18 processes the portions of the image within the ROIs 318 and 320 to determine the location of the center of symmetry 316, for example, by projecting the contents of the ROIs onto the x-axis 322.

[0067] The controller 18 similarly detects the location of a second center of symmetry of the second target pattern by processing images within two ROIs located above the photoresist gratings 312 and 314 (for simplicity, the second center of symmetry and the corresponding ROIs are omitted from the figure). x,0 is estimated as the distance between the first and second centers of symmetry.

[0068] After rotating the semiconductor substrate 12 by 180° around its normal line, x,0 x overlay error using the same method as for measuring OVL x,180 The controller 18 measures the accurate x overlay error OVL x,ACC as half the difference in the x-overlay error measured in the two orientations of the board, i.e., OVL x,ACC =(OVL x,0-OVL x,180 ) / 2.

[0069] Alternatively, the measurement of the overlay error at the 180° orientation may be omitted, and the overlay error OVL x,0 The following calculations of OVL x,ACC It may also be used as.

[0070] To calibrate the half target 100 (shown in FIG. 2A), only the first portion 304, which is identical to the half target 100, is used to measure the x overlay error OVL x,HT Therefore, the x-overlay error OVL of the half target 100, as described above with reference to FIG. x A method is used to measure the target calibration function Δ CAL,x But, Δ CAL,x =OVL x,ACC -OVL x This target calibration function is used to calibrate all x-overlay errors measured using half targets 100 at other locations, such as locations within the device area of ​​a die on semiconductor substrate 12. The target calibration function Δ CAL,x can be calculated by the controller 18 at the beginning of the overlay error measurement process and then applied to all overlay errors as they are measured. Alternatively, the target calibration function Δ CAL,x may be calculated independently of the overlay error measurement sequence and applied to the overlay error measurements at the end of that sequence.

[0071] Calibration for measuring y-overlay error using a one-dimensional half target is performed in a similar manner.

[0072] Calibrating a Half Target 200 with a Full Target 302 Full target 302 (FIG. 5B) includes a first portion 330 and a second portion 332, where the first portion is identical to half target 200 (FIG. 3A) and the second portion is a copy of half target 200 rotated 180° about the z-axis. The first target pattern of full target 302 is formed by process layer gratings 334 and 336 oriented in the y-direction and process layer gratings 338 and 340 oriented in the x-direction. The second target pattern is formed by photoresist layer gratings 342 and 344 oriented in the y-direction and photoresist layer gratings 346 and 348 oriented in the x-direction.

[0073] The full target 302 is used to measure both the x and y overlay errors at two 180° rotated orientations of the semiconductor substrate. At the first 0° orientation, the overlay error OVL x,0 and OVL y,0 At the second 180° orientation, measure the overlay error OVL. x,180 and OVL y,180 These overlay errors are measured as described above for the full target 300, with the x overlay measurements using gratings 334, 336, 342, and 344, and the y overlay measurements using gratings 338, 340, 346, and 348. Each precise overlay error is calculated using the OVL x,ACC It is calculated in the same way. OVL x,ACC =(OVL x,0 -OVL x,180 ) / 2 OVL y,ACC =(OVL y,0 -OVL y,180 ) / 2

[0074] To calibrate the overlay error measured using the half target 200, only the first portion 330, which is identical to the half target 200, is used to calculate the x overlay error OVL x,HT and y overlay error OVL y,HT Therefore, the x-overlay error OVL of the half target 200 in FIG. x and y overlay error OVLy The same method is used to measure the two-component target calibration function (Δ CAL,x ,Δ CAL,y ) is Δ CAL,x =OVL x,ACC -OVL x and Δ CAL,y =OVL y,ACC -OVL y This target calibration function is used to calibrate all x and y overlay errors measured using half targets 200 on semiconductor substrate 12.

[0075] Similar to the calibration of the half target 100 using the full target 300 described above, the two-component target calibration function (Δ CAL,x ,Δ CAL,y ) can be calculated by the controller 18 at the start of the overlay error measurement process and applied to the overlay errors as they are measured. Alternatively, the calibration function can be calculated independently of the overlay error measurement sequence and applied to the overlay error measurements at the end of the sequence.

[0076] 6 is a flowchart 400 that outlines a method for determining a target calibration function for a half target with respect to x-overlay error, in accordance with one embodiment of the present invention. The method is performed by controller 18, by way of example, using images captured by apparatus 10. In addition to determining the target calibration function as described above, flowchart 400 also includes steps for improving the repeatability of the target calibration function (reducing measurement-to-measurement variability) and reducing target-to-target variability. For simplicity, flowchart 400 illustrates measurement and calibration of overlay error in only the x-direction. Measurement and calibration in the y-direction is performed in a similar manner as described above.

[0077] In the full target selection step 402, a full target FT for the calibration process is selected. iis selected by the controller 18, where i is an index used to enumerate full targets for multi-target calibration (reducing inter-target variability). In the measurement start step 404, the full target FT i The jth measurement of the target is initiated (j is an index used to enumerate repeated measurements of a given target. Repeated measurements are intended to improve the reproducibility of the measurements).

[0078] In a measurement step 406, the exact x overlay error OVL is determined based on the measurement initiated in step 404. x,ACC ij is measured by the controller 18. This step, as well as the subsequent steps of the flowchart 400, are similar to the calibration method described above for the full target 300 of FIG. 5A (the superscripts i and j refer to the indices i and j). In a half target selection step 408, the full target FT i In the half target overlay error measurement step 410, the overlay error OVL is calculated for the selected half target. x,HT ij is measured. In a first target calibration function step 412, the target calibration function Δ CAL,x ij However, as explained above, Δ CAL,x ij =OVL x,ACC ij -OVL x,HT ij It is calculated as:

[0079] In a first determination step 414, the full target FT iA decision is made by the controller 18 whether to repeat the measurement for the full target FT. This decision can be made by the controller 18 by calculating the repeatability from the first j measurements or by using a preset number of measurements. If the measurement is to be repeated, the index j is incremented in a first increment step 416 and the process returns to step 404. i If no further measurements of the full target F T are required, the process proceeds to a second target calibration function step 418. i The target calibration function Δ obtained for CAL,x ij are averaged to obtain the value Δ CAL,x i is required.

[0080] The process proceeds to a second decision step 420 where the controller 18 determines whether to include additional full targets in the calibration process to reduce target-to-target variation. The decision in step 420 may be made by the controller 18 by estimating the target-to-target variation from the first i full targets, by using a preset number of full targets to include, or by using a preset list of full targets on the semiconductor substrate 12. If additional full targets are to be included, the process proceeds to a second increment step 422 where the index i is incremented and the process returns to step 402. If additional full targets are not needed, the full targets FT included in the measurement are incremented. i The target calibration function Δ obtained from CAL,x i are averaged to obtain the global target calibration function Δ CAL,GLOBAL This function is used to calibrate the x-overlay error measurements for all half targets on the same semiconductor substrate as the one included in the calibration process.

[0081] Calibration of half target angle deviation As explained above with reference to Figure 4, angular misalignment of half targets, such as half targets 100 (Figure 2A) and 200 (Figure 3A), can introduce significant errors into overlay error measurements. Using the full target calibration method described above, the overall angular misalignment α of all half targets, e.g., angular error of semiconductor substrate 12 due to yaw of table 20, can be reduced. GLOBAL (The term "yaw" is used to indicate angular deviation about the normal to the table 20. Yaw can be measured, for example, using a laser interferometer.)

[0082] When the substrate 12 is moved from measurement site to measurement site together with the table 20 to sequentially bring each half target into the FOV of the objective lens 22, there is a possibility that the angular deviation may vary between sites. By measuring the yaw at each measurement site for the overlay error or by appropriately processing the captured target images, the half target HT i Angle deviation α i For example, the controller 18 can define two appropriately positioned ROIs on the same grid of one half target, measure the displacement between the two projections of the grid bars from these two ROIs, and calculate the angular misalignment by dividing the displacement by the center-to-center distance between the ROIs. The index i is used here to enumerate the measurements of the half target.

[0083] As explained above (Figures 5A-5B and 6), if the target calibration function has been determined using the full target, the differential local correction value Δ DIFF i Δ DIFF i =(α i -α GLOBAL ) × D, where D is D ROI,y Similarly, the distance between the corresponding ROIs is shown (Figure 4).

[0084] Alternatively, if there is no such target calibration function, the angular deviation αi The measured value of the local correction value Δ LOCAL i =α i ×D. Alternatively, the angle deviation α i Compensation for θ can also be achieved by appropriate rotation of table 20 or sensor 28, or by rotation of the target image captured by controller 18.

[0085] It will be understood that the above-described embodiments are cited by way of example, and that the present invention is not limited to what has been particularly shown and described above. Rather, the scope of the present invention includes combinations and sub-combinations of the various features described above, as well as variations and modifications thereof not disclosed in the prior art that would occur to one skilled in the art upon reading the above description.

Claims

1. a semiconductor substrate; first and second thin film layers; wherein the first and second thin film layers are disposed on the semiconductor substrate such that the second thin film layer overlies the first thin film layer, and the first and second thin film layers comprise: a first overlay target disposed at a first location on the semiconductor substrate, the first overlay target including a first target feature formed in the first thin film layer and a second target feature formed in the second thin film layer at a location adjacent to the first target feature; a second overlay target disposed at a second location on the semiconductor substrate, the second overlay target including a first portion identical to the first overlay target and a second portion disposed adjacent to the first portion such that the second overlay target has 180° rotational symmetry about a normal to the semiconductor substrate; and patterned to define the semiconductor substrate includes dies separated by scribe lines; the first overlay target functions as a half target having a size smaller than the second overlay target; the first overlay target, which is relatively small, is disposed in a device region of the die, and the second overlay target, which is relatively large, is disposed in one of the scribe lines; product.

2. 10. The article of manufacture of claim 1, wherein the second portion of the second overlay target comprises a rotated copy of the first portion.

3. 10. The article of manufacture of claim 1, wherein the first overlay target is one of a plurality of first overlay targets, each of the first overlay targets including the first and second target features disposed at different respective locations on the semiconductor substrate.

4. 10. The article of manufacture of claim 1, wherein the first target feature comprises a first linear grating oriented along a first direction in the first thin film layer, and the second target feature comprises a second linear grating oriented along the first direction in the second thin film layer.

5. 5. The article of manufacture of claim 4, wherein the first target feature further comprises a third linear grating oriented along a second direction within the first thin film layer, the second direction being non-parallel to the first direction, and the second target feature further comprises a fourth linear grating oriented in the second thin film layer in the second direction.

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