Method for multi-data transmission using current changes with low power consumption

Abstract

To provide a low power consumption electric circuit for multi data transmission using current changes, enabling an increase in an amount of data to be transmitted without increasing a frequency, thereby making it possible to address a further increase in a global level of data volume predicted in the future, a shortage of power supply, and a problem of CO2 emissions directly linked to global warming.SOLUTION: A waveform output unit includes: a low current high level voltage output circuit; and a high current high level voltage output circuit, the waveform input unit includes: a first waveform detection unit; a second waveform detection unit; and a differentiation circuit, and the waveform output unit and the waveform input unit are connected by a transmission line to utilize current changes, thereby making it possible to transmit a large amount of data by simultaneously using voltage changes and current changes.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a low-power-consumption electric circuit that utilizes current changes. [Background technology]

[0002] Currently, semiconductor and computer transmission methods use the high and low levels of waveform voltage as a basis for determining whether the data is 01 (zero one), and in order to transmit large amounts of data, it is necessary to increase the data frequency.However, increasing the frequency brings with it the issues of high-frequency noise generation, increased power consumption, and increased CO2 emissions.

[0003] To solve these problems, the voltage of the waveform being transmitted has been reduced, and the voltage level has been reduced from 5V to 3.3V, from 3.3V to 1.8V, and from 1.8V to 1.5V. However, lowering the voltage level has also created the problem of increased susceptibility to electromagnetic noise from the surrounding area.

[0004] Furthermore, even with the use of such high-frequency and low-voltage technologies, it is believed that they are insufficient to address the predicted future increases in data volumes on a global scale, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent Publication No. 2024-36808 Summary of the Invention [Problem to be solved by the invention]

[0006] The above-mentioned Patent Document 1 proposes a structure that takes into consideration output voltage adjustment, but does not disclose configurations related to a waveform output method or waveform input method for achieving low power consumption. [Means for solving the problem]

[0007] The present invention is a low power consumption circuit that uses multi-data transmission utilizing current changes, in which the waveform output section has a low-current high-level voltage output circuit and a high-current high-level voltage output circuit, and the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and waveform input section are connected by a transmission line, and the waveform output section outputs a low-current high-level voltage from the low-current high-level voltage output circuit and a high-current high-level voltage from the high-current high-level voltage output circuit, transmits the output waveforms to the waveform input section via the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section. [Effects of the Invention]

[0008] The present invention is a low power consumption circuit that uses multi-data transmission utilizing current changes, in which the waveform output section has a low-current high-level voltage output circuit and a high-current high-level voltage output circuit, and the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and waveform input section are connected by a transmission line, and the waveform output section outputs a low-current high-level voltage from the low-current high-level voltage output circuit and a high-current high-level voltage from the high-current high-level voltage output circuit, transmits the output waveforms to the waveform input section via the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

[0009] In this way, conventional transmission methods for semiconductors, computers, etc. determine whether the data is 01 (zero or one) based on the high / low voltage of the waveform, and only transmit the high / low voltage changes during one waveform transmission or one cycle. However, in this invention, in addition to this, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage, making it possible to determine the data. Since it is possible to detect changes in current as well as voltage during one waveform transmission or one cycle, it becomes possible to send and receive multiple waveform data. This makes it possible to increase the amount of data that can be transmitted without increasing the frequency, which has the effect of making it possible to address the further increase in data volume on a global scale that is predicted in the future, as well as the problems of power supply shortages and CO2 emissions that are directly linked to global warming. [Brief explanation of the drawings]

[0010] [Figure 1] Circuit configuration diagram of one embodiment of the present invention [Figure 2] Circuit component layout diagram for one embodiment of the present invention [Figure 3] Simulation waveforms relating to one embodiment of the present invention [Figure 4] Simulation waveforms relating to one embodiment of the present invention [Figure 5] Simulation waveforms relating to one embodiment of the present invention [Figure 6] Simulation waveforms relating to one embodiment of the present invention [Figure 7] Simulation waveforms relating to one embodiment of the present invention [Figure 8] Simulation waveforms relating to one embodiment of the present invention [Figure 9] Circuit configuration diagram of one embodiment of the present invention [Figure 10] Circuit configuration diagram of one embodiment of the present invention DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments will be described with reference to the drawings.

[0012] In the description of the drawings, the same elements are given the same reference numerals and redundant description will be omitted. Furthermore, the drawings are for the purpose of understanding, and the actual dimensional ratios do not necessarily correspond to the actual ones.

[0013] FIG. 1 is a circuit diagram of an embodiment of the present invention.

[0014] Here, the waveform output unit 1 has a low current high level voltage output circuit 3 and a high current high level voltage output circuit 4, the waveform input unit 2 has a first waveform detection unit 6, a second waveform detection unit 7 and a differentiation circuit 8, and the waveform output unit 1 and the waveform input unit 2 are connected by a transmission line 5.

[0015] 2, the first resistive component 16 in FIG. 2 and the second PMOS 17 in FIG. 2 are assigned as a circuit having the function of the low-current high-level voltage output circuit 3 in FIG. 1, the first PMOS 15 in FIG. 2 is assigned as a circuit having the function of the high-current high-level voltage output circuit 4 in FIG. 1, and the capacitive component 21 in FIG. 2 and the second resistive component 22 in FIG. 2 are assigned as the differentiating circuit 8 in FIG. 1.

[0016] Furthermore, in FIG. 2, the waveform output unit 1 has a first power supply unit 11, a ground 12, a waveform supply unit 13, a selector circuit 14, a first PMOS 15, a first resistance component 16, a second PMOS 17, an NMOS 18, and a waveform output terminal 19.

[0017] At this time, the source of the first PMOS 15 and one terminal of the first resistance component 16 are connected to the first power supply component 11, the waveform supply component 13 is connected to the input terminal of the selector circuit 14 and the gate of the NMOS 18, one output terminal of the selector circuit 14 is connected to the gate of the first PMOS 15, the other output terminal of the selector circuit 14 is connected to the gate of the second PMOS 17, the other terminal of the first resistance component 16 is connected to the source of the second PMOS 17, the source of the NMOS 18 is connected to ground 12, and the drain of the first PMOS 15, the drain of the second PMOS 17, and the drain of the NMOS 18 are connected to a waveform output terminal 19.

[0018] The waveform input section 2 also includes a first waveform detection section 6, a second waveform detection section 7, a second power supply section 20, a capacitive component 21, and a second resistive component 22.

[0019] At this time, one terminal of the second resistive component 22 is connected to the second power supply unit 20, the other terminal of the second resistive component 22 and one terminal of the capacitive component 21 are connected to the second waveform detection unit 7, and the other terminal of the capacitive component 21 is connected to the first waveform detection unit 6.

[0020] Furthermore, the waveform output terminal 19 of the waveform detection unit 1 is connected to one terminal of the transmission line 5 , and the first waveform detection unit 6 of the waveform input unit 2 is connected to the other terminal of the transmission line 5 .

[0021] At this time, consider the case where a falling waveform is supplied from the waveform supply unit 13 to the input terminal of the selector circuit 14 and the gate of the NMOS 18 in FIG.

[0022] When the waveform from the waveform supply unit 13 is supplied from the selector circuit 14 to the gate of the first PMOS 15 connected to one output terminal of the selector circuit 14, the first PMOS 15 is turned on by the falling waveform at the gate, and a rising waveform is output from the drain of the first PMOS 15. Let us assume that the change in the output current at this time is X (A / sec). At the same time, the NMOS 18 is turned off.

[0023] 2, when a falling waveform is supplied from waveform supply unit 13 to the input terminal of selector circuit 14 and the gate of NMOS 18, and when the waveform from waveform supply unit 13 is supplied from selector circuit 14 to the gate of second PMOS 17 connected to the other output terminal of selector circuit 14, second PMOS 17 is turned on by the falling waveform at the gate, and a rising waveform is output from the drain of second PMOS 17. Let us assume that the change in output current at this time is Y (A / sec). At the same time, NMOS 18 is turned off.

[0024] Here, assuming that the first PMOS 15 and the second PMOS 17 are PMOSs with equivalent performance, the first resistance component 16 and the second PMOS 17 form the function of the low-current high-level voltage output circuit 3, but since the resistance component is larger than that of the high-current high-level voltage output circuit 4 formed by the first PMOS 15, the current change in the rising waveform at the drain when the PMOS is turned on becomes smaller. Therefore, when comparing current change X and current change Y, X > Y.

[0025] The waveform input section 2 also includes a first waveform detection section 6, a second waveform detection section 7, a second power supply section 20, a capacitive component 21, and a second resistive component 22.

[0026] At this time, one terminal of the second resistive component 22 is connected to the second power supply unit 20, the other terminal of the second resistive component 22 and one terminal of the capacitive component 21 are connected to the second waveform detection unit 7, and the other terminal of the capacitive component 21 is connected to the first waveform detection unit 6.

[0027] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22.

[0028] Furthermore, waveform output terminal 19 of waveform output unit 1 is connected to one terminal of transmission line 5 , and first waveform detection unit 6 of waveform input unit 2 is connected to the other terminal of transmission line 5 .

[0029] In order to verify these overall waveforms, we will quantitatively explain the waveforms using LTspice simulation.

[0030] In FIG. 2, the first power supply unit 11 of the waveform output unit 1 is set to 5V, the first PMOS 15 and second PMOS 17 of the waveform output unit 1 are set to a SPICE model of RSD160P05 manufactured by ROHM, the NMOS 18 of the waveform output unit 1 is set to a SPICE model of RSR025N03 manufactured by ROHM, the first resistive component 16 of the waveform output unit 1 is set to 5Ω, and the waveform supply unit 13 of the waveform output unit 1 is set to a waveform with a high side of 5V, a low side of 0V and a fall time of 1 ns.

[0031] In addition, the parameters of the transmission line 5 in FIG. 2 are set to a delay time of 5 ns and a characteristic impedance of 50 Ω.

[0032] Furthermore, in FIG. 2, the second power supply section 20 of the waveform input section 2 is set to 2.5 V, the second resistive component 22 is set to 500 Ω, and the capacitive component 21 is set to 10 pF.

[0033] In this case, consider the first case where the waveform from waveform supply unit 13 is supplied from selector circuit 14 to the gate of first PMOS 15 connected to one output terminal of selector circuit 14. First PMOS 15 is turned on by the falling waveform at the gate, a rising waveform is output from the drain of first PMOS 15, NMOS 18 is turned off, and the waveform reaches first waveform detection unit 6 of waveform input unit 2 from waveform output terminal 19 through transmission path 5.

[0034] FIG. 3 shows the waveform at this time, where the vertical axis represents voltage and the horizontal axis represents time, as the voltage detected by first waveform detector 6.

[0035] FIG. 4 shows a waveform of a current flowing between the other terminal of the transmission line 5 and the other terminal of the capacitive component 21, with the vertical axis representing current and the horizontal axis representing time.

[0036] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22, and Figure 5 shows the waveform of the voltage at the second waveform detection unit 7 located between these two components, with the vertical axis representing voltage and the horizontal axis representing time.

[0037] In this case, if the low level of the waveform in Figure 3 is 0V and the high level is 5V, the 20% to 80% level of the voltage amplitude is 1V to 4V, and the time required to transition from 1V to 4V can be seen from the simulation waveform in Figure 3 to be approximately 4.0ns.

[0038] In addition, in Figure 4, the peak value is 6.27 mA. At 0.1 mA it is 121.56 nsec, and at 6.27 mA it is 130.00 nsec, and the current change during this period is 0.73 mA / nsec.

[0039] Furthermore, in FIG. 5, the peak voltage of the waveform is 5.63V.

[0040] Next, consider the second case where the waveform from waveform supply unit 13 is supplied from selector circuit 14 to the gate of second PMOS 17 connected to the other output terminal of selector circuit 14. Second PMOS 17 is turned on by the falling waveform at its gate, a rising waveform is output from the drain of second PMOS 17, NMOS 18 is turned off, and the waveform reaches first waveform detection unit 6 of waveform input unit 2 from waveform output terminal 19 through transmission path 5.

[0041] FIG. 6 shows the waveform at this time, where the vertical axis represents voltage and the horizontal axis represents time, as the voltage at first waveform detector 6.

[0042] 7 shows a waveform of a current flowing between the other terminal of the transmission line 5 and the other terminal of the capacitive component 21, with the vertical axis representing current and the horizontal axis representing time.

[0043] Here, a differential circuit is formed by a capacitive component 21 and a second resistive component 22, and Figure 8 shows the waveform of the voltage at the second waveform detection unit 7 located between these two components, with the vertical axis representing voltage and the horizontal axis representing time.

[0044] In this case, if the low level of the waveform in Figure 6 is 0V and the high level is 5V, the 20% to 80% level of the voltage amplitude is 1V to 4V, and the time required to transition from 1V to 4V can be seen from the simulation waveform in Figure 6 to be approximately 6.6ns.

[0045] 7, the peak value is 3.80 mA. At 0.1 mA it is 126.35 nsec, and at 3.80 mA it is 132.66 nsec, with the current change during this period being 0.59 mA / nsec.

[0046] Furthermore, in FIG. 8, the peak voltage of the waveform is 4.40V.

[0047] Here, let us consider the waveforms at the waveform input section 2 in the first and second cases.

[0048] In the first case, the first waveform detector 6 detects a waveform that changes from low to high, with the low level set to 0V and the high level set to 5V, and the second waveform detector 7 detects a peak voltage of 5.63V.

[0049] In the second case, the first waveform detector 6 detects a waveform that changes from low to high, with the low level set to 0V and the high level set to 5V, and the second waveform detector 7 detects a peak voltage of 4.40V.

[0050] In one waveform transmission or one cycle, the first waveform detector 6 detects a voltage change between low and high in both the first and second cases. The second waveform detector 7 detects a waveform with a peak voltage of 5.63 V in the first case and a peak voltage of 4.40 V in the second case.

[0051] Here, if we assume that the threshold voltage of the waveform in the second waveform detection unit 7 is set to 5.00 V, which is approximately the midpoint between the peak voltage of 5.63 V in the first case and the peak voltage of 4.40 V in the second case, the second waveform detection unit 7 can detect the first and second cases as different data.

[0052] As explained above, by selecting the first PMOS 15 or the second PMOS 17 using the selector circuit 14 in the waveform output unit 1, it becomes possible to transmit multiple waveform data at one time or during one cycle of waveform transmission.

[0053] By providing a differentiation circuit such as a capacitance component 21 and a second resistance component 22 in the waveform input unit 2, it becomes possible to receive multiple waveform data as if the waveforms were detected by the first waveform detection unit 6 and the second waveform detection unit 7 during one waveform transmission or one cycle.

[0054] Although a specific configuration is described in this explanation, other variations will be described.

[0055] In the waveform output section 1, the configuration of the first PMOS 15, the first resistive component 16, and the second PMOS 17 for transmitting the waveform from the waveform output terminal 19 has been described, but it is also possible to use multiple PMOSs with different characteristics, or to use an NPN transistor instead of a PMOS.

[0056] In addition, in the waveform output section 1, the configuration of the first resistive component 16 for transmitting a waveform from the waveform output terminal 19 has been described, but it is also possible to incorporate a single or multiple capacitive components, a single or multiple resistive components, or a single or multiple inductor components in series or in parallel.

[0057] Furthermore, although the first power supply unit 11 of the waveform output unit 1 is configured as a single DC power supply, a variable DC power supply or an AC power supply can also be applied.

[0058] Although the transmission line 5 has been described as having a characteristic impedance and a delay time, it can be substituted with a material other than a metal transmission line, such as carbon, as long as it can transmit an electrical waveform.

[0059] In the waveform input section 2, the configuration of the capacitive component 21 and the second resistive component 22 has been described as a differential circuit, but it is also possible to incorporate one or more capacitive components, one or more resistive components, or one or more inductor components in series or in parallel, and in that case, it is possible to detect multiple waveforms from the connection points between multiple components.

[0060] Furthermore, although the second power supply unit 20 of the waveform input unit 2 is described as being configured as a single DC power supply, a variable DC power supply or an AC power supply can also be applied.

[0061] Furthermore, in the present invention, the configuration of the rising edge at waveform output terminal 19 of waveform output section 1 has been described, but similar to the first PMOS 15, first resistance component 16, and second PMOS 17 that configure the rising waveform, by replacing NMOS 18 connected to waveform output terminal 19 with a plurality of NMOSs or by connecting a resistance component, it is also possible to accommodate a configuration of a falling edge waveform at waveform output terminal 19.

[0062] In this case, as shown in FIG. 9, the waveform output section 1 is configured with a low-current low-level voltage output circuit 9 and a high-current low-level voltage output circuit 10.

[0063] Furthermore, it is also possible to incorporate both rising and falling circuits at the same time. In this case, as shown in Fig. 10, the waveform output section 1 will be configured with a low-current high-level voltage output circuit 3, a high-current high-level voltage output circuit 4, a low-current low-level voltage output circuit 9, and a high-current low-level voltage output circuit 10.

[0064] As described above, the present invention is a low power consumption circuit that uses multi-data transmission utilizing current changes, in which the waveform output section has a low-current high-level voltage output circuit and a high-current high-level voltage output circuit, and the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and waveform input section are connected by a transmission line, and the waveform output section outputs a low-current high-level voltage from the low-current high-level voltage output circuit and a high-current high-level voltage from the high-current high-level voltage output circuit, transmits the output waveforms to the waveform input section via the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

[0065] In this way, conventional transmission methods for semiconductors, computers, etc. determine whether the data is 01 (zero or one) based on the high / low voltage of the waveform, and only transmit the high / low voltage changes during one waveform transmission or one cycle. However, in this invention, in addition to this, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage, making it possible to determine the data. Since it is possible to detect changes in current as well as voltage during one waveform transmission or one cycle, it becomes possible to send and receive multiple waveform data. This makes it possible to increase the amount of data that can be transmitted without increasing the frequency, which has the effect of making it possible to address the further increase in data volume on a global scale that is predicted in the future, as well as the problems of power supply shortages and CO2 emissions that are directly linked to global warming. [Industrial Applicability]

[0066] In the low-power circuit of the present invention, which uses current changes for multi-data transmission, conventional transmission methods for semiconductors, computers, etc. determine whether the data is 0 or 1 (zero or one) based on the high / low voltage of the waveform, and only transmit high / low voltage changes during one waveform transmission or one cycle. However, in the present invention, the high and low levels of the waveform current are transmitted and received, and the current changes are converted into voltage to enable data determination. This makes it possible to detect changes in current as well as voltage during one waveform transmission or one cycle, making it possible to send and receive multiple waveform data. This increases the amount of data that can be transmitted without increasing the frequency, making it possible to address the predicted further increase in data volume on a global scale in the future, the problem of power supply shortages, and the problem of CO2 emissions that are directly linked to global warming. This will make a significant contribution to the SDGs and to the semiconductor and computer industries. [Explanation of symbols]

[0067] 1. Waveform output section 2. Waveform input section 3. Low-current high-level voltage output circuit 4. High-current high-level voltage output circuit 5. Transmission path 6. First waveform detector 7. Second waveform detector 8... Differential circuit 9. Low-current low-level voltage output circuit 10. High current low level voltage output circuit 11. First power supply unit 12 Grand 13...Waveform supply section 14. Selector circuit 15. First PMOS 16. First resistor component 17 Second PMOS 18. NMOS 19 Waveform output terminal 20 Second power supply unit 21 Capacity Parts 22...Second resistor

Claims

1. 1. A low power consumption circuit using multi-data transmission utilizing current changes, wherein the waveform output section has a low-current high-level voltage output circuit and a high-current high-level voltage output circuit, and the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and waveform input section are connected by a transmission line, wherein the waveform output section outputs a low-current high-level voltage from the low-current high-level voltage output circuit and outputs a high-current high-level voltage from the high-current high-level voltage output circuit, transmits the output waveforms to the waveform input section via the transmission line, detects the waveform by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

2. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, further comprising a high level voltage output circuit having a current value different from that of the low current high level voltage output circuit and the high current high level voltage output circuit.

3. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, wherein the low current high level voltage output circuit and the high current high level voltage output circuit are configured with PMOS.

4. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, wherein the low current high level voltage output circuit and the high current high level voltage output circuit are configured with resistive components.

5. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, wherein the low current high level voltage output circuit and the high current high level voltage output circuit are configured with inductor components.

6. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, wherein the low current high level voltage output circuit and the high current high level voltage output circuit are composed of capacitive components.

7. 2. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 1, wherein said differentiation circuit is composed of capacitive components and resistive components.

8. 2. A low power consumption circuit for multi-data transmission using current changes according to claim 1, wherein the differential circuit is composed of a plurality of circuits.

9. 1. A low power consumption circuit using multi-data transmission utilizing current changes, wherein the waveform output section has a low-current low-level voltage output circuit and a high-current low-level voltage output circuit, and the waveform input section has a first waveform detection section, a second waveform detection section, and a differentiation circuit, and the waveform output section and waveform input section are connected by a transmission line, wherein the waveform output section outputs a low-current low-level voltage from the low-current low-level voltage output circuit and outputs a high-current low-level voltage from the high-current low-level voltage output circuit, transmits the output waveforms to the waveform input section via the transmission line, detects the waveforms by the first waveform detection section, and detects the waveform in the differentiation circuit by the second waveform detection section.

10. 10. A low power consumption circuit using multiple data transmission utilizing current changes according to claim 9, further comprising a low level voltage output circuit having a current value different from that of the low current low level voltage output circuit and the high current low level voltage output circuit.

11. 10. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 9, wherein the low current low level voltage output circuit and the high current low level voltage output circuit are configured with NMOS.

12. 10. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 9, wherein the low current low level voltage output circuit and the high current low level voltage output circuit are configured with resistive components.

13. 10. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 9, wherein the low current low level voltage output circuit and the high current low level voltage output circuit are configured with inductor components.

14. 10. A low power consumption circuit for multi-data transmission utilizing current changes according to claim 9, wherein the low current low level voltage output circuit and the high current low level voltage output circuit are composed of capacitive components.

15. 2. The low power consumption circuit with multi-data transmission utilizing current changes according to claim 1, wherein the waveform output unit comprises the low current low level voltage output circuit and the high current low level voltage output circuit, wherein the low current low level voltage output circuit outputs a low current low level voltage, and the high current low level voltage output circuit outputs a high current low level voltage.

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