Power conversion device

Abstract

To provide a power conversion device capable of reducing switching losses by enabling a smaller gate resistance value within the range where dynamic avalanche does not occur.SOLUTION: On the basis of temperature information of a semiconductor switching element, a gate resistance value is set so that the relationship between the gate resistance value and a surge voltage generated when the semiconductor switching element is operated using the gate resistance is such that the surge voltage increases as the gate resistance value decreases.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] In recent years, power conversion devices for electric powertrains of hybrid vehicles, electric vehicles, and the like have increased their processable power capacity by connecting multiple semiconductor elements, such as insulated gate bipolar transistors (IGBTs), in parallel and switching them simultaneously.

[0003] In this type of power conversion device, loss in the semiconductor switching elements is directly linked to loss in the entire power conversion device, including the inverter, so reducing loss in the semiconductor switching elements is essential to realizing electric vehicles that are environmentally friendly and competitive in the market. To reduce switching loss in semiconductor switching elements, high-speed switching is required, and to achieve this, it is important to set the gate resistance as small as possible.

[0004] Meanwhile, the surge voltage generated at turn-off is a condition that determines the lower limit of gate resistance, and it is common to design the maximum surge voltage to be below the withstand voltage of the semiconductor switching element to prevent destruction. To reduce the maximum anticipated surge voltage, it is necessary to increase the gate resistance and switch at a slower speed, but this inevitably results in large losses. As mentioned above, when determining the optimal gate resistance value, it is necessary to consider the trade-off between suppressing surge voltage and reducing switching losses.

[0005] Conventionally, a method has been disclosed for controlling surge voltage by predicting the surge voltage of a power conversion device and changing the gate resistance value (for example, Patent Document 1). This document describes how, under switching (current and voltage) conditions where the surge voltage is sufficient relative to the withstand voltage of the switching element, a small gate resistance is set to reduce losses. Conversely, under switching conditions where the surge voltage is large, the gate resistance is switched to operate at a large resistance value to suppress the surge voltage.

[0006] On the other hand, in insulated bipolar devices, including IGBTs, when turned off with a gate resistance below a certain level, the parasitic MOSFET channel closes before the carriers inside the IGBT are swept away, resulting in an excess of residual carriers inside the IGBT. This causes electric field concentration in the IGBT. This electric field concentration occurs before the depletion layer reaches the N-buffer, and when the critical electric field for avalanche is reached, the avalanche phenomenon generates electron-hole pairs, and the electron current flowing in the base layer suppresses the rise in the collector-emitter voltage, clamping the voltage and reducing the surge voltage. This phenomenon is called dynamic avalanche. When dynamic avalanche occurs, the surge voltage decreases, but the problem is that the device can be destroyed if the avalanche density exceeds the limit.

[0007] Due to the influence of dynamic avalanche, the relationship between the surge voltage and gate resistance of an IGBT is divided into a first region where the surge voltage increases when the gate resistance is reduced, and a second region where the surge voltage decreases when the gate resistance is reduced. It is also known that carriers inside the IGBT are affected by lattice vibrations, and carrier mobility decreases when the IGBT is at high temperatures, reducing the resistance value at the transition from the first region to the second region. The resistance values ​​corresponding to the first and second regions change depending on the temperature of the IGBT (see, for example, Non-Patent Document 1). [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 2020-36418 [Non-patent literature]

[0009] [Non-Patent Document 1] S. Machida, "Approaching the Limit of Switching Loss Reduction in Silicon Power Devices" R&D Review of Toyota CRDL, Vol. 46 No. 3 (2015) 1-7 Summary of the Invention [Problem to be solved by the invention]

[0010] By referring to the means disclosed in Patent Document 1, it is possible to adjust the gate resistance value so as to minimize switching loss in the region where dynamic avalanche does not occur, under conditions where the surge voltage does not exceed the withstand voltage of the element. However, because dynamic avalanche occurs at a voltage below the withstand voltage of the semiconductor switching element, switching the gate resistance depending on the magnitude of the surge voltage can unintentionally cause dynamic avalanche, which can lead to destruction of the switching element if the critical value is exceeded.

[0011] If a switching element installed in an inverter for a hybrid or electric vehicle breaks down, the motor driven by the inverter may suddenly become uncontrollable, affecting the operation of the vehicle and potentially causing a serious accident.

[0012] The present disclosure has been made to solve the above-mentioned problems, and aims to reduce switching loss while suppressing damage to semiconductor switching elements due to dynamic avalanches by setting the resistance value of the gate resistor taking into account that the density of dynamic avalanches varies with temperature. [Means for solving the problem]

[0013] The power conversion device of the present disclosure comprises a semiconductor switching element, a temperature detection means for acquiring temperature information of the semiconductor switching element, and a control unit having a gate resistor having one end connected to the gate terminal of the semiconductor switching element and a drive circuit having the other end connected to the gate resistor, which sets the resistance value of the gate resistor based on temperature information and drives the semiconductor switching element; the semiconductor switching element has a relationship between the resistance value and a surge voltage generated when the semiconductor switching element is operated using the gate resistor, such that in a first range of resistance values, the surge voltage increases as the resistance value decreases, and in a second range of resistance values, the surge voltage decreases as the resistance value decreases; the first and second ranges have characteristics that change according to temperature information; and the control unit sets the resistance value to be within the range of the first range based on the temperature information. [Effects of the Invention]

[0014] According to the power conversion device of the present disclosure, taking into account that the dynamic avalanche of the semiconductor switching element changes with temperature, the gate resistance value is set to be within the range of the first region based on temperature information of the semiconductor switching element, so that the gate resistance value can be reduced within a range in which dynamic avalanche does not occur, thereby making it possible to reduce switching losses. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is an overall configuration diagram of a power conversion device according to a first embodiment. [Figure 2] 2 is a circuit diagram of a gate switching drive circuit and its periphery in the power conversion device according to the first embodiment. FIG. [Figure 3] 4 is a diagram showing the relationship between the gate resistance and surge voltage of the semiconductor switching element according to the first embodiment. FIG. [Figure 4] 4 is a diagram showing the relationship between surge voltage and gate resistance when the temperature of the semiconductor switching element according to the first embodiment is high and low. FIG. [Figure 5] 10A and 10B are diagrams showing (a) a method for setting the resistance value of a gate resistor and (b) the relationship between the resistance value of a gate resistor and a surge voltage when the temperature of a semiconductor switching element is high and low in the first embodiment. [Figure 6] 10A and 10B are diagrams showing (a) a method for setting the resistance value of a gate resistor and (b) the relationship between the resistance value of a gate resistor and a surge voltage when the temperature of a semiconductor switching element is high and low in the first embodiment. [Figure 7] FIG. 10 is a diagram showing setting values ​​of gate resistance when two temperature thresholds are provided in the first embodiment. [Figure 8] 5 is a diagram showing a method for detecting the temperature of a semiconductor switching element in the first embodiment. FIG. [Figure 9] FIG. 10 is a diagram showing a method of switching gate resistance when the temperature threshold is set to the high temperature side of the rated temperature range of the element in the first embodiment. [Figure 10] FIG. 10 is a diagram showing a method of switching gate resistance when the temperature threshold is set to the low temperature side of the rated temperature range of the element in the first embodiment. [Figure 11] 5 is a diagram showing setting of a temperature threshold value when the temperature detection value of a semiconductor switching element is affected by a ripple in the first embodiment. FIG. [Figure 12] FIG. 2 is a diagram showing a situation in which a plurality of gate resistors connected to a gate driver are switched in the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, preferred embodiments of the monitoring and control system according to the present invention will be described with reference to the drawings. Note that the same reference numerals are used to designate the same contents and corresponding parts, and detailed description thereof will be omitted.

[0017] Embodiment 1 Fig. 1 is a schematic circuit diagram showing a power conversion device according to a first embodiment. A power conversion device 100 according to the first embodiment is an inverter circuit, with a DC input power supply 1 connected to an input section and a motor 7 as a load connected to the output of the power conversion device 100. In Fig. 1, the DC input power supply 1, which is a battery, outputs a DC voltage. Here, when this power conversion device 100 is applied to an electric vehicle or a hybrid vehicle, the DC input power supply 1 is typically made up of a secondary battery such as a nickel-metal hydride or lithium-ion battery.

[0018] The power conversion device 100 is a three-phase inverter and includes a smoothing capacitor 2 for removing voltage ripple and noise, and semiconductor switching elements 3a to 3f. The power conversion device 100 outputs the output voltage of the smoothing capacitor 2 as three-phase AC to three-phase output terminals Vu, Vv, and Vw. The three-phase output terminals of the power conversion device 100 are connected to a motor 7 such as a generator or an electric motor to supply the three-phase AC.

[0019] Based on signals output via control lines 32a to 32f, control unit 6 controls the on / off of each of semiconductor switching element groups 3a to 3f, with a predetermined dead time provided. Semiconductor switching elements 3a to 3f are disposed inside semiconductor modules 5a to 5f, respectively, and diodes 4a to 4f serving as temperature detection means are disposed adjacent to semiconductor switching elements 3a to 3f, respectively. To obtain temperature information of semiconductor switching elements 3a to 3f, control unit 6 obtains temperature information of diodes 4a to 4f via signal lines 33a to 33f.

[0020] To acquire the input voltage of the power conversion device 100, a voltage sensor circuit 20 is installed in parallel with the smoothing capacitor 2 at the input stage of the power conversion device 100, and the control unit 6 acquires information about this input voltage via a signal line 31a. The output currents of each phase of the power conversion device 100 are three-phase currents Iu, Iv, and Iw of the three-phase AC between the three-phase output terminals Vu, Vv, and Vw and the motor 7. To acquire these currents, current sensor circuits 21a to 21c are provided for each phase of the output stage of the power conversion device 100 up to the motor 7, and the control unit 6 acquires the current values ​​(Iu, Iv, Iw) of each current sensor 21a to 21c via signal lines 31b to 31d.

[0021] Furthermore, a rotation angle sensor Snsθm (not shown) detects the rotation angle θm of the motor 7 and inputs it to the control unit 6. A torque command value Trq* and a DC voltage command value V2* for the motor 7 are also input to the control unit 6 from the outside.

[0022] The power conversion device 100 includes a cooler 8, which cools the smoothing capacitor 2 and the semiconductor switching elements 3a to 3f. The cooler 8 is, for example, a water-cooled cooler, and specifically, is configured to connect the water-cooled cooler to an electric motor such as a water pump with a hose. The refrigerant is not limited to water, and a cooling medium such as oil or long-life coolant (LLC) can be flowed from the electric motor into the cooler to cool the power conversion device 100.

[0023] FIG. 2 is a circuit diagram of a gate switching drive circuit and its periphery in the power conversion device 100 according to the first embodiment. Taking the semiconductor switching element 3a as an example, an output from a gate driver 61, which is a drive circuit of the control unit 6, is connected to the gate terminal of the semiconductor switching element 3a via a gate resistor 62. The gate driver 61 has multiple output terminals, OUT1 and OUT2, which are connected to gate resistors having resistance values ​​Rg1 and Rg2, respectively. The gate driver 61 can enable either or both of the gate driver outputs OUT1 and OUT2. In the power conversion device 100 according to the first embodiment, a temperature determination unit 63 of the control unit 6 determines whether the temperature information Tx of the diode 4a mounted on the semiconductor switching element 3a is higher or lower than a preset temperature threshold, and transmits a switching signal to the gate driver 61 according to the result to switch the gate resistor 62.

[0024] Here, two gate resistors 62 are connected to the output terminal of the gate driver 61, but this is not limiting and a gate driver 61 with more output terminals may be used and configured to switch between two or more gate resistors 62. Furthermore, a gate resistor 62 built into the gate driver 61 may be used.

[0025] Figure 3 shows the influence of dynamic avalanche of semiconductor switching element 3a and the effect of switching gate resistance in the gate drive circuit described in Figure 2. This figure, with surge voltage Vsurge [V] on the vertical axis and gate resistance Rg [Ω] on the horizontal axis, shows the relationship in which, when the gate resistance value is changed in the decreasing direction, the surge voltage increases monotonically (Figure 3(a)), or increases and then changes to a decreasing direction (Figure 3(b)), and the rated maximum voltage (Vmax) of semiconductor switching element 3a is shown by a dashed line.

[0026] Figure 3(a) shows the case of a device that is less likely to experience dynamic avalanche, such as a metal-oxide semiconductor field-effect transistor (MOSFET), where the surge voltage tends to increase as the gate resistance value decreases. In such cases, it is preferable to make the gate resistance value as small as possible to reduce switching loss, and it is common to set the gate resistance Rga at a value at which the surge voltage reaches the device's rated maximum voltage (Vmax).

[0027] On the other hand, Figure 3(b) shows the characteristics of a device where dynamic avalanche occurs. The graph, with surge voltage Vsurge [V] on the vertical axis and gate resistance Rg [Ω] on the horizontal axis, is divided into two regions: a region where gate resistance is large (first region, A1) and a region where gate resistance is small (second region, A2). The surge voltage is maximized at a predetermined resistance value Rg = Rgb (limiting resistance value). In region A1, the gate resistance is larger than Rgb, and the surge voltage Vsurge increases as the gate resistance decreases. On the other hand, in region A2, the gate resistance is smaller than Rgb, and the surge voltage Vsurge decreases as the gate resistance decreases. According to Non-Patent Document 1, dynamic avalanche occurs in the hatched region A2 in Figure 3(b). Therefore, if a gate resistance Rga is used for a device exhibiting the characteristics shown in Figure 3(b), dynamic avalanche will occur even though the surge voltage is below the rated maximum voltage (Vmax) of the semiconductor switching device 3a.

[0028] For the reasons described above, if the gate resistance is determined solely based on Vsurge and the maximum rated voltage of the element, as shown in Patent Document 1, there is a risk of unintentionally generating dynamic avalanche and causing element failure. Therefore, it is necessary to determine the gate resistance by taking into consideration not only Vsurge and the maximum rated voltage, but also the occurrence of dynamic avalanche.

[0029] To avoid dynamic avalanche, it is necessary to select a gate resistor with a resistance greater than a certain resistance (limiting resistance) at which the surge voltage becomes maximum.Since the smaller the gate resistance, the smaller the switching loss, selecting the gate resistance Rgb as shown in Figure 3(b) makes it possible to minimize loss while avoiding dynamic avalanche.

[0030] Next, we will explain how the effects of dynamic avalanche change depending on the temperature of the element. Figure 4 shows a comparison of the surge voltage-gate resistance characteristics explained in Figure 3(b) when the temperature of the semiconductor switching element 3a is high and when it is low. This temperature characteristic varies depending on the characteristics of the semiconductor switching element 3a. In this figure, Gl shows the relationship between gate resistance and surge voltage when the element 3a is at a low temperature, and Gh shows the relationship when the element 3a is at a high temperature. Also, Al shows the region where dynamic avalanche occurs when the element 3a is at a low temperature, and Ah shows the region where dynamic avalanche occurs when the element 3a is at a high temperature.

[0031] This shows a case where the higher the temperature of the semiconductor switching element 3a, the smaller the predetermined resistance value (limiting resistance value) of the gate resistor at which the surge voltage reaches its maximum, making it less likely that a dynamic avalanche will occur. In this temperature characteristic of dynamic avalanche, if Rgh is set as the gate resistance instead of Rgl in order to minimize switching loss, the occurrence of dynamic avalanche is suppressed and switching loss is minimized when the element is hot. However, when the semiconductor switching element cools down, the maximum point of the surge voltage shifts to the larger gate resistance side, so if the gate is driven with gate resistance Rgh, dynamic avalanche will occur, potentially destroying the element.

[0032] Conversely, if the gate resistance is set to Rgl, which is the gate resistance at which the surge voltage reaches its maximum when the semiconductor switching element 3a is at a low temperature even though the semiconductor switching element 3a has reached a high temperature, the occurrence of dynamic avalanche can be suppressed, but the switching loss will increase, which will raise concerns about the efficiency of the power conversion device 100 or its thermal feasibility at high temperatures.

[0033] To solve this problem, the power conversion device 100 according to the first embodiment sets in advance the smallest possible gate resistance within a range that does not cause dynamic avalanche, according to the temperature of the semiconductor switching element 3a, acquires temperature information about the semiconductor switching element 3a, and switches to the appropriate gate resistance when the temperature of the semiconductor switching element 3a changes and reaches a predetermined temperature threshold. Specific gate resistance setting values ​​and gate switching methods are shown in FIG. 5.

[0034] Figure 5(a), with element temperature Tx on the horizontal axis and gate resistance Rg on the vertical axis, illustrates the relationship between element temperature Tx.th, the threshold for switching the gate resistance, and the gate resistance value used at that time. Figure 5(b) illustrates the relationship between surge voltage and gate resistance value when the temperature of element 3a is Tx=Tx.th and Tx=Tx.min. As shown in Figure 5(b), Rgl is set so that the surge voltage is maximized when the element temperature is at its minimum value within the rated temperature range, i.e., when Tx=Tx.min. This also shows that when the gate resistance is Rgl, it is possible to suppress the occurrence of dynamic avalanche within the rated temperature range (Tx.min≦Tx≦Tx.max).

[0035] Also, Rgh is set such that the surge voltage becomes maximum when the device temperature is at the gate resistance switching threshold, i.e., Tx = Tx.th. By setting it in this way, when the device temperature is higher than the gate resistance switching threshold, i.e., Tx > Tx.max, the gate resistance value is lowered within the range where dynamic avalanche is not caused, thereby reducing switching losses and achieving improvement in the efficiency of the power conversion device 100 or improvement in the thermal reliability of the semiconductor switching element 3a in the high-temperature region.

[0036] The content described above can be similarly understood from FIG. 5(a). That is, when the temperature of the semiconductor switching element 3a is in the relatively low temperature range Tx.min < Tx < Tx.th, Rgl is adopted as the gate resistance value used for driving, and when the temperature is in the relatively high temperature range Tx.th < Tx < Tx.max, Rgh is adopted as the gate resistance value used for driving. As a result, in the entire region of Tx.min < Tx < Tx.max, the gate resistance used for driving the semiconductor switching element 3a can be set to exceed the gate resistance (Rs) at which the surge voltage is maximum, so that the occurrence of dynamic avalanche can be suppressed, and the gate resistance value can be lowered as much as possible within the range where dynamic avalanche does not occur, indicating that the switching losses can be reduced.

[0037] From the above, by switching between two or more predetermined gate resistances (Rgl and Rgh) at a predetermined temperature threshold (Tx = Tx.th), the occurrence of dynamic avalanche at all operating temperatures can be suppressed, the destruction of the device can be prevented, and the reliability of the power conversion device 100 can be improved. Furthermore, due to the above switching of the gate resistance value, it becomes possible to use the lowest possible gate resistance value in two temperature intervals straddling the temperature threshold, thus realizing miniaturization and cost reduction of the power conversion device 100 due to simplification of cooling based on switching loss reduction and improvement in the value of the power conversion device 100 based on efficiency improvement.

[0038] In FIG. 5, the case where the semiconductor switching element 3a has the characteristic that the gate resistance (Rs) at which the surge voltage becomes maximum decreases as the temperature rises has been described. FIG. 6 shows the case where the gate resistance (Rs) at which the surge voltage becomes maximum increases as the temperature rises. In this case, when the temperature of the semiconductor switching element 3a is in the relatively low temperature range Tx.min < Tx < Tx.th, the condition of Tx = Tx.th, that is, Rgl is adopted as the gate resistance value used for driving. When the temperature is in the relatively high temperature range Tx.th < Tx < Tx.max, the condition of Tx = Tx.max, that is, Rgh is adopted as the gate resistance value used for driving. By determining the gate resistance in this way, the same effect as in the case of FIG. 5 can be obtained.

[0039] In the above description, the case of providing one temperature threshold has been dealt with. FIG. 7 shows the set values of the gate resistance in the case of providing two temperature thresholds. The temperature threshold 1 (Tx.th1) and the temperature threshold 2 (Tx.th2) are determined between Tx.max and Tx.min. The plot of the gate resistance Rs at which the surge voltage is maximum is determined by the characteristics of the semiconductor switching element 3a and is the same as in FIG. 5. The gate resistances Rgl, Rgm, and Rgh are set to the gate resistances at which the surge voltage is maximum under the conditions that the temperature of the semiconductor switching element 3a is Tx.min, Tx.th1, and Tx.th2, respectively.

[0040] Similarly, even when two or more temperature thresholds are provided, based on the plot of the gate resistance (Rs) at which the surge voltage is maximum, the gate resistance is set, and when the element temperature Tx exceeds or is lower than the temperature thresholds Tx.th1 and Tx.th2, the gate resistance Rg is switched, so that the optimum gate resistance Rg can be selected in a fine temperature range, suppressing the occurrence of dynamic avalanche and achieving further loss reduction and efficiency improvement.

[0041] That is, if the switching element 3a has the characteristic that the gate resistance at which the surge voltage becomes maximum decreases monotonically as the operating temperature increases (see Figures 5 and 7), and if multiple temperature ranges are set within a range from the minimum rated temperature (Tx.min) to the maximum rated temperature (Tx.max) separated by temperature thresholds, when the temperature of the switching element 3a is within the range of one of the temperature ranges, the resistance value of the gate resistor can be set to the gate resistance value at which the surge voltage generated at the lowest temperature within that temperature range becomes maximum.

[0042] Conversely, if the switching element 3a has a characteristic in which the gate resistance at which the surge voltage becomes maximum increases monotonically as the operating temperature rises (see Figure 6), when multiple temperature ranges are set within a range from the minimum rated temperature (Tx.min) to the maximum rated temperature (Tx.max) separated by temperature thresholds, if the temperature of the switching element 3a is within the range of one of the temperature ranges, the resistance value of the gate resistor can be set to the gate resistance value at which the surge voltage generated at the highest temperature within that temperature range becomes maximum.

[0043] The diodes 4a to 4f for acquiring temperature information Tx of the semiconductor switching elements are arranged directly above and in contact with the semiconductor switching elements 3a to 3f, making it possible to directly detect the junction temperatures Tj of the semiconductor switching elements 3a to 3f. Because the dynamic avalanche characteristics of the semiconductor switching elements 3a to 3f depend on the junction temperatures Tj, directly detecting Tj makes it possible to switch the gate resistance while avoiding dynamic avalanche without setting an extra temperature margin, thereby reducing switching losses and improving efficiency.

[0044] Specific temperature detection means are shown in Figure 8. Figure 8(a) shows a temperature detection means using a diode, and Figure 8(b) shows a temperature detection means using a thermistor. Even if there are constraints on the layout within the semiconductor modules 5a-5f, it is possible to obtain temperature information Tx of the semiconductor switching elements 3a-3f by bringing temperature detection means 4a-4f such as thermistors into contact with bus bars connected to the semiconductor switching elements 3a-3f, or by arranging the temperature detection means 4a-4f within the semiconductor modules 5a-5f.

[0045] Fig. 9 shows the concept of switching between the element temperature Tx and gate resistance Rg when a temperature threshold Tx.th is set on the high temperature side of the rated temperature range of the semiconductor switching elements 3a to 3f. Here, the high temperature is defined as a temperature (Tx > (Tx.min + Tx.max) / 2) higher than half (the midpoint temperature) between the maximum and minimum rated temperatures Tx.max and Tx.min of the semiconductor switching elements 3a to 3f.

[0046] If losses occur in the switching elements 3a to 3f when the element temperature Tx is high, the element temperature Tx will rise further due to self-heating of the switching elements 3a to 3f, which may cause thermal runaway and destruction of the switching elements 3a to 3f. Under such conditions, by switching the gate resistance Rg from Rgl to Rgh on the high temperature side of the rated temperature range, it is possible to reduce self-heating (switching loss) at high element temperatures and prevent destruction of the switching elements 3a to 3f due to thermal runaway.

[0047] On the other hand, when a temperature threshold Tx.th is set on the low-temperature side of the rated temperature range of the semiconductor switching elements 3a to 3f, a concept regarding switching between the element temperature Tx and the gate resistance Rg is shown in Figure 10. During normal operation of the power conversion device, the semiconductor switching elements are frequently driven at a temperature (Tx < (Tx.min + Tx.max) / 2) lower than half (the midpoint temperature) between the maximum and minimum rated temperatures Tx.max and Tx.min. Therefore, in order to reduce switching loss during normal operation, a temperature threshold Tx.th is set on the low-temperature side and the switching elements 3a to 3f are operated so that the temperature does not fall below this threshold. This allows the gate resistance Rg to operate in a low range, which contributes to improving the efficiency of the power conversion device 100 and reduces unnecessary power loss.

[0048] In the explanation so far, we have assumed a configuration in which the gate resistor Rg is switched when the temperature Tx acquired by the diodes 4a to 4f exceeds or falls below the temperature threshold Tx.th. However, a configuration in which the temperature threshold Tx.th is changed while the temperature Tx is rising or falling may also be adopted. When the temperature detection values ​​of the diodes 4a to 4f are transmitted to the control unit 6 via the signal lines 33a to 33f, there is a possibility that the temperature detection values ​​may fluctuate due to the influence of noise or that ripples may occur. In this case, if the gate resistor Rg is switched based on incorrect temperature information due to the ripples, switching may occur under unexpected conditions, which may cause a dynamic avalanche.

[0049] To avoid this, if there is a risk of ripples occurring in the detected temperature values ​​of the switching elements 3a to 3f, a temperature threshold is set at Tx.th', which is higher than Tx.th by a predetermined temperature range ΔTh, as shown in Figure 11. ΔTh is set taking into account the effects of ripples, so that even if ripples occur, the actual temperature of the element (not the detected temperature value) at the timing when the gate resistance is changed will not fall below Tx.th. This allows the gate resistance value (Rg) to be always higher than the gate resistance (Rs) at which the surge voltage becomes maximum, even if the detected temperature value fluctuates due to the effects of ripples, making it possible to prevent dynamic avalanche from occurring. This embodiment can also be applied to a power conversion device 100 with high noise.

[0050] In the above description, the switchable gate resistance Rg is a gate resistance connected in series to the output of the gate driver 61, but the gate may also be driven by a composite resistance made up of a combination of multiple gate resistances. Fig. 12 shows a configuration in which gate resistances Rg(ON)1 and Rg(ON)2 are provided when the switch is ON, and gate resistances Rg(OFF)1 and Rg(OFF)2 are provided when the switch is OFF. A predetermined gate resistance can be enabled in response to a gate resistance switching signal (S.ON1, S.ON2, S.OFF1, S.OFF2) transmitted from the temperature determination unit 63 to the gate driver 61.

[0051] The gate driver 61 can enable only Rg(OFF)1, only Rg(OFF)2, or both. When both are enabled, Rg(OFF)1 and Rg(OFF)2 are connected in parallel, and the gate is driven by the combined parallel resistance of Rg(OFF)1 and Rg(OFF)2. In this way, by enabling a combination of multiple outputs from the gate driver 61, it is possible to drive the gate in a pattern greater than the number of resistors arranged. This reduces the number of resistors arranged on the board, allowing for a smaller board and therefore a more compact power conversion device 100.

[0052] In the first embodiment, a resistor having various combined resistance values ​​is configured by changing the electrical circuit combination of a plurality of resistors, but it is also possible to use a variable resistor as the gate resistor, for example, in which case the resistance value can be set according to an instruction output from the gate driver.

[0053] Furthermore, while the semiconductor elements in each of the embodiments described so far are assumed to have a configuration in which the IGBT and diode are provided separately, the semiconductor switching elements 3a to 3f may be configured as RC-IGBTs (Reverse Conducting IGBTs), which integrate the IGBT and diode. Because the RC-IGBT incorporates the IGBT and diode on the same chip, the wiring path of the main wiring is short, which tends to result in a configuration with low parasitic inductance. When the parasitic inductance of the main wiring is low, surge voltages are unlikely to increase even if the switching speed dI / dt is increased. Therefore, in conventional gate resistance switching, the gate resistance is often designed to be small. In such cases, dynamic avalanche is likely to occur. Therefore, the configuration according to this embodiment can further enhance the effect of switching the gate resistance while avoiding dynamic avalanche.

[0054] In the power conversion device according to each embodiment, the number of chips inside the semiconductor modules 5a to 5f is not shown, but the number of chips inside the semiconductor modules 5a to 5f may be one or more, and the number of semiconductor modules may also be one or more, and the measures to be taken when similar problems occur will have the same effect.

[0055] Although the present disclosure describes exemplary embodiments, the various features, aspects, and functions described in the embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless variations not illustrated are contemplated within the scope of the technology disclosed in this specification, including, for example, the modification, addition, or omission of at least one component. [Explanation of symbols]

[0056] 3a to 3f: semiconductor switching elements, 4a to 4f: diodes, 5a to 5f: semiconductor modules, 6: control unit, 61: gate driver, 62: gate resistor, 100: power conversion device.

Claims

1. semiconductor switching elements, a temperature detection means for acquiring temperature information of the semiconductor switching element; and a control unit including a gate resistor having one end connected to a gate terminal of the semiconductor switching element, and a drive circuit having the other end connected to the gate resistor, which sets a resistance value of the gate resistor based on the temperature information and drives the semiconductor switching element; the semiconductor switching element has a relationship between a surge voltage generated when the semiconductor switching element is operated using the gate resistor and the resistance value such that the surge voltage increases as the resistance value decreases in a first region of the resistance value, and the surge voltage decreases as the resistance value decreases in a second region of the resistance value, and further the first region and the second region have characteristics that change in accordance with the temperature information; The power conversion device, wherein the control unit sets the resistance value to be within the range of the first region based on the temperature information.

2. semiconductor switching elements, a temperature detection means for acquiring temperature information of the semiconductor switching element; and a control unit including a gate resistor having one end connected to a gate terminal of the semiconductor switching element, and a drive circuit having the other end connected to the gate resistor, which sets a resistance value of the gate resistor based on the temperature information and drives the semiconductor switching element; the semiconductor switching element generates a dynamic avalanche when the resistance value is set to a limit resistance value or less determined by characteristics of the semiconductor switching element when used at a temperature related to the temperature information, The power conversion device is characterized in that the control unit sets the resistance value so as to exceed the limit resistance value based on the temperature information.

3. 3. The power conversion device according to claim 1, wherein the control unit has a plurality of gate resistors, and the drive circuit sets a combined resistance value obtained by changing an electrical circuit combination of the plurality of gate resistors as the resistance value of the gate resistor.

4. 3. The power conversion device according to claim 1, wherein the temperature detection means is in contact with the semiconductor switching element, in contact with wiring connected to the semiconductor switching element, or is provided inside a semiconductor module that encapsulates the semiconductor switching element.

5. the semiconductor switching element has a characteristic that the gate resistance value at which the surge voltage becomes maximum monotonically decreases as the operating temperature increases; the control unit has information about a plurality of temperature sections separated by temperature thresholds between a minimum rated temperature and a maximum rated temperature of the semiconductor switching element, 3. The power conversion device according to claim 1, wherein, when the temperature related to the temperature information is within the range of any one of the temperature divisions, a gate resistance value at which a surge voltage generated at the lowest temperature of the temperature division becomes maximum is set as the resistance value of the gate resistor.

6. the semiconductor switching element has a characteristic that the gate resistance at which the surge voltage becomes maximum increases monotonically as the operating temperature increases, the control unit has information about a plurality of temperature sections separated by temperature thresholds between a minimum rated temperature and a maximum rated temperature of the semiconductor switching element, 3. The power conversion device according to claim 1, wherein, when the temperature related to the temperature information is within the range of any one of the temperature divisions, a gate resistance value at which a surge voltage generated at the highest temperature in the temperature division is maximized is set as the resistance value of the gate resistor.

7. 6. The power conversion device according to claim 5, wherein when the semiconductor switching element operates across the temperature threshold from an adjacent first temperature division to a second temperature division, the gate resistance value is changed to that in the second temperature division at a temperature higher than the temperature threshold.

8. The power conversion device according to claim 5 , wherein the temperature threshold value is included in a temperature range higher than a midpoint temperature between the minimum rated temperature and the maximum rated temperature.

9. The power conversion device according to claim 5 , wherein the temperature threshold value is included in a temperature range that is lower than a midpoint temperature between the minimum rated temperature and the maximum rated temperature.

10. 3. The power conversion device according to claim 1, wherein the semiconductor switching element is an RC-IGBT in which an insulated bipolar transistor and a diode are formed on the same chip.

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