Hybrid bonding with micro light emitting diode (LED) devices

Abstract

A micro light emitting diode (uLED) device has a source wafer having uLED dies bonded to a target wafer, where the wafer n-contacts are directly bonded to the die n-contacts, the wafer p-contacts are directly bonded to the die p-contacts, and the wafer dielectric material is directly bonded to the die dielectric material, where the wafer dielectric material insulates the wafer n-contacts from the wafer p-contacts.

Description

[Technical field]

[0001] Embodiments of the present disclosure generally relate to micro light emitting diode (uLED) devices and methods of making and using same. The uLED devices have hybrid bonding in which there is a combination of metal-metal and dielectric-dielectric bonding between a source wafer and a target wafer. [Background technology]

[0002] Among the most efficient light sources currently available are semiconductor light emitting devices or optical power emitting devices (e.g., devices that emit ultraviolet (UV) or infrared (IR) optical power), including light emitting diodes, resonant cavity light emitting diodes, vertical cavity laser diodes, and edge emitting lasers. Due to their compact size and lower power requirements, for example, semiconductor light emitting devices or optical power emitting devices (referred to herein as LEDs for simplicity) are attractive candidates for light sources such as camera flashes, handheld battery operated devices such as cameras and mobile phones. They can also be used in other applications such as automotive lighting, video torches, and general lighting such as home, shop, office and studio lighting, theater / stage lighting, and architectural lighting.

[0003] High intensity / brightness light emitting devices operable in the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. Typically, III-nitride light emitting devices are fabricated by epitaxially growing a stack of multiple semiconductor layers of different compositions and dopant concentrations on a growth substrate, such as sapphire, silicon carbide, III-nitride, or other suitable substrate, by metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as the growth substrate due to its wide commercial availability and relative ease of use. The stack grown on the growth substrate typically includes one or more n-type layers, e.g., doped with Si, formed on the substrate, a light emitting or active region formed on the one or more n-type layers, and one or more p-type layers, e.g., doped with Mg, formed on the active region.

[0004] A variety of emerging display applications, including wearable devices, head-mounted displays, and large area displays, require miniaturized chips composed of dense arrays of micro LEDs (μLEDs or uLEDs) with lateral dimensions down to less than 100 μm by 100 μm. Micro LEDs (uLEDs) typically have dimensions of about 50 μm or less in diameter or width and are used to fabricate color displays by closely aligning micro LEDs with red, blue, and green wavelengths.

[0005] Current design architectures of arrays of micro-LEDs and their pixels present challenges in handling and electrical testing due to their micro-size.

[0006] It is desirable to assemble micro LED devices in a reliable and efficient manner. Summary of the Invention

[0007] Provided herein are micro light emitting diode (uLED) devices and methods for making and using same.

[0008] One aspect provides a micro light emitting diode (uLED) device comprising: a source wafer having a uLED die including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active region; a plurality of die n contacts in electrical communication with an n-type layer of the mesa; a plurality of die p contacts in communication with a p-type layer of the mesa; and a die dielectric material insulating the die n contacts from the die p contacts; and a target wafer having a target substrate having a plurality of wafer n contacts, a plurality of wafer p contacts, and a wafer dielectric material disposed thereon, wherein the wafer n contacts are directly bonded to the plurality of die n contacts, the wafer p contacts are directly bonded to the die p contacts, and the wafer dielectric material is directly bonded to the die dielectric material, and the wafer dielectric material insulates the wafer n contacts from the wafer p contacts.

[0009] Another aspect is a method of manufacturing a micro light emitting diode (uLED) device, the method comprising: providing a target wafer having a target substrate disposed thereon with a plurality of wafer n contacts, a plurality of wafer p contacts, and a wafer dielectric material; and bonding a source wafer to the target wafer, the source wafer having uLED dies including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active region, a plurality of die n contacts in electrical communication with an n-type layer of the mesa, a plurality of die p contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n contacts from the die p contacts, wherein upon bonding, the plurality of wafer n contacts are directly bonded to the plurality of die n contacts, the plurality of wafer p contacts are directly bonded to the die p contacts, and the wafer dielectric material is directly bonded to the die dielectric material. The target wafer is prepared by depositing an etch stop layer on the target substrate, depositing a first dielectric material on the target substrate, providing a dielectric material mask on the target substrate, etching the first dielectric material, removing the dielectric material mask, providing a first metal contact layer on the target substrate, planarizing a preliminary surface of the target substrate, depositing a second dielectric material layer on the target substrate, providing a contact mask on the target substrate, etching the second dielectric material, removing the contact mask, providing a second metal contact layer on the target substrate, and planarizing a second surface of the target substrate to form a plurality of wafer n-contacts and a plurality of wafer p-contacts isolated by the wafer dielectric material.

[0010] Another embodiment is a source wafer having uLED dies, the uLED dies including a stack of semiconductor layers including an active region, a plurality of die n contacts in electrical communication with an n-type layer of a mesa, a plurality of die p contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n contacts and the die p contacts, each of the die n contacts and the die p contacts having a contact opening with a diameter "d" and a center "c", and a pitch "p" between adjacent centers of each of the die n contacts and the die p contacts, where "d" is in the range of greater than or equal to 0.5 microns and less than or equal to 30 microns, and "p" is in the range of greater than or equal to 1 micron and less than or equal to 60 microns. [Brief description of the drawings]

[0011] In order that the above-mentioned features of the present disclosure may be understood in detail, a more particular description of the present disclosure, briefly summarized above, will be made with reference to embodiments, some of which are illustrated in the accompanying drawings. It is to be noted, however, that the accompanying drawings illustrate only typical embodiments of the present disclosure and therefore should not be considered as limiting its scope, as the present disclosure may admit of other embodiments that are equally effective. The embodiments described herein are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which like reference numerals refer to similar elements. The figures herein are not to scale. [Figure 1] FIG. 1 is a schematic diagram illustrating an enlarged cross-sectional view of a portion of a micro light emitting diode (uLED) device according to one or more embodiments. [Diagram 2] FIG. 1 illustrates a process flow diagram for fabricating a micro light emitting diode (uLED) device according to one or more embodiments. [Diagram 3] 1 illustrates a top view of an exemplary display device according to one or more embodiments. [Figure 4] 1 illustrates a schematic diagram of an exemplary display system having a uLED device according to an embodiment. [Diagram 5]FIG. 1 illustrates a process flow diagram for fabrication of a source wafer according to one or more embodiments. [Figure 6] FIG. 1 illustrates a block diagram of a visualization system according to one or more embodiments. [Figure 7] 1 is a schematic plan view of an exemplary series of metal contacts, showing their diameter ("d"), center ("c"), and pitch ("p"). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Before describing certain example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description as the present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0013] References to LEDs herein refer to light emitting diodes that emit light when electrical current passes through them. In one or more embodiments, LEDs herein have one or more characteristic dimensions (e.g., height, width, depth, thickness, etc.) in the range of 75 micrometers or more to 300 micrometers or less. In one or more embodiments, one or more of the height, width, depth, thickness dimensions have a value in the range of 100-300 micrometers. References to micrometers herein allow for a variation of ±1-5%. In a preferred embodiment, one or more of the height, width, depth, thickness dimensions have a value of 200 micrometers ±1-5%. In some examples, LEDs are referred to as micro LEDs (uLEDs or μLEDs), which refers to LEDs that have one or more characteristic dimensions (e.g., height, depth, thickness, etc.) on the order of micrometers or tens of micrometers. In one or more embodiments, one or more of the height, width, depth, thickness dimensions have a value in the range of 1 micrometer to less than 75 micrometers, such as 1-50 micrometers, or 1-25 micrometers. Generally, in one or more embodiments, the LEDs herein can have characteristic dimensions in the range of 1 micrometer to 300 micrometers, and all values ​​and subranges therebetween.

[0014] Methods for depositing materials, layers, and thin films include, but are not limited to, sputter deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced atomic layer deposition (PEALD), plasma enhanced chemical vapor deposition (PECVD), and combinations thereof.

[0015] The method of forming or growing the semiconductor layers, including the n-type and / or N-type layers, the active region, and the p-type and / or P-type layers, is formed according to methods known in the art. In one or more embodiments, the semiconductor layers are formed by epitaxial (EPI) growth. The semiconductor layers according to one or more embodiments comprise epitaxial layers, III-nitride layers, or epitaxial III-nitride layers. In one or more embodiments, the semiconductor layers comprise III-nitride materials, and in certain embodiments, epitaxial III-nitride materials. In some embodiments, the III-nitride materials comprise one or more of gallium (Ga), aluminum (Al), and indium (In). Thus, in some embodiments, the semiconductor layers comprise one or more of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum indium nitride (InAlN), aluminum indium gallium nitride (AlInGaN), and the like. The III-nitride materials may be doped with one or more of silicon (Si), oxygen (O), boron (B), phosphorous (P), germanium (Ge), manganese (Mn), or magnesium (Mg), depending on whether a p-type or n-type III-nitride material is desired. In one or more embodiments, the semiconductor layer has a total thickness ranging from about 2 μm to about 10 μm, and all values ​​and subranges therebetween.

[0016] Reducing the size of LEDs imposes processing challenges, especially for micro LEDs (uLEDs). Ensuring proper electrical continuity of the structure is one such challenge. Preparing the target and source wafers for bonding contributes to proper electrical continuity of the structure.

[0017] Suitable applications of the uLED devices herein include, but are not limited to, Augmented Reality / Virtual Reality (AR / VR) systems, where one or more AR / VR systems include an Augmented Reality (AR) or Virtual Reality (VR) headset, glasses, or projector.

[0018] FIG. 1 is a schematic diagram illustrating an enlarged cross-sectional view of a portion of a micro light emitting diode (uLED) device according to one or more embodiments.

[0019] The uLED device 500 includes a target wafer 512 and a source wafer 528. The portion of the target wafer 512 shown includes a target substrate 514, a number of target metal contacts 520, e.g., p-metal contacts, and a target dielectric material 524 insulating the target metal contacts 520 and n-metal contacts 522. Optionally, an etch stop layer (not shown) may be disposed on the target substrate 514 beneath the target metal contacts 520 and 522 and the target dielectric material 524. In one or more embodiments, the etch stop layer is a different dielectric material than the dielectric material 524 insulating the target metal contacts 520 and n-metal contacts 522. In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS).

[0020] The source wafer 528 is an active microstructure die in this embodiment, and includes a semiconductor layer 540 pixelated into, for example, pixels 540a, 540b, and 540c. The pixels 540a, 540b, and 540c include respective active areas 542a, 542b, and 542c, and n-type and p-type layers (not labeled). The source wafer 528 includes a plurality of die metal contacts 530, for example p-metal contacts, a metal contact 532, for example n-metal contacts, and in particular a common cathode, and a die dielectric material 534 providing insulation therebetween. In one or more embodiments, a source substrate 538 is positioned adjacent to the semiconductor layer 540. The dielectric material insulates the n-type and p-type layers to ensure proper communication and electrical function with the respective n-contact materials and / or cathodes and p-contact materials and / or anodes, as understood in the art.

[0021] In the close-up of Figure 1, the surfaces are shown as "exposed" in that they are accessible for the bonding process prior to bonding to form the uLED device. During assembly, bonding between the exposed surfaces occurs.

[0022] Target metal p-metal contacts 520 on target wafer 512 each have exposed surfaces 519 and 521, respectively. Target metal n-metal contacts 522 on target wafer 512 have exposed surface 523.

[0023] Die p-metal contacts 530 of source wafer 528 each have exposed surfaces 529 and 531, respectively. Die n-metal contacts 532 of source wafer 528 have exposed surface 533.

[0024] For assembly of uLED devices, a process is performed to achieve hybrid bonding. Reference to hybrid bonding means that there is a combination of metal-metal and dielectric-dielectric bonding.

[0025] Target dielectric material surface 525a bonds to die dielectric material surface 535a, target dielectric material surface 525b bonds to die dielectric material surface 535b, target dielectric material surface 525c bonds to die dielectric material surface 535c, target dielectric material surface 525d bonds to die dielectric material surface 535d, and target dielectric material surface 525e bonds to die dielectric material surface 535e. Each of the die dielectric material surfaces has a width, and similarly, each of the target dielectric material surfaces has a width. For the example shown in FIG. 1, die dielectric material surface 535e has width 535W, which is directly bonded to target dielectric material surface 525e, which is width 525W.

[0026] Target p metal contact surface 519 bonds to die p metal contact surface 529, target p metal contact surface 521 bonds to die p metal contact surface 531, and target n metal contact surface 523 bonds to die n metal contact surface 533, which may be a common cathode. That is, each of the die metal contact surfaces, which may be p metal contact surface and n metal contact surface, has a width or diameter, and similarly, each of the target metal contact surfaces has a width or diameter. For the example shown in FIG. 1, die n metal contact surface 533 has a width 533W (or diameter) and is directly bonded to target n metal contact surface 523, which may be a width 523W (or diameter).

[0027] In one or more embodiments, the width of each of the wafer n contacts is 95% to 100% of the width of each of the die n contacts at each location where they are directly bonded, and all values ​​and subranges therebetween, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.

[0028] In one or more embodiments, the width of each of the wafer p-contacts is 95% to 100% of the width of each of the die p-contacts at each location where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.

[0029] In one or more embodiments, the width of the wafer dielectric material is 95% to 100% of the width of the die dielectric material at each location where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.

[0030] In one or more embodiments, the width of each of the wafer n contacts is 95% to 100% of the width of each of the die n contacts at each location where they are directly bonded, the width of each of the wafer p contacts is 95% to 100% of the width of each of the die p contacts at each location where they are directly bonded, and the width of the wafer dielectric material is 95% to 100% of the width of each of the die dielectric material at each location where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.

[0031] Following bonding of the source wafer 528 to the target wafer 512, the uLED device 500 is formed.

[0032] In one or more embodiments, the target metal contact comprises one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0033] In one or more embodiments, the target wafer has an etch stop layer on the target substrate under the target metal contact and the first target dielectric material. In one or more embodiments, the etch stop layer has a second dielectric material different from the first target dielectric material. In one or more embodiments, the first target dielectric material has one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN). An exemplary etch stop layer has SiN, where the first target dielectric material has one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), and aluminum oxide (Al2O3).

[0034] In one or more embodiments, the die dielectric material comprises one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).

[0035] In one or more embodiments, the target substrate comprises a material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and Group III nitrides.

[0036] In one or more embodiments, the uLED die further comprises a die substrate in contact with the semiconductor layer comprising the active region, hi some embodiments, the die substrate comprises a material selected from the group consisting of sapphire, silicon carbide, and III-nitrides.

[0037] In one or more embodiments, the die substrate comprises a material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and III-nitrides.

[0038] In one or more embodiments, wafer n-contacts are directly bonded to the die n-contacts at their respective n-contact bonding areas, and wafer p-contacts are directly bonded to the die p-contacts at their respective p-contact bonding areas, the n-contact bonding areas and the p-contact bonding areas having diameters within the range of 0.5 micrometers to 30 micrometers, inclusive of all values ​​and subranges therebetween.

[0039] In one or more embodiments, a wafer n-contact is directly bonded to the die n-contacts at their respective n-contact bonding areas, and a wafer p-contact is directly bonded to the die p-contact at their respective p-contact bonding areas, with the center-to-center pitch of all of the n-contact bonding areas and p-contact bonding areas being within the range of 1 micron or more to 60 microns or less, including all values ​​and subranges therebetween. FIG. 7 is a schematic plan view of an example set of metal contacts 750 of a portion of a die 700, showing the diameter ("d"), center ("c"), and pitch ("p"). It is understood that in one or more embodiments, the common cathode can be sized differently than the n-contacts and is not included when discussing the pitch between contacts.

[0040] 2 shows a process flow diagram for manufacturing 200 a micro light emitting diode (uLED) device in accordance with one or more embodiments. In operation 210, a target wafer is prepared. The features of the target wafer are prepared as follows:

[0041] An etch stop layer is deposited on a target substrate of a target wafer. A primary dielectric material is deposited on the target substrate. A dielectric material mask, for example of a photoresist material, is prepared on the target substrate, and then the primary dielectric material is etched in a pattern down to the etch stop layer to create areas for receiving a primary metal contact material, and the dielectric material mask is removed, thereby providing or forming a primary dielectric material layer.

[0042] A primary metal contact material is then prepared on the target substrate. In one or more embodiments, preparing the primary metal contact layer includes depositing a seed layer and then plating metal on the seed layer. The preliminary surface of the target substrate including the primary metal contact material is planarized to prepare the primary metal contact layer. The planarization technique aims to provide a flatness of 5 Å or less. In one or more embodiments, the planarization step includes chemical mechanical polishing (CMP). Once planarization is complete, particles can be cleaned and / or removed to desired specifications to remove residual metal and other debris. A second dielectric material is then prepared and / or deposited on the target substrate.

[0043] A contact mask is then prepared on the target substrate. The contact mask is the result of light treatment of photoresist through a transmission mask and subsequent partial removal. A contact opening template in the contact mask is used to block dielectric material from reaching the substrate during deposition of the dielectric material. In one or more embodiments, the contact mask has a mask body having a plurality of metal contact opening templates formed therein. Each of the metal contact opening templates has a diameter ("d"). There is a pitch ("p") between the centers of each of the metal contact opening templates.

[0044] The second dielectric material is etched in a pattern to prepare areas for receiving a second metal contact metal. The contact mask is then removed, thereby preparing and / or forming a secondary dielectric material layer. Some portions of the second dielectric material layer combine with the first dielectric material layer to extend from the etch stop layer to the exposed surface. A second metal contact material is then prepared on the target substrate. In one or more embodiments, preparing the second metal contact layer includes depositing a seed layer and then metal plating on the seed layer.

[0045] The second surface of the target substrate, including the second metal contact material, is then planarized to form a plurality of target metal contacts, including a beginning contact area and an ending contact area, isolated by the first and second dielectric material layers. Planarizing the second surface of the target substrate attempts to provide a planarity of 5 Å or less. In one or more embodiments, the planarization step includes chemical mechanical polishing (CMP). Once planarization is complete, cleaning and / or removal of particles can be performed to a desired specification to remove residual metal and other debris. In one or more embodiments, preparing the second metal contact layer includes depositing a seed layer and plating metal onto the seed layer.

[0046] In operation 220, a source wafer having uLED dies is positioned over a target wafer.

[0047] The uLED die is bonded to the target wafer in operation 230. In one or more embodiments, upon bonding of the uLED die to the target wafer, the die n-contact and die p-contact are serially connected to the wafer n-contact and wafer p-contact.

[0048] Quality control testing is then performed at operation 240. In one or more embodiments, the bond between the target metal contact and the die metal contact is evaluated. In one or more embodiments, the bond between the first target dielectric material and the die dielectric material is evaluated.

[0049] Optional further post-processing is performed at operation 250. In one or more embodiments, further processing includes forming a passivation layer around part or all of one or more uLEDs or the uLED device as a whole. In one or more embodiments, the processed structure, retaining the substrate, is singulated and further processed. In one or more embodiments, the processed structure is flipped over and attached to a support, such as a tape support, and the substrate is removed. Removal of the substrate follows methods known in the art, including substrate laser lift-off. Once the substrate is removed, singulated LEDs or uLEDs are created.

[0050] Further processing may include deposition of a downconverter material, for example a layer of phosphor material.

[0051] In some embodiments, the LED devices herein are further processed to include optical elements, such as lenses, metalenses, and / or pre-collimators. The optical elements may also or instead include apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light emitting array. Additionally, one or more of these optical elements may have one or more coatings, including UV blocking or anti-reflective coatings. In some embodiments, the optical elements may be used to correct or minimize two-dimensional or three-dimensional optical errors, including pincushion distortion, barrel distortion, axial chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical elements may be used to magnify and / or correct the image. Advantageously, in some embodiments, magnification of the displayed image allows the light emitting array to be physically smaller, lighter, and require less power than a larger display. Additionally, magnification may increase the field of view of the displayed content, allowing the display presentation to be equal to the user's normal field of view.

[0052] 5 illustrates a process flow diagram 600 for fabricating an exemplary source wafer, such as source wafer 528 of FIG. 1, according to one or more embodiments. The method 600 includes depositing a plurality of semiconductor layers, including an n-type layer, an active region, and a p-type layer, on a substrate at 612. At 614, the method further includes depositing a dielectric material as a hard mask layer. At 616, the method further includes etching the hard mask layer and portions of the semiconductor layer to form a plurality of spaced apart mesas and trenches that define pixels, each of the plurality of spaced apart mesas having a semiconductor layer. At 618, the method includes depositing a conformal second dielectric material on sidewalls of the p-type layer and the active region, and selectively etching and depositing metal to provide n-contact and p-contact materials in spaces between each of the plurality of spaced apart mesas. The second dielectric material insulates the p-type layer and the active region from the n-contact material. At 620, the method includes depositing a third dielectric material and selectively etching and depositing an electrode metal for the bond pads.

[0053] Further processing occurs at operation 622. Further processing may include removing the substrate and flipping the die. Other processing may include deposition of downconverter material, such as a layer of phosphor material. In some embodiments, the LED array herein is further processed to include optical elements, such as lenses, metalenses, and / or pre-collimators.

[0054] uLED Device 3 shows a top view of an exemplary uLED display device having a uLED monolithic array 800 with a plurality of pixels arranged in a 6×19 grid. Pixels 855a and 855b are examples. In this embodiment, a common cathode 840 is connected to the pixels. An underlying anode (not shown) is included with each pixel. In one or more embodiments, the array has an arrangement of 2×2 mesas, 4×4 mesas, 20×20 mesas, 50×50 mesas, 100×100 mesas, or n1×n2 mesas, where n1 and n2 are each numbers in the range of 2 to 1000, and n1 and n2 may or may not be equal.

[0055] In one or more embodiments, an array of micro LEDs (μLEDs or uLEDs) is used. Micro LEDs can support high density pixels with lateral dimensions of less than 100 μm×100 μm. In some embodiments, micro LEDs with dimensions of about 50 μm or less in diameter or width can be used. Such micro LEDs can be used to fabricate color displays by closely aligning micro LEDs with red, blue, and green wavelengths.

[0056] In some embodiments, the light emitting array includes a small number of micro LEDs positioned on a substrate of centimeter-scale area or larger. In some embodiments, the light emitting array includes a micro LED pixel array having hundreds, thousands, or millions of light emitting LEDs positioned together on a substrate of centimeter-scale area or smaller. In some embodiments, the micro LEDs can include light emitting diodes sized between 30 microns and 500 microns. The light emitting array can be monochromatic, RGB, or other desired chromaticity. In some embodiments, the pixels can be square, rectangular, hexagonal, or have a curved perimeter. The pixels can be of the same size, different sizes, or can be grouped together to present a larger effective pixel size.

[0057] In some embodiments, the light-emitting pixels and the circuitry supporting the light-emitting array are packaged, optionally including a submount or printed circuit board connected to control and power the light generation by the semiconductor LEDs. In certain embodiments, the printed circuit board supporting the light-emitting array includes electrical vias, heat sinks, ground planes, electrical traces, and flip-chip or other mounting systems. The submount or printed circuit board can be made of any suitable material, such as ceramic, silicon, aluminum, etc. If the submount material is conductive, an insulating layer is formed on the substrate material, and a metal electrode pattern is formed on the insulating layer. The submount can act as a mechanical support and provide an electrical interface between the electrodes on the light-emitting array and the power source, and can also provide a heat sink function.

[0058] In some embodiments, the LED light emitting array is processed to include optical elements, such as lenses, metalenses, and / or pre-collimators. The optical elements may also or instead include apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light emitting array. Additionally, one or more of these optical elements may have one or more coatings, including UV blocking or anti-reflective coatings. In some embodiments, the optical elements may be used to correct or minimize two-dimensional or three-dimensional optical errors, including pincushion distortion, barrel distortion, axial chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical elements may be used to magnify and / or correct the image. Advantageously, in some embodiments, magnification of the displayed image allows the light emitting array to be physically smaller, lighter, and require less power than a larger display. Additionally, magnification may increase the field of view of the displayed content, allowing the display presentation to be equal to the user's normal field of view.

[0059] Purpose 4 illustrates a schematic diagram of an exemplary display system 900 utilizing LEDs, including the uLEDs disclosed herein. The display system 900 includes an LED light emitting array 902 in electrical communication with an LED driver 904, and a display 908. The display system 900 also includes a system controller 906, such as a microprocessor, for example. The controller 906 is coupled to the LED driver 904. The controller 906 can also be coupled to the display 908 and optional sensor(s) 910, and can be powered by a power source 912. In one or more embodiments, user data input is provided to the system controller 906.

[0060] In one or more embodiments, the system is a camera flash system utilizing uLEDs. In such an embodiment, the LED lighting array 902 is an illumination array and lens system, the display 908 has a camera, and the LEDs of 902 and the camera of 908 can be controlled by the controller 906 to match their fields of view.

[0061] Optionally, sensors 910 with control inputs may include, for example, position sensors (e.g., gyroscopes and / or accelerometers) and / or other sensors that may be used to determine the position, velocity, and orientation of the system. Signals from sensors 910 may be provided to controller 906 and used to determine the appropriate course of action for controller 906 (e.g., which LEDs are currently illuminating the target and which LEDs will be illuminating the target after a predetermined time).

[0062] In operation, the illumination from some or all of the pixels of the LED array of 902 may be adjusted to be deactivated, operated at full intensity, or operated at an intermediate intensity. As described above, by activating one or more subsets of pixels, beam focusing or steering of the light emitted by the LED array of 902 can be performed electronically, allowing dynamic adjustment of the beam shape without moving optics or changing the focus of lenses within the illumination device.

[0063] LED array systems as described herein may support a variety of other beam steering or other applications that benefit from intensity, spatial, and temporal control of light distributions with fine granularity. These applications may include, but are not limited to, precise spatial patterning of emitted light from pixel blocks or individual pixels. Depending on the application, the emitted light may be spectrally distinct, adaptive over time, and / or environmentally responsive. Light-emitting pixel arrays may provide pre-programmed light distributions with various intensity, spatial, or temporal patterns. The associated optics may vary at the pixel, pixel block, or device level. An example light-emitting pixel array may include a device with a commonly controlled central block of high-brightness pixels with associated common optics, while edge pixels may have individual optics. In addition to flashlights, common applications supported by light-emitting pixel arrays include video lighting, automotive headlights, architectural and area lighting, and street lighting.

[0064] Other applications of the LED devices herein include Augmented Reality / Virtual Reality (AR / VR) systems that may utilize the uLEDs disclosed herein. One or more AR / VR systems include an Augmented Reality (AR) or Virtual Reality (VR) headset, glasses, or projector. Such an AR / VR system includes an LED light emitting array, an LED driver (or light emitting array controller), a system controller, an AR or VR display, and a sensor system 810. Power and user data inputs are provided to the system controller, while control inputs may be provided to the sensor system. As will be appreciated, in some embodiments, the modules included in the AR / VR system may be compactly arranged within a single structure, or one or more elements may be separately implemented and connected via wireless or wired communication. For example, the light emitting array, the AR or VR display, and the sensor system may be implemented on the headset or glasses, with the LED driver and / or system controller implemented separately.

[0065] In one embodiment, the light emitting array can be used to project light in a graphical or object pattern that can support an AR / VR system. In some embodiments, a separate light emitting array can be used to provide a display image, with a different separate micro LED array providing the AR features. In some embodiments, a selected group of pixels can be used to display content to a user, while the tracking pixels can be used to provide tracking light used in eye tracking. The content display pixels are designed to emit visible light having at least a portion of the visible band (approximately 400 nm to 750 nm). In contrast, the tracking pixels can emit light within the visible band or the IR band (approximately 750 nm to 2,200 nm), or some combination thereof. Alternatively, the tracking pixels may operate in the 800 to 1000 nanometer range. In some embodiments, the tracking pixels can emit tracking light during periods when the content pixels are turned off and not displaying content to the user.

[0066] The AR / VR system may incorporate extensive optics within the LED light emitting array and / or the AR / VR display, for example, to couple the light emitted by the LED light emitting array into the AR / VR display, as described above. In AR / VR applications, those optics may have nanofins and be designed to polarize the light they transmit.

[0067] In one embodiment, a light emitting array controller can be used to provide power and real-time control for the light emitting array. For example, the light emitting array controller can implement pixel-level or group-pixel-level control of amplitude and duty cycle. In some embodiments, the light emitting array controller further includes a frame buffer for holding generated or processed images that can be provided to the light emitting array. Other supported modules can include digital control interfaces, such as Inter-Integrated Circuit (I2C) serial bus, Serial Peripheral Interface (SPI), USB-C, HDMI, DisplayPort, or other suitable image or control modules configured to transmit the necessary image data, control data, or instructions.

[0068] In operation, pixels in an image can be used to define the response of a corresponding light-emitting array, with the intensity and spatial modulation of the LED pixels being based on the image(s). To reduce data rate issues, in some embodiments, a group of pixels (e.g., a 5x5 block) can be controlled as a single block. In some embodiments, high speed and high data rate operation is supported, and pixel values ​​from successive images can be loaded as successive frames of an image sequence at rates between 30 Hz and 100 Hz, with 60 Hz being typical. Pulse width modulation can be used to control each pixel to emit light in a pattern and intensity that is at least partially dependent on the image.

[0069] In some embodiments, the sensor system can include external sensors, such as cameras, depth sensors, or audio sensors, that monitor the environment, and internal sensors, such as accelerometers or two- or three-axis gyroscopes, that monitor the AR / VR headset position. Other sensors can include, but are not limited to, air pressure sensors, stress sensors, temperature sensors, or any other suitable sensors required for local or remote environmental monitoring. In some embodiments, the control input can include a detected touch or tap, a gesture input, or a control based on the headset or display position. As another example, an estimated position of the AR / VR system relative to an initial position can be determined based on one or more measurement signals from one or more gyroscopes or position sensors that measure translational or rotational motion.

[0070] In some embodiments, the system controller uses data from the sensor system to integrate measurement signals received from the accelerometer over time to estimate a velocity vector, and to integrate the velocity vector over time to determine an estimated position of a reference point of the AR / VR system. In other embodiments, the reference point used to describe the position of the AR / VR system can be based on a depth sensor, a camera positioned view, or a light field flow.

[0071] Based on changes in the position, orientation, or movement of the AR / VR system, the system controller can send images or instructions to the light emitting array controller. Changes or modifications in images or instructions can also be made by user data input or automated data input, as appropriate. User data input can include, but is not limited to, voice commands, haptic feedback, eye or pupil location, or provided by a connected keyboard, mouse, or game controller.

[0072] FIG. 6 illustrates a block diagram of an example of a visualization system 10. The visualization system 10 can include a wearable housing 12, such as a headset or goggles. The housing 12 can mechanically support and house the elements detailed below. In some examples, one or more of the elements detailed below can be included in one or more additional housings that are separate from the wearable housing 12 and can be coupled to the wearable housing 12 wirelessly and / or via a wired connection. For example, the separate housing can reduce the weight of the wearable goggles, such as by including a battery, a radio, and other elements. The housing 12 can include one or more batteries 14 that can power any or all of the elements detailed below. The housing 12 can include circuitry that can be electrically coupled to an external power source, such as a wall outlet, to recharge the battery 14. The housing 12 can include one or more radios 16 for wireless communication with a server or network via a suitable protocol, such as WiFi.

[0073] The visualization system 10 can include one or more sensors 18, such as, for example, optical sensors, audio sensors, tactile sensors, thermal sensors, gyro sensors, time-of-flight sensors, triangulation-based sensors, and others. In some examples, one or more of the sensors can sense a user's location, position, and / or orientation. In some examples, one or more of the sensors 18 can generate a sensor signal in response to the sensed location, position, and / or orientation. The sensor signal can include sensor data corresponding to the sensed location, position, and / or orientation. For example, the sensor data can include a depth map of the surroundings. In some examples, such as for an augmented reality system, one or more of the sensors 18 can capture a real-time video image of the surroundings proximate to the user.

[0074] The visualization system 10 may include one or more image generation processors 20. The one or more image generation processors 20 may receive scene data representing a three-dimensional scene, such as a set of position coordinates for objects in the scene or a depth map of the scene, from a server and / or storage medium. The one or more image generation processors 20 may receive one or more sensor signals from the one or more sensors 18. In response to the scene data representing the surroundings and at least one sensor signal representing the location and / or orientation of the user relative to the surroundings, the one or more image generation processors 20 may generate at least one video signal corresponding to a view of the scene. In some examples, the one or more image generation processors 20 may generate two video signals, one for each eye of the user, representing a view of the scene from the perspective of the user's left eye and right eye, respectively. In some examples, the one or more image generation processors 20 may generate three or more video signals and combine the video signals to provide one video signal for both eyes, two video signals for both eyes, or other combinations.

[0075] The visualization system 10 may include one or more light sources 22 capable of providing light to a display of the visualization system 10. Suitable light sources 22 may include light emitting diodes, monolithic light emitting diodes, a plurality of light emitting diodes, an array of light emitting diodes, an array of light emitting diodes disposed on a common substrate, segmented light emitting diodes having individually addressable and controllable (and / or controllable in groups and / or subsets) light emitting diode elements disposed on a single substrate, an array of micro light emitting diodes (microLEDs), and others.

[0076] The light emitting diode may be a white light emitting diode. For example, the white light emitting diode may emit an excitation light, such as, for example, blue light or violet light. The white light emitting diode may include one or more phosphors that may absorb some or all of the excitation light and, in response, emit phosphor light, such as, for example, yellow light, having a wavelength longer than the wavelength of the excitation light.

[0077] One or more light sources 22 may include light generating elements having different colors or wavelengths. For example, a light source may include a red light emitting diode capable of emitting red light, a green light emitting diode capable of emitting green light, and a blue light emitting diode capable of emitting blue light. The red, green, and blue light combine in specific ratios to produce a preferred visually perceptible color within the visible portion of the electromagnetic spectrum.

[0078] The visualization system 10 may include one or more modulators 24. The modulators 24 may be implemented in one of at least two configurations.

[0079] In a first configuration, the modulator 24 can include circuitry capable of directly modulating the light source 22. For example, the light source 22 can include an array of light emitting diodes, and the modulator 24 can directly modulate the power, voltage, and / or current directed to each light emitting diode in the array to form the modulated light. The modulation can be performed in an analog and / or digital manner. In some examples, the light source 22 can include an array of red light emitting diodes, an array of green light emitting diodes, and an array of blue light emitting diodes, and the modulator 24 can directly modulate the red light emitting diodes, the green light emitting diodes, and the blue light emitting diodes to form the modulated light to generate a specified image.

[0080] In a second configuration, the modulator 24 can include a modulation panel, such as a liquid crystal panel. The light source 22 can generate uniform or near-uniform illumination to illuminate the modulation panel. The modulation panel can include pixels. Each pixel can selectively attenuate a respective portion of the modulation panel area in response to an electrical modulation signal to form a modulated light. In some examples, the modulator 24 can include multiple modulation panels capable of modulating different colors of light. For example, the modulator 24 can include a red modulation panel capable of attenuating red light from a red light source, such as a red light emitting diode, a green modulation panel capable of attenuating green light from a green light source, such as a green light emitting diode, and a blue modulation panel capable of attenuating blue light from a blue light source, such as a blue light emitting diode.

[0081] In some examples of the second configuration, the modulator 24 can receive uniform or nearly uniform white light from a white light source, such as a white light emitting diode. The modulation panel can include a wavelength selective filter on each pixel of the modulation panel. The panel pixels can be arranged in groups (such as groups of three or four), each group can form a pixel of a color image. For example, each group can include panel pixels having a red color filter, a panel pixel having a green color filter, and a panel pixel having a blue color filter. Other suitable configurations can also be used.

[0082] The visualization system 10 may include one or more modulation processors 26 that may receive video signals, such as from one or more image generation processors 20, and in response, may generate electrical modulation signals. In configurations where the modulators 24 directly modulate the light sources 22, the electrical modulation signals may drive the light sources 22. In configurations where the modulators 24 include a modulation panel, the electrical modulation signals may drive the modulation panel.

[0083] The visualization system 10 can include one or more beam combiners 28 (also known as beam splitters 28) that can combine light beams of different colors to form a single multi-color beam. In configurations in which the light source 22 can include multiple light emitting diodes of different colors, the visualization system 10 can include one or more wavelength-sensitive (e.g., dichroic) beam splitters 28 that can combine light of the different colors to form a single multi-color beam.

[0084] The visualization system 10 can direct the modulated light to the viewer's eyes in one of at least two configurations. In a first configuration, the visualization system 10 can function as a projector and can include suitable projection optics 30 capable of projecting the modulated light onto one or more screens 32. The screens 32 can be placed at a suitable distance from the user's eyes. The visualization system 10 can optionally include one or more lenses 34 capable of positioning a virtual image of the screen 32 at a suitable distance from the eyes, such as a near focus distance, e.g., 500 mm, 750 mm, or another suitable distance. In some examples, the visualization system 10 can include a single screen 32 such that the modulated light is directed to both eyes of the user. In some examples, the visualization system 10 can include two screens 32 such that the modulated light from each screen 32 is directed to a respective eye of the user. In some examples, the visualization system 10 can include three or more screens 32. In a second configuration, the visualization system 10 can direct the modulated light directly to one or both eyes of the viewer. For example, the projection optics 30 may form an image on the retina of the user's eye, or may form an image on each of the retinas of both of the user's eyes.

[0085] Embodiment Various embodiments are listed below, and it will be understood that the embodiments listed below can be combined with all aspects and other embodiments in accordance with the scope of the present invention.

[0086] Embodiment (a). A micro light emitting diode (uLED) device comprising: a source wafer having a uLED die including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active region; a plurality of die n contacts in electrical communication with an n-type layer of the mesa; a plurality of die p contacts in communication with a p-type layer of the mesa; and a die dielectric material insulating the die n contacts from the die p contacts; and a target wafer having a plurality of wafer n contacts, a plurality of wafer p contacts, and a wafer dielectric material disposed thereon, wherein the wafer n contacts are directly bonded to the plurality of die n contacts, the wafer p contacts are directly bonded to the die p contacts, and the wafer dielectric material is directly bonded to the die dielectric material, the wafer dielectric material insulating the wafer n contacts from the wafer p contacts.

[0087] Embodiment (b). The uLED device of embodiment (a), wherein the die n contact, the wafer n contact, the die p contact, and the wafer p contact comprise metal.

[0088] Embodiment (c). The uLED device of embodiment (a) or (b), wherein the die n contact, the wafer n contact, the die p contact, and the wafer p contact have the same metal.

[0089] Embodiment (d). The uLED device of any of embodiments (a) to (c), wherein the die n contact, the wafer n contact, the die p contact, and the wafer p contact comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

[0090] Embodiment (e). The uLED device of any of embodiments (a) to (d), wherein the die dielectric material and the wafer dielectric material have the same dielectric material.

[0091] Embodiment (f). The uLED device of any of embodiments (a) to (e), wherein the die dielectric material and the wafer dielectric material comprise one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).

[0092] Embodiment (g). The uLED device of any of embodiments (a) through (f), wherein the uLED die further comprises a die substrate in contact with the semiconductor layer including the active region.

[0093] Embodiment (h). The uLED device of embodiment (g), wherein the die substrate comprises a material selected from the group consisting of sapphire, silicon carbide, and III-nitrides.

[0094] Embodiment (i). The uLED device of any of embodiments (a) to (h), wherein the target substrate comprises a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and III-nitrides.

[0095] Embodiment (j). The uLED device of any of embodiments (a) to (i), further comprising an etch stop layer on the target substrate beneath the wafer n contact, the wafer p contact, and the wafer dielectric material.

[0096] Embodiment (k). The uLED device of embodiment (j), wherein the etch stop layer has a dielectric material different from the wafer dielectric material.

[0097] Embodiment (l). The uLED device of any of embodiments (a) to (k), wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas, and the wafer p-contacts are directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, and wherein diameters of the n-contact bonding areas and the p-contact bonding areas have diameters in the range of 0.5 micrometers to 30 micrometers or less.

[0098] Embodiment (m). The uLED device of any of embodiments (a) to (l), wherein the wafer n-contact is directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas, and the wafer p-contact is directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, and a center-to-center pitch of all of the n-contact bonding areas and the p-contact bonding areas is in the range of 1 micron or more and 60 microns or less.

[0099] Embodiment (n). The uLED device of any of embodiments (a) to (m), wherein the die n contact and the die p contact are connected in series to the wafer n contact and the wafer p contact.

[0100] Embodiment (nn). The uLED device of any of embodiments (a) to (n), wherein the width of each of the wafer n contacts is 95% to 100% of the width of each of the die n contacts at each location where the wafer n contact is directly bonded, and / or the width of each of the wafer p contacts is 95% to 100% of the width of each of the die p contacts at each location where the wafer p contact is directly bonded, and / or the width of the wafer dielectric material is 95% to 100% of the width of the die dielectric material at each location where the wafer p contact is directly bonded.

[0101] Embodiment (o). A method of manufacturing a micro light emitting diode (uLED) device includes: preparing a target wafer having a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a target substrate having a wafer dielectric material disposed thereon; depositing an etch stop layer on the target substrate; depositing a first dielectric material on the target substrate; preparing a dielectric material mask on the target substrate; etching the first dielectric material; removing the dielectric material mask; preparing a first metal contact layer on the target substrate; planarizing a preliminary surface of the target substrate; depositing a second dielectric material layer on the target substrate; positioning a contact mask on the target substrate; etching the second dielectric material; removing the contact mask; preparing a second metal contact layer on the target substrate; and planarizing a second surface of the target substrate. and bonding a source wafer to the target wafer, the source wafer having uLED dies including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active area, a plurality of die n contacts in electrical communication with an n-type layer of the mesa, a plurality of die p contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n contacts from the die p contacts, wherein upon bonding, the plurality of wafer n contacts are directly bonded to the plurality of die n contacts, the plurality of wafer p contacts are directly bonded to the die p contacts, and the wafer dielectric material is directly bonded to the die dielectric material.

[0102] Embodiment (p). The method of embodiment (o), wherein the wafer n contacts are directly bonded to the plurality of die n contacts at their respective n-contact bonding areas and the wafer p contacts are directly bonded to the plurality of die p contacts at their respective p-contact bonding areas, the n-contact bonding areas and the p-contact bonding areas having diameters within a range of 0.5 micrometers to 30 micrometers or less.

[0103] Embodiment (q). The method of embodiment (o) or (p), wherein the wafer n contacts are directly bonded to the plurality of die n contacts at their respective n-contact bonding areas, and the wafer p contacts are directly bonded to the plurality of die p contacts at their respective p-contact bonding areas, and a center-to-center pitch of all of the n-contact bonding areas and the p-contact bonding areas is in the range of 1 micron to 60 microns.

[0104] Embodiment (r). The method of any of embodiments (o) through (q), wherein providing the first metal contact layer and providing the second metal contact layer each independently comprise depositing a seed layer and plating metal onto the seed layer.

[0105] Embodiment (s). The method of any of embodiments (o) to (r), wherein the planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have a planarity of 5 Å or less.

[0106] Embodiment (t). The method of any one of embodiments (o) to (s), wherein the planarizing of the preliminary surface of the target substrate and the planarizing of the second surface of the target substrate each independently comprise a chemical mechanical polishing (CMP) process.

[0107] Embodiment (u). The method of any of embodiments (o) to (t), further comprising a cleaning process after one or both of the planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate.

[0108] Embodiment (v). The method of any of embodiments (o) to (u), wherein upon the bonding of the uLED die to the target wafer, the die n contact and the die p contact are connected in series to the wafer n contact and the wafer p contact.

[0109] Embodiment (w). The method of any of embodiments (a) through (v), wherein each uLED has at least one characteristic dimension greater than or equal to 1 micrometer and less than or equal to 300 micrometers, the characteristic dimension being selected from the group consisting of height, width, depth, thickness, and combinations thereof.

[0110] Embodiment (x). The method of any of embodiments (a) to (w), wherein for each uLED, the p-contact and the n-contact are formed on the same side of the pixel or stack of semiconductor layers.

[0111] Embodiment (y). A source wafer having uLED dies, the uLED dies including a plurality of pixels, each having a mesa of semiconductor layer having sidewalls and including an active region, a plurality of die n contacts in electrical communication with an n-type layer of the mesa, a plurality of die p contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n contacts from the die p contacts, each of the die n contacts and the die p contacts having a contact opening with a diameter "d" and a center "c", and a pitch "p" between adjacent centers of each of the die n contacts and the die p contacts, wherein "d" is in the range of greater than or equal to 0.5 micrometers and less than or equal to 30 micrometers, and wherein "p" is in the range of greater than or equal to 1 micrometer and less than or equal to 60 micrometers.

[0112] Throughout this specification, a reference to "one embodiment," "a particular embodiment," "one or more embodiments," or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of phrases such as "in one or more embodiments," "a particular embodiment," "in one embodiment," or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment of the disclosure. Also, in one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.

[0113] Numerous modifications and other embodiments of the invention will come to mind to one skilled in the art having the benefit of the teachings presented in the foregoing description and the associated drawings. It is therefore to be understood that the invention is not to be limited to the particular embodiments disclosed, and modifications and embodiments are intended to be included within the scope of the appended claims. It is also to be understood that other embodiments of the invention may be practiced in the absence of elements / steps not specifically disclosed herein.

Claims

1. 1. A micro light emitting diode (uLED) device, comprising: a source wafer having a uLED die including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active region; a plurality of die n-contacts in electrical communication with an n-type layer of the mesa; a plurality of die p-contacts in communication with a p-type layer of the mesa; and a die dielectric material insulating the die n-contacts from the die p-contacts; a target wafer having a target substrate having a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a wafer dielectric material disposed thereon, the wafer n-contacts being directly bonded to the plurality of die n-contacts, the wafer p-contact being directly bonded to the die p-contacts, the wafer dielectric material being directly bonded to the die dielectric material, and the wafer dielectric material insulating the wafer n-contacts and the wafer p-contacts; A uLED device having the following structure:

2. 2. The uLED device of claim 1 , wherein a width of each of the wafer n-contacts is 95% to 100% of a width of each of the die n-contacts at each location where the wafer n-contact is directly bonded, and / or a width of each of the wafer p-contacts is 95% to 100% of a width of each of the die p-contacts at each location where the wafer p-contact is directly bonded, and / or a width of the wafer dielectric material is 95% to 100% of a width of the die dielectric material at each location where the wafer p-contact is directly bonded.

3. 10. The uLED device of claim 1 , wherein the die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact comprise metal.

4. 10. The uLED device of claim 1 , wherein the die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact comprise the same metal.

5. 10. The uLED device of claim 1, wherein the die n contact, the wafer n contact, the die p contact, and the wafer p contact comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).

6. 10. The uLED device of claim 1, wherein the die dielectric material and the wafer dielectric material comprise the same dielectric material.

7. The die dielectric material and the wafer dielectric material may be silicon oxide (SiO), silicon dioxide (SiO ２ ), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al ２ O ３ 13. The uLED device of claim 1, comprising one or more of: SiO 2 (SiO 2 ); and Aluminum Nitride (AlN).

8. 10. The uLED device of claim 1, wherein the uLED die further comprises a die substrate in contact with the semiconductor layer that includes the active region.

9. 10. The uLED device of claim 8, wherein the die substrate comprises a material selected from the group consisting of sapphire, silicon carbide, and Group III nitrides.

10. 10. The uLED device of claim 1, wherein the target substrate comprises a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and Group III nitrides.

11. 10. The uLED device of claim 1, further comprising an etch stop layer on the target substrate beneath the wafer n-contact, the wafer p-contact, and the wafer dielectric material.

12. 2. The uLED device of claim 1 , wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas, and the wafer p-contacts are directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, the n-contact bonding areas and the p-contact bonding areas having diameters in the range of 0.5 micrometers to 30 micrometers or less.

13. 2. The uLED device of claim 1 , wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas, and the wafer p-contacts are directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, and a center-to-center pitch of all of the n-contact bonding areas and the p-contact bonding areas is in the range of 1 micron or more to 60 microns or less.

14. 10. The uLED device of claim 1, wherein the die n-contact and the die p-contact are connected in series to the wafer n-contact and the wafer p-contact.

15. 1. A method for manufacturing a micro light emitting diode (uLED) device, comprising: a target wafer having a target substrate with a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a wafer dielectric material disposed thereon; depositing an etch stop layer on the target substrate; depositing a first dielectric material onto the target substrate; providing a dielectric material mask over the target substrate, etching the first dielectric material, and removing the dielectric material mask; providing a first metal contact layer on the target substrate; planarizing a preliminary surface of the target substrate; depositing a second dielectric material layer on the target substrate; providing a contact mask on the target substrate; etching the second dielectric material; and removing the contact mask; providing a second metal contact layer on the target substrate; planarizing a second surface of the target substrate to form the plurality of wafer n-contacts and the plurality of wafer p-contacts isolated by the wafer dielectric material; To prepare by bonding a source wafer to the target wafer, the source wafer having uLED dies including a plurality of pixels, each pixel having a mesa of semiconductor layer having sidewalls and including an active region, a plurality of die n-contacts in electrical communication with an n-type layer of the mesa, a plurality of die p-contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n-contacts and the die p-contacts; having upon bonding, the plurality of wafer n-contacts are directly bonded to the plurality of die n-contacts, the plurality of wafer p-contacts are directly bonded to the die p-contacts, and the wafer dielectric material is directly bonded to the die dielectric material. method.

16. 16. The method of claim 15, wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas and the wafer p-contacts are directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, the n-contact bonding areas and the p-contact bonding areas having diameters within a range of 0.5 micrometers to 30 micrometers or less.

17. 16. The method of claim 15, wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at their respective n-contact bonding areas, and the wafer p-contacts are directly bonded to the plurality of die p-contacts at their respective p-contact bonding areas, and a center-to-center pitch of all of the n-contact bonding areas and the p-contact bonding areas is in the range of 1 micron to 60 microns.

18. 16. The method of claim 15, wherein providing the first metal contact layer and providing the second metal contact layer each independently comprise depositing a seed layer and plating metal onto the seed layer.

19. 16. The method of claim 15, wherein the planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have a flatness of 5 Å or less.

20. 16. The method of claim 15, wherein the planarizing of the preliminary surface of the target substrate and the planarizing of the second surface of the target substrate each independently comprise a chemical mechanical polishing (CMP) process.

21. 16. The method of claim 15, further comprising a cleaning process after one or both of the planarizing of the preliminary surface of the target substrate and the planarizing of the second surface of the target substrate.

22. 16. The method of claim 15, wherein upon the bonding of a uLED die to the target wafer, the die n-contact and the die p-contact are connected in series to the wafer n-contact and the wafer p-contact.

23. A source wafer having uLED dies, the uLED dies comprising: a plurality of pixels, each having a mesa of a semiconductor layer having a sidewall and including an active region; a plurality of die n-contacts in electrical communication with the n-type layer of the mesa; a plurality of die p-contacts in communication with the p-type layer of the mesa; a die dielectric material insulating the die n-contact and the die p-contact; Including, each of the die n contacts and the die p contacts having a contact opening with a diameter "d" and a center "c" and a pitch "p" between adjacent centers of each of the die n contacts and the die p contacts, said "d" being in the range of greater than or equal to 0.5 micrometers and less than or equal to 30 micrometers, and said "p" being in the range of greater than or equal to 1 micrometer and less than or equal to 60 micrometers; Source wafer.

Images