Current-mode signal path for integrated radio frequency pulse generator

Abstract

One or more systems, devices, or methods of use or combinations thereof provided herein relate to a device that can facilitate signal generation. The current-mode end-to-end signal path can include a digital-to-analog converter (DAC) operating in a current mode and an up-converting mixer operating in a current mode and operably coupled to the DAC. The analog inputs and analog outputs of the DAC and the up-converting mixer can be represented as currents, and the DAC can generate a baseband signal. In one or more embodiments, a current source and a diode-connected transistor can be placed in parallel in the current-mode signal path between a baseband filter and an output stage that includes the up-converting mixer. The device and / or system can be a radio frequency DAC. The diode-connected transistor can be programmable to change the gain or can be directly connected to the output stage without a turnaround current mirror connected therebetween, or both.

Description

[Technical field]

[0001] The present disclosure relates generally to an integrated radio frequency pulse generator system utilizing a current mode end-to-end signal path. [Background technology]

[0002] Quantum computing, in general, is the use of quantum mechanical phenomena to perform computing and information processing functions. Quantum computing can be contrasted with classical computing, which typically uses transistors to perform operations on binary values. That is, while classical computers can perform operations on bit values ​​that are either 0 or 1, quantum computers perform operations on quantum bits (qubits) that contain superpositions of both 0 and 1. Quantum computing has the potential to solve problems that classical computers cannot solve, or can only solve over time, due to computational complexity. Summary of the Invention

[0003] The following presents a summary to provide a basic understanding of one or more embodiments of the present invention. This summary is not intended to identify key or essential elements or to delineate the scope of any particular embodiment or the scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description presented later. In one or more embodiments described herein, a system, computer-implemented method, apparatus, or computer program product, or combination thereof, facilitates an integrated radio frequency pulse generator system, and more specifically, a current-mode end-to-end signal path, to reduce power consumption and enhance linearity between a digital-to-analog converter (DAC) and subsequent stages of the signal chain. This can facilitate achieving a favorable set of tradeoffs regarding power consumption and distortion.

[0004] According to one embodiment, a device can include a baseband filter and an output stage defining a current-mode signal path, and a current source and a diode-connected transistor arranged in parallel in the current-mode signal path, the diode-connected transistor being selectively adjustable to vary the gain.

[0005] According to another embodiment, a method can include outputting a radio frequency output signal by a radio frequency (RF) pulse generator operably coupled to a quantum processor, the RF pulse generator device comprising a baseband filter and an output stage defining a current mode signal path, and a current source and a diode-connected transistor arranged in parallel in the current mode signal path, the diode-connected transistor being programmable to vary gain.

[0006] According to yet another embodiment, a system may include a quantum controller and a radio frequency (RF) pulse generator controlled by the quantum controller, the RF pulse generator including a baseband filter and an output stage defining a current mode signal path, and a current source and a diode-connected transistor arranged in parallel in the current mode signal path, the diode-connected transistor directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0007] An advantage of the aforementioned device, system, and / or method may be that a lower ratio of static bias to signal current may be employed in the output stage compared to that employed in the baseband filter. Another advantage of the aforementioned device, system, and / or method may be that the gain of the current-mode signal path may be adjusted by programming the active width of the diode-connected transistor such that the gain may be varied over a wide range or with high resolution or both. Accordingly, current may be reused, power efficiency may be improved, and distortion components may be reduced compared to one or more embodiments of the RF pulse generator device that do not employ a parallel arrangement of a current source and a diode-connected transistor coupled to the current-mode signal path between the baseband filter and the output stage. Further power efficiency and distortion components may be achieved by connecting the diode-connected transistor directly to the output stage without an intermediate stage, such as a turnaround current mirror, connected between the diode-connected transistor and the output stage.

[0008] As a result of the aforementioned advantages, less power may be employed to operate one or more qubits of a quantum system. The reduced power consumption may improve the scaling of qubits of a quantum system. Furthermore, components of the device and / or system may be employed in and / or for cryogenic chambers such as dilution refrigerators.

[0009] In one or more embodiments of the aforementioned devices, systems, and / or methods, the current source can pass static current and the diode-connected transistor can pass both static and dynamic current. A related advantage may be the ability to change the ratio of static bias to signal current between the input and output of the respective device and / or system depending on one or more parameters and / or specifications of the current source and diode-connected transistor employed. This advantage may be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0010] According to yet another embodiment, a device can include a baseband filter and an output stage defining a current-mode signal path, and a current source and a programmable diode-connected transistor arranged in parallel in the current-mode signal path, the output stage including a pair of output stage portions connected in parallel, the programmable diode-connected transistor being directly connected to one of the output stage portions.

[0011] An advantage of the aforementioned device may be that a lower ratio of static bias to signal current may be employed in the output stage compared to that employed in the baseband filter. Accordingly, current may be reused, power efficiency may be improved, and distortion components may be reduced compared to one or more embodiments of the RF pulse generator device that do not employ a parallel arrangement of a current source and a diode-connected transistor coupled to a current-mode signal path between the baseband filter and the output stage. Further power efficiency and distortion components may be achieved by directly connecting the diode-connected transistor to the output stage without an intermediate stage, such as a turnaround current mirror, connected between the diode-connected transistor and the output stage.

[0012] As a result of the aforementioned advantages, less power may be employed to operate one or more qubits of a quantum system. The reduced power consumption may improve the scaling of qubits of a quantum system. Furthermore, components of the device and / or system may be employed in and / or for cryogenic chambers such as dilution refrigerators.

[0013] Yet another advantage of the aforementioned device may be that the gain in the device can be dynamically and / or selectively changed so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range and / or with high resolution by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage may be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0014] According to another embodiment, a device can include a baseband filter and an output stage defining a current-mode signal path, and a programmable current source and a programmable diode-connected transistor arranged in parallel in the current-mode signal path, the programmable diode-connected transistor being directly connected to the output stage without a turnaround current mirror connected between the programmable diode-connected transistor and the output stage.

[0015] An advantage of the aforementioned device may be that a lower ratio of static bias to signal current may be employed in the output stage compared to that employed in the baseband filter. Another advantage of the aforementioned device, system, and / or method is that the gain of the current-mode signal path may be adjusted by programming the active width of the diode-connected transistor such that the gain may be varied over a wide range or with high resolution. Accordingly, current may be reused, power efficiency may be improved, and distortion components may be reduced compared to one or more embodiments of the RF pulse generator device that do not employ a parallel arrangement of a current source and a diode-connected transistor coupled to the current-mode signal path between the baseband filter and the output stage. Further power efficiency and distortion components may be achieved by connecting the diode-connected transistor directly to the output stage without an intermediate stage, such as a turnaround current mirror, connected between the diode-connected transistor and the output stage.

[0016] As a result of the aforementioned advantages, less power may be employed to operate one or more qubits of a quantum system. The reduced power consumption may improve the scaling of qubits of a quantum system. Furthermore, components of the device and / or system may be employed in and / or for cryogenic chambers such as dilution refrigerators.

[0017] Yet another advantage of the aforementioned device may be that the gain in the device can be dynamically and / or selectively changed so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range and / or with high resolution by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage may be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0018] In one or more embodiments of the aforementioned device, the programmable current source can pass static current and the diode-connected transistor can pass both static and dynamic current. A related advantage may be the ability to change the ratio of static bias to signal current between the input and output of the respective device and / or system depending on one or more parameters and / or specifications of the current source and diode-connected transistor employed. This advantage may be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage. [Brief description of the drawings]

[0019] [Figure 1] FIG. 1 is a block diagram of an example, non-limiting system that can facilitate operation of one or more qubits in accordance with one or more embodiments described herein. [Diagram 2] FIG. 1 is a block diagram of an example system implementation implementing an integrated radio frequency (RF) pulse generator utilizing a current mode signal path. [Diagram 3] FIG. 1 illustrates an exemplary framework of a methodology for integrating a radio frequency (RF) pulse generator utilizing a current mode end-to-end signal path. [Figure 4] FIG. 1 illustrates an example architecture of a radio frequency (RF) pulse generator signal chain. [Diagram 5] FIG. 1 is an example schematic diagram of a current-mode implementation of an end-to-end signal path from the output of a digital-to-analog converter (DAC) to the output of an RF pulse generator. [Figure 6] FIG. 1 illustrates an exemplary simulation result of an entire radio frequency (RF) pulse generator signal chain. [Figure 7] 1 is a flow diagram of an exemplary, non-limiting method that can facilitate use of a device according to one or more embodiments described herein. [Figure 8]FIG. 1 is a block diagram of an exemplary non-limiting operating environment in which one or more embodiments described herein may be facilitated. [Figure 9] FIG. 1 is a block diagram of an exemplary, non-limiting cloud computing environment according to one or more embodiments described herein. [Figure 10] FIG. 1 is a block diagram of an exemplary, non-limiting abstraction model layer according to one or more embodiments described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Embodiments of the subject matter described herein relate generally to an integrated radio frequency (RF) pulse generator, and more particularly, to utilizing a current mode end-to-end signal path to reduce power consumption, reduce distortion, and enhance linearity between a digital-to-analog converter (DAC) and adjacent stages in the signal chain.

[0021] The following detailed description is merely illustrative and is not intended to limit the embodiments, or the application and / or utilization of the embodiments. Furthermore, there is no intention to be bound by any express or implied information provided in the Summary of the Invention section or the Detailed Description of the Invention section above. One or more embodiments will now be described with reference to the drawings, in which like reference numerals are utilized to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that in various instances, one or more embodiments may be practiced without these specific details.

[0022] Typically, at scale, quantum computing cloud service providers can run millions of quantum jobs per year for users. Each quantum job can include the execution of one or more quantum programs. Given that a qubit state can only exist (or be coherent) for a limited time, the purpose of the operation of a quantum logic circuit (e.g., including one or more qubits) may be to reduce the time of operation or to increase the speed of operation, or both. The time spent operating a quantum logic circuit may undesirably reduce the operation time available for one or more qubits. This may be due to the available coherence time of one or more qubits before decoherence of the one or more qubits. For example, in some cases, a qubit state may be lost in less than 100-200 microseconds. Furthermore, operations on qubits generally introduce some error, such as some level of decoherence and / or some level of quantum noise, which further impacts the availability of the qubits. Quantum noise may refer to noise due to the discrete and / or stochastic nature of quantum interactions. Device designs that extend the lifetime of quantum states as well as extend coherence times may be desirable.

[0023] Also, in the large-scale case, the large number of quantum jobs may pressure each quantum program to execute quickly. That is, increased execution speed may directly or indirectly or both correlate to maximizing system usage, minimizing users having to wait for measurement results, or minimizing unwanted consumption of classical computational resources, or a combination thereof. These quantum jobs may also pressure to execute properly so that maximum performance can be extracted from an error-prone system in the short term, so that the quality of measurements associated with one or more qubits of the respective quantum system can be improved, or the compilation into physical level pulses can be improved (e.g., in terms of accuracy, precision, or measurement efficiency, or a combination thereof).

[0024] Physical real-world quantum logic circuits controlled by quantum systems can contain multiple qubits. One type of qubit, the superconducting qubit, can contain Josephson junctions and typically operates only in a cryogenic chamber such as a dilution refrigerator. One or more such superconducting qubits can be multiplexed per measurement circuit contained within the cryogenic chamber.

[0025] In a variety of contexts, including the control of qubits, arbitrary waveform generation capabilities with variable amplitude and low distortion may be desirable. The primary circuit in an arbitrary waveform generator (AWG) may be a digital-to-analog converter (DAC), which may be beneficial in a variety of applications, including the implementation of wireless transmitters and qubit control pulses. For such designs, minimizing power consumption and reducing distortion may be beneficial, especially in the context of cryogenic signal generation for qubit control. Design challenges utilizing a voltage-mode representation of the signal path may include high dynamic range requirements at block interfaces that lead to nonlinear behavior and the generation of undesired distortion components. Undesired distortion components may be considered a source of noise or disturbance in the system and thus may contribute to reduced coherence times of one or more qubits, for example, in a cryogenic chamber.

[0026] Another challenge may be that there is no opportunity for power efficiencies from current reuse, resulting in a significant increase in power consumption per block. When scaling quantum systems to include more qubits, power efficiency is not only desirable but may also be a factor that can enable scaling to include more qubits.

[0027] More specifically, quantum computing utilizes qubits as its key units instead of classical computational bits. A qubit (e.g., a quantum binary digit) is the quantum mechanical analogue of a classical bit. While a classical bit can adopt only one of two basis states (e.g., 0 or 1), a qubit can adopt a superposition of these basis states (e.g., α|0〉+β|1〉), where α and β are (|α| 2 +|β| 2A quantum computer is a complex scalar (such as =1) that, in theory, allows some qubits to hold exponentially more information than the same number of classical bits. Thus, quantum computers (e.g., computers that employ qubits instead of classical bits only) can, in theory, quickly solve problems that would be very difficult for classical computers. A classical computer's bits are simple binary numbers with values ​​of 0 or 1. Almost any device that has two distinct states can serve to represent a classical bit, such as a switch, a valve, a magnet, a coin, or a similar binary type state measurement. A qubit, with its quantum mystique, can occupy a superposition of the 0 and 1 states. It is not that a qubit can have an intermediate value, such as 0.63, and when a qubit's state is measured, the result is either 0 or 1. However, in the course of a calculation, the qubit can act as if the qubit were a mixture of states, for example 63 percent 0 and 37 percent 1.

[0028] In fact, a typical quantum program requires the coordination of quantum and classical parts of the computation. One way to consider a typical quantum program is to identify the processes and abstractions involved in specifying a quantum algorithm, translating the algorithm into an executable form, running an experiment or simulation, and analyzing the results. A concept that runs throughout these processes is the use of intermediate representations. An intermediate representation (IR) of a computation is neither a source language description nor a target machine instruction, but something in between. A compiler can utilize some IR during the process of transforming and optimizing a program. The input is source code that describes the quantum algorithm and compile-time parameters. The output is a combined quantum / classical program represented using high-level IR. The difference between quantum and classical computers is that quantum computers are probabilistic, and therefore measurements of the algorithm output will yield a good solution within an algorithm-specific confidence interval. The computation is repeated until a sure solution with a sufficiently high probability can be achieved.

[0029] Quantum computers provide novel ways to perform computational tasks, such as molecular computation, photon, optimization, and many others, by processing information using the laws of quantum mechanics. Many algorithms and system components have been introduced to efficiently perform such computational tasks. For example, radio frequency (RF) pulse generators (often incorporating one or more digital-to-analog converters) can be beneficial in a variety of applications, including implementing wireless transmitters and control pulses for qubits. Designs utilizing voltage-mode representations of signal paths have one or more challenges, including high dynamic range requirements at block interfaces that lead to nonlinear behavior and the generation of higher amplitude distortion components. Another challenge can be a significant increase in power consumption per block, with no opportunity for power efficiencies derived from current reuse. Thus, one or more embodiments herein propose a current-mode end-to-end signal path that facilitates the realization of a favorable set of tradeoffs regarding power consumption and distortion. These benefits can be best achieved by implementing the entire chain in current mode.

[0030] One or more embodiments described herein generally relate to RF pulse generator systems and methods that implement a current-mode end-to-end path from a digital-to-analog converter (DAC) to an output stage that allows for a favorable set of trade-offs in terms of power consumption and distortion to be achieved. This may be achieved by a device (e.g., a radio frequency (RF) pulse generator) or part or both of the device that can change the ratio of static (bias) current to dynamic (signal) current in different circuit stages. That is, the input stage of the device can have a high ratio of static (bias) current to dynamic (signal) current for better linearity, and for the output stage of the device, the ratio of static (bias) current to dynamic (signal) current is reduced. The elements of the signal path of the device can be DACs, baseband filters, mixers, attenuators, and output chain components. Benefits can be achieved by implementing the entire chain in current mode. One or more embodiments can optionally utilize a radio frequency digital-to-analog converter (RFDAC).

[0031] Current-mode signal processing is ideal for low distortion applications because it can reduce the voltage swings at various nodes subject to the device, circuit, and / or signal path employed. Another advantage of current-mode circuits is that they can enable current reuse, where the bias and signal currents of one stage are shared with another stage (typically by stacking circuit stages). Reuse can reduce the total current drawn from the power supply, thus improving the power efficiency of the circuit. Conventional current-mode input filters using operational amplifiers can consume a large amount of power and can be limited for high frequency applications. Although circuit power efficiency can be improved by introducing a current-mode signal path design into the implementation of an integrated RF pulse generator, one or more embodiments described herein provide an improved current-mode signal path design that can further improve circuit power efficiency.

[0032] That is, implementing efficient current-mode filter stages can be a key part of realizing the proposed end-to-end current-mode signal path, which was developed for low power consumption with current reuse and to enhance end-to-end linearity by minimizing voltage-to-current and current-to-voltage conversions. The low output signal can be a design structure that can be an advantage to the system in efficiently implementing the signal chain. Furthermore, the integrated RF pulse generator solution can enable a cascaded solution using current-mode techniques. Since the input and output signals of the current-mode filter stages are both currents, the filter stages can be cascaded by connecting the output of one filter stage to the input of another filter stage. This cascading of current-mode filter stages can be used to build higher order filters (e.g., with steeper roll-off characteristics).

[0033] To achieve a reduced ratio of static (bias) current to dynamic (signal) current, one or more embodiments described herein may employ circuit devices in a signal path between a baseband filter and an output stage of the device, where the output stage may include mixers, attenuators, and output chain components. In particular, one or more embodiments described herein may integrate a pair of components arranged in parallel in a current mode signal path. In general, a pair of components may allow a current from a baseband filter to be split between the pair of components. As a result, one component of the pair, such as a current source, may provide a static current, and the other component of the pair, such as a diode-connected transistor, may provide both static and dynamic current.

[0034] Placing a parallel combination of current sources and diode-connected transistors in the current-mode signal path can achieve a reduced ratio of static (bias) current to dynamic (signal) current in the output stage (e.g., mixers and attenuators) compared to the ratio in the baseband filter. In contrast, a simple current mirror scales both the static (bias) current and the dynamic (signal) current by the same factor, so such a mirror cannot change the ratio of static (bias) current to dynamic (signal) current. This decoupling of the static current of the baseband filter from the static current of the output stage can provide one or more advantages in achieving a high performance, yet power-efficient, RF pulse generator. For example, operating the baseband filter at a large ratio of static (bias) current to dynamic (signal) current may improve distortion performance, but operating the output stage at such a large ratio reduces power efficiency, which is important because the output stage often accounts for most of the power consumption of a system. By decoupling the static current of the baseband filter from the static current of the output stage, the former can operate with high linearity and low distortion, while the latter can operate with good power efficiency, resulting in a good trade-off between system distortion performance and power consumption. Making the diode-connected transistors programmable (i.e., having switchable active widths) provides a gain control mechanism for the current-mode signal path, which is another advantage of the topology.

[0035] One or more embodiments will now be described with reference to the drawings, in which like reference numerals are used to refer to like elements throughout. As used herein, the terms "entity," "requesting entity," and "user entity" can refer to a machine, device, component, hardware, software, smart device, or human, or a combination thereof. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that in various instances, one or more embodiments may be practiced without these specific details.

[0036] The embodiments depicted in one or more figures described herein are for illustrative purposes only, and thus the architecture of the embodiments is not limited to the systems, devices, and / or components depicted in the figures, nor to any particular order, connection, or coupling of the systems, devices, and / or components depicted in the figures. For example, in one or more embodiments, a non-limiting system described herein, such as the non-limiting system 100 depicted in FIG. 1, and / or the systems may further comprise, be associated with, be coupled to, or be a combination of one or more computers and / or computing-based elements described herein with reference to an operating environment, such as the operating environment 800 depicted in FIG. 8. In one or more described embodiments, the computers and / or computing-based elements may be used in connection with the implementation of one or more of the systems, devices, components, and / or computer-implemented operations depicted and / or described in connection with FIG. 1 and / or other figures described herein.

[0037] Referring initially generally to Figure 1, one or more embodiments described herein may include one or more devices, systems, or apparatus, or combinations thereof, that may facilitate the execution of one or more quantum operations and the output of one or more quantum results. For example, Figure 1 illustrates a block diagram of an exemplary, non-limiting system 100 that may improve the execution of a quantum job, such as by increasing power consumption for arbitrary waveform generation for a quantum job.

[0038] A quantum system 101 (e.g., a quantum computer system, a superconducting quantum computer system, or the like, or a combination thereof) may employ quantum algorithms and / or quantum circuits, including computing components and / or devices, to perform quantum operations and / or quantum functions on input data to produce results that may be output to an entity. A quantum circuit may include quantum bits (qubits), such as multi-bit qubits, physical circuit level components, higher level components, or functions, or a combination thereof. A quantum circuit may include physical pulses that may be structured (e.g., arranged and / or designed) to perform a desired quantum function and / or quantum computation on data (e.g., input data, or intermediate data derived from the input data, or both) to produce one or more quantum results as output. A quantum result, e.g., a quantum measurement 120, may be responsive to a quantum job request 104 and associated input data, and may be based at least in part on the input data, the quantum function, and / or the quantum computation.

[0039] In one or more embodiments, quantum system 101 may include one or more quantum components, such as quantum computing component 103, quantum controller 106, waveform generator 110, and quantum logic circuit 108 (also referred to herein as a quantum processor) that includes one or more qubits, such as qubits 107A, 107B, or 107C, or combinations thereof (also referred to herein as qubit devices 107A, 107B, and 107C).

[0040] The quantum controller 106 may comprise any suitable processor. The quantum controller 106 may generate one or more instructions for controlling one or more processes of the quantum computing component 103 and / or for controlling the quantum logic circuit 108 and / or the waveform generator 110.

[0041] Quantum computing component 103 may obtain (e.g., download, receive, retrieve, or the like, or a combination thereof) a quantum job request 104 requesting the execution of one or more quantum programs. Quantum computing component 103 may determine one or more quantum logic circuits, such as quantum logic circuit 108, for executing the quantum programs. Request 104 may be provided in any suitable format, such as text format, binary format, or another suitable format or combination thereof. In one or more embodiments, request 104 may be received by a component other than a component of quantum system 101, such as a component of a classical system coupled to and / or in communication with quantum system 101.

[0042] The waveform generator 110 can perform one or more quantum processes, computations, or measurements, or a combination thereof, to operate one or more quantum circuits on one or more qubits 107A, 107B, or 107C, or a combination thereof. For example, the waveform generator 110 can operate one or more qubit effectors, such as qubit oscillators, harmonic oscillators, pulse generators, or the like, or a combination thereof, to cause one or more pulses to stimulate and / or manipulate the state of one or more qubits 107A, 107B, or 107C, or a combination thereof, included in the quantum system 101. That is, the waveform generator 110 can perform quantum logic circuit operations on one or more qubits (e.g., qubits 107A, 107B, or 107C, or a combination thereof) of the circuit, for example, in combination with the quantum controller 106. In response, the quantum computing component 103 can output one or more quantum job results, such as one or more quantum measurements 120, in response to the quantum job request 104.

[0043] As described in further detail below, waveform generator 110 may include current-mode devices that reduce the ratio of static bias to signal current along the signal path of the current-mode devices. This reduction in the ratio between the baseband filter and the output stage of the device may reduce distortion and / or increase power efficiency compared to one or more waveform generators and / or signal generators of quantum system 101.

[0044] Some or all of the quantum logic circuit 108 and waveform generator 110 may be housed within a cryogenic environment in which a cryogenic chamber 116, such as a dilution refrigerator, may be provided. Indeed, signals may be generated by waveform generator 110 within the cryogenic chamber 116 to manipulate and / or control one or more qubits 107A-C. If qubits 107A, 107B, and 107C are superconducting qubits, cryogenic temperatures, such as about 4K or lower, may be employed to facilitate the functioning of these physical qubits. Thus, elements of waveform generator 110 should also be constructed to perform at such cryogenic temperatures.

[0045] The following / above description refers to the operation of a single quantum program from a single quantum job request. However, one or more of the processes described herein may be scalable, such as running one or more quantum programs and / or quantum job requests in parallel with each other.

[0046] In one or more embodiments, non-limiting system 100 may be a hybrid system and thus may include both one or more classical systems, such as a quantum program implemented system, and one or more quantum systems, such as quantum system 101. In one or more other embodiments, quantum system 101 may be separate from the classical systems, but may function in combination with the classical systems.

[0047] In such instances, one or more communications between one or more components of the non-limiting system 100 and the classical system may be facilitated by wired or wireless means, or both, including, but not limited to, employing a cellular network, a wide area network (WAN) (e.g., the Internet), or a local area network (LAN), or a combination thereof. Suitable wired or wireless technologies for facilitating communications may include, but are not limited to, Wireless Fidelity (Wi-Fi), Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX), Enhanced General Packet Radio Service (Enhanced GPRS), 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE), 3rd Generation Partnership Project 2 (3GPP2) Ultra Mobile Broadband (UMB), High Speed ​​Packet Access (HSPA), Zigbee and other 802.XX wireless technologies and / or older communication technologies, BLUETOOTH®, Session Initiation Protocol (SIP), ZIGBEE®, RF4CE protocol, WirelessHART protocol, 6LoWPAN (Ipv6 over Low power Wireless Area Networks), Z-Wave, ANT, Ultra Wideband (UWB) standard protocols, and / or other proprietary and / or non-proprietary communication protocols.

[0048] FIG. 2 illustrates a block diagram of an exemplary non-limiting system 200 (also referred to herein as a device) that may be configured by the waveform generator 110 of the quantum system 101 of the non-limiting system 100 of FIG. 1. The non-limiting system 200 may access and process data using variable computing components as illustrated in accordance with one or more embodiments described herein. Some of the systems (e.g., non-limiting system 200, etc.), devices, or processes described herein may constitute machine-executable components embodied within a machine, e.g., embodied in one or more computer-readable media associated with one or more machines. Such components, when executed by one or more machines, e.g., computers, computing devices, virtual machines, etc., may cause the machine to perform the operations described herein. For the sake of brevity, repeated descriptions of similar elements used in one or more embodiments described herein are omitted.

[0049] In general, the subject computer processing systems, methods, apparatus, and / or computer program products may be employed to solve new problems that may arise due to advances in technology, computer networks, the Internet, and the like.

[0050] In today's digital world, one of the largest growth areas in electronics is the application of wireless communications. Modern radio frequency systems such as 3G / 4G / 5G base stations are based on wideband multi-channel architectures. To increase flexibility in signal generation, modulation, and processing, modern RF transmitters typically employ one or more high-speed digital-to-analog converters (DACs). Such high-speed DACs provide arbitrary waveform generation capabilities for RF signals that can be useful in both quantum-related and non-quantum-related applications as shown above.

[0051] One such quantum-related application is the control of qubits in the field of quantum computing, which calls for the generation of RF control pulses with variable amplitude and low distortion (high spectral purity). Minimizing the power consumption of such RF pulse generators is beneficial, especially in the context of cryogenic signal generation for qubit control. Design challenges utilizing voltage-mode representation for the signal path include high dynamic range requirements at the block interfaces that lead to nonlinear behavior and the generation of higher amplitude distortion components. Thus, these embodiments propose a promising solution to this problem by introducing a current-mode signal path design into the implementation of an integrated RF pulse generator system, e.g., a system and / or device that can realize current reuse and thus improved power efficiency and / or reduced associated distortion compared to existing techniques.

[0052] The non-limiting system 200 can facilitate an integrated radio frequency (RF) pulse generator utilizing a current mode signal path. The embodiments described herein relate to maintaining the following elements of the signal path, a digital-to-analog converter (DAC) 202, a baseband filter 204, a current ratio reduction device 205, an upconverting mixer 206, a radio frequency (RF) attenuator 208, an output component 212 (e.g., a current mode amplifier), and an offset component 214. The radio frequency (RF) attenuator 208 and the output component 212 together can be considered as at least a part of an output stage 214 of the non-limiting system 200. In one or more embodiments, the upconverting mixer 206 can be considered as at least a part of the output stage 214. Benefits can be achieved by implementing the entire chain in current mode. Although FIG. 2 illustrates utilizing both the upconverting mixer 206 and the RF attenuator 208, other embodiments can omit one or more of these components and cascade the respective components in any suitable manner.

[0053] Non-limiting system 200 may optionally include a server device, one or more networks, and one or more devices (not shown), or such elements may be more generally comprised by quantum system 101, or both, and non-limiting system 200 may be comprised by such quantum system 101.

[0054] The non-limiting system 200 may also include or be otherwise associated with a digital-to-analog converter 202 operating in a current mode in which the analog inputs and analog outputs of the system blocks are represented as currents. The digital signal input to the DAC 202 may be baseband digital in-phase and quadrature-phase data (I and Q data), representing any suitable signal, such as, but not limited to, a signal for a radio transmitter, a signal for implementing a control pulse of a qubit, etc. The analog output of the DAC 202 in the form of a current may be directed to a baseband filter 204. The baseband current output of the baseband filter 204 may be frequency converted up to an RF frequency by an upconverting mixer 206, which may be driven by a local oscillator (LO) signal. Optionally, the LO signal waveform may be a complementary metal-oxide semiconductor (CMOS) rail-to-rail level, such as that generated by a CMOS inverter.

[0055] A radio frequency (RF) attenuator 208 can operate with the DAC 202, the baseband filter 204, and the upconversion mixer 206. An output component 212 receives the output current of the RF attenuator 208. In one or more embodiments, the output component 212 can include an impedance transformation component (e.g., a transformer or a current mode amplifier). A corresponding signal chain can create an output current signal using the DAC 202, the baseband filter 204, the upconversion mixer 206, and the RF attenuator 208. A direct current (DC) offset in the baseband signal (e.g., a DC offset in the output current of the baseband filter 204) can be converted by the upconversion mixer into unwanted LO tones (LO “leakage”) at the output of the RF pulse generator system 200. To suppress such LO leakage, an offset component 214 can apply DC offset cancellation that adds a compensating DC offset to the baseband signal. The DAC 202, the baseband filter 204, the current ratio reduction device 205, the upconversion mixer 206, the RF attenuator 208, the output component 212, and / or the offset component 214 may be cryogenic electronic components (e.g., electronic components capable of operating at cryogenic temperatures).

[0056] In one implementation, a current-mode end-to-end path from the digital-to-analog converter (DAC) 202 to the output component 212 can facilitate realizing a favorable set of tradeoffs regarding power consumption and distortion. In this signal path, the DAC 202 operating in a current mode can implement an integrated DAC solution, and the baseband filter 204, incorporated with the upconverting mixer 206 and the RF attenuator 208, can operate in a current mode where the analog input and output signals between the system blocks can be expressed as currents. The upconverting mixer 206 can be driven by an LO signal and may optionally use complementary metal-oxide semiconductor (CMOS) rail-to-rail levels. The radio frequency (RF) attenuator 208 can operate in conjunction with the DAC 202, the baseband filter 204, the current ratio reduction device 205, and the upconverting mixer 206. This methodology can facilitate low output signal requirements to efficiently implement the signal chain, especially considering the current ratio reduction device 205 described in detail below. Therefore, the current-mode signal path of an integrated RF pulse generator solution can facilitate reduced power consumption by leveraging current reuse, enhance linearity by minimizing voltage-to-current and current-to-voltage conversions, and enable cascaded solutions using current-mode techniques.

[0057] FIG. 3 illustrates an exemplary framework 300 of a methodology for integrating a radio frequency (RF) pulse generator utilizing a current mode end-to-end signal path. An embodiment of the framework operates a digital-to-analog converter (DAC) in current mode at 302 and employs a current ratio reduction device including a current source and a diode-connected transistor at 303, the diode-connected transistor being programmable to vary the gain. At 304, the embodiment includes directly connecting the diode-connected transistor and the output stage without a turnaround current mirror connected therebetween. At 306, the embodiment includes operating an up-converting mixer operably coupled to the DAC in current mode. At 308, the embodiment includes representing the analog input and analog output of the DAC and the up-converting mixer as currents, the DAC generating a baseband signal. At 310, the methodology utilizes a radio frequency (RF) attenuator operating in current mode with the DAC and the up-converting mixer. Steps 304, 306, and / or 308, and / or one or more subsets thereof, may be optional. Thus, the framework may provide an overall chain operating in current mode (or optionally implement sub-elements of the chain in current mode) by integrating a DAC interface to an upconverting mixer and an RF attenuator to generate an output. Functionality may be implemented in current mode, and any two blocks may also be interfaced in current mode. Stages may utilize current mode signals, and signals may be attenuated and multiplied. Starting from the baseband filter, the current mode signals may be scaled up / down in the circuit stages, such as by employing a current ratio reduction device 205 at the interface between stages, and optionally in an impedance matching network, where the impedance matching network is part of the output component stage.These methods can leverage current reuse to reduce end-to-end power consumption and enhance end-to-end linearity (reducing distortion) by minimizing voltage-to-current and current-to-voltage conversions. The low power signal requirements help to implement the signal chain efficiently and the methods can enable cascaded solutions using current-mode techniques.

[0058] 4 includes an exemplary architecture of an RF pulse generator signal chain that includes two or more DACs (403, 405) in quadrature, two or more baseband filters 406, 408 in quadrature, two or more upconverting mixers (410, 412) in quadrature, and a summer 411 that generates a summed output of the respective output signals of the upconverting mixers. In this embodiment, unlike conventional systems, each sub-block can be implemented in current mode, and all analog signals transferred between the sub-blocks are represented as currents. The inputs (e.g., digital words) to the DACs (403, 405) are digital.

[0059] One method for generating a complex signal may be to modulate a carrier signal frequency by a local oscillator using a vector modulator. In RF applications, baseband digital I and Q signals are generated using an arbitrary waveform generator (AWG) that includes two or more synchronized digital-to-analog converters (DACs). The RF pulse generator signal chain architecture 400 may receive a baseband digital in-phase signal (BBI signal) 402 and a baseband digital quadrature-phase signal (BBQ signal) 404. Multi-bit baseband digital-to-analog converters (DACs) 403 and 405 may employ digital bits and convert the digital bits to analog signals according to the signal bandwidth and sampling clock frequency. This may enable the output of a current and provide a filtered and amplified current to up-converting mixers 410 and 412.

[0060] To remove out-of-band noise components coming from the DACs (403, 405), the signal may be processed through low pass filters 406 and 408. The filtered signal may be mixed and thus upconverted by upconvert mixers 410 and 412 using two carriers (LO-Q and LO-I) with quadrature phase 0 degrees and 90 degrees to I and Q. The resulting signals may be combined by creating a single sideband signal representation using a signal combiner 411. For example, if a (x*y) function needs to be performed in a single sideband representation, the variable x may be expressed as a combination of 0 degrees and 90 degrees, and the variable y may be expressed as a combination of 0 degrees and 90 degrees. These two variables may be multiplied and added, similar to the scalar product of two vectors. The output of this function may be processed through a driver (DRV) 414.

[0061] The matching network (MN) 416 is typically a passive component that does not add distortion and can transform the resistance 418 (e.g., 50 ohms) into the impedance required by the driver to maximize power transfer.

[0062] In the RF pulse generator system 400, the outputs of the DACs (403, 405) may be filtered and upconverted using I-channel and Q-channel mixers, and the resulting signals are combined and fed through a driver and matching network to a nominal load (e.g., 50 ohms) at the output 420.

[0063] In such designs, the implementation of the filter and the interface between the filter and other elements of the signal chain can be useful. Continuous time filters can be ideal for implementing high dynamic range, low power active filters. Traditional current mode input filters using operational amplifiers can consume large amounts of power and can be limited in high frequency applications. Continuous time transconductance (G m )-Capacitance (C) Filter (G m-C filters) may typically provide a high input impedance, which may result in higher distortion products. m -C type filters can be ideal for high frequency applications, but can be limited in terms of the dynamic range they support because their input is typically a voltage.

[0064] Current mode signal processing may be ideal for low distortion applications since it reduces the voltage swings at the various nodes of interest. Another advantage of current mode circuits is current reuse, where the bias and signal currents of one stage may be shared with another stage (e.g., typically by stacking the circuit stages). Reuse may reduce the total current drawn from the power supply, thus improving the power efficiency of the circuit. However, traditional current mode input filters using operational amplifiers or the like may consume a large amount of power and may be limited in high frequency applications. For example, a baseband filter may operate at a relatively high bias current for linearity and therefore low distortion. However, the output stages of each signal path may waste current and therefore waste power if operated with the same or similarly high ratio of quiescent (bias) current to dynamic (signal) current. To improve the power efficiency of the entire device / system, it may be desirable to operate the baseband filter at a relatively high bias current while operating the output stages in the signal path with a low ratio of quiescent (bias) current to dynamic (signal) current. Efficient current-mode filter stages can facilitate the realization of end-to-end current-mode signal paths for low power consumption by leveraging current reuse, and can enhance end-to-end linearity by minimizing voltage-to-current and current-to-voltage conversions. Low power signal requirements can be an advantage for efficient implementation of the signal chain.

[0065] 5 illustrates an exemplary schematic diagram of a transistor level implementation of a device 500 such as an RF pulse generator system for generating I and Q phase RF output signals. In general, as described below, the device 500 can provide an all-current mode signal chain that can be tailored to one or more requirements of cryogenic waveform generation, such as those associated with quantum computing systems. Again, one or more embodiments described herein can be practiced outside of quantum environments, such as those associated with wireless transceivers used in the Internet of Things, sensors, and / or memory arrays where very low power consumption can be critical to the application.

[0066] The device 500 may define a current mode signal path including one or more input stages and one or more output stages. As shown, parallel copies of the input stage 504 may be employed to generate in-phase (I) and quadrature-phase (Q) RF signal components (e.g., providing P and N current polarities for the I and Q signal components, respectively). That is, four parallel input stages 504 may be employed along with a pair of output stages 506 (one for the I signal component and one for the Q signal component) to provide the RF pulse generator device 500. A pair of input stages 504 may be coupled to each output stage 506. For example, the input stages 504 for the P and N current polarities of the I signal component may be coupled to a common output stage 506. As shown, the current consumption of each input stage 504 is 1.25X, where X is the bias current of the current source device M3. Because there are four parallel input stages 504, the total baseband filter current is 5X, which may be equal to approximately 200 μA.

[0067] Each input stage 504 may comprise a baseband filter 512 and a ratio reduction device 514 that may be used to reduce the ratio of static (bias) current to dynamic (signal) current supplied to the output stage 506 compared to the ratio of static (bias) current to dynamic (signal) current employed by the baseband filter 512 itself. Each output stage 506 receives a voltage (VBB ,ip / m ), an upconversion mixer 518, and an RF attenuator 520. The output stage 506 may be coupled to a common transformer (xmfr) 524 that serves as an output component to the current mode signal path.

[0068] Turning first to the baseband filter 512, the baseband filter 512 shown in FIG. 5 has a frequency response that is determined by the transconductance (G m ) and capacitance (C). In the case of the baseband filter 512 shown in FIG. 5, two capacitors (C1 and C2) are provided for the two poles such that a second-order transfer function is realized. The output current is fed (as in most current mirror circuits) through the transistor M 1A The current through another transistor M operating at the same current density 1AX The output of the baseband filter 512 is obtained by mirroring the output of the transistor M 1AX The width of the transistor M 1A When the width of the baseband filter 512 is one-quarter of the width of the transistor M 1A Both the static (bias) and dynamic (signal) currents are reduced by a factor of four, so the current through M 1A and M. 1AX It should be noted that a standard current mirror, such as the current mirror formed by: does not change the ratio of static (bias) current to dynamic (signal) current.

[0069] Moving now to the ratio reduction device 514, this device comprises components M3X and M4. In one or more embodiments, the component M 3X and M4 may be located in the same subcomponent, chip portion, or the like, or a combination thereof. That is, in one or more embodiments, components M 3x may be located in the respective baseband filter 512, but should not be considered as components of the respective baseband filter 512. In one or more other embodiments, the components M 3x One or more of may be located outside the respective baseband filter 512, such as in the same subcomponent, chip portion, or the like as component M4, or a combination thereof.

[0070] With further reference to the ratio reduction device 514, a current source device (also referred to as a current source) 532 (M 3x ) and a diode-connected transistor 534 (M4). The current source device 532 may include 3xThe current source device 532 may be a simple PMOS transistor biased in saturation (denoted as 1), a transistor current source with resistive degeneration in the source leg, or a cascoded current source. It is also possible to swap the device types positive (PMOS) versus negative (NMOS) in the implementation of the baseband filter 512 and / or the output stage 506, in which case the current source device 532 may be implemented with an NMOS device. The diode-connected transistor 534 may comprise a self-biasing diode. A switch may be employed to selectively activate the fingers of the diode-connected transistor 534 such that the active width of the fingers of the diode-connected transistor 534 may be adjusted by digital control. Changing the active width of the diode-connected transistor 534 changes the current mirror gain between the diode-connected transistor 534 and the transistor pair 516, thereby providing a gain control mechanism for the current-mode signal path. Further gain control adjustment may be achieved by selectively activating the fingers of the transistor pair 516, thereby varying their active width. Providing multiple mechanisms for adjusting the gain control is useful to increase the range or resolution of the gain control.

[0071] The current to the ratio reduction device 514 may be split at 536, etc. The current source 532 may pass static current, and the diode-connected transistor 534 may pass both static and dynamic (signal) current. That is, the current source 532 may carry most of the static current from the respective baseband filter 512, while the diode-connected transistor 534 may carry almost all of the dynamic current from the respective baseband filter 512. In other words, the dynamic and static current may be distributed between the current source device 532 and the diode-connected transistor 534 such that the current provided to the output stage 506 may include a reduced portion of the static current component from the filter stage (e.g., the baseband filter 512). That is, the ratio of static bias to dynamic (signal) current may be lower in the output stage 506, considering the employment of the ratio reduction device 514.

[0072] The transistor sub-devices 516 may each receive a voltage from a pair of ratio reduction devices 514, as shown above. The transistor sub-devices 516 may each include a pair of transistors 540 and 542. These transistors 540 and 542 may be of the same NMOS or PMOS type as the type (PMOS or NMOS) of the diode-connected transistor 534 of the ratio reduction device 514. If the transistors 540 and 542 have the same device type as that used in the diode-connected transistor 534, the diode-connected transistor 534 may be connected directly to the output stage 506 without an intermediate stage, such as a turnaround current mirror, connected between the diode-connected transistor 534 and the output stage 506. Since every circuit stage introduces at least a small degree of nonlinearity, eliminating the turnaround current mirror reduces signal distortion and eliminates the power loss of the turnaround stage.

[0073] Each of the pair of output stages 506 may include an upconverting mixer 518 and an attenuator 520. Both the upconverting mixer 518 and the attenuator 520 operate in current mode, with current being passed from the respective transistors of the transistor subdevices 516.

[0074] 5, the sizes of diode-connected transistor 534, transistor 540, and transistor 542 are selected such that there is a current gain of 10 between diode-connected transistor 534 and each transistor 540 or 542. Thus, the static current flowing through transistors 540 and 542 may be approximately 1.5X (10 times 0.15X).

[0075] Without employing the ratio reduction device 514 between the baseband filter 512 and the output stage 506 (including, for example, the transistor sub-device 516, the mixer 518, and the attenuator 520), the current flowing through the transistor sub-device 516 would be much higher. For example, consider setting the current of the current source device 532 to zero. In this case, all of the static current (0.25X) from the output of the baseband filter 512 flows through the diode-connected transistor 534, and with a mirroring gain of 10, the static current flowing through the transistors 540 and 542 would be about 2.5X. The power efficiency of the output stage 506 would be significantly reduced, as the static current consumption would increase by about 66.7%. Also, the higher static current could lead to headroom issues in the output stage 506, which may cause an undesirable increase in signal distortion. As this numerical example illustrates, by decoupling the static current from the baseband filter 512 from the static current of the output stage 506, the output stage can be operated with a lower ratio of static (bias) current to dynamic (signal) current than that employed by the baseband filter 512.

[0076] In one or more embodiments, one or both of the current source 532 and the diode-connected transistor 534 may be programmable, such as adjustable. This may further allow the ratio of static current to dynamic current to be adjusted dynamically and / or on the fly to more tightly control the power efficiency and (e.g., distortion-related) performance of the circuit. If only the current source 532 is programmable, then only the static current passed by the current source 532 would be selectively controlled. In that case, the ratio of static current to dynamic current may be adjusted to achieve an optimal balance between power efficiency and signal distortion, but there is no mechanism to adjust the gain of the current-mode signal path. If only the diode-connected transistor 534 is programmable, then the gain of the current-mode signal path may be selectively controlled, but there is no mechanism to adjust the ratio of static current to dynamic current in the output stage 506. Making both the current source 532 and the diode-connected transistor 534 programmable provides both a mechanism for gain control and a mechanism for adjusting the ratio of static current to dynamic current in the output stage 506. 5, programmability may be provided by suitable configuration electronics 550. All such configuration electronics are contemplated. An advantage of programmability may be, for example, that the ratio of static bias to signal current may be adjusted prior to generation of the cryogenic waveform.

[0077] FIG. 6 illustrates an example simulation result of distortion performance at the radio frequency output for a device according to one or more embodiments described herein. A device such as device 500 may employ a ratio reduction component / device to reduce the ratio of static bias to signal current at the output stage of the device. The spectrum shown in the figure is obtained by performing a fast Fourier transform (FFT) of the output signal. In the circuit simulation, a 10-bit DAC operating at a sampling rate of 1 GHz generates a 184 MHz sine wave, which is applied as an input to a current-mode end-to-end signal path. The up-conversion mixer is driven by a 5 GHz LO signal. The I and Q signals are selected to create an upper sideband tone at a frequency of 5.0+0.184=5.184 GHz. As shown in the simulation results 600, over a 1 GHz wide band (4.5 GHz to 5.5 GHz), the maximum distortion product 604 is 48 dB lower than the desired tone 602, and therefore the simulated spurious-free dynamic range (SFDR) is approximately 48 dB. The simulated SFDR figures indicate excellent performance, especially in such a power-efficient implementation. Conventional techniques include a voltage-mode single-sideband (SSB) upconverter, a voltage-gated RF attenuator, an operational transconductance amplifier (OTA)-based baseband filter, and a standard high-input impedance G-band filter. m Similar functionality has been implemented by the -C filter implementation. Voltage mode SSB upconverters introduce nonlinearities. OTA based baseband filter implementations use more power and area. Finally, the standard high input impedance G mThe -C filter implementation has higher nonlinearity compared to filter topologies using OTAs with negative feedback. However, the embodiments disclosed herein facilitate a cascaded solution using current mode techniques and allow for an input current mode interface. Additionally, the embodiments proposed herein enhance end-to-end linearity and reduce distortion by minimizing voltage-to-current and current-to-voltage conversions. These techniques can reduce end-to-end power consumption through current reuse.

[0078] That is, the current-mode embodiments provided herein can provide a path to current reuse and low distortion that can be appropriately tailored to the requirements of cryogenic waveform generation. In one or more embodiments, in contrast to existing techniques, the ratio of static bias to signal current can be reduced between the baseband filter and the output stage of the current-mode signal path. In one or more embodiments, the ratio of static bias to signal current can be selectively and dynamically changed. Furthermore, in one or more embodiments, the gain of the current-mode signal path can be adjusted using the same circuitry used to change the ratio of static bias to signal current. One or more embodiments described herein can be suitable for quantum-based applications, such as waveform generation for controlling one or more qubits, such as superconducting qubits. The techniques described herein are equally applicable to other high bandwidth communication systems and can be implemented in commercial CMOS technology. The approach of one or more exemplary embodiments described herein can provide an innovative approach to implementing CMOS controlled pulse generation analog circuits that enable improved scalability of future quantum computing systems, and thus can serve as a building block for cryo-CMOS implementations.

[0079] FIG 7 now illustrates a flow diagram of an exemplary, non-limiting method 700 that can facilitate a process for using a current-mode signal path device, such as device 500 of FIG 5, in accordance with one or more embodiments described herein. Although non-limiting method 700 is described in conjunction with device 500 of FIG 5, non-limiting method 700 may also be applicable to other systems and / or devices described herein, such as waveform generator 110 of FIG 1, system 200 of FIG 2, or architecture 400 of FIG 4, or combinations thereof. For the sake of brevity, repeated descriptions of similar elements and / or processes employed in each embodiment are omitted.

[0080] At 704, the non-limiting method 700 can include outputting a radio frequency output signal by a radio frequency pulse generator (e.g., device 500) operably coupled to the quantum processor, the radio frequency pulse generator comprising a baseband filter and an output stage defining a current mode signal path, and a current source and a diode-connected transistor arranged in parallel within the current mode signal path.

[0081] At 706, the non-limiting method 700 can include splitting, by a device (e.g., device 500), a current from the baseband filter between a current source and a diode-connected transistor, where the splitting can include passing a static current in the current source and passing both the static current and the dynamic current in the diode-connected transistor.

[0082] At 708, the non-limiting method 700 can include varying a static to dynamic current ratio in a diode-connected transistor by the device (e.g., device 500) or a parent system (e.g., quantum system 101), or both, where the diode-connected transistor is programmable.

[0083] At 710, the non-limiting method 700 can include outputting a radio frequency output signal without connecting a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0084] At 712, the non-limiting method 700 may include generating, by a device (eg, device 500), a radio frequency output at an upconversion mixer of an output stage.

[0085] At 714, the non-limiting method 700 may include facilitating, by a device (eg, device 500), a lower static to dynamic current ratio in the output stage than in the baseband filter.

[0086] At 716, the non-limiting method 700 may include producing, by a device (eg, device 500), an output signal from the output stage that is referenced to ground.

[0087] For ease of explanation, the computer-implemented and non-computer-implemented methodologies provided herein are illustrated and / or described as a series of acts. The present invention is not limited by the illustrated acts and / or order of acts, e.g., acts may occur in one or more orders or simultaneously and / or with other acts not shown and described herein. Moreover, not all illustrated acts may be utilized to implement the computer-implemented and non-computer-implemented methodologies in accordance with the described subject matter. Furthermore, the computer-implemented and non-computer-implemented methodologies may alternatively be represented as a series of interrelated states via state diagrams or events. Additionally, the computer-implemented methodologies described below and throughout this specification may be stored on an article of manufacture to facilitate transport and transfer of the computer-implemented methodologies to a computer. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage medium.

[0088] In summary, one or more systems, devices, or methods of use or combinations thereof provided herein relate to a device that can facilitate signal generation. The current-mode end-to-end signal path can include a digital-to-analog converter (DAC) operating in a current mode and an up-converting mixer operating in a current mode and operably coupled to the DAC. The analog inputs and analog outputs of the DAC and the up-converting mixer can be represented as currents, and the DAC can generate a baseband signal. In one or more embodiments, a current source and a diode-connected transistor can be placed in parallel in the current-mode signal path between a baseband filter and an output stage that includes the up-converting mixer. The device and / or system can be a radio frequency DAC. The diode-connected transistor can be programmable to change the gain and / or directly connected to the output stage without a turnaround current mirror connected therebetween.

[0089] An advantage of the above device may be the ability to employ a lower ratio of static bias to signal current in the output stage compared to that employed in the baseband filter, which may result in current reuse, reduced power efficiency, and reduced distortion components compared to one or more embodiments of a DAC device that do not employ a parallel arrangement of current sources and diode-connected transistors coupled in a current-mode signal path between the baseband filter and the output stage.

[0090] As a result of the aforementioned advantages, less power may be employed to operate one or more qubits of a quantum system. The reduced power consumption may improve the scaling of qubits of a quantum system. Furthermore, components of the device and / or system may be employed in and / or for cryogenic chambers such as dilution refrigerators.

[0091] Yet another advantage of the aforementioned device may be that the gain in the device can be dynamically and / or selectively changed so that the gain of the current-mode signal path can be adjusted. The gain of the current-mode signal path can be adjusted over a wide range and / or with high resolution by programming the active width of the diode-connected transistor to vary the mirroring gain between the diode-connected transistor and the subsequent stage. This advantage may be realized without a turnaround current mirror connected between the diode-connected transistor and the output stage.

[0092] Indeed, in view of one or more embodiments described herein, practical applications of the devices described herein can reduce power consumption and reduce signal distortion as compared to waveforms created to control one or more qubits of a quantum system. In one or more instances, reduced signal distortion can lead to reduced disturbance of the qubits and / or increased coherency of the qubits. This is a useful and practical application of computers, especially in view of the reduced distortion and / or other impacts on reducing decoherence of the employed qubits and thus facilitating enhancements (e.g., improvements and / or optimizations) of the operation of the employed qubits. These enhancements can include improved accuracy of quantum results and / or improved availability of the employed qubits. Overall, such computerized tools can constitute concrete and tangible technological improvements in the field of quantum computing.

[0093] Furthermore, one or more embodiments described herein may be employed in real-world systems based on the disclosed teachings. For example, one or more embodiments described herein may function within a quantum system that may receive a quantum job request as an input and may measure real-world qubit states of one or more qubits, such as superconducting qubits, of the quantum system. For example, with respect to a DAC device described herein, the DAC device may facilitate waveform generation in conjunction with controlling one or more states of one or more qubits.

[0094] Additionally, the devices and / or methods described herein may be implemented in one or more domains, such as the quantum domain, to allow for scaled quantum program execution. Indeed, the use of the devices described herein may be scalable, such as, for example, the devices described herein may be employed to generate waveforms for one or more qubits of a multi-qubit system. An advantage of the devices and / or methods described herein may be a reduction in the power consumption required to operate one or more qubits of a quantum system. The reduction in power consumption may allow for improved scaling of qubits provided within a cryogenic chamber.

[0095] The systems and / or devices have been described (and / or will be further described) with respect to interactions between one or more components. Such systems and / or components may include components or sub-components named therein, one or more of the named components and / or sub-components, and / or additional components. Sub-components may be implemented as components communicatively coupled to other components rather than being included within a parent component. One or more components and / or sub-components may be combined into a single component to provide aggregate functionality. A component may interact with one or more other components not specifically described herein for brevity but known to those skilled in the art.

[0096] One or more embodiments described herein may, in one or more embodiments, be intrinsically or intimately tied to computer technology and cannot be implemented outside of a computing environment. For example, one or more processes performed by one or more embodiments described herein may provide for more efficient and more feasible execution of programs and / or program instructions, such as those relating to RF signal generation and / or waveform generation, as compared to existing systems and / or techniques. Systems, computer-implemented methods, and / or computer program products that enhance the performance of these processes would be highly useful in the field of quantum computing and superconducting quantum systems, but cannot be similarly practically implemented in a sensible manner outside of a computing environment.

[0097] One or more embodiments described herein may employ hardware and / or software to solve highly technical problems, problems that are not abstract, and problems that cannot be performed as a series of mental acts by a human. For example, a human, or even thousands of humans, cannot change the ratio of static bias to signal current and / or generate RF signals and / or waveforms as efficiently, accurately, and / or effectively as one or more embodiments described herein can facilitate this process. Also, neither the human mind nor a human using pen and paper can electronically perform such RF signals and / or generation and / or change static bias to signal current as performed by one or more embodiments described herein.

[0098] In one or more embodiments, one or more of the processes described herein may be executed by one or more specialized computers (e.g., specialized processing units, specialized classical computers, specialized quantum computers, specialized hybrid classical / quantum systems, or another type of specialized computer, or a combination thereof) to perform defined tasks associated with one or more of the techniques described above. One or more of the embodiments described herein, or components thereof, or both, may be employed to solve new problems that arise through the adoption of advances in the technologies described above, quantum computing systems, cloud computing systems, computer architectures, or another technology, or a combination thereof.

[0099] One or more embodiments described herein may be fully operational for the purposes of performing one or more operations described herein while also performing one or more other functions (e.g., fully powered on, fully running, or another function or combination thereof).

[0100] Turning now to Figures 8-10, additional contextual details are provided for one or more of the embodiments described herein in Figures 1-7.

[0101] FIG. 8 and the following discussion are intended to provide a brief, general description of a suitable operating environment 800 in which one or more embodiments described herein in FIGS. 1-7 may be implemented. For example, one or more components of the embodiments described herein or other elements may be implemented within or associated with the operating environment 800, such as through accessibility. Additionally, while one or more embodiments are described in the general context of computer-executable instructions that may be executed on one or more computers, those skilled in the art will recognize that one or more embodiments may be implemented in combination with other program modules or as a combination of hardware and software.

[0102] Generally, program modules include routines, programs, components, data structures, or the like, or combinations thereof, that perform particular tasks and / or implement particular abstract data types. Additionally, the methods of the present invention may be practiced with other computer system configurations, including single-processor or multi-processor computer systems, minicomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronics devices, or the like, or combinations thereof, each of which may be operatively coupled to one or more associated devices.

[0103] A computing device typically includes various media that may include computer-readable storage media, machine-readable storage media, and / or communication media, and the two terms are used differently from each other herein as follows. A computer-readable storage medium or machine-readable storage medium may be any available storage medium that can be accessed by a computer, and includes both volatile and nonvolatile media, both removable and non-removable media. By way of example and not limitation, a computer-readable storage medium or machine-readable storage medium or both may be implemented in association with any method or technology for storing information, such as computer-readable and / or machine-readable instructions, program modules, structured and / or unstructured data, etc.

[0104] A computer-readable storage medium may include, but is not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD ROM), digital versatile disk (DVD), Blu-ray disk (BD) and / or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage and / or other magnetic storage devices, solid state drives or other solid state storage devices, and / or other tangible and / or non-transitory media that may be used to store the specified information. In this regard, the terms "tangible" or "non-transitory" herein as applied to storage, memory, or computer-readable medium or combinations thereof may, as qualifiers, exclude only the propagating, transitory signal itself, and are not intended to waive the right to all standard storage, memory, or computer-readable medium or combinations thereof that are not merely the propagating, transitory signal itself.

[0105] A computer-readable storage medium may be accessed by one or more local or remote computing devices for various operations on the information stored by the medium, for example, via access requests, queries, or other data retrieval protocols or combinations thereof.

[0106] Communication media typically embodies computer readable instructions, data structures, program modules, or other structured or unstructured data in a data signal, such as a modulated data signal, e.g., carrier wave or other transport mechanism, and includes any information delivery or transmission media. The term "modulated data signal" refers to a signal that has one or more of its characteristics set and / or changed in such a manner as to encode information in the signal or signals. By way of example, and not limitation, communication media can include wired media such as a wired network or direct-wired connection, and / or wireless media such as acoustic, RF, infrared and / or other wireless media.

[0107] 8, an exemplary operating environment 800 for implementing one or more embodiments of the elements described herein can include a computer 802 including a processing unit 806, a system memory 804, and / or a system bus 808. One or more elements, factors, or functions of the processing unit 806, or a combination thereof, can apply to a processor, such as 106, of the non-limiting system 100. The processing unit 806 can be implemented in combination with a processor, such as 106, or as a replacement for a processor, or both.

[0108] Memory 804 may store one or more computer- and / or machine-readable, writeable, and / or executable components and / or instructions that, when executed by processing unit 806 (e.g., a classical processor, a quantum controller, or a similar processor, or a combination thereof), can facilitate performance of operations defined by the executable components and / or instructions. For example, memory 804 may store computer- and / or machine-readable, writeable, and / or executable components and / or instructions that, when executed by processing unit 806, can facilitate performance of one or more functions described herein in connection with non-limiting system 100 as described herein with or without reference to one or more figures of one or more embodiments.

[0109] The memory 804 may include volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), and / or the like) and / or non-volatile memory (e.g., read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), and / or the like), which may employ one or more memory architectures.

[0110] The processing unit 806 may comprise one or more types of processors and / or electronic circuitry (e.g., classical processors, quantum controllers, or similar processors or combinations thereof) that may implement one or more computer and / or machine readable, writeable, and / or executable components and / or instructions that may be stored in the memory 804. For example, the processing unit 806 may perform one or more operations that may be specified by computer and / or machine readable, writeable, and / or executable components and / or instructions, including but not limited to logic, control, input / output (I / O), arithmetic, or the like or combinations thereof. In one or more embodiments, the processing unit 806 may be any one or more commercially available processors. In one or more embodiments, the processing unit 806 may include one or more central processing units, multi-core processors, microprocessors, dual microprocessors, microcontrollers, systems on chips (SOCs), array processors, vector processors, quantum controllers, or another type of processor or combinations thereof. Examples of the processing unit 806 may be employed to implement one or more embodiments described herein.

[0111] The system bus 808 may couple system components, including but not limited to the system memory 804, to the processing unit 806. The system bus 808 may comprise one or more types of bus structures that may be further interconnected to a memory bus (with or without a memory controller), a peripheral bus, and / or a local bus using one or more of a variety of commercially available bus architectures. The system memory 804 may include a ROM 810 and / or a RAM 812. A basic input / output system (BIOS) may be stored in non-volatile memory, such as a ROM, an erasable programmable read-only memory (EPROM), or an EEPROM, or a combination thereof, and the BIOS contains basic routines that help to transfer information between elements within the computer 802, such as during start-up. The RAM 812 may include a high-speed RAM, such as a static RAM, for caching data.

[0112] The computer 802 may include an internal hard disk drive (HDD) 814 (e.g., EIDE, SATA), one or more external storage devices 816 (e.g., a magnetic floppy disk drive (FDD), a memory stick or flash drive reader, a memory card reader, and / or the like), and / or a drive 820, such as a solid state drive or optical disk drive that can read from or write to a disk 822, such as a CD-ROM disk, a DVD, a BD, and / or the like. Additionally, or alternatively, or both, where a solid state drive is involved, the disk 822 may not be included unless separate. Although the internal HDD 814 is shown as being located within the computer 802, the internal HDD 814 may also be configured for external use within a suitable chassis (not shown). Additionally, although not shown in the operating environment 800, a solid state drive (SSD) may be used in addition to or in place of the HDD 814. The HDD 814, external storage device 816, and drive 820 may be connected to the system bus 808 by a HDD interface 824, an external storage interface 826, and a drive interface 828, respectively. The HDD interface 824 for external drive implementations may include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are contemplated by the embodiments described herein.

[0113] The drives and their associated computer-readable storage media provide non-volatile storage of data, data structures, computer-executable instructions, and the like. In the case of computer 802, the drives and storage media accommodate the storage of any data in a suitable digital format. Although the above description of computer-readable storage media refers to each type of storage device, other types of computer-readable storage media, whether currently existing or developed in the future, may also be used in the exemplary operating environment and / or any such storage media may include computer-executable instructions for performing the methods described herein.

[0114] A number of program modules, including an operating system 830, one or more applications 832, other program modules 834, and / or program data 836, may be stored in the drives and RAM 812. All or portions of the operating system, applications, modules, and / or data may also be cached in RAM 812. The systems and / or methods described herein may be implemented using one or more commercially available operating systems and / or combinations of operating systems.

[0115] Computer 802 may optionally include emulation technology. For example, a hypervisor (not shown) or other intermediary may emulate the hardware environment of operating system 830, and the emulated hardware may optionally be different than the hardware shown in FIG. 8. In a related embodiment, operating system 830 may include one of a number of virtual machines (VMs) hosted on computer 802. Additionally, operating system 830 may provide a runtime environment, such as the JAVA® runtime environment or the .NET framework, for application 832. The runtime environment is a consistent execution environment that allows application 832 to run on any operating system that includes the runtime environment. Similarly, operating system 830 may support containers, and application 832 may take the form of a container, which is a lightweight, standalone executable software package that includes, for example, code, runtime, system tools, system libraries, and / or settings for the application.

[0116] Additionally, computer 802 may be enabled with a security module, such as a Trusted Processing Module (TPM). For example, with a TPM, a boot component hashes the next boot component and waits until the result matches a protected value before loading the next boot component. This process can occur at any layer in the code execution stack of computer 802, for example, it can be applied at the application execution level or the operating system (OS) kernel level or both, thereby enabling security at any level of code execution.

[0117] An entity may input and / or transmit commands and / or information to the computer 802 via one or more wired / wireless input devices, such as a keyboard 838, a touch screen 840, and / or a pointing device such as a mouse 842. Other input devices (not shown) may include a microphone, an infrared (IR) remote control, a radio frequency (RF) remote control, and / or other remote controls, a joystick, a virtual reality controller and / or a virtual reality headset, a game pad, a stylus pen, an image input device such as a camera, a gesture sensor input device, a visual motion sensor input device, an emotion or face detection device, a biometric input device such as a fingerprint and / or iris scanner, and / or the like. These and other input devices may be connected to the processing unit 806 via an input device interface 844 which may be coupled to the system bus 808, but may also be connected by other interfaces such as a parallel port, an IEEE 1394 serial port, a game port, a USB port, an IR interface, a BLUETOOTH(R) interface, or the like or combinations thereof.

[0118] Alternatively, or additionally, or both, a monitor 846 or other type of display device may be connected to the system bus 808 via an interface, such as a video adapter 848. In addition to the monitor 846, computers typically include other peripheral output devices (not shown), such as speakers, printers, or the like or a combination thereof.

[0119] The computer 802 can operate in a networked environment using logical connections via wired and / or wireless communications to one or more remote computers, such as a remote computer 850. The remote computer 850 can be a workstation, server computer, router, personal computer, portable computer, microprocessor-based entertainment appliance, peer device, or other common network node, or combination thereof, and typically includes many or all of the elements described with respect to the computer 802, although for simplicity, only the memory / storage device 852 is shown. Additionally or alternatively, or both, the computer 802 can be coupled (e.g., communicatively, electrically, operatively, optically, or the like or combinations thereof) to one or more external systems, sources, or devices, or combinations thereof (e.g., classical and / or quantum computing devices, communication devices, and / or the like) via a data cable (e.g., a high-definition multimedia interface (HDMI®), recommended standard (RS) 232, Ethernet® cable, or the like or combinations thereof).

[0120] In one or more embodiments, the network may include one or more wired and / or wireless networks, including, but not limited to, a cellular network, a wide area network (WAN) (e.g., the Internet), or a local area network (LAN). For example, one or more embodiments described herein may communicate with one or more external systems, sources, or devices, such as computing devices, or combinations thereof, using substantially any specified wired or wireless technology, including, but not limited to, Wireless Fidelity (Wi-Fi), Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX), Enhanced General Packet Radio Service (Enhanced GPRS), Long Term Evolution (LTE) of the Third Generation Partnership Project (3GPP), Ultra Mobile Broadband (UMB) of the Third Generation Partnership Project 2 (3GPP2), High Speed ​​Packet Access (HSPA), Zigbee and other 802.XX wireless technologies and / or legacy communication technologies, BLUETOOTH®, Session Initiation Protocol (SIP), ZIGBEE®, RF4CE protocol, WirelessHART protocol, 6LoWPAN (IPv6 over Low power Wireless These include, but are not limited to, IEEE 802.11b ...In a related example, one or more embodiments described herein may include hardware (e.g., a central processing unit (CPU), a transceiver, a decoder, quantum hardware, a quantum controller, and / or the like), software (e.g., a set of threads, a set of processes, running software, quantum pulse schedules, quantum circuits, quantum gates, and / or the like), and / or a combination of hardware and / or software that facilitates communicating information between one or more embodiments described herein and external systems, sources, and / or devices (e.g., computing devices, communications devices, and / or the like).

[0121] The logical connections depicted include wired / wireless connections to a local area network (LAN) 854 or larger networks, such as a wide area network (WAN) 856 or both. LAN and WAN networking environments are commonplace in offices and companies and can facilitate enterprise-wide computer networks, such as an intranet, all of which may connect to a global communications network, such as the Internet.

[0122] When used in a LAN networking environment, the computer 802 may be connected to the local network 854 through a wired and / or wireless communication network interface or adapter 858. The adapter 858 may facilitate wired and / or wireless communication to the LAN 854, which may also include a wireless access point (AP) disposed to communicate with the adapter 858 in a wireless mode.

[0123] When used in a WAN networking environment, the computer 802 may include a modem 860 or may be connected by other means for establishing communications over the WAN 856, such as via the Internet to a communications server on the WAN 856, or both. The modem 860 may be internal or external, and may be a wired or wireless device, or both, and may be connected to the system bus 808 via the input device interface 844. In a networked environment, program modules depicted relative to the computer 802, or portions thereof, may be stored in a remote memory / storage device 852. The network connections shown are merely exemplary and one or more other means of establishing a communications link between the computers may be used.

[0124] When used in either a LAN or WAN networking environment, the computer 802 may access a cloud storage system or other network-based storage system, such as, but not limited to, a networked virtual machine that provides one or more elements of information storage and / or processing, in addition to or instead of the external storage device 816 as described above. In general, a connection between the computer 802 and the cloud storage system may be established over the LAN 854 or WAN 856, for example, by an adapter 858 or modem 860, respectively. Upon connecting the computer 802 to an associated cloud storage system, the external storage interface 826 may manage the storage provided by the cloud storage system in the same manner as other types of external storage, such as by utilizing the adapter 858 or modem 860, or both. For example, the external storage interface 826 may be configured to provide access to the cloud storage sources as if the cloud storage sources were physically connected to the computer 802.

[0125] The computer 802 is operable to communicate with any wireless device or entity operatively disposed in wireless communication, or both, such as printers, scanners, desktop and / or portable computers, portable data assistants, communications satellites, telephones, and / or any equipment or location associated with a wirelessly detectable tag, such as a kiosk, news stand, store shelf, and / or the like. This can include Wireless Fidelity (Wi-Fi) and BLUETOOTH® wireless technologies. Thus, communication can be of a predefined structure, similar to a traditional network, or simply ad-hoc communication between at least two devices.

[0126] The illustrated embodiments described herein may be employed in conjunction with distributed computing environments (e.g., cloud computing environments), such as those described below with respect to Figure 9, where certain tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in local and / or remote memory storage devices.

[0127] For example, one or more embodiments or one or more components thereof described herein may employ one or more computing resources of a cloud computing environment 950, described below with reference to FIG. 9, and / or one or more functional abstraction layers (e.g., quantum software, and / or the like), described below with reference to FIG. 10, to perform one or more operations according to one or more embodiments described herein. For example, cloud computing environment 950 and / or one or more of functional abstraction layers 1060, 1070, 1080 and / or 1090 may include one or more classical computing devices (e.g., classical computers, classical processors, virtual machines, servers, and / or the like), quantum hardware and / or quantum software (e.g., quantum computing devices, quantum computers, quantum controllers, quantum circuit simulation software, superconducting circuits, and / or the like), that may be employed by one or more embodiments or components thereof described herein to perform one or more operations according to one or more embodiments described herein. For example, one or more embodiments or components thereof described herein may employ one or more such classical and / or quantum computing resources to perform one or more classical and / or quantum mathematical functions, calculations and / or equations, calculations and / or processing scripts, algorithms, models (e.g., artificial intelligence (AI) models, machine learning (ML) models, and / or the like), and / or other operations according to one or more embodiments described herein.

[0128] Although one or more embodiments described herein include detailed descriptions of cloud computing, implementation of the teachings described herein is not limited to a cloud computing environment. Rather, one or more embodiments described herein can be implemented in conjunction with any other type of computing environment now known or later developed.

[0129] Cloud computing is a service delivery model for enabling convenient, on-demand network access to a shared pool of configurable computational resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and / or services) and for rapidly provisioning and releasing these resources with minimal administrative effort or interaction with the service provider. This cloud model can include at least five characteristics, at least three service models, and at least four deployment models.

[0130] Its features are as follows:

[0131] On-Demand Self-Service: Cloud customers can automatically provision server time and computing power, such as network storage, as needed, without the need for unilateral human interaction with the service provider.

[0132] Broad Network Access: The capability is available over the network and can be accessed using standard mechanisms, facilitating use by heterogeneous thin-client or thick-client platforms (e.g., cell phones, laptops, and PDAs).

[0133] Resource Pool: The provider's computing resources are pooled and offered to multiple consumers using a multi-tenant model, with various physical and virtual resources dynamically allocated and reallocated according to demand. Consumers typically have a sense of location independence in that they have no control or knowledge regarding the exact location of the resources offered to them, although at a higher level of abstraction they may specify a location (e.g., country, state, and / or data center).

[0134] Rapid Elasticity: Capacity can be rapidly and elastically provisioned automatically in one or more cases, quickly scaled out, and quickly released to quickly scale in. Capacity available for provisioning appears to the consumer as unlimited, available for purchase in any quantity at any time.

[0135] Metering of Services: Cloud systems leverage metering capabilities to automatically control and optimize resource usage at one or more levels of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, and / or active user accounts). Resource usage can be monitored, controlled, and / or reported, providing transparency to both providers and consumers of the services utilized.

[0136] The service model is as follows:

[0137] SaaS (Software as a Service): The capability provided to the consumer is the use of the provider's applications running on a cloud infrastructure. Those applications can be accessed from a variety of client devices through thin-client interfaces such as web browsers (e.g., web-based email). The consumer does not manage or control the underlying cloud infrastructure, including the network, servers, operating systems, storage, or individual application functionality or any combination thereof, except for the possibility of limited user-specific application configuration settings.

[0138] PaaS (Platform as a Service): The capability provided to a customer is to deploy applications that the customer creates or acquires, written using programming languages ​​and tools supported by the provider, onto a cloud infrastructure. The customer does not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, and / or storage, but does have control over the deployed applications and, in some cases, the configuration of the application hosting environment.

[0139] Infrastructure as a Service (IaaS): The capability provided to a customer is the provisioning of processing, storage, network, or other basic computing resources, or a combination thereof, onto which the customer can deploy and run any software, which may include operating systems and applications. The customer does not manage or control the underlying cloud infrastructure, but has control over the operating systems, storage, deployed applications, and / or in some cases limited control over selected network components (e.g., host firewalls).

[0140] The deployment model is as follows:

[0141] Private Cloud: The cloud infrastructure is operated solely for the organization. It can be managed by the organization or a third party and can reside on-premise or off-premise.

[0142] Community Cloud: The cloud infrastructure is shared by multiple organizations to support a specific community with shared concerns (e.g., mission, security requirements, policy and / or compliance considerations). The cloud infrastructure can be managed by the organizations or a third party and can reside on-premise or off-premise.

[0143] Public Cloud: This cloud infrastructure is available for use by general users or large industry organizations and is owned by an organization that sells cloud services.

[0144] Hybrid Cloud: This cloud infrastructure is a combination of two or more clouds (private, community, or public) that remain unique entities but are joined together by standardized or proprietary technologies that allow data and application portability (e.g. cloud bursting to balance the load between clouds).

[0145] A cloud computing environment is a service-oriented environment with an emphasis on statelessness, low coupling, modularity, and / or semantic interoperability. At the heart of cloud computing is an infrastructure that includes a network of interconnected nodes.

[0146] Additionally, the non-limiting system 100 and / or the exemplary operating environment 800 may be associated with and / or included within a data analysis system, a data processing system, a graph analysis system, a graph processing system, a big data system, a social network system, a voice recognition system, an image recognition system, a graphical modeling system, a bioinformatics system, a data compression system, an artificial intelligence system, an authentication system, a syntactic pattern recognition system, a medical system, a health monitoring system, a network system, a computer network system, a communication system, a router system, a server system, a high availability server system (e.g., a telecom server system), a web server system, a file server system, a data server system, a disk array system, a powered insertion board system, a cloud-based system, or the like or any combination thereof. Accordingly, the non-limiting system 100 and / or exemplary operating environment 800 may be employed using hardware and / or software to solve problems that are highly technical in nature, that are not abstract, or that cannot be implemented as a series of mental acts by a human being, or a combination thereof.

[0147] Referring now to details of one or more elements depicted in FIG. 9, an exemplary cloud computing environment 950 is shown. As shown, the cloud computing environment 950 includes one or more cloud computing nodes 910 with which local computing devices used by the cloud users, such as, for example, a personal digital assistant (PDA) or mobile phone 954A, a desktop computer 954B, a laptop computer 954C, or an automobile computer system 954N, or combinations thereof, can communicate. Although not shown in FIG. 9, the cloud computing nodes 910 can further include a quantum platform (e.g., a quantum computer, quantum hardware, quantum software, or the like, or combinations thereof) with which local computing devices used by the cloud users can communicate. The cloud computing nodes 910 can communicate with each other. These nodes can be physically or virtually grouped (not shown) in one or more networks, such as a private cloud, a community cloud, a public cloud, or a hybrid cloud, or combinations thereof, as described herein above. This allows the cloud computing environment 950 to provide infrastructure, platform, and / or software as a service without the cloud consumer having to maintain resources on a local computing device. The types of computing devices 954A-954N shown in Figure 9 are intended to be illustrative only, and the computing nodes 910 and cloud computing environment 950 may communicate with any type of computerized device over any type of network and / or network addressable connections (e.g., using a web browser).

[0148] Referring now to details of one or more elements depicted in FIG. 10, a set of functional abstraction layers 1000 as provided by cloud computing environment 950 (FIG. 9) is shown. One or more embodiments described herein may be associated, such as through access to, one or more of the functional abstraction layers described below with reference to FIG. 10 (e.g., hardware and software layer 1060, virtualization layer 1070, management layer 1080, and / or workload layer 1090). The components, layers, and / or combinations of functions depicted in FIG. 10 are intended to be illustrative only, and the embodiments described herein are not limited thereto. As shown, the following layers and / or corresponding functions are provided:

[0149] Hardware and software layer 1060 may include hardware and software components. Examples of hardware components include mainframe 1061, RISC (reduced instruction set computer) architecture based servers 1062, servers 1063, blade servers 1064, storage devices 1065, and / or networks and / or networking components 1066. In one or more embodiments, the software components may include network application server software 1067, quantum platform routing software 1068, and / or quantum software (not shown in FIG. 10), or combinations thereof.

[0150] The virtualization layer 1070 may provide an abstraction layer from which the following examples of virtual entities may be provided: virtual servers 1071, virtual storage 1072, virtual networks including virtual private networks 1073, virtual applications and / or operating systems 1074, and / or virtual clients 1075.

[0151] In one example, the management layer 1080 may provide the functionality described below. Resource provisioning 1081 may provide dynamic procurement of computational and other resources that may be utilized to execute tasks within the cloud computing environment. Metering and pricing 1082 may provide cost tracking as resources are utilized within the cloud computing environment and / or charging and / or billing for the consumption of these resources. In one example, these resources may include one or more application software licenses. Security may provide identity verification for cloud consumers and / or tasks, as well as protection for data or other resources or / and. User (or entity) portal 1083 may provide consumers and system administrators with access to the cloud computing environment. Service level management 1084 may provide allocation and / or management of cloud computational resources such that requested service levels are met. Service level agreement (SLA) planning and fulfillment 1085 may provide pre-positioning and procurement of cloud computational resources anticipated to be required in the future in accordance with the SLAs.

[0152] The workload tier 1090 may provide examples of functions for which a cloud computing environment may be utilized. Non-limiting examples of workloads and functions that may be provided from this tier include mapping and navigation 1091, software development and lifecycle management 1092, virtual classroom instructional delivery 1093, data analytics processing 1094, transaction processing 1095, or application transformation software 1096, or any combination thereof.

[0153] The embodiments described herein may be directed to one or more of a system, method, apparatus, or computer program product, or combination thereof, integrated at any possible level of technical detail. The computer program product may include a computer readable storage medium (or multiple computer readable storage media) having computer readable program instructions for causing a processor to implement one or more elements / portions of one or more embodiments described herein. A computer readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, or a superconducting storage device, or any suitable combination of the above. A non-exhaustive list of more specific examples of computer readable storage media may include the following: portable computer diskettes, hard disks, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, or mechanically encoded devices such as punch cards or raised structures in grooves with instructions recorded thereon, or any suitable combination of the above. As used herein, computer readable storage media should not be construed as being ephemeral signals per se, such as radio waves and / or other freely propagating electromagnetic waves, electromagnetic waves propagating through wave guides and / or other transmission media (e.g., light pulses through fiber optic cables), and / or electrical signals transmitted over electrical wires.

[0154] The computer readable program instructions described herein may be downloaded from a computer readable storage medium to each computing / processing device and / or to an external computer or storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fiber, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer readable program instructions from the network and forwards the computer readable program instructions to a computer readable storage medium within the respective computing / processing device for storage. The computer readable program instructions for carrying out the operations of one or more embodiments described herein may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, and / or source and / or object code written in any combination of one or more programming languages, including object oriented programming languages ​​such as Smalltalk®, C++, and / or procedural programming languages ​​such as the “C” programming language and / or similar programming languages. The computer readable program instructions may be executed entirely on the computer, partially on the computer, partially on the computer and / or partially on a remote computer, or entirely on a remote computer and / or server, as a standalone software package.In the latter scenario, the remote computer may be connected to the computer via any type of network, including a local area network (LAN) and / or a wide area network (WAN), and / or a connection may be made to an external computer (e.g., via the Internet using an Internet Service Provider). In one or more embodiments, electronic circuitry including, for example, programmable logic circuitry, field programmable gate arrays (FPGAs), and / or programmable logic arrays (PLAs), may execute computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry to perform one or more portions of one or more embodiments described herein.

[0155] One or more portions of one or more embodiments described herein are described with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to one or more embodiments described herein. Each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, may be implemented by computer-readable program instructions. These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, or a combination thereof, such that the instructions, executed via a processor of the computer or other programmable data processing device, can create means for performing the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams to create a machine. These computer-readable program instructions may also be stored on a computer-readable medium to instruct a computer, programmable data processing device, or other device, or a combination thereof, to function in a particular manner, such that a computer-readable storage medium on which the instructions are stored can include an article of manufacture including instructions that can perform one or more portions of the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams. The computer readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device, or combination thereof, to produce a computer-implemented process that causes a series of operational actions to be performed on the computer, other programmable apparatus, or other device, or combination thereof, such that the instructions, which execute on the computer, other programmable apparatus, or other device, or combination thereof, perform the functions / actions specified in one or more blocks of the flowcharts and / or block diagrams.

[0156] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and / or operation of possible implementations of a system, computer-implemented method, or computer program product, or combination thereof, according to one or more embodiments described herein. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, or combination thereof, including one or more executable instructions for performing a specified logical function. In one or more alternative implementations, the functions described in the blocks may occur in an order different from that described in the figures. For example, depending on the functionality involved, two blocks shown in succession may be executed substantially simultaneously, or the blocks may be executed in reverse order, or both. It should also be noted that each block of the block diagrams and / or flowcharts, and / or combinations of blocks in the block diagrams and / or flowcharts may be implemented by a dedicated hardware-based system capable of performing the specified functions and / or acts and / or implementing one or more combinations of dedicated hardware and / or computer instructions.

[0157] Although the subject matter has been described above in the general context of computer-executable instructions for a computer program product executed on one or more computers, those skilled in the art will appreciate that one or more embodiments herein may be implemented in combination with one or more other program modules. Generally, a program module includes routines, programs, components, data structures, or the like, or combinations thereof, that perform particular tasks and / or implement particular abstract data types. Additionally, the computer-implemented methods of the present invention may be practiced with single-processor and / or multi-processor computer systems, minicomputing devices, mainframe computers, and other computer system configurations, including computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer and / or industrial electronic devices, and / or the like. The illustrated elements may also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, one or more, if not all elements of one or more embodiments described herein may be practiced on stand-alone computers. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0158] As used in this application, the terms "component", "system", "platform", "interface", or combinations of similar terms, may refer to and / or include computer-related entities having one or more specific functionalities or entities related to a computing machine. The entities described herein may be either hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, or a computer, or combinations thereof. By way of example, both an application running on a server and the server may be a component. One or more components may reside within a process and / or thread of execution, and a component may be localized on one computer or distributed between two or more computers, or both. In another example, each component may execute from various computer-readable media having various data structures stored thereon. A component may communicate via local and / or remote processes, such as according to a signal having one or more data packets (e.g., data from one component interacting via a signal with another component in a local or distributed system, or with other systems via a network such as the Internet, or both). As another example, a component may be a device having a particular function provided by mechanical parts operated by electrical or electronic circuits, which are operated by software and / or firmware applications executed by a processor. In such instances, the processor may be internal and / or external to the device and may execute at least a portion of the software and / or firmware applications.As yet another example, a component may be a device that provides a particular functionality without mechanical parts via electronic components, which may include a processor and / or other means for executing software and / or firmware that at least partially provides the functionality of the electronic component. A component may emulate an electronic component via a virtual machine, for example in a cloud computing system.

[0159] Furthermore, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X employs A or B" is intended to mean any of the natural inclusive permutations. That is, if X employs A, X employs B, or X employs both A and B, then "X employs A or B" is satisfied in any of the above cases. Furthermore, the articles "a" and "an" used in this specification and the accompanying drawings should generally be construed to mean "one or more", unless otherwise specified or clear from the context to be intended in the singular form. As used herein, the terms "example" and / or "exemplary" are utilized to serve as examples, instances, or illustrations. For the avoidance of doubt, the subject matter described herein is not limited to such examples. Moreover, any element or design described herein as "example" and / or "exemplary" is not to be construed as necessarily preferred or advantageous over one or more other elements and / or designs, and is not meant to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0160] The term "processor", as employed herein, may refer to substantially any computing processing unit or device, including, but not limited to, a single core processor, a single processor with software multithreaded execution capability, a multicore processor, a multicore processor with software multithreaded execution capability, a multicore processor with hardware multithreading technology, a parallel platform, or a parallel platform with distributed shared memory, or any combination thereof. Additionally, a processor may refer to an integrated circuit, an application specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), or discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. A processor may also utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot based transistors, switches, or gates, or combinations thereof, to optimize space usage or to enhance the performance of associated equipment, or both. A processor may be implemented as a combination of computing processing units.

[0161] As used herein, terms such as "store," "storage," "data store," "data storage," "database," and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a "memory component," an entity embodied in a "memory," or a component that includes a memory. The memory and / or memory components described herein can be either volatile or non-volatile memory, or can include both volatile and non-volatile memory. By way of example and not limitation, non-volatile memory can include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)), or combinations thereof. Volatile memory can include, for example, RAM, which may act as an external cache memory. By way of example, and not limitation, RAM may be available in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), SyncLink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and / or Rambus dynamic RAM (RDRAM), etc. Additionally, the memory components described in the systems and / or computer-implemented methods herein are intended to include, but are not limited to, these or any other suitable types of memory or both.

[0162] The above description includes only examples of systems and computer-implemented methods. Of course, it is not possible to describe every conceivable combination of components and / or computer-implemented methods to describe one or more embodiments, but one of ordinary skill in the art can appreciate that many further combinations and / or permutations of one or more embodiments are possible. Furthermore, to the extent that terms such as "including," "having," "possessing," and the like are used in the detailed description, claims, appendices, and / or drawings, such terms are intended to be inclusive in the same manner as the term "comprising" is interpreted when used as a transitional term in the claims.

[0163] The description of one or more embodiments is presented for illustrative purposes, but is not intended to be exhaustive or limited to the embodiments described herein. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, and / or technical improvements over the art found in the market, and / or to enable those skilled in the art to understand the embodiments described herein.

Claims

1. A device, comprising: a baseband filter and an output stage defining a current mode signal path; a current source and a diode-connected transistor arranged in parallel in the current-mode signal path; A device wherein the diode-connected transistor is selectively adjustable to vary gain.

2. The device of claim 1 , wherein the current source passes a static current and the diode-connected transistor passes both static and dynamic current.

3. 3. The device of claim 2, wherein the current source is programmable to adjust static to dynamic current ratios in the diode-connected transistor and in the output stage.

4. 2. The device of claim 1, wherein the output stage comprises two or more transistors of the same negative or positive type as the type of the diode-connected transistor.

5. 2. The device of claim 1, wherein the diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

6. The output stage comprises: The device of claim 1 comprising an up-converting mixer that generates a radio frequency output signal.

7. 3. The device of claim 2, wherein the current-mode signal path facilitates a lower static-to-dynamic current ratio in the output stage than in the baseband filter.

8. 1. A method comprising: outputting a radio frequency output signal by a radio frequency (RF) pulse generator operably coupled to the quantum processor, the RF pulse generator device comprising: a baseband filter and an output stage defining a current mode signal path; a current source and a diode-connected transistor arranged in parallel in the current-mode signal path; The method wherein the diode-connected transistor is programmable to vary gain.

9. splitting, by the RF pulse generator, a current from the baseband filter between the current source and the diode-connected transistor; passing a static current in the current source by the RF pulse generator; passing both static and dynamic current through said diode-connected transistor with said RF pulse generator; The method of claim 8 further comprising:

10. 10. The method of claim 9, further comprising varying the static to dynamic current ratio in the diode-connected transistor with the RF pulse generator.

11. 9. The method of claim 8, further comprising outputting the radio frequency output signal by the RF pulse generator without connection of a turnaround current mirror connected between the diode-connected transistor and the output stage.

12. 9. The method of claim 8, further comprising generating the radio frequency output at an upconverting mixer of the output stage with the RF pulse generator.

13. 10. The method of claim 9, further comprising facilitating a lower static to dynamic current ratio in the output stage than in the baseband filter by the RF pulse generator.

14. 9. The method of claim 8, further comprising producing, by the RF pulse generator, the output signal from the output stage referenced to ground.

15. 1. A system comprising: A quantum controller; a radio frequency (RF) pulse generator controlled by the quantum controller, the RF pulse generator comprising: a baseband filter and an output stage defining a current mode signal path; a current source and a diode-connected transistor arranged in parallel in the current-mode signal path; The system wherein the diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the diode-connected transistor and the output stage.

16. 16. The system of claim 15, wherein the current source passes a static current and the diode-connected transistor passes both static and dynamic current.

17. 16. The system of claim 15, wherein the diode-connected transistor is programmable to vary gain.

18. 16. The system of claim 15, wherein the output stage comprises two or more transistors that are the same negative or positive type as the type of the diode-connected transistor.

19. 16. The system of claim 15, wherein the output stage comprises an up-converting mixer that generates a radio frequency output signal.

20. 17. The system of claim 16, wherein the current-mode signal path produces a lower static-to-dynamic current ratio in the output stage than the baseband filter.

21. 17. The system of claim 16, wherein the current source is programmable to adjust a static to dynamic current ratio in the diode-connected transistor and in the output stage.

22. A device, comprising: a baseband filter and an output stage defining a current mode signal path; a current source and a programmable diode-connected transistor in the current-mode signal path; A device wherein the output stage comprises a pair of output stage portions connected in parallel, the programmable diode-connected transistor being directly connected to one of the output stage portions.

23. 23. The device of claim 22, wherein the current source passes a selectable static current and the programmable diode-connected transistor passes both static and dynamic current, resulting in a selectable gain.

24. A device, comprising: a baseband filter and an output stage defining a current mode signal path; a programmable current source and a programmable diode-connected transistor arranged in parallel in the current-mode signal path; A device wherein the programmable diode-connected transistor is directly connected to the output stage without a turnaround current mirror connected between the programmable diode-connected transistor and the output stage.

25. 25. The device of claim 24, wherein the programmable current source passes a selectable static current and the programmable diode-connected transistor passes both static and dynamic current, resulting in a selectable gain.

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