Improved layer uniformity in deposition-interference-deposition processes

Abstract

Disclosed herein is a process tool including a wafer chuck and a showerhead. In at least one embodiment, the wafer chuck is coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead. In at least one embodiment, a carrier ring is between the wafer chuck and the showerhead. In at least one embodiment, the carrier ring includes an overhang that extends above an edge of a wafer on the wafer chuck. In at least one embodiment, the carrier ring is mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck.

Description

[Background technology]

[0001] [Priority claim] This application claims priority to and incorporates in its entirety U.S. Provisional Application No. 63 / 268,771, filed March 2, 2022, and entitled “LAYER UNIFORMITY IMPROVEMENT OF DEPOSITION-INHIBITION-DEPOSITION PROCESS.”

[0002] Processing tools are used to perform processes such as depositing and etching films on substrates such as semiconductor wafers. For example, deposition may be performed to deposit conductive films, dielectric films, or other types of films using chemical vapor deposition (CVD), plasma-enhanced CVD (PECVD), atomic layer deposition (ALD), plasma-enhanced ALD (PEALD), and / or other deposition processes. Deposition may be performed in a wafer processing chamber, such as a PECVD chamber that includes multiple stations for processing multiple wafers at once.

[0003] Multi-station semiconductor processing tools may employ a carrier ring to transport the wafer substrate between stations. The carrier ring may remain with the wafer until the process is completed and then either carry the wafer to the next station or be removed by a transfer paddle that takes the wafer to a loading dock. Some CVD or PECVD tools may employ a carrier ring to prevent unwanted deposition on the edge or backside of the wafer. Some carrier rings may have a slightly larger diameter than the wafer to shield the periphery and backside from the deposition vapor. Without such peripheral shielding, nucleation of deposition material on both the periphery and backside of the wafer may be promoted, resulting in faster layer growth than growth within the interior regions of the wafer substrate. Layer thickness uniformity on the front side of the wafer may be compromised, and the deposited layer may be thicker near the edge of the substrate than in the center. Other processes may include an inhibitor step to prevent the formation of voids caused by rapid growth of material at the tops of high aspect ratio trenches or holes. By using the same ring to shield the periphery, inhibitors of layer growth may not reach the peripheral region of the wafer substrate, resulting in voids at the periphery of the layer. As a result, the non-uniformity of the layer may increase. One solution is to have the ability to replace one ring or use well-tuned ring dimensions at each process station to accommodate different processes. This solution is rarely practical, since multiple rings with unique designs are required to perform many different processes in the same process tool. [Brief description of the drawings]

[0004] The materials described herein are illustrative and not limiting in the accompanying drawings. For simplicity and clarity of illustration, elements shown in the drawings are not necessarily drawn to scale. For example, dimensions of some elements may be exaggerated relative to other elements for clarity. Also, various physical features may be represented in simplified "ideal" forms and shapes for clarity of discussion, but it should nevertheless be understood that actual embodiments may only approximate the illustrated ideals. For example, smooth surfaces and square intersections may be depicted while ignoring the finite roughness, corner rounding, and imperfect corner intersection characteristics characteristic of structures formed by nanofabrication techniques. Additionally, where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or similar elements.

[0005] [Figure 1] FIG. 1 illustrates a cross-sectional view of a process chamber according to at least one embodiment.

[0006] [Diagram 2] FIG. 2 shows a top view of a single process gas showerhead including a square open hole pattern according to at least one embodiment.

[0007] [Diagram 3] FIG. 3 shows a top view of a showerhead including a dual interpenetrating aperture hole pattern for distributing two process gases according to at least one embodiment.

[0008] [Figure 4A] FIG. 4A shows a top view of the interior of a dual plenum showerhead according to at least one embodiment.

[0009] [Figure 4B] FIG. 4B shows a cross-sectional view of an interior portion of the dual plenum showerhead shown in FIG. 4A according to at least one embodiment.

[0010] [Diagram 5] FIG. 5 illustrates a cross-sectional view of a semiconductor processing tool including the process chamber of FIG. 1 according to at least one embodiment.

[0011] [Figure 6] FIG. 6 illustrates a top view of a semiconductor processing tool including multiple processing stations in accordance with at least one embodiment.

[0012] [Figure 7A] FIG. 7A shows a cross-sectional view of a process chamber including a moveable wafer chuck and carrier ring at one position during processing in accordance with at least one embodiment. [Figure 7B] FIG. 7B shows a cross-sectional view of a process chamber including a moveable wafer chuck and carrier ring at one position during processing in accordance with at least one embodiment. [Figure 7C] FIG. 7C shows a cross-sectional view of a process chamber including a moveable wafer chuck and carrier ring at one position during processing in accordance with at least one embodiment. [Figure 7D] FIG. 7D shows a cross-sectional view of a process chamber including a moveable wafer chuck and carrier ring at one position during processing in accordance with at least one embodiment.

[0013] [Figure 8] FIG. 8 illustrates an example process flow diagram for a multi-station process tool implementing parallel processes in accordance with at least one embodiment.

[0014] [Figure 9] FIG. 9 illustrates an example process flow diagram of a method of operating a process chamber in accordance with at least one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Numerous specific details, such as construction schemes, are described herein to provide a thorough understanding of at least one embodiment. It will be apparent to one of ordinary skill in the art that at least one embodiment may be practiced in the absence of these specific details. In other instances, well-known features, such as gas line fittings, heating elements, and snap switches, are not described in detail in order to not unnecessarily obscure at least one embodiment. Additionally, it should be understood that at least one embodiment depicted in the figures is an illustrative representation and is not necessarily drawn to scale.

[0016] In some instances, well-known methods and devices are shown in block diagram form rather than in detail so as not to obscure at least one embodiment. Throughout this specification, references to "an embodiment," "at least one embodiment," or "some embodiments" mean that a particular feature, structure, function, or characteristic described in connection with an embodiment is included in at least one embodiment. Thus, the appearance of "in an embodiment," "at least one embodiment," "in an embodiment," or "some embodiments" in various places throughout this specification are not necessarily referring to the same embodiment. Furthermore, particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment if the particular features, structures, functions, or characteristics associated with the first and second embodiments are not mutually exclusive.

[0017] To address the above-mentioned limitations, methods and apparatus are disclosed for adjusting the distance between the wafer and the carrier ring (also referred to as wafer-ring gap, WRG, pedestal-ring gap, PRG), which, according to at least one embodiment, also includes adjusting the gap between the wafer and the showerhead (wafer-to-showerhead gap, WSG). According to at least one embodiment, the carrier ring may be raised or lowered to a desired z-height above the wafer by a spindle to which the carrier ring is coupled. In at least one embodiment, the spindle may be commanded to establish a first gap (hereinafter referred to as "wafer-ring gap" or "WRG"), defined as a specific distance (e.g., gap) between the wafer and the carrier ring.

[0018] In at least one embodiment, the WRG may be adjusted by commanding the spindle to move vertically to a specified z-height relative to the nominal position of the spindle. In at least one embodiment, the command may be coded in software executable by a processor (e.g., a microprocessor). In at least one embodiment, the software may include the command as binary instructions for the spindle that can be called by a process recipe subroutine stored in a memory coupled to the processor. In at least one embodiment, the processor may be integrated into a control module (e.g., a human-machine interface, HMI) as part of a process tool control module. In at least one embodiment, the carrier ring may be raised and lowered accordingly. In at least one embodiment, optimization of the WRG (WRG may also be referred to as pedestal-to-ring gap, PRG) may improve the uniformity of the deposition layer produced by CVD and PECVD processes. In at least one embodiment, the WRG may be increased during introduction of a film growth inhibiting gas to allow the inhibiting gas to flow to the outer periphery of the wafer. In at least one embodiment, the inhibiting gas can inhibit the growth of layers deposited at and near the edge of the wafer. As a result, in at least one embodiment, material deposition at the edge and backside of the wafer is inhibited. In at least one embodiment, by following this or a similar procedure, layer thickness uniformity may be improved by as much as 60%.

[0019] In at least one embodiment, tuning the WRG allows a single carrier ring design to be employed for several different processes (e.g., identical carrier rings deployed at each station in a multi-station process tool). In at least one embodiment, the process gas reaching the wafer periphery may be undesirable in some processes but desirable in other processes.

[0020] In at least one embodiment, the carrier ring is an annular ring positioned above the wafer. In at least one embodiment, the carrier ring may be substantially concentric with the wafer chuck. In at least one embodiment, the carrier ring may further include lower fingers that engage the wafer and lift the wafer from the wafer chuck. In at least one embodiment, the carrier ring has an inner lip that overhangs (at the inner diameter) the edge of the wafer. In at least one embodiment, the amount of overhang may be optimized. In at least one embodiment, the overhang of the inner lip relative to the outer edge of the wafer may shield the edge of the wafer from exposure to process gases. In at least one embodiment, the carrier ring may be placed directly on the wafer or elevated a small distance above the wafer to achieve such shielding.

[0021] In at least one embodiment, during CVD deposition, the wafer may be masked using an appropriate photomask or shadow mask to prevent deposition of material on the edge and backside of the wafer. In at least one embodiment, such edge growth may be faster than internal growth and cause non-uniformity in the final layer. In at least one case, an undesirable layer may also be formed on the backside of the wafer. In at least one embodiment, by providing a carrier ring with an appropriate overhang of the wafer periphery and an adjustable WRG, the wafer may not need to use a mask layer to avoid non-uniformity and backside deposition, saving time and extra cost. In at least one embodiment, the WRG may be reduced to a specified distance to reduce the flow of CVD process gases to the edge of the wafer.

[0022] In at least one embodiment, it may be desirable to flow one or more process gases to the edge of the wafer, where the process gas may chemically inhibit precursor nucleation. In at least one embodiment, initial crystal formation from the deposited film precursor may provide nucleation sites for layer growth. In at least one embodiment, precursor vapor impinging on the surface encounters the initial nanocrystals and further reacts with and crystallizes the nanocrystals themselves, causing them to grow into larger crystals that join together to form a dense or porous layer.

[0023] In at least one embodiment, nucleation may also occur within a previously deposited material layer. In at least one embodiment, a previously deposited layer may be etched to create a groove that is filled with a different material. In at least one embodiment, undesired nucleation of a second material may occur in the upper region of the groove sidewall, for example, causing further deposition of the second material to block the top of the groove instead of filling it, resulting in voids in the layer. In at least one embodiment, a nucleation inhibitor may be included in gas form as one of the process gases to prevent such occurrence.

[0024] The groove sidewalls may then be exposed to a nucleation inhibitor gas in a subsequent step to prevent growth only at the top of the groove during the second deposition, thereby preventing the formation of voids. In at least one embodiment, to promote flow of inhibitor to the outer periphery of the wafer, the WRG may be increased by raising the carrier ring via software or HMI commands sent to the spindle to raise its z-height by a specified amount relative to its nominal position.

[0025] In at least one embodiment, each station in the multi-station process tool may include a showerhead directly above each chuck. In at least one embodiment, process gases are ejected from a plurality of aperture holes in a faceplate of the showerhead (so named because of its resemblance to a household showerhead). In at least one embodiment, the aperture holes may be structured in any suitable manner, such as columns and rows. In at least one embodiment, the aperture holes may be arranged in a square array shape. In at least one embodiment, other suitable array shapes may be used, such as a hexagonal array shape. In at least one embodiment, the showerhead employed in the process tool is cylindrical and has a circular cross section. In at least one embodiment, the showerhead may have a square shape or other non-circular shape. In at least one embodiment, the showerhead may be positioned above the wafer chuck and may be concentric with the wafer chuck. In at least one embodiment, there may be a showerhead in the multi-station process tool. In at least one embodiment, each showerhead may be positioned above a respective pedestal.

[0026] In at least one embodiment, the wafer chuck may include a platen on which the wafer rests and is clamped. In at least one embodiment, clamping of the wafer to the chuck may be accomplished by electrostatic clamping (ESC) or vacuum clamping (lower pressure on the backside of the wafer compared to the frontside of the wafer). Here, a "column" may generally refer to an elongated tubular housing for passing cables, wires, and vacuum and gas delivery tubes. The chuck may be attached to the column. In at least one embodiment, the pedestal includes a chuck and column combination. In at least one embodiment, cables, wire vacuum lines, and gas tubes housed within the column may provide an electrical signal to an electrode in the chuck. In at least one embodiment, the electrode may be an ESC electrode or a plasma electrode. In at least one embodiment, the gas tube may carry a purge gas, for example, to the chuck, which may be particularly useful for purging undesirable process gases that may flow within the WRG. In at least one embodiment, the purge gas may dilute the process gas carrying the deposition precursor vapor, typically preventing the deposition precursor vapor from forming a layer on the edge and backside of the wafer.

[0027] In at least one embodiment, a second gap is defined as the distance between the wafer and the showerhead. In at least one embodiment, a wafer-to-showerhead gap (WSG) may be an additional adjustable parameter in the process. In at least one embodiment, the WSG may be adjusted on command to improve the process beyond that obtained by adjusting the WRG alone. In at least one embodiment, in a multi-station process tool, a carrier ring having substantially the same dimensions may be provided at all stations of the multi-station process tool. In at least one embodiment, a carrier ring may be utilized at one station to shield the edge of the wafer. In at least one embodiment, wafers at other stations in the multi-station process tool may be exposed to overflow gas from the active station. In at least one embodiment, the WSG between the wafer and the showerhead may be reduced to allow shielding of other wafers.

[0028] In at least one embodiment, the WSG may be reduced by lifting the wafer toward a showerhead above it. In at least one embodiment, adjustment of the WSG may be included in the process recipe to regulate layer growth in the station where deposition is occurring. In at least one embodiment, the flow intensity may be regulated to fine-tune the deposition process by adjusting the WSG. In at least one embodiment, the WSG in the process station may be adjusted to regulate the flow intensity of the process gas above the wafer. In at least one embodiment, the flow intensity may be defined as the gas flux per unit area, e.g., flow rate per square centimeter. In at least one embodiment, adjusting the WRG and WSG in the process station may eliminate the need to install multiple carrier rings for each process when process changes are foreseen.

[0029] In at least one embodiment, a third parameter in combination with the adjustment of the WRG and WSG is the size and pattern of the showerhead aperture holes. In at least one embodiment, the size and pattern of the showerhead aperture holes may be optimized to reduce non-uniformity of the deposited layer in DID processes and other CVD processes where the inhibition step is omitted. In at least one embodiment, the showerhead aperture hole pattern may be optimized as a square array for a particular process or group of processes. In at least one embodiment, the showerhead aperture hole pattern may be optimized as a hexagonal pattern for a particular process or group of processes. In at least one embodiment, the showerhead aperture hole pattern may be optimized as a radial pattern for a particular process, such that each aperture hole is substantially equidistant along a radius of the faceplate.

[0030] In at least one embodiment, in a multi-station deposition chamber, transfer of wafers from station to station may be accomplished by a single transfer ring. In at least one embodiment, the edge of the ring may overhang the edge of the wafer by a distance that may be optimized for a particular process performed in a particular station. In at least one embodiment, the overhang may be optimized in a station where a deposition inhibition step is performed.

[0031] In at least one embodiment, the same carrier ring may be moved to other process stations in the process tool and employed as an edge deposition shield in the other process stations. In at least one embodiment, as an edge deposition shield, the carrier ring prevents layers from growing on the edge and backside of the wafer. In at least one embodiment, nucleation or bulk deposition steps may be performed in one or more process stations. With one available carrier ring, narrow overhang optimization may adversely affect the performance of those processes performed in the other stations.

[0032] In at least one embodiment, this problem may be solved by adjusting the wafer-to-carrier ring gap (WRG) and the wafer-to-showerhead gap (WSG). In at least one embodiment, one or more process stations may host several multi-step processes. In at least one embodiment, the process may employ wafer edge and backside shielding to adequately prevent unwanted layer deposition. In at least one embodiment, wafer edge and backside shielding may be achieved by providing an adjusted carrier ring overhang.

[0033] Typically, an optimized WRG or PRG may be fixed for a particular process to prevent such unwanted deposition. To host several different processes at one station or to share a process between two or more stations, in at least one embodiment, the process recipe may include software-coded process recipe steps as instructions to uniquely adjust the WRG and / or WSG of each process, whose recipes may be stored in a process library. In at least one embodiment, a single carrier may thus be employed for different processes at a single station or at different stations, with each different process having its own optimal WRG and / or WSG. In at least one embodiment, the process recipe may be copied as software to a command module of the process tool to adjust the WRG or WSG accordingly.

[0034] Here, "coupled" and "connected," along with their derivatives, may be used herein to describe a functional or structural relationship between components. These terms are not intended as synonyms for each other. Rather, in certain embodiments, "connected" may be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. Here, "coupled" may be used to indicate that two or more elements are in direct or indirect (through other intervening elements) physical, electrical, or magnetic contact and / or that two or more elements cooperate or interact with each other (e.g., in a cause and effect relationship).

[0035] Here, as used herein, "above," "below," "between," and "on" refer to the relative location of one component or material to another component or material where such physical relationship is noteworthy. Unless these terms are modified to "directly" or "directly," there may be one or more intervening components or materials. Similar distinctions are made in the context of component assemblies. As used throughout this specification and in the claims, a list of items joined by "at least one" or "one or more" may mean any combination of the listed terms.

[0036] As used herein, "adjacent" generally refers to the location of one thing next to (e.g., immediately adjacent or nearby with one or more things between) or adjacent to (e.g., touching) another thing.

[0037] Unless otherwise indicated in the clear context of its use, the terms "substantially equal," "approximately equal," and "nearly equal" mean that there is no more than an incidental difference between the two items so described. Such a difference is typically less than ±10% of the stated value.

[0038] Here, "WRG" typically refers to the small distance between the wafer surface and the surface of the carrier ring that contacts the wafer.

[0039] Here, a "wafer" may refer to a semiconductor substrate typically shaped as a disk having a diameter. In at least one embodiment, the diameter depends on the various technologies of the wafer. In at least one embodiment, the diameter typically ranges between 3 cm and 30 cm. In at least one embodiment, other sizes may be used.

[0040] As used herein, "carrier ring" may refer to a typically annular structure that physically lifts, carries, and places the wafer onto a wafer chuck or pedestal (defined below).

[0041] Here, "software-encoded process steps" may generally refer to process recipes that may include software-encoded process recipe steps as instructions to uniquely adjust the WRG and / or WSG for each process, the recipes of which may be stored in a process library.

[0042] Here, "process gas" typically refers to a combination of inert and reactive gases and vapors, as well as deposition precursor vapors, employed to form a plasma.

[0043] Here, "gap" may generally refer to the space or distance between two adjacent surfaces or objects.

[0044] Here, a "process tool" may refer to a manufacturing tool that typically includes a vacuum chamber in which a semiconductor manufacturing process may be performed. In at least one embodiment, the process tool may include many other components such as a chuck, a showerhead, a carrier ring, etc.

[0045] Here, "vacuum chamber" may refer to an enclosure that is typically evacuated for processing purposes such as deposition, etching, and the like.

[0046] As used herein, a "multi-station process tool" may refer to a semiconductor process tool that typically includes one or more process stations within a vacuum chamber.

[0047] Here, a "process station" may generally refer to a combination of a wafer chuck and a process gas distribution showerhead. In at least one embodiment, two or more process stations may be disposed within a vacuum chamber in a multi-station process tool. In at least one embodiment, individual process stations within a multi-station process tool may be dedicated to a particular process.

[0048] As used herein, "rotary indexer" may generally refer to a mechanism designed to transfer wafers between process stations within a multi-station process tool.

[0049] Here, a "showerhead" may generally refer to a two- or three-dimensional gas manifold. In at least one embodiment, the output of the manifold may be a controlled distribution of a fluid, such as a gas, liquid, or vapor.

[0050] Here, "motor" may generally refer to an electric motor, such as an alternating current (ac) motor, a universal motor, a DC motor such as a servo motor or a stepper motor. In at least one embodiment, servo motors and stepper motors may be precision controlled.

[0051] Here, "idle position" may refer to the configuration of the device when it is not normally being actively used. In at least one embodiment, the carrier ring or pedestal z-height is in the idle position when it is not currently engaged in a process.

[0052] Here, "initial position" may generally refer to, for example, an initial z-height position of the carrier ring or pedestal at the start of a process.

[0053] Here, "operating position" may generally refer to the z-height position of the carrier ring or pedestal when it is engaged in a process. In at least one embodiment, the initial position is an example of an operating position.

[0054] Here, "z-height" may generally refer to the vertical distance or height above some reference level.

[0055] Here, a "reference position" may generally refer to a reference point within an instrument, such as a vacuum chamber of a process tool. In at least one embodiment, the reference position is a zero level to which a z-height may be referenced.

[0056] As used herein, "process gas" may generally refer to an inert or reactive gas such as argon, nitrogen, oxygen, hydrogen, hydrazine, etc., and may also include sublimation products or precursor vapors that are evolved as gases at room temperature.

[0057] As used herein, a "process gas source" may refer to a pressurized vessel or tank that typically contains a process gas (eg, argon, nitrogen, precursor, etc.).

[0058] Here, "nucleation layer" may refer to a pre-deposition layer that is typically deposited to a sub-micron thickness. In at least one embodiment, the nucleation layer may include nanocrystals on which condensing deposition precursor vapors may crystallize and grow. In at least one embodiment, the same process gas may crystallize on a second wafer when the second wafer is exposed.

[0059] Here, a "processor" may refer to a semiconductor computing device, typically in a monolithic microchip package. In at least one embodiment, a processor may be a microcontroller coupled to memory and / or other components. In at least one embodiment, a processor may have a single or multiple processor cores.

[0060] Here, "memory" may generally refer to a semiconductor device capable of storing computer code and data. In at least one embodiment, the computer code may be in binary format. In at least one embodiment, the memory may be volatile or non-volatile in nature. In at least one embodiment, the memory may be embedded in the processor or may be externally coupled to the processor.

[0061] Here, "software" or "firmware" may refer to machine-readable or machine-executable binary code that typically includes instructions for controlling operating devices coupled to moveable components within a vacuum chamber of a process tool.

[0062] Here, a "motion control subroutine" may generally refer to a set of computer-executable instructions including motor commands. In at least one embodiment, the motion control subroutine may be encoded in software instructions and callable by one or more machine process recipe steps stored in memory.

[0063] As used herein, "human-machine interface" may refer to circuitry coupled to the interface, such as a control panel having buttons, switches, and the like, and may include a touch screen.

[0064] Here, "nucleation" typically refers to the initial crystallization of a precursor vapor that is deposited on a surface and undergoes a chemical reaction to form a nucleation layer.

[0065] As used herein, "nucleation layer" refers to a layer containing surface-bound molecules or initial nanoscale crystals that have grown by reaction of surface-bound molecules with colliding gas-phase molecules, typically during a material deposition process such as CVD.

[0066] As used herein, an "inhibitor" or "nucleation inhibitor" generally refers to a material that prevents the nucleation or deposition of another material on a surface. In at least one embodiment, a process involving an inhibitor gas or vapor may include, for example, a deposition-inhibition-deposition (DID) sequence.

[0067] As used herein, "showerhead" refers to a gas distribution manifold typically employed in deposition and etch chambers in semiconductor processing tools, which may have a two-dimensional array of apertured holes fluidly coupled to one or two plenums through which process gases are ejected. In at least one embodiment, the apertured holes may extend through a faceplate on the underside of the showerhead, which faces the wafer substrate below.

[0068] As used herein, "faceplate" generally refers to the underside of a showerhead through which the apertures extend.

[0069] As used herein, "plenum" typically refers to a main channel or chamber connected to a number of openings (eg, aperture holes) or channels arranged in a pattern through which fluid is ejected.

[0070] Here, "open hole" generally refers to an opening or void in a material, such as a showerhead faceplate. In at least one embodiment, the openings may be of any suitable shape and size. A collection of such openings is referred to as an array of open holes.

[0071] Here, the term "wafer chuck" may generally refer to a device for mounting and holding a wafer for processing. In at least one embodiment, the wafer chuck may include a clamping mechanism for securing the wafer to the wafer chuck, such as an electrostatic clamping (ESC) mechanism or a vacuum clamp (pressure differential between the front and back of the wafer).

[0072] Here, the term "pedestal" may generally refer to a column that supports a wafer chuck.

[0073] As used herein, a "vacuum chamber" may refer to an enclosure that is typically evacuated to a high vacuum. In at least one embodiment, the vacuum chamber may be employed to perform semiconductor manufacturing processes, such as CVD and etching processes.

[0074] Here, "spindle" generally refers to a mechanism including a rod or shaft actuated to rotate and / or translate along its axis. In at least one embodiment, the spindle may displace and rotate a carrier ring.

[0075] As used herein, "overhang" generally refers to the distance that the inner lip of the carrier ring extends above the edge of the wafer.

[0076] 1 illustrates a cross-sectional view of a process tool 100, according to at least one embodiment. In at least one embodiment, the process tool 100 includes a vacuum chamber 102, a wafer chuck 104, a carrier ring 106, a spindle 108, and a process gas distribution showerhead 110 (hereafter showerhead 110). In at least one embodiment, the vacuum chamber 102 may include multiple process stations (one shown), each station including a wafer chuck, such as wafer chuck 104, and a showerhead, such as showerhead 110. In at least one embodiment, the spindle 108 may be an end effector (e.g., a hand, a transfer paddle) of a robotic arm within the vacuum chamber 102.

[0077] In at least one embodiment, the showerhead 110 may be located directly above the wafer chuck 104. For example, the showerhead 110 may be concentric with the wafer chuck 104. In at least one embodiment, the carrier ring 106 is concentric with the wafer chuck 104. In at least one embodiment, the carrier ring 106 may be mechanically coupled to the spindle 108. In at least one embodiment, the wafer 112 is shown seated on the wafer chuck 104. In at least one embodiment, the carrier ring 106 includes an overhang 114 that extends a distance OH above the outer periphery of the wafer 112. In at least one embodiment, the overhang 114 can protect the edge (115) and backside (126) of the wafer 112 from material deposition. In at least one embodiment, the distance OH of the overhang 114 can be optimized to limit the mass flow rate of process gas to the edge and backside regions of the wafer 112.

[0078] In at least one embodiment, the carrier ring 106 is vertically displaced from the wafer 112 by vertical displacement (e.g., z-height change) of the spindle 108. In at least one embodiment, the spindle 108 raises the carrier ring 106 above the wafer 112 by a height h1, forming a wafer-ring gap (WRG) 116. In at least one embodiment, the WRG 116 may be adjustable within a range of vertical heights relative to the wafer 112 by vertical displacement of the spindle 108. In at least one embodiment, upward movement of the spindle 108 may engage the shelf 118 with an edge 120 of the carrier ring 106, lifting the carrier ring 106 and increasing the gap spacing h1 of the WRG 116. In at least one embodiment, downward movement of the spindle 108 may lower the carrier ring 106 and decreasing the gap spacing h1 of the WRG 116. In at least one embodiment, the spindle 108 may be removed from the carrier ring 106, which may allow the carrier ring 106 to rest on the wafer chuck 104, resulting in a zero wafer-to-ring gap (WRG).

[0079] In at least one embodiment, the wafer chuck 104 is moved relative to the showerhead 110 (or to a reference position within the vacuum chamber 102, such as z ref In at least one embodiment, the pedestal 122 may be actuated by a motor (not shown). In at least one embodiment, the position of the showerhead 110 is fixed. In at least one embodiment, the showerhead 110 may be vertically displaced by actuation of a motor. In at least one embodiment, vertical displacement of the wafer chuck 104 relative to the showerhead 110 may allow adjustment of the wafer-to-showerhead gap (WSG) distance h2.

[0080] In at least one embodiment, the carrier ring 106 includes fingers 124 to allow the carrier ring to engage the wafer 112 and suspend the wafer 112 for transport between process stations. In at least one embodiment, the carrier ring 106 may be engaged by a spindle 108. In at least one embodiment, the spindle 108 is a robot arm or an end effector attached to a robot arm. In at least one embodiment, the fingers 124 may engage a backside 126 of the wafer 112 such that the wafer 112 is elevated above the wafer chuck 104 when the carrier ring 106 is lifted. In at least one embodiment, the carrier ring 106 may transport the wafer 112 to a subsequent process station. In at least one embodiment, the fingers 124 may be packed into a pocket 128 after the wafer 112 is transferred.

[0081] FIG. 2 illustrates a top view of a showerhead 110 according to at least one embodiment. In at least one embodiment, the showerhead 110 includes a faceplate 202. In at least one embodiment, the faceplate 202 is positioned within a lower portion of the showerhead 110. In at least one embodiment, the faceplate 202 may be positioned directly above a wafer chuck (e.g., wafer chuck 104 of FIG. 1) in a process station. In at least one embodiment, the faceplate 202 includes a plurality of aperture holes 204. In at least one embodiment, the aperture holes 204 may be uniformly distributed across the faceplate 202. In at least one embodiment, the aperture holes 204 may be arranged in a square array as shown. In at least one embodiment, the aperture holes 204 have a uniform center-to-center pitch P1 in both the x-direction and the y-direction as shown in the inset, although other types of distributions of the aperture holes 204 may be employed. In at least one embodiment, the aperture holes 204 may be distributed in a hexagonal array pattern. In at least one embodiment, the aperture 204 may have a uniform diameter D1 ranging between 1 mm and 5 mm.

[0082] FIG. 3 shows a top view of showerhead 300, including faceplate 302. In at least one embodiment, showerhead 300 is substantially similar in overall dimensions to showerhead 110, but differs in internal structure, as described below. In at least one embodiment, faceplate 302 includes two sets of aperture holes 304 and 306 arranged in two interpenetrating arrays. In at least one embodiment, the two arrays are square arrays. Although a square array pattern is shown in at least one embodiment, aperture holes 304 and 306 may be arranged in any suitable pattern. In at least one embodiment, for example, aperture holes 304 and 306 may be arranged in a radial pattern, such that spacing between aperture holes is substantially uniform along a radius of faceplate 302. In at least one embodiment, aperture holes 304 have a diameter D1 and a center-to-center pitch P1. In at least one embodiment, aperture holes 306 have a diameter D2 and a center-to-center pitch P2 (e.g., as shown in the inset). In at least one embodiment, pitch P2 is substantially equal to pitch P1. In at least one embodiment, diameters D1 and D2 range between 0.5 mm and 2 mm. In at least one embodiment, D2 is smaller than D1.

[0083] In at least one embodiment, the apertured holes 304 and 306 are coupled to separate plenums in the showerhead 110, as described below. In at least one embodiment, the apertured holes 304 and 306 may distribute a first process gas and a second process gas, respectively, above a wafer (e.g., wafer 112), for example, during a deposition process. In at least one embodiment, the wafer may be positioned on a pedestal (e.g., chuck 104) below the showerhead 110.

[0084] 4A shows a top view of an interior region 400 of the showerhead 300, according to at least one embodiment. In at least one embodiment, a first plurality of plenums 402 extends in the y-direction of the figure. In at least one embodiment, the plenums 402 are coupled to the aperture holes 304. In at least one embodiment, the plenums 402 may be coupled to a first process gas.

[0085] In at least one embodiment, a number of plenums 404 (shaded in grey) extend orthogonally to plenum 402 in the x-direction of the figure. In at least one embodiment, plenums 404 are coupled to aperture holes 306. In at least one embodiment, plenums 404 may be coupled to a second process gas.

[0086] In at least one embodiment, each aperture hole 306 is offset in both the x-direction and the y-direction from an adjacent aperture hole 304. In at least one embodiment, aperture hole 306 is offset from aperture hole 304 by a distance approximately equal to P1 / 2 and / or P2 / 2. In at least one embodiment, other suitable shapes may be contemplated. In at least one embodiment, plenums 402 and 404 are at different vertical levels (e.g., z-heights) in showerhead 300, as described below.

[0087] 4B shows a cross-sectional view in the xz plane of the interior region 400 of the showerhead 300, according to at least one embodiment. In at least one embodiment, the plenum 402 extends orthogonally (e.g., in the y direction, or above and below the plane of the figure) to the plenum 404. In at least one embodiment, the plenum 404 extends along the x direction of the figure. In at least one embodiment, the plenums 402 and 404 are aligned at different z heights within the showerhead 300. In at least one embodiment, the vertical displacement of the plenums 402 and 404 can cause the plenums 402 and 404 to cross without intersecting.

[0088] 5 illustrates a cross-sectional view of a process tool 500 including a single process station 501, according to at least one embodiment. In at least one embodiment, the process station is depicted by a dashed box. In at least one embodiment, the process station 501 includes a showerhead 110 and a chuck 104. In at least one embodiment, the chuck 104 is supported by a pedestal 122. In at least one embodiment, the showerhead 110 is coupled to a process gas source 502.

[0089] In at least one embodiment, the process tool 500 may be a semiconductor manufacturing tool that includes a vacuum chamber 102. In at least one embodiment, the vacuum chamber 102 may be configured as an etch chamber and / or a deposition chamber, such as a vacuum chamber employed in a plasma etch or chemical vapor deposition (CVD) process. In at least one embodiment, a controller 504 may be electrically coupled to the spindle 108 (or a robotic arm, rotational indexer, not shown) and a motor 512 to move the pedestal 122.

[0090] In at least one embodiment, the controller 504 includes a processor 506 and a memory 508. The memory 508 is electrically coupled to the processor 506. In at least one embodiment, the memory 508 includes storage for binary code software or firmware executable by the processor 506. In at least one embodiment, the binary code may include encoded software instructions for adjusting the WSG (e.g., the vertical height of the carrier ring 106 relative to the wafer 112). In at least one embodiment, the binary code may include a plurality of software instructions for adjusting the WSG (e.g., the vertical height of the wafer chuck relative to the showerhead 110). In at least one embodiment, the processor 506 is electrically coupled to an output circuit 510. In at least one embodiment, the pedestal 122 may be actuated by a motor 512, which may be driven by a motor actuation circuit included within the output circuit 510.

[0091] In at least one embodiment, the software instructions may include motion control subroutines for synchronous or asynchronous motion control of the spindle 108 and the motor 512. In at least one embodiment, the motion control subroutines may be encoded in the software instructions and callable by one or more machine process recipe steps stored in the memory 508. In at least one embodiment, the machine process recipe steps may be called by a human-machine interface (HMI) 514. In at least one embodiment, the process recipe may be selected by a human operator who may call one or more motion control subroutines by pressing a button on a panel of the HMI 514 or a touch screen. In at least one embodiment, once selected, the process recipe instructions may automatically operate the process tool. In at least one embodiment, the controller 504 may be operable to be directly commanded by the HMI 514, whereby a human operator manually operates the process tool 500. In at least one embodiment, a human operator may directly raise and lower the carrier ring 106 and the wafer chuck 104, for example, by pressing a button or selecting an option on a touch screen.

[0092] In at least one embodiment, the binary code may include software instructions for controlling the flow rate of process gas into the showerhead 110. In at least one embodiment, the software instructions may direct the control of the flow rate of an inert gas introduced through the chuck 104 below the wafer 112. In at least one embodiment, the inert gas introduced through the chuck 104 may allow for controlled flow of process gas over the edge of the wafer 112 and may prevent deposition on the backside 126 of the wafer 112.

[0093] FIG. 6 illustrates a top view of a multi-station process tool 600, according to at least one embodiment. In at least one embodiment, the multi-station process tool 600 includes process stations 602, 604, 606, and 608. In at least one embodiment, any of the process stations 602, 604, 606, and 608 may be substantially identical to the process station 501 illustrated in FIGS. 1 and 5. In at least one embodiment, the process stations 602, 604, 606, and 608 include wafer chucks 610, 612, 614, and 616, respectively. In at least one embodiment, the process tool 600 includes a rotary indexer 618 for transferring wafers (e.g., wafer 112) between the wafer chucks 610-616. In at least one embodiment, the process tool 600 includes carrier rings 620, 622, 624, and 626 disposed in the process stations 602, 604, 606, and 608, respectively.

[0094] 7A-7D show a series of cross-sectional views of a process tool 700 according to at least one embodiment. In at least one embodiment, the process tool 700 may be substantially similar to the process tool 100. In at least one embodiment, referring to FIG. 7A, the process tool 700 is in a state before the start of the process. The nominal positions of the spindle 108 and the wafer chuck 104 are shown. In at least one embodiment, the gap h1 of the initial wafer-carrier gap WRG and the gap h2 of the initial wafer-showerhead gap WSG are shown. In at least one embodiment, before the start of the process, the initial WRG may be 200 microns, while the initial WSG may be 25 mm. In at least one embodiment, the spindle 108 may be initially positioned 2 to 4 mm above the nominal position. In at least one embodiment, the wafer chuck 104 may be positioned at its nominal z-height.

[0095] 7B illustrates the process tool 700 in a first process state according to at least one embodiment. In at least one embodiment, the wafer chuck 104 is raised relative to the position shown in FIG. 7A to reduce the WRG gap h2. In at least one embodiment, the wafer chuck 104 may be raised 4 mm above its nominal position to reduce the WRG gap h2 below 25 mm. In at least one embodiment, the reduction in the WSG gap may be in preparation for a subsequent deposition.

[0096] FIG. 7C illustrates a cross-sectional view of the process tool 700 at a second process state according to at least one embodiment. In at least one embodiment, the pedestal 122 may be raised to a higher position relative to its nominal position to raise the wafer chuck 104. In at least one embodiment, the WSG may be reduced between 5 mm and 10 mm. In at least one embodiment, the spindle 108 is raised by the same amount as the pedestal 122 relative to its nominal position. In at least one embodiment, the spindle 108 may be raised to about 24 mm above its nominal position to raise the carrier ring 106 above the wafer 112. In at least one embodiment, moving the spindle 108 24 mm may increase the WRG gap h1 to about 2 mm. In at least one embodiment, such an increase in the WRG gap h1 may allow layer growth inhibitor vapors and gases to flow to the edge of the wafer 112. In at least one embodiment, the WSG gap h2 may be decreased by moving the wafer chuck 104 closer to the showerhead 110. In at least one embodiment, decreasing WSG(h2) can enhance the flow of layer growth inhibiting vapors and gases to the outer periphery of the wafer 112 beyond what can be achieved by adjusting WRG(h1).

[0097] 7D illustrates a cross-sectional view of the process tool 700 at a third process state, according to at least one embodiment. In at least one embodiment, the wafer chuck 104 is lowered by lowering the pedestal 122 to approximately its initial position, increasing the WSG. In at least one embodiment, the WSG gap h2 may be greater than 25 mm. For example, h2 may be 28 mm. In at least one embodiment, the spindle 108 may be lowered approximately 13 mm above its nominal position, increasing the WRG gap h1, for example, to approximately 9 to 10 mm. In at least one embodiment, the WRG gap may be further increased, for example, to achieve a specified inhibition gas flow rate.

[0098] FIG. 8 illustrates an exemplary process flow chart 800 for a multi-station process tool performing parallel processes, according to at least one embodiment. In at least one embodiment, a process tool (e.g., process tool 600) may include four process stations (e.g., STN1-STN4). A single wafer is introduced into the process chamber and transferred to STN1. In at least one embodiment, STN2, STN3, and STN4 may also have wafers in process. In at least one embodiment, all four processes may occur in parallel. In at least one embodiment, in STN1, the wafer is preheated to a process temperature (e.g., 330° C.). In at least one embodiment, the wafer chuck (e.g., wafer chuck 104) may be in an initial operating position (z-height) as shown in FIG. 7A.

[0099] In at least one embodiment, one carrier ring (CR) is shared between the stations. In at least one embodiment, a single carrier ring may be present in each process station (e.g., STN1, STN2, STN3, and STN4). In at least one embodiment, multiple carrier rings may be provided in each station (e.g., CR1, CR2, CR3, and CR4).

[0100] In at least one embodiment, the carrier ring (CR) may initially remain at STN2 (e.g., CR2). In at least one embodiment, after the preheat step, the wafer pedestal (PED1) at STN1 is moved to a first process z-height and the WSG gap is set to a predetermined value (WSG1). An example of this procedure is shown in FIG. 7B, according to at least one embodiment. In at least one embodiment, a nucleation step (Nucl) is performed at STN1 according to the setting of WSG1 at STN1. In at least one embodiment, during the nucleation process at STN1, bulk CVD deposition may be performed in parallel at STN3 and STN4 on wafers transferred to these stations in succession. In at least one embodiment, after the nucleation step is completed at STN1, the wafer chuck is moved up and WSG1 is reduced. An example of this procedure is shown in FIG. 7C, according to at least one embodiment.

[0101] In at least one embodiment, the inhibition process in STN2 is in an idle mode awaiting completion of film nucleation in STN1. In at least one embodiment, after the nucleation process is completed in STN1, the wafer may be transferred to STN2. In at least one embodiment, after the wafer transfer to STN2, the wafer chuck and carrier ring (e.g., CR2) in STN2 are moved into position (e.g., WRG2 and WSG2, as shown in FIG. 8). In at least one embodiment, the setting of WRG2 and WSG2 may precede the wafer edge inhibition step.

[0102] Referring to STN2, in at least one embodiment, the spindle is moved to an intermediate position (spindle intermediate) and WRG2 is set for the wafer edge inhibition step. In at least one embodiment, during this stage, layer growth inhibition gas may flow under the carrier ring overhang to the wafer periphery to reduce or prevent deposition at the edge and backside of the wafer. In at least one embodiment, after the inhibition step is completed, CR2 may be lowered to a level at or near its initial position (spindle down). In at least one embodiment, CR2 may be placed directly on the pedestal by removing the spindle from CR2 (e.g., WRG=0).

[0103] In at least one embodiment, STN3 and STN4 may be idle during the inhibition process in STN2 until the inhibition process in STN2 is completed. In at least one embodiment, a film deposition step may be performed on the wafer in STN3, followed by a second (and final) film deposition step on the wafer in STN4. In at least one embodiment, the film deposition steps in STN3 and STN4 are sequential CVD processes. In at least one embodiment, after the inhibition process in STN2 is completed, the wafer may be transferred to STN3. In at least one embodiment, once the wafer is placed on the pedestal of STN3 (e.g., PED3), PED3 may be moved up and WSG3 may be decreased. In at least one embodiment, WRG3 is set to a minimum gap distance (e.g., 250 microns) by lowering the carrier ring.

[0104] In at least one embodiment, after completion of the first film deposition process in STN3, the wafer may be transferred to STN4. In at least one embodiment, once the wafer is placed on the pedestal of STN4 (PED4), PED4 may be moved down and WSG4 may be increased. In at least one embodiment, CR4 may be lowered to a minimum z-height above the wafer and WRG4 may be minimized. In at least one embodiment, WRG4 may be between 250 microns and 1000 microns, allowing for a flat edge profile of the grown film. In at least one embodiment, CR4 is moved up and WRG4 is increased to several millimeters. In at least one embodiment, in STN4, the CVD process continues with a larger WRG, which may result in a sharp film profile at the edge of the wafer.

[0105] In at least one embodiment, for multiple wafers being processed simultaneously, the wafers at STN4 may be transferred out of the process chamber and the wafers at STN3 may be transferred to STN4 for further processing (e.g., a second CVD step). In at least one embodiment, the wafers at STN2 may be transferred to STN3, while the nucleated wafers at STN1 are transferred to STN2 for growth inhibition processing.

[0106] It is understood that the different processes shown in Figure 8 are exemplary and the order and arrangement of the different processes shown may be interchanged. In at least one embodiment, the CVD process may be performed in STN2 prior to and / or subsequent to the inhibition process. In at least one embodiment, the inhibition or nucleation process may be performed in other stations STN1, STN3, or STN4 as well, and is not limited to STN1 or STN2.

[0107] 9 is an exemplary flowchart 900 of a method of operating a process chamber according to at least one embodiment. In at least one embodiment, the method may be part of software that automatically directs operations performed in a semiconductor manufacturing tool, such as process tool 500. In at least one embodiment, the process chamber (e.g., vacuum chamber 102) includes at least two process stations. In at least one embodiment, the process stations may be similar to process station 501 shown in FIG. 5. In at least one embodiment, the process chamber includes four process stations. In at least one embodiment, the processes included in flowchart 900 may be similar to the processes described in multi-station process flowchart 800.

[0108] Described below are operations that may be performed by the processor 506 executing the software encoded process steps stored in memory 508, as illustrated in Figure 5. In at least one embodiment, the software encoded process recipe steps may include code instructions to uniquely adjust WRG and / or WSG spacing at one or more process stations of a process tool (e.g., process station 501 of Figure 5) for each process whose recipe may be stored in a process library.

[0109] 5, in at least one embodiment, a signal from output circuit 510 may send commands to a motor 512 coupled to pedestal 122 as shown in FIG. 5. In at least one embodiment, the operations described below may include commanding motor 512 to change the vertical position or z-height of wafer chuck 104 relative to a reference position of wafer chuck 104. Similarly, in at least one embodiment, to adjust the z-height of carrier ring 106 relative to a reference position of carrier ring 106, software stored in memory 508 may be executed by processor 506 to command spindle 108 via output circuit 510 (as shown in FIG. 5) to raise and lower carrier ring 106 relative to a preset reference position of carrier ring 106.

[0110] In operation 902, according to at least one embodiment, the wafer is transferred into a process station (e.g., STN1) in a process chamber. In at least one embodiment, the wafer may be transferred by a rotary indexer (e.g., rotary indexer 618 of FIG. 6).

[0111] In operation 904, in at least one embodiment, the wafer in STN1 may be subjected to a pre-heating step. In at least one embodiment, the temperature of the wafer may be raised above 300° C. In at least one embodiment, wafers in other stations, such as STN2, may be similarly heated.

[0112] In operation 906, in at least one embodiment, a pedestal (e.g., Ped1) on STN1 may be actuated by a motor (e.g., motor 512) to raise the wafer chuck (e.g., wafer chuck 104) to a first z-height in preparation for the nucleation process. In at least one embodiment, the z-height adjustment of PED1 sets WSG1 at a distance h2 below the showerhead (e.g., showerhead 110). In at least one embodiment, WSG1 distance h2 is an optimal WSG, for example, corresponding to optimal nucleation process parameters. In at least one embodiment, during the nucleation step, gas is distributed across the wafer (e.g., wafer 112) by the showerhead 110. In at least one embodiment, the nucleation process gas is directed over the wafer at a predetermined flux (e.g., 1 cm 2 WSG1 may be set at a distance h2 relative to the WSG of the next station (STN2) so that the WSG flows at 1000 rpm (molecules of process gas per second per second). In at least one embodiment, as WSG decreases, the process gas flow rate may increase. In at least one embodiment, the wafer-ring gap WRG1 may be set at a minimum value h1 to shield the edge of the wafer (e.g., edge 120) from exposure to nucleation gas. In at least one embodiment, film growth at the edge and backside of the wafer (e.g., backside 126 of the wafer) may be mitigated by reducing WRG1 to a minimum value (e.g., h1 may be about 250 microns).

[0113] In operation 908, in at least one embodiment, the wafer in STN1 may be transferred to STN2 by a rotary indexer. In at least one embodiment, after positioning the wafer on the pedestal in STN2 (Ped2), the wafer chuck is lowered to increase WSG2 to a higher h2 relative to WSG1 in preparation for the film growth inhibition processing process. In at least one embodiment, the spindle (e.g., spindle 108) in STN2 may be commanded to move upward to raise the carrier ring (e.g., CR2) in STN2 to raise WRG2 to h1 several mm above the wafer. In at least one embodiment, increasing WRG2 allows film growth inhibition gas to flow to the edge and backside of the wafer. In at least one embodiment, the film growth inhibition processing performed in STN2 may cause undesired nucleation at the edge and backside of the wafer and surface chemical reactions on the wafer that inhibit film growth during deposition (e.g., CVD) of film precursors in STN3 and STN4. In at least one embodiment, increasing the WRG may direct the flow of film growth inhibitor gas to the edge and backside of the wafer rather than to the center of the wafer where film growth is desired.

[0114] In operation 910, in at least one embodiment, the wafer is transferred to STN3 to prepare for a first film deposition step (e.g., CVD1). In at least one embodiment, after the wafer is positioned on the pedestal in STN3 (Ped3), Ped3 may be raised to shrink WSG3 to a distance h2 smaller than WSG2. In at least one embodiment, shrinking WSG may increase the process gas flux across the wafer. In at least one embodiment, CVD1 is performed in STN3 to grow the film to a predetermined thickness. In at least one embodiment, the spindle in STN3 is adjusted so that WRG3 distance h1 is minimal (e.g., 250 microns) to shield the edge and backside of the wafer from the large flux of precursor molecules. In at least one embodiment, the inhibitor chemical deposited on the edge and backside of the wafer in STN2 mitigates undesired nucleation and growth of film material at these locations.

[0115] In operation 912, in at least one embodiment, the wafer is transferred to STN4 to prepare for a second film growth step (e.g., CVD2). In at least one embodiment, the pedestal (Ped4) in STN4 is lowered to increase WSG4. In at least one embodiment, the WSG gap distance h2 may be increased to decrease the process gas flux over the wafer. In at least one embodiment, the spindle in STN4 is raised to increase the gap distance h1 of WRG4 to several millimeters. In at least one embodiment, increasing WRG4 allows some flow of film deposition precursors above the edge of the wafer during CVD2. In at least one embodiment, the duration of CVD2 may be limited relative to CVD1 to allow limited growth of material below the carrier ring in STN4 (CR4). In at least one embodiment, the resulting film profile may exhibit a sharp portion at or near the edge of the wafer.

[0116] In at least one embodiment, flowchart 900 depicts a particular order for a particular process, however, it is understood that this depiction is exemplary and that any suitable number, type, and order of process steps may be employed.

[0117] In the following paragraphs describing at least one embodiment, examples are provided, where the examples may be combined with other examples, such that at least one embodiment may be combined with another embodiment without changing the scope of the at least one embodiment.

[0118] Example 1 is a process tool including a wafer chuck, a showerhead, the showerhead having the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead, and a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending above an edge of the wafer, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck.

[0119] Example 2 includes all the features of example 1, wherein the motor is electrically coupled to the command module.

[0120] Example 3 includes all the features of example 2, wherein the spindle is electrically coupled to the command module.

[0121] Example 4 includes all the features of example 3, wherein the command module includes a processor and a memory coupled to the processor, and the command module is electrically coupled to the human-machine interface.

[0122] Example 5 is a system including a vacuum chamber; at least one process station within the vacuum chamber including a wafer chuck; a showerhead, the showerhead having the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead; and a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending from an edge of the wafer, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; a processor electrically coupled to the spindle and the motor; and a memory coupled to the processor, the memory including binary code for instructing the spindle and the motor, the binary code including a plurality of software instructions for adjusting a first vertical height of the carrier ring relative to the wafer chuck and a second vertical height of the wafer chuck relative to the showerhead.

[0123] Example 6 includes all of the features of example 5, and further includes a process gas source coupled to the showerhead.

[0124] Example 7 includes all of the features of example 5, and further includes one or more motion control subroutines stored in memory, the one or more motion control subroutines including a plurality of software instructions, the one or more motion control subroutines callable by at least one software-encoded process step, the at least one software-encoded process step being stored in memory.

[0125] Example 8 includes all of the features of example 7, and wherein the one or more motion control subroutines are callable by a human-machine interface, and the human-machine interface is operable to call the one or more motion control subroutines to move the carrier ring and to move the wafer chuck.

[0126] Example 9 includes all of the features of example 8, and the plurality of software instructions further includes instructions for controlling a flow rate of an inert or reactive process gas at the edge of the wafer chuck.

[0127] Example 10 includes all of the features of example 9, further including a plurality of process stations within the vacuum chamber.

[0128] Example 11 is a method of controlling a deposition process, comprising: placing a wafer in a process tool including a wafer chuck, a showerhead, the showerhead including the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead, and a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending from an edge of the wafer, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; adjusting a first gap distance between the carrier ring and the wafer chuck; and adjusting a second gap distance between the wafer chuck and the showerhead.

[0129] Example 12 includes all of the features of example 11, wherein adjusting the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change a first z-height of the carrier ring relative to a first reference position of the spindle.

[0130] Example 13 includes all of the features of example 12, wherein adjusting the second gap distance between the wafer chuck and the showerhead includes commanding a motor to change a second z-height of the wafer chuck relative to a second reference position of the wafer chuck.

[0131] Example 14 includes all of the features of example 13, wherein the method further includes increasing a first gap distance between the carrier ring and the wafer chuck and increasing a second gap distance between the wafer chuck and the showerhead.

[0132] Example 15 includes all of the features of example 14, wherein increasing the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change a first z-height of the carrier ring relative to a first reference position of the spindle to a third z-height, the third z-height being greater than the first z-height.

[0133] Example 16 includes all of the features of example 15, wherein increasing the second gap distance between the wafer chuck and the showerhead includes commanding the motor to change a second z-height of the wafer chuck relative to a second reference position of the wafer chuck to a fourth z-height, the fourth z-height being greater than the second z-height.

[0134] Example 17 includes all of the features of example 16, wherein the method further includes decreasing a first gap distance between the carrier ring and the wafer chuck and decreasing a second gap distance between the wafer chuck and the showerhead.

[0135] Example 18 includes all of the features of example 17, wherein decreasing the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change a first z-height of the carrier ring relative to a first reference position of the spindle to a fifth z-height of the carrier ring, the fifth z-height being less than the first z-height.

[0136] Example 19 includes all of the features of example 18, wherein decreasing the second gap distance between the wafer chuck and the showerhead includes commanding the motor to change a second z-height of the wafer chuck relative to a second reference position of the wafer chuck to a sixth z-height of the wafer chuck, the sixth z-height being greater than the second z-height.

[0137] Example 20 is a method of controlling a process comprising transferring a first wafer to a first process station of a plurality of process stations within a process tool, each of the plurality of process stations including a wafer chuck, a showerhead, the showerhead having the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead, and a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending from an edge of the wafer, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck, and transferring a second wafer to a second process station of the plurality of process stations.

[0138] Example 21 includes all of the features of example 20, and further includes preheating the first wafer; adjusting a first gap between the first carrier ring and the first wafer to a first initial position; adjusting a second gap between the first wafer and the first showerhead to a second initial position; adjusting a third gap between the second carrier ring and the second wafer to a third initial position; adjusting a fourth gap between the second wafer and the second showerhead to a fourth initial position; and depositing a nucleation layer on the first wafer.

[0139] Example 22 includes all of the features of example 21, and further includes decreasing a second gap between the first wafer and the first showerhead by raising the first wafer chuck to an idle position, decreasing a fourth gap between the second wafer and the second showerhead by raising the second wafer chuck to the first operating position, increasing a third gap between the carrier ring and the second wafer by raising the carrier ring to the second operating position, flowing process gas from the second showerhead, and returning the carrier ring to the first operating position by lowering the carrier ring.

[0140] In addition to the description herein, various modifications may be made to the at least one embodiment without departing from the scope thereof. Thus, the illustrations of the at least one embodiment herein should be construed as examples and not as limiting the scope of the at least one embodiment.

Claims

1. 1. A process tool comprising: A wafer chuck; a showerhead, the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead; a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending above an edge of a wafer on the wafer chuck, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; Including, process tools.

2. 2. The process tool of claim 1, The motor is electrically coupled to a command module.

3. 3. The process tool of claim 2, The spindle is electrically coupled to the command module.

4. 4. The process tool of claim 3, The command module includes a processor and a memory coupled to the processor, the command module being electrically coupled to a human-machine interface.

5. 1. A system comprising: A vacuum chamber; at least one process station within the vacuum chamber; wherein the at least one process station comprises: A wafer chuck; a showerhead, the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead; a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending above an edge of a wafer on the wafer chuck, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; The system comprises: a processor electrically coupled to the spindle and the motor; a memory coupled to the processor, the memory including binary code for commanding the spindle and the motor, the binary code including a plurality of software instructions for adjusting a first vertical height of the carrier ring relative to the wafer chuck and a second vertical height of the wafer chuck relative to the showerhead; The system further comprises:

6. 6. The system of claim 5, The system further includes a process gas source coupled to the showerhead.

7. 6. The system of claim 5, one or more motion control subroutines are stored in the memory, the one or more motion control subroutines comprising the plurality of software instructions, the one or more motion control subroutines are callable by at least one software-coded process step, the at least one software-coded process step being stored in the memory.

8. 8. The system of claim 7, The one or more motion control subroutines are callable by a human-machine interface, the human-machine interface being operable to call the one or more motion control subroutines to move the carrier ring and to move the wafer chuck.

9. 9. The system of claim 8, The plurality of software instructions further include instructions for controlling a flow rate of an inert or reactive process gas at the edge of the wafer chuck.

10. 10. The system of claim 9, The system further includes a plurality of process stations within the vacuum chamber.

11. 1. A method of controlling a deposition process, the method comprising: placing the wafer in a process tool, the process tool comprising: A wafer chuck; a showerhead, the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead; a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending above an edge of the wafer, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; The method comprises: adjusting a first gap distance between the carrier ring and the wafer chuck; adjusting a second gap distance between the wafer chuck and the showerhead; The method further comprising:

12. 12. The method of claim 11, The method, wherein adjusting the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change a first z-height of the carrier ring relative to a first reference position of the spindle.

13. 13. The method of claim 12, adjusting the second gap distance between the wafer chuck and the showerhead includes commanding the motor to change a second z-height of the wafer chuck relative to a second home position of the wafer chuck.

14. 14. The method of claim 13, the method further comprising increasing the first gap distance between the carrier ring and the wafer chuck and increasing the second gap distance between the wafer chuck and the showerhead.

15. 15. The method of claim 14, The method, wherein increasing the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change a first z-height of the carrier ring relative to the first reference position of the spindle to a third z-height, the third z-height being greater than the first z-height.

16. 16. The method of claim 15, increasing the second gap distance between the wafer chuck and the showerhead includes commanding the motor to change a second z-height of the wafer chuck relative to the second reference position of the wafer chuck to a fourth z-height, the fourth z-height being greater than the second z-height.

17. 17. The method of claim 16, the method further comprising decreasing the first gap distance between the carrier ring and the wafer chuck and decreasing the second gap distance between the wafer chuck and the showerhead.

18. 20. The method of claim 17, the method, wherein decreasing the first gap distance between the carrier ring and the wafer chuck includes instructing the spindle to change the first z-height of the carrier ring relative to the first reference position of the spindle to a fifth z-height of the carrier ring, the fifth z-height being less than the first z-height.

19. 20. The method of claim 18, decreasing the second gap distance between the wafer chuck and the showerhead includes commanding the motor to change the second z-height of the wafer chuck relative to the second reference position of the wafer chuck to a sixth z-height of the wafer chuck, the sixth z-height being greater than the second z-height.

20. 1. A method of controlling a process, comprising the steps of: transferring the first wafer to a first process station of a plurality of process stations within a process tool, each of the plurality of process stations comprising: A wafer chuck; a showerhead, the wafer chuck coupled to a motor operable to vertically displace the wafer chuck relative to the showerhead; a carrier ring between the wafer chuck and the showerhead, the carrier ring including an overhang extending above an edge of a wafer on the wafer chuck, the carrier ring being mechanically coupled to a spindle operable to vertically displace the carrier ring relative to the wafer chuck; The method comprises: The method further includes transferring a second wafer to a second process station of the plurality of process stations.

21. 21. The method of claim 20, preheating the first wafer; adjusting a first gap between a first carrier ring and the first wafer to a first initial position; adjusting a second gap between the first wafer and a first showerhead to a second initial position; adjusting a third gap between a second carrier ring and the second wafer to a third initial position; adjusting a fourth gap between the second wafer and a second showerhead to a fourth initial position; depositing a nucleation layer on the first wafer; Further comprising the method.

22. 22. The method of claim 21, decreasing the second gap between the first wafer and the first showerhead by raising a first wafer chuck to an idle position; reducing the fourth gap between the second wafer and the second showerhead by raising a second wafer chuck to a first operating position; increasing the third gap between the carrier ring and the second wafer by raising the carrier ring to a second operational position; flowing a process gas through the second showerhead; returning the carrier ring to the first operating position by lowering the carrier ring. The method further comprising:

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