Coil substrate, its manufacturing method and electronic device including same

Abstract

Provided is a coil substrate, a manufacturing method thereof, and an electronic device including the same, which can eliminate problems such as damage to the appearance of the coil substrate and electrical short defects by controlling the lead-in wiring of the coil substrate to be formed thinly without being plated to the thickness level of the coil conductor pattern. The coil substrate includes a base substrate, a first seed pattern formed on a first surface of the base substrate and including a seed region and a lead-in wiring region, a first coil formed on the seed region of the first seed pattern, a first seed pattern protective layer formed on the lead-in wiring region of the first seed pattern, and a first insulating layer formed to contact at least one surface of the seed pattern protective layer.

Description

[Technical field]

[0001] The present invention relates to a thin-film coil substrate capable of ensuring a high electromagnetic force and having improved quality, an electronic device including the same, and a method for manufacturing the same. [Background technology]

[0002] Coil devices can be used in various fields that require electromagnetic force, such as inductors, vibration motors, camera actuators, etc. Among them, camera actuators mechanically adjust the positions and angles of image sensors, lens optical systems, etc., and are installed for optical image stabilizers (OIS).

[0003] In recent years, as portable electronic products, such as smartphones, notebook computers, tablet PCs, digital cameras, and the like, to which camera actuators are applied, become smaller, the size of the coil devices mounted on the camera actuators tends to become smaller and smaller.

[0004] To miniaturize such coil devices, thin film type coil devices in which a conductor pattern is formed in a spiral shape on the upper surface of a substrate are widely used. Efforts are being made to ensure high electromagnetic force so that the coil device can perform adequately even if the size is reduced, and the method of expanding the thickness of the coil conductor pattern formed in the coil device is mainly adopted.

[0005] However, when the plating process is continued to expand the thickness of the conductor pattern, the conductor pattern cannot maintain a constant shape as plating time passes.In addition, the upper part of the conductor pattern may be over-plated due to plating deviation, making it impossible to maintain fine pattern spacing, which may result in circuit defects such as short circuits.

[0006] In addition, because the lead-in wiring is plated at the same time as the conductor pattern and becomes thicker, problems occur that reduce workability in the processing stage of removing the lead-in wiring. There are also problems that the conductor pattern or lead-in wiring has an uneven surface due to burrs, or that its appearance is marred by continuous impact force. Summary of the Invention [Problem to be solved by the invention]

[0007] The technical problem that the present invention aims to solve is to provide a coil substrate, a manufacturing method thereof, and an electronic device including the same, which can eliminate problems such as damage to the appearance of the coil substrate and electrical short circuits by controlling the lead-in wiring of the coil substrate so that it is not plated to the thickness level of the coil conductor pattern but is formed thinly.

[0008] The technical problems of the present invention are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0009] One aspect of the coil substrate of the present invention to achieve the above technical objective includes a base substrate; a first seed pattern formed on a first surface of the base substrate, the first seed pattern including a seed region and a lead-in wiring region; a first coil formed on the seed region of the first seed pattern; a first seed pattern protective layer formed on the lead-in wiring region of the first seed pattern; and a first insulating layer formed in contact with at least one surface of the seed pattern protective layer, wherein the first coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern, the first seed pattern formed at a lower portion of the seed pattern protective layer extends to a cut line, and the first insulating layer is formed in contact with at least one of the base substrate, the first coil, the seed pattern, and the seed pattern protective layer.

[0010] An embodiment of an electronic device according to the present invention for achieving the above technical objective is formed by including the coil substrate.

[0011] An embodiment of a coil substrate manufacturing method of the present invention for achieving the above technical objective includes the steps of: preparing a base substrate having a first surface and a second surface corresponding to the first surface; forming a first seed pattern on the first surface of the base substrate; forming a first coil on the first seed pattern; forming a first seed pattern protective layer on the first seed pattern; and forming a first insulating layer to contact at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer.

[0012] Specific details of other embodiments are included in the detailed description and drawings. Effect of the Invention

[0013] The present invention provides the following effects by forming a via pad connected to a coil pattern on the outside of a coil substrate and forming a protective layer on a seed pattern connecting the via pad to a lead-in wiring.

[0014] First, it is possible to bring about an effect of reducing bleeding and non-connection defects that may occur during the formation of the protective layer due to differences in viscosity and area of ​​the protective layer.

[0015] Secondly, short circuits and open circuits can be reduced, thereby improving circuit failures.

[0016] Third, even if misalignment occurs during formation of the protective layer, the possibility of short circuits or open circuits can be relatively reduced.

[0017] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief description of the drawings]

[0018] [Figure 1] 1 is a cross-sectional view illustrating a schematic structure of a coil substrate according to an embodiment of the present invention. [Diagram 2] 3 is a first exemplary view illustrating a first protective layer constituting a coil substrate according to an embodiment of the present invention; FIG. [Diagram 3] 11 is a second exemplary view illustrating a first protective layer constituting a coil substrate according to an embodiment of the present invention; FIG. [Figure 4] 11 is a third exemplary view illustrating a first protective layer constituting a coil substrate according to an embodiment of the present invention. FIG. [Diagram 5] 13 is a fourth exemplary view illustrating a first protective layer constituting a coil substrate according to an embodiment of the present invention. FIG. [Figure 6] 4 is a flowchart illustrating a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 7] 4 is a cross-sectional view illustrating step S310 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 8] 4 is a cross-sectional view illustrating step S320 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 9] 4 is a cross-sectional view illustrating step S330 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 10] 4 is a cross-sectional view illustrating step S340 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 11] 4 is a cross-sectional view illustrating step S350 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 12] 4 is a cross-sectional view illustrating a step S360 of a method for manufacturing a coil substrate according to an embodiment of the present invention. [Figure 13] 13 is a cross-sectional view illustrating a schematic structure of a coil substrate according to another embodiment of the present invention. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same reference numerals are used to refer to the same components in the drawings, and redundant description thereof will be omitted.

[0020] The present invention relates to a coil substrate in which a protective layer is formed on a lead-in wiring, an electronic device including the coil substrate, and a method for manufacturing the coil substrate. The present invention will be described in detail below with reference to the drawings.

[0021] Fig. 1 is a cross-sectional view showing a coil substrate according to an embodiment of the present invention, and Fig. 13 is a cross-sectional view showing a coil substrate according to another embodiment of the present invention.

[0022] 1 and 13, the coil substrate 100 may include a base substrate 110, a first seed pattern 120, a first coil 130, and a first seed pattern protection layer 160. As shown in FIG.

[0023] The base substrate 110 constitutes the core of the coil substrate 100, and may be formed of a base film having a predetermined thickness (for example, 5 μm to 100 μm) made of an insulating material. The base substrate 110 is made of a flexible film having flexibility, but is not limited thereto, and may be made of a rigid flexible or rigid film material.

[0024] The base substrate 110 may be made of at least one insulating material selected from various types of polymeric materials, including polyimide, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate, epoxy, glass fiber, and the like.

[0025] In addition, the base material 110 may have any shape as long as it can realize a coil device. It may be formed into a polygonal shape such as a square, a circle, a plate, a trapezoid, or a triangle, or may be formed into a shape with rounded corners. It may also be formed into a shape that conforms to the profile of the coil described below, and may be formed into any shape without being limited to any shape as long as it is a shape that can preferably realize the coil of the present invention.

[0026] The base substrate 110 may include a cutline (210). Here, the cutline (210) is a boundary portion that divides the coil substrate 100 into a product region (220) and a non-product region, i.e., a dummy region (230). The cutline (210) may be cut by a method such as laser or dicing during a product manufacturing process, and thus the dummy region (230) may be separated from the product region (220). The cutline (210) may be an edge region of the coil substrate 100 that is composed of only the product region (220), but may also be an inner region located inside the edge region.

[0027] The dummy region 230 may include a lead-in wiring layer 140 to serve as wiring for receiving current when forming the first coil 130, a dummy pattern for separating the product region 220 from the non-product region, and a dummy pattern for controlling plating deviation between wiring when forming the first coil. The first seed pattern 120 is formed on the first surface of the base substrate 110 to enhance the bonding between the base substrate 110 and the first coil 130 or to apply an external current to the first coil 130. The first seed pattern 120 may be formed as a thin-film conductive layer using an electrically conductive material, for example, any one metal selected from various conductive metals such as nickel (Ni), chromium (Cr), copper (Cu), gold (Au), aluminum (Al), and palladium (Pd), or an alloy of multiple metals. The first seed pattern 120 may be formed on the base substrate 110 by a physical method or a chemical method such as deposition, adhesion, and plating.

[0028] The first seed pattern 120 may be formed to a thickness of, for example, 0.1 μm to 5 μm, and preferably 0.5 μm to 1.5 μm. Such a thickness of the first seed pattern 120 allows a sufficient current to be applied to form the first conductive pattern 130a and / or the second conductive pattern 130b described below, and can suppress defects that occur during processing such as cutting.

[0029] Although not shown in FIG. 1, an underlayer may be further provided on the first seed pattern 120. The underlayer may be formed of the same metal material as the first seed pattern 120, or may be formed of a different metal material than the first seed pattern 120. In addition, the underlayer may be formed to have the same thickness as the first seed pattern 120, or may be formed to have a thickness thicker than the first seed pattern 120 and thinner than the thickness of the first coil 130.

[0030] The first seed pattern 120 includes a seed region and a lead-in wiring region. Here, the seed region is a region that serves as a base (i.e., a seed region) when forming the first conductive pattern 130a and / or the second conductive pattern 130b of the first coil described below, and the lead-in wiring region is a region that serves as wiring to which a current is applied when forming the first conductive pattern 130a and / or the second conductive pattern 130b.

[0031] The first coil 130 is capable of inducing an electromagnetic force by passing a current through it. The first coil 130 may be formed on the first seed pattern 120, preferably on the seed region of the first seed pattern 120, at a thin film type level, and may be wound in a spiral shape. Also, a third coil may be formed on the second surface of the base substrate 110 to form coils on both surfaces of the base substrate 110, but is not limited thereto, and may be formed only on one surface of the base substrate 110.

[0032] The first coil 130 may be made of any one metal selected from various conductive metals such as nickel (Ni), copper (Cu), gold (Au), silver (Ag), platinum (Pt), aluminum (Al), palladium (Pd), titanium (Ti), etc., or an alloy of multiple metals. The first coil 130 may be formed on the base substrate 110 using various techniques such as etching, plating, printing, coating, etc.

[0033] Also, the first coil 130 may include a first conductive pattern 130a and a second conductive pattern 130b on at least one surface of the first conductive pattern 130a.

[0034] When the first conductive pattern 130a of the first coil 130 is formed on the base substrate 110 using plating, one of electrolytic plating and electroless plating may be used. Although not shown in FIG. 1, when the first conductive pattern 130a is formed on the base substrate 110 using electrolytic plating, it may be formed on a portion where the resist pattern layer is not formed. In addition, the first conductive pattern 130a may be formed on the first seed pattern 120 to have the same thickness as the resist pattern layer, or may be formed on the first seed pattern 120 to have a thickness thinner than the resist pattern layer. In this case, plating can be prevented from being concentrated on the upper portion, and the width of the upper portion and the width of the lower portion can be formed uniformly. In addition, the resist pattern layer may be removed on the base substrate 110 together with a portion of the first seed pattern after forming the first conductive pattern 130a of the first coil. The resist pattern layer may be removed on the base substrate 110 before forming the second conductive pattern 130b on the first conductive pattern 130a of the first coil.

[0035] In addition, when plating is used to form the seed region of the first seed pattern 120, plating may be performed one or more times. In this case, one or more boundary lines may be formed on the cross section of the first conductive pattern 130a of the first coil 130 depending on the number of plating steps or changes in plating conditions.

[0036] That is, by performing plating one or more times, even if the first conductive pattern 130a of the first coil 130 is formed to a thickness of 40 μm or more, it is easy to ensure productivity, such as preventing burnt plating defects due to high current applied during plating. In addition, the second conductive pattern 130b of the first coil 130 may be formed by plating growth from the upper surface or side surface of the first conductive pattern 130a. In this case, if the second conductive pattern 130b grows isotropically, the thickness or width of the upper surface and the side surface of the first conductive pattern 130a may be expanded to the same or similar level, and if it grows anisotropically, the thickness or width may be expanded preferentially on one of the upper surface or the side surface.

[0037] In addition, a first seed pattern protection layer 160 may be further formed on the lead-in wiring of the first seed pattern 120. The first seed pattern protection layer 160 is a resin layer made of an insulating material, and may be formed on the lead-in region of the first seed pattern 120 after forming the first conductive pattern 130a of the first coil. For example, the first seed pattern protection layer 160 may be formed using a solder resist, which is the same material as the first insulating layer described below, or may be formed using an insulating material with different physical properties, and may be formed using various methods such as printing, adhesion, coating, photolithography, etc.

[0038] 1, the first seed pattern protection layer 160 is formed on a recessed region of the first seed pattern and extends to a cut line. At least one side of the first seed pattern protection layer 160 is formed to contact the first conductive pattern of the first coil, and at least a portion of an upper surface or a side surface of the first seed pattern protection layer is formed to contact the second conductive pattern of the first coil.

[0039] This allows the lead-in region of the first seed pattern to remain as a path for receiving current required to form the second conductive pattern of the first coil before removing a part of the first seed pattern after forming the first conductive pattern of the first coil. Therefore, the seed regions of the first seed pattern between the first conductive patterns of the first coil are separated from each other to prevent short circuit failure, and current can be applied to the first coil from the lead-in wiring layer 140 outside the cut line through the lead-in region of the first seed pattern. In addition, the thickness of the lead-in region of the first seed pattern is on the order of 0.1 μm to 5 μm, which is lower than the thickness of the first conductive pattern or the second conductive pattern of the first coil, and is formed with a thin thickness, so that it is easy to cut the first coil along the cut line, and problems such as damage to the appearance of the side of the cut line or short circuit failure between wirings can be eliminated.

[0040] In this case, the thickness of the first seed pattern protection layer in the lead-in wiring region of the first seed pattern is formed to be thicker or the same as that of the lead-in wiring region of the first seed pattern, and is formed to be thinner than the thickness of the first insulating layer described later, and may be preferably formed to a thickness level of 1 to 45 μm. If the thickness of the first seed pattern protection layer is thinner than the thickness of the lead-in wiring region of the first seed pattern, the lead-in wiring region of the first seed pattern cannot be protected in the process of removing a part of the region of the first seed pattern, and rather, both the first seed pattern protection layer and the lead-in wiring region of the first seed pattern are damaged, resulting in a problem that the thickness of the lead-in wiring region of the first seed pattern becomes thick. In addition, if the thickness is thicker than the thickness of the first insulating layer described later, unevenness occurs on the surface of the first insulating layer, stacking of the nth coil for forming a multilayer structure is not performed favorably, and problems such as burrs and residues generated in a cutting process may occur, resulting in a decrease in processing quality.

[0041] Meanwhile, the first coil may have a wiring region and a pad region defined therein, the wiring region may include a plurality of first wiring patterns wound in a spiral shape, and the pad region may include a first connecting line or a first coil pad formed with a width wider than that of the first wiring patterns.

[0042] In this case, the lead-in wiring region of the first seed pattern may be extended from the seed region of the first seed pattern formed under the first coil pad. When the lead-in wiring region of the first seed pattern is extended from the first coil wiring pattern, the first seed pattern protection layer is formed up to the top of the first coil wiring pattern, thereby protecting a part of the seed region of the first seed pattern under the first coil wiring pattern from being removed. That is, the first wiring pattern of the first coil cannot be separated, which may cause a short circuit failure.

[0043] Therefore, the present invention presents a structure in which the lead-in wiring of the first seed pattern is formed continuously with the pad region located at the outermost position among the wiring region and pad region constituting the first coil, which is spaced farther apart than the spacing between the first wiring patterns and is thicker than the first wiring patterns, thereby preventing short-circuit defects between the first wiring patterns in the first coil while protecting the lead-in region of the first seed pattern.

[0044] The first seed pattern protection layer 160 may be formed on the first wiring pattern side of the outermost first coil, not on the pads of the first coil.

[0045] The first seed pattern 120 and the first seed pattern protective layer 160 may be formed on one surface of the base substrate 110 with the cut line 210 as a reference, as shown in Fig. 1. However, without being limited thereto, the first seed pattern 120 and the first seed pattern protective layer 160 may be formed on both surfaces (front and back surfaces) of the base substrate 110 with the cut line 210 as a reference, as shown in Fig. 13.

[0046] The first seed pattern protective layer 160 may be formed to have the same width as the pad 150 of the first coil, or may be formed to have a width larger than that of the pad 150 of the first coil, as shown in Fig. 3. Also, as shown in Fig. 4 or 5, the first seed pattern protective layer 160 may be formed to have the same width as the maximum width of the pad 150 of the first coil. This allows the thin first seed pattern protective layer 160 to secure an area to apply a maximum current to the first coil. Figs. 2 to 5 are exemplary views illustrating a first protective layer constituting a coil substrate according to an embodiment of the present invention.

[0047] Although not shown in FIG. 1, the coil substrate 100 may further include a first insulating layer. The first insulating layer is formed to cover the top or sides of the first coil 130 to protect the first coil 130, or to be in contact with at least one of the base substrate, the first coil, the first seed pattern, and the seed pattern protection layer. The first insulating layer is formed of an insulating material, for example, a solder resist. The first insulating layer may be formed to cover the first coil 130 using various techniques such as printing, bonding, coating, and photolithography. Also, as described above, a third coil may be formed on the second surface of the base substrate 110, and coils may be formed on both surfaces of the base substrate 110. The third coil may be formed to be symmetrical or have the same shape as the first coil, but the two coils may be formed to be spaced apart from each other by a predetermined distance based on the centers of the normal directions of the two coils and not completely overlap each other.

[0048] The third coil will be described below, but the description overlapping with the first coil will be omitted.

[0049] A third seed pattern is formed on the second surface of the base substrate, and a third coil is formed on the third seed pattern. Preferably, the third coil is formed on the seed region of the third seed pattern out of a seed region and a lead-in region included in the third seed pattern.

[0050] In addition, a third seed pattern protective layer is formed on the lead-in wiring region of the third seed pattern, and the level of thickness and the effect when formed are the same as those of the first seed pattern protective layer, so a description thereof will be omitted. Furthermore, when the first coil and the third coil are formed on both sides of the base substrate, respectively, by leaving the seed pattern lead-in wiring regions on both sides, respectively, the current during plating of both coils can be set at the same level (speed, current density, etc.), and therefore the thickness of both coils can be formed without significant difference.

[0051] Of course, if the lead-in wiring region of the first seed pattern formed only on the first surface of the base substrate can apply a sufficient current to the second surface, it is not necessary to form the third seed pattern on the second surface of the base substrate.

[0052] Also, a second insulating layer can be formed so as to be in contact with at least one of the second surface of the base substrate, the third coil, the third seed pattern, and the third seed pattern protection layer.

[0053] The first coil and the third coil formed on both sides of the base substrate 110 can be connected through a via (240) formed through the base substrate.

[0054] The coil substrate 100 may be formed in multiple layers. For example, a second coil may be formed on a first insulating layer formed to cover a first coil, and the first coil and the second coil may be electrically connected to each other through a first via included inside the first insulating layer.

[0055] More specifically, a second coil is formed on a seed region of a second seed pattern formed on the first insulating layer, and the second seed pattern does not need to include a lead-in region. This is because the second seed pattern can form the second coil by applying a current from the first coil formed on the base substrate or the lead-in region of the first seed pattern formed adjacent to the first coil. That is, when forming the second coil, it is not necessary to form a separate second seed pattern protection layer to leave the lead-in region of the second seed pattern, thereby improving productivity.

[0056] Also, the second coil may have the same structure as the first coil and may include a third conductive pattern and a fourth conductive pattern formed on at least one surface of the third conductive pattern. Of course, the second coil also has a wiring region and a pad region defined therein, the wiring region includes a plurality of second wiring patterns wound in a spiral shape, and the pad region includes a second connecting line or a second coil pad formed with a width wider than that of the second wiring patterns.

[0057] Next, a method for manufacturing the coil substrate 100 will be described. Fig. 6 is a flow chart for explaining a method for manufacturing the coil substrate according to an embodiment of the present invention, and Figs. 7 to 12 are cross-sectional views for explaining each step of the manufacturing method according to Fig. 6.

[0058] The coil substrate 100 can be manufactured by electrolytic plating or isotropic plating. The manufacturing method of the coil substrate 100 described below is intended to prevent isotropic plating defects.

[0059] First, a base substrate including a first surface and a second surface corresponding to the first surface is prepared, and then a first seed pattern is formed on the first surface of the base substrate.

[0060] Then, a first coil is formed on the first seed pattern, and a first seed pattern protection layer is formed on the first seed pattern.

[0061] In the forming of the first coil, the first coil is formed on a seed region of the first seed pattern. Preferably, after forming a first conductive pattern of the first coil on the seed region of the first seed pattern, a second conductive pattern is further formed to contact at least one side of the first conductive pattern.

[0062] In this case, one or more plating processes may be performed to ensure that the first conductive pattern has a thickness of 40 μm or more, and the second conductive pattern may be formed by growing the top or side surface of the first conductive pattern by a plating method.

[0063] More specifically, a resist layer is formed on the first seed pattern, and a photolithography process such as exposure and development is applied to form a resist pattern layer. Then, a first conductive pattern can be formed by plating on the first seed pattern on which the resist pattern layer is not formed. Then, after removing the resist pattern layer, a first seed pattern protection layer is formed on the recessed region of the first seed pattern.

[0064] The seed region and other regions of the first seed pattern that are not protected by the first seed pattern protection layer may be removed by an etching method, and then, a current is applied from the lead-in region of the first seed pattern that remains behind the first seed pattern protection layer to cause plating growth on the top or side of the first conductive pattern, thereby forming a second conductive pattern.

[0065] Thereafter, a first insulating layer may be formed to contact at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protection layer, thereby forming the first coil of the present invention.

[0066] Of course, the same current is applied to the dummy region outside the cut line as in the first coil, so that plating can be performed at the same level.

[0067] Thereafter, after forming the second protective layer 170, the coil substrate according to the present invention can be obtained by cutting along the cutting line 210, and the coil device according to the present invention can also be obtained by combining the coil substrate according to the present invention with other external components.

[0068] Also, after forming a first seed pattern on a first surface of a base substrate, a third seed pattern can be formed on a second surface of the base substrate. Then, a third coil can be formed on a seed region of the third seed pattern in the same manner as in the step of forming the first coil, and then a step of forming a second insulating layer formed to cover the third coil is performed, thereby forming coils on the first surface and the second surface of the base substrate.

[0069] In this case, the vias 240 penetrating the base substrate 110 are formed before forming the seed patterns on both sides, so that the two seed patterns 120 formed on both sides of the base substrate 110 are electrically connected to each other. Of course, the vias 240 may be filled with an electrically conductive material, and the vias 240 may be processed after the seed patterns are formed on both sides of the base substrate.

[0070] Of course, the sixth plating pattern 140b can also be formed on the fifth plating pattern 140a of the lead-in wiring layer 140 (see FIG. 11 for the above).

[0071] Thereafter, a second protective layer 170 is formed on the coil wiring layer 130, the lead-in wiring layer 140, the via pads 150, etc. so as to cover them (S360) (see FIG. 12).

[0072] As explained with reference to FIG. 2, after forming the second protective layer 170, the base substrate 110 of the dummy region 230, the seed pattern 120, the lead-in wiring layer 140, the first seed pattern protective layer 160, the second protective layer 170, etc. can be separated from the product via the cut line 210.

[0073] Although the embodiment of the present invention has been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiment, and can be manufactured in various different forms, and a person having ordinary skill in the art to which the present invention belongs can understand that the present invention can be embodied in other specific forms without changing the technical idea or essential features of the present invention. Therefore, it should be understood that the above embodiment is illustrative in all respects and not limiting. [Industrial Applicability]

[0074] The present invention can be applied to a coil substrate and an electronic device including the same.

Claims

1. Base substrate; a first seed pattern formed on a first surface of the base substrate, the first seed pattern including a seed region and a lead-in wiring region; a first coil formed on a seed region of the first seed pattern; a first seed pattern protection layer formed on a lead-in wiring region of the first seed pattern; and a first insulating layer formed in contact with at least one surface of the seed pattern protection layer; The first coil includes a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern, The first seed pattern formed under the seed pattern protection layer extends to a cut line, The first insulating layer is formed to be in contact with at least one of the base substrate, the first coil, the seed pattern, and the seed pattern protection layer.

2. At least one side of the seed pattern protection layer is formed to contact the first conductive pattern of the first coil, The coil substrate according to claim 1 , wherein at least a portion of an upper surface or a side surface of the seed pattern protection layer is formed to be in contact with the second conductive pattern of the first coil.

3. The coil substrate of claim 1 , wherein the thickness of the seed protection layer in the lead-in wiring region of the first seed pattern is formed to be the same as or thicker than the thickness of the lead-in wiring region of the first seed pattern, and is formed to be thinner than the thickness of the first insulating layer.

4. a thickness of the first seed pattern is formed to be thinner than a thickness of the first conductive pattern or a thickness of the second conductive pattern of the first coil; 2. The coil substrate according to claim 1, wherein the seed protection layer is formed to a thickness of 5 to 45 μm.

5. The first coil has a wiring region and a pad region defined therein, the wiring region includes a plurality of first wiring patterns wound in a spiral shape; The coil substrate of claim 1 , wherein the pad region includes a first connecting line or a first coil pad formed with a width greater than that of the first wiring pattern.

6. The first coil pad is a first conductive layer formed on a seed region of the first seed pattern; At least a portion of a seed protection layer formed on a lead-in wiring region of the first seed pattern; The coil substrate according to claim 5 , further comprising a second conductive layer formed so as to contact an upper surface or a side surface of the first conductive layer and an upper surface or a side surface of at least a portion of the seed protection layer.

7. 7. The coil substrate of claim 6, wherein a width of the first conductive layer formed on the seed region of the seed pattern of the first coil pattern is smaller than a width of the first conductive layer formed on the seed region of the seed pattern of the first coil pad.

8. The coil substrate according to claim 1 , wherein the seed protection layer and the first insulating layer are different from each other in at least one of main component, viscosity, color, bubble content, and fluidity.

9. A second coil is formed on the first insulating layer; the second coil includes a third conductive pattern and a fourth conductive pattern formed on at least one surface of the third conductive pattern, The coil substrate according to claim 1 , wherein the third conductive pattern of the second coil is formed on a seed region of a second seed pattern.

10. The coil substrate according to claim 9 , wherein the second seed pattern does not include a recessed region.

11. the first insulating layer includes a first via therein; The coil substrate according to claim 9 , wherein the first coil and the second coil are electrically connected by the first via.

12. a third seed pattern formed on a second surface of the base substrate; a third coil formed on the third seed pattern; The coil substrate according to claim 1 , further comprising a second insulating layer formed so as to cover the third coil.

13. the third seed pattern includes a seed region and a pull-in region; The coil substrate according to claim 12 , wherein a third coil is formed on a seed area of ​​the third seed pattern.

14. a seed pattern protection layer formed on a lead-in wiring region of the third seed pattern; At least one surface of the third seed pattern protection layer is in contact with the second insulating layer, The third coil includes a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern, the second seed pattern formed under the third seed pattern protection layer extends to a cut line; The coil substrate of claim 12 , wherein the second insulating layer is formed to be in contact with at least one of the base substrate, the second coil, the third seed pattern, and the third seed pattern protection layer.

15. At least one side of the third seed pattern protection layer is formed to contact the first conductive pattern of the second coil, The coil substrate according to claim 14 , wherein at least a portion of an upper surface or a side surface of the third seed pattern protection layer is formed to be in contact with the second conductive pattern of the second coil.

16. The coil substrate of claim 14 , wherein the thickness of the third seed protection layer in the lead-in wiring region of the third seed pattern is formed to be the same or thicker than the thickness of the lead-in wiring region of the third seed pattern and is formed to be thinner than the thickness of the second insulating layer.

17. a thickness of the third seed pattern is formed to be thinner than a thickness of the first conductive pattern or a thickness of the second conductive pattern of the second coil; The coil substrate according to claim 14, wherein the third seed protection layer is formed to a thickness of 5 to 45 μm.

18. The second coil has a wiring region and a pad region defined therein, the wiring region includes a plurality of second wiring patterns wound in a spiral shape; The coil substrate of claim 14 , wherein the pad region includes a second connecting line or a second coil pad formed to have a width greater than that of the second wiring pattern.

19. An electronic device comprising the coil substrate according to claim 1 .

20. providing a base substrate including a first surface and a second surface corresponding to the first surface; forming a first seed pattern on a first surface of the base substrate; forming a first coil on the first seed pattern; forming a first seed pattern protection layer on the first seed pattern; forming a first insulating layer in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protection layer.

21. the first seed pattern includes a seed region and a lead-in region; The method of claim 20 , wherein in the forming of the first coil, the first coil is formed on a seed region of the first seed pattern.

22. 22. The method of claim 21, wherein in the step of forming the first coil, a first conductive pattern is formed on a seed region of the first seed pattern, and then a second conductive pattern is further formed to contact at least one side of the first conductive pattern.

23. The first coil has a wiring region and a pad region defined therein, 21. The method of claim 20, wherein, in the forming of the first coil, the wiring region includes a plurality of first wiring patterns wound in a spiral shape, and the pad region includes a first connecting line or a first coil pad formed with a width wider than that of the first wiring patterns.

24. In the step of forming the first coil, 24. The coil substrate of claim 23, wherein the first coil pad includes a first conductive layer formed on a seed region of the first seed pattern, at least a portion of a seed protection layer formed on a lead-in wiring region of the first seed pattern, and a second conductive layer formed to contact an upper surface or a side surface of the first conductive layer and an upper surface or a side surface of at least a portion of the seed protection layer.

25. After forming the first seed pattern, forming a third seed pattern on a second surface of the base substrate; forming a third coil on the third seed pattern; The method of claim 20 , further comprising forming a second insulating layer formed to cover the third coil.

26. the third seed pattern includes a seed region and a pull-in region; forming a third seed pattern protection layer on a recessed region of the third seed pattern; and The method of claim 25 , further comprising forming the third coil on a seed region of the third seed pattern.

27. The method of claim 25, wherein the second insulating layer is formed to be in contact with at least one of the base substrate, the second coil, the third seed pattern, and the third seed pattern protection layer.

28. The second coil has a wiring region and a pad region defined therein, the wiring region includes a plurality of second wiring patterns wound in a spiral shape; The method of claim 25, wherein the pad region includes a second connecting line or a second coil pad formed to have a width greater than that of the second wiring pattern.

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