Microwave generator driver limiter

Abstract

The microwave power generator includes a driver stage having a driver transistor and an output stage coupled to the driver stage and having a power amplifier. The driver limiter includes a resistor coupled to a DC voltage source and coupled between the DC voltage source and the driver transistor. The resistor has a resistance value effective to reduce a DC voltage provided by the DC voltage source to a control voltage applied to the driver transistor to set the output power of the driver transistor to a level effective to drive a power amplifier of the output stage to its maximum output power without exceeding a maximum input power rating of the power amplifier.

Description

[Technical field]

[0001] (Claim priority under 35 U.S.C. § 119) This application for patent claims priority to U.S. Provisional Application No. 63 / 334,925, filed April 26, 2022, and entitled "SYSTEM AND METHOD FOR ADJUSTING A DRIVER AMPLIFIER STAGE," which is assigned to the assignee hereof and expressly incorporated herein by reference, which claims priority to U.S. Nonprovisional Application No. 18 / 114,172, filed February 24, 2023, and entitled "MICROWAVE GENERATOR DRIVER LIMITER."

[0002] (Field) The present disclosure relates generally to microwave generators, and more particularly to a driver limiter for controlling the output power of a driver stage of a microwave generator so as to maximize the power output of the output stage power amplifier without exceeding its maximum input power rating. [Background technology]

[0003] (background) A microwave power generator is a device that generates high power microwave energy, typically in the gigahertz range, for a variety of applications. Microwave power generators can be used in semiconductor plasma processes to generate high frequency electromagnetic waves that ionize gases in a plasma processing chamber. This ionization creates a plasma of charged particles that can be used to etch or deposit materials on semiconductor wafers. The microwave generator provides the power needed to sustain the plasma and control process conditions such as gas flow, pressure, and temperature.

[0004] Microwave power generators typically include a power amplifier in the output stage that is prone to failure when driven beyond its maximum input and output power ratings. The output stage power amplifier is typically driven by a microwave driver transistor that must drive the output stage power amplifier to its maximum output power capability to meet the power requirements of the plasma processing chamber. The power amplifier is sometimes part of an adjustable output power control loop that can overdrive the microwave output amplifier under certain conditions, such as a large change in plasma load impedance or a sudden change in set point frequency during a frequency sweep due to power amplifier gain variation across frequency.

[0005] The driver transistor may generate an amount of output power (e.g., about 15 watts) that exceeds the maximum input power rating of the output stage power amplifier (e.g., about 11 watts) and may therefore cause damage to or destroy the output stage power amplifier. Nevertheless, it is important that the driver transistor generate an output power that is sufficient to drive the output stage power amplifier up to its maximum power output. Summary of the Invention [Means for solving the problem]

[0006] (summary) One aspect of the present disclosure may be characterized as a microwave power generator comprising a driver stage having a driver transistor coupled to an output stage having a power amplifier. A driver limiter coupled to the driver stage includes a resistor coupled between a DC voltage source and the driver transistor. The resistor has a resistance value effective to reduce a DC voltage provided by the DC voltage source to a control voltage applied to the driver transistor to set the output power of the driver transistor to a level effective to drive the power amplifier of the output stage to its maximum output power without exceeding the maximum input power rating of the power amplifier.

[0007] In one implementation, the resistance of the resistor is about 13 ohms, the DC voltage provided by the DC voltage supply is about 50 volts, the control voltage applied to the driver transistor is about 43 volts, and the output power of the driver transistor is about 11 watts. In one embodiment, the resistor may be comprised of six resistors connected in series, each of the six resistors having a resistance of about 2.2 ohms.

[0008] In a further implementation, the driver stage comprises a first capacitor coupled between an input node of the driver stage and the driver transistor, and a second capacitor coupled between the driver transistor and an output node of the driver stage, The first and second capacitors have values ​​that keep the driver stage stable and spurious free without attenuating passband frequencies of the driver stage.

[0009] In a further implementation, the driver limiter comprises a third capacitor coupled between the output node of the resistor and ground. The third capacitor has a capacitance value that is effective to minimize overshoot and undershoot of the pulsed RF signal while providing sufficient RF filtering. In one embodiment, the capacitance value of the third capacitor is about 0.1 microfarads.

[0010] In a further implementation, the driver limiter comprises a choke inductor coupled between the output node of the resistor and the driver transistor to prevent RF leakage from the driver stage into the driver limiter stage.

[0011] In a further implementation, the driver limiter includes a fourth capacitor coupled between the input node to the resistor and ground, the fourth capacitor having a bulk capacitance value that maintains a stable voltage level and smooths out any high frequency noise.

[0012] In a further implementation, the driver transistors are gallium nitride transistors having a peak frequency of about 2.7 GHz and a peak output power level of about 15W.

[0013] Another aspect of the present disclosure may be characterized as a method for optimizing an output power of a driver transistor of a microwave generator, the method including coupling a resistor between a DC power supply and the driver transistor, setting a resistance of the resistor to provide a control voltage at an output node of the resistor that is reduced relative to an output voltage of the DC power supply, and applying the control voltage to the driver transistor to set the output power of the driver transistor to a level effective to drive an output stage power amplifier coupled to the driver transistor to its maximum output power without exceeding a maximum input power rating of the power amplifier.

[0014] A further aspect of the present disclosure may be characterized as a driver limiter for a driver transistor of a microwave power generator, the driver limiter comprising a power dissipation means configured to be coupled between a DC voltage source and the driver transistor, the power dissipation means reducing a DC voltage provided by the DC voltage source to a control voltage applied to the driver transistor to set the output power of the driver transistor to a level effective to drive a power amplifier of an output stage of the microwave generator to its maximum output power without exceeding a maximum input power rating of the power amplifier.

[0015] In one implementation, the power dissipation means comprises a resistor coupled between the DC power supply and the driver transistor, the resistor having a resistance of approximately 13 ohms.

[0016] In a further implementation, the power dissipation means comprises six resistors coupled in series between the DC power supply and the driver transistors, each of the six resistors having a resistance of about 2.2 ohms.

[0017] In a further implementation, an RF filtering means is coupled between the power dissipation means and the driver transistors. The RF filtering means minimizes overshoot and undershoot of the pulsed RF signal and prevents RF leakage from the driver transistors into the power dissipation means and the DC power supply.

[0018] In a further implementation, the RF filtering means comprises a capacitor coupled between the power dissipation means and ground, and a choke inductor coupled between the power dissipation means and the driver transistor.

[0019] Further aspects of the present disclosure will be described in, and will be apparent from, the accompanying drawings and description. [Brief description of the drawings]

[0020] The drawings accompanying this disclosure are not necessarily to scale, with emphasis instead being placed on illustrating the concepts disclosed herein. Like reference characters may refer to the same parts throughout the drawings. The drawings depict only illustrative embodiments of the present disclosure and are not limiting in scope.

[0021] [Figure 1] FIG. 1 is a conceptual block diagram of a microwave generator and plasma processing chamber in accordance with an aspect of the present disclosure.

[0022] [Diagram 2] FIG. 2 is a conceptual block diagram of the microwave generator of FIG. 1 in accordance with an aspect of the present disclosure.

[0023] [Diagram 3] FIG. 3 is a conceptual circuit diagram of a driver stage and driver limiter of the microwave generator of FIG. 2 in accordance with an aspect of the present disclosure.

[0024] [Figure 4] FIG. 4 is a flowchart of a method for optimizing the output power of the driver stage of FIG. 3 in accordance with an aspect of the present disclosure.

[0025] [Diagram 5] FIG. 5 is a conceptual block diagram depicting a computing system that may be utilized in connection with the embodiments disclosed herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] (Detailed Description) The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiments described herein as being "exemplary" are not to be construed as preferred or advantageous over other embodiments, and are not intended to be exhaustive or to limit the description to the precise form disclosed. All voltage, current, and power levels, component specifications, etc. set forth herein are merely illustrative of many possible implementations.

[0027] 1 is a conceptual block diagram 100 of a microwave generator 200 and a plasma processing chamber 250 according to aspects of the present disclosure. In some implementations, an impedance matching network may be connected between the microwave generator 200 and the plasma processing chamber 250. The microwave generator 200 receives an input electrical signal from an AC power source 102 and generates a high frequency, high power signal that is processed and used in semiconductor plasma processes to ionize gases in the plasma chamber 250. This ionization creates a plasma of charged particles that may be used to etch or deposit materials on semiconductor wafers.

[0028] In some implementations, the power source 102 generates a continuous carrier (CW) sine wave signal that is input to the microwave generator 200, while in other implementations the power source 102 generates a pulsed sine wave signal that is input to the microwave generator 200. These are merely examples of types of waveforms that may be input to the microwave generator 200, and other types of waveforms may be input to the microwave generator 200 and are within the scope of this disclosure. In one non-limiting example, the AC power source 102 is a two-phase power supply with a voltage of 208V and the signal input to the generator 200 has an RF power range of about -3.2 dBm (decibels relative to 1 milliwatt) to about 10 dBm.

[0029] The output signal generated by microwave generator 200 generally closely mirrors the source signal, but at a much higher power level. Thus, the output signal generated by generator 200 may be a continuous carrier (CW) sine wave signal, a pulsed sine wave signal, or another suitable type of waveform. In one non-limiting example, microwave generator 200 generates a maximum 250 W signal at 2.4-2.5 GHz that is delivered to plasma processing chamber 250.

[0030] The microwave generator 200 also receives an input DC voltage from a DC power supply 104. As will be described in more detail herein, the DC voltage provided by the power supply 104 is used to control the output power of a driver stage of the microwave generator 200. In one non-limiting example, the power supply 104 provides a DC voltage of about 50V to the microwave generator 200.

[0031] FIG. 2 is a conceptual block diagram of the microwave generator 200 of FIG. 1 in accordance with an aspect of the present disclosure. The microwave generator 200 (also referred to as microwave power generator 200) comprises an attenuation stage 210, a predriver stage 220, a driver stage 300, a driver limiter 350, and an output stage 230. In this regard, it is noted that FIG. 2 illustrates only one output channel of the microwave generator 200. The microwave generator 200 may have additional output channels as appropriate for a given application. In one non-limiting example, the microwave generator 200 may have 19 output channels, each capable of providing up to 250 W at 2.4-2.5 GHz. As shown, the driver stage 300 and the output stage 230 comprise part of an adjustable control loop that adjusts the output of the microwave generator 200 based on a feedback control signal 240 relative to a set point input.

[0032] The attenuation stage 210 receives an input power signal from the power source 102 and a feedback control signal 240 from one or more sensors (e.g., directional coupler 238) of the output stage 230 and produces a source signal that varies based on a set point. The attenuation stage 210 adjusts (attenuates) the power of the signal provided to the predriver stage 220 as needed based on the input power signal from the power source 102 and the feedback control signal 240. The attenuation stage 210 comprises at least one RF attenuator. Although two attenuators 212, 214 are depicted in FIG. 2 for illustrative purposes, the attenuation stage 210 may alternatively comprise other numbers of attenuators. In one non-limiting example, the attenuators 212, 214 are voltage variable attenuators (VVA) with an attenuation range of about 32 dB, and the signal output by the attenuation stage 210 has an RF power range of about -7.2 dBm to about -54 dBm.

[0033] The predriver stage 220 amplifies the signal received from the attenuation stage 210 to a suitable level to drive the driver stage 300. As one skilled in the art would understand, the source signal received by the driver stage 300 varies based on a set point input to the attenuation stage 210. The predriver stage 220 comprises at least one preamplifier. Although three preamplifiers 222, 224, 226 are illustrated in FIG. 2 for illustrative purposes, the predriver stage 220 may alternatively comprise other numbers of preamplifiers. In one non-limiting example, the preamplifiers of the predriver stage 220 collectively provide a total gain of about 55 dB, and the signal output by the predriver stage 220 has an RF power range of about 30 dBm to about 0 dBm.

[0034] Driver stage 300 comprises driver transistors that are controlled by driver limiter 350 to have an output power that is effective to drive output stage 230 up to its maximum power output without exceeding the maximum power input rating of output stage 230, thereby potentially causing damage or failure of output stage 230. Driver stage 300 and driver limiter 350 are described in more detail below with reference to FIG.

[0035] Output stage 230 comprises a power amplifier 232, a circulator 234, and a directional coupler 238. In one non-limiting embodiment, power amplifier 232 is a GaN (gallium nitride) amplifier optimized for 2.4-2.5 GHz signal operation, with a peak output power level of up to 300 W (54.8 dBm). As mentioned above and explained in more detail below, driver limiter 350 controls and optimizes the output power of driver stage 300 to drive power amplifier 232 up to its maximum output power without exceeding the maximum input power of power amplifier 232. Power amplifier 232 is configured to receive (from driver stage 300) an amplified representation of a source signal (received at driver stage 300).

[0036] The circulator 234 improves the power handling and performance of the generator 200 by isolating plasma mismatches and preventing reflected signals from causing damage or affecting signal quality. It essentially acts as a one-way valve, allowing microwave energy to flow from the power amplifier 232 to the plasma processing chamber 250 and preventing microwave energy from flowing in the reverse direction. A load resistor 236 is connected to a third port of the circulator 234 to absorb the reflected energy and ensure that it is not reflected back into the generator 200. In one non-limiting example, the load resistor 236 has a value of 50 ohms.

[0037] A directional coupler 238 is coupled to the output of the circulator 234 and measures the forward and reflected power. For example, the directional coupler 238 may measure the 250 W output signal of the microwave generator 200, which is transmitted by a cable or other transmission line to the plasma processing chamber 250. The directional coupler 238 is also connected to the attenuation stage 210 by a feedback control loop 240, allowing the generator 200 to measure and control the output power. If the coupler 238 senses a plasma mismatch, for example, the feedback control loop 240 may control the attenuation stage 210 to attenuate the power to prevent too much reverse power, damage, or failure. The directional coupler 238 forms part of a power adjustment control loop in which the attenuation stage 210 is controlled to reach a given power set point.

[0038] FIG. 3 is a conceptual circuit diagram of a driver stage 300 and a driver limiter 350 of a microwave generator 200 according to aspects of the present disclosure. The primary component of the driver stage 300 is the driver transistor 310. In one non-limiting example, the driver transistor 310 is a high power GaN (gallium nitride) on silicon HEMT (high electron mobility transistor) D-mode transistor. The driver transistor 310 acts as a high frequency power amplifier suitable for up to 2.7 GHz operation (nominal operation of 2.45 GHz) and supports both carrier wave (CW) and pulsed operation with peak output power levels up to 15 W (which is the reason for the driver limiter 350). It is fabricated by depositing a layer of GaN semiconductor material on a silicon substrate. The HEMT structure improves electron mobility and reduces parasitic resistance, which results in high gain, high efficiency, and high power handling capability. "D-mode" refers to the output power polarization of the transistors, which is typically differential, making this suitable for applications where the signals are high frequency and require balanced transmission.

[0039] Capacitor C1 is coupled in series between the output RF signal from pre-driver stage 220 and the input to driver transistor 310. Capacitor C2 is coupled in series between the output of driver transistor 310 and output stage 230. Capacitors C1 and C2 have component values ​​selected to ensure that driver stage 300 remains stable and spurious-free in light of the lower control voltage (e.g., about 43V) provided by driver limiter 350. The input RF signal from pre-driver stage 220 to capacitor C1 is about 1W and may be a carrier wave (CW) or a pulsed RF signal. The component values ​​of capacitors C1 and C2 are selected for stability and to have the lowest possible values ​​that do not attenuate the passband frequency of about 2.4GHz.

[0040] Without the driver limiter 350 (i.e., when the driver transistor 310 is directly controlled by a DC voltage supply), the driver transistor 310 is capable of a maximum power output of approximately 15 W, approximately 4 W above the maximum input power rating of the output stage power amplifier 232 (approximately 11 W). This potential for overdriving can result in catastrophic failure of the power amplifier 232 for both "in-band" and "out-of-band" frequencies. Beyond the potential for catastrophic failure, excessive overdriving of the power amplifier 232 can cause permanent degradation of the output power amplifier transistor die, resulting in lower power amplifier output performance and permanent bias threshold drift. Therefore, the driver limiter 350, which limits and optimizes the output power of the driver transistor 310, is essential for long-term power amplifier reliability.

[0041] Driver limiter 350 controls driver transistor 310 to have an optimal amount of output power (in one embodiment, 11 W+ / -0.5 W) to drive power amplifier 232 of output stage 230 up to its maximum power output (in one embodiment, approximately 250 W) without exceeding the maximum input power rating of power amplifier 232 (in one embodiment, approximately 11 W) and thereby potentially causing damage to or failure of power amplifier 232. Driver limiter 350 sets the output power of driver transistor 310 in this manner without introducing RF instabilities and spurious outputs.

[0042] The driver limiter 350 modifies (reduces) the DC voltage provided by the power supply 104 to a lower control voltage before it is applied to the base terminal of the drive transistor 310. The control voltage applied to the base terminal of the drive transistor 310 controls the base current, which in turn controls the collector current and therefore the output power of the drive transistor 310. The DC control voltage is reduced by coupling a resistor R1 between the DC power supply and the driver transistor 310, thereby dissipating power and lowering the DC voltage level on the output side of the resistor R1. This reduced DC control voltage is then provided to the base terminal of the driver transistor 310, setting the output power of the driver transistor 310 to an optimal level that both drives the power amplifier 232 to its maximum power output and remains below the maximum input power rating of the power amplifier 232. In one non-limiting example, R1 has a value of approximately 13 ohms, which dissipates enough power to reduce the DC voltage from approximately 50V on R1's input node to approximately 43V on R1's output node before it is applied to the driver transistor 310.

[0043] The value of resistor R1 can be advantageously set to fine tune the output power of the driver transistor 310. The R1 resistance can be provided by a single resistor, or alternatively, may be provided by multiple resistors. In one non-limiting example, R1 comprises six 2.2 ohm resistors connected in series to provide a total resistance of 13.2 ohms. The use of multiple resistors, rather than a single resistor, may allow for finer tuning of the driver stage output power and may also help overcome existing board space limitations for the microwave generator 200. The value of resistor R1 can be set, for example, using an E96 series resistor, which provides 96 different resistance values ​​for each decade, ranging from the first decade (1 ohm to 9.76 ohms) to the ninth decade (910 ohms to 999.04 ohms). As a result, the driver limiter 350 is very finely adjustable, i.e., nearly any resistance value is possible to ensure full power from the output stage 230 without overloading the output stage 230.

[0044] The component value of capacitor C3, coupled between the output node of resistor R1 and ground, is selected to stabilize the power provided to the driver transistor 310 to attenuate RF leakage and provide a properly shaped pulse when the driver waveform is pulsed. In particular, the value of capacitor C3 is adjusted to minimize overshoot and undershoot as the input RF signal is modulated on and off, while still providing sufficient RF filtering on the power supply feed. In one non-limiting example, the value of capacitor C3 is set as 0.1 microfarads. Capacitor C3 may be placed in parallel with a shunt resistor to suppress high frequency noise.

[0045] Capacitor C4, coupled between the input node of resistor R1 and ground, is a bulk (high value) capacitor that maintains a stable voltage level, prevents voltage drops, and improves power supply stability. Bulk capacitor C4 helps to smooth out any high frequency noise and improve power supply performance.

[0046] Inductor L1, coupled between the output node of resistor R1 and drive transistor 310, is a choke inductor that prevents ("chokes") RF from traveling from driver stage 300 into driver limiter 350. Inductor L1 cooperates with capacitor C3 to prevent RF from entering resistor R1 and the power supply, i.e., inductor L1 and capacitor C3 cooperate to act as an RF filter.

[0047] The driver limiter 350 provides many advantages. It sets and controls the output power of the driver stage 300 to be an optimal amount (in one embodiment, 11 W + / - 0.5 W) to drive the power amplifier 232 up to its maximum power output (in one embodiment, approximately 250 W) without exceeding the maximum input power rating of the power amplifier 232 and potentially causing damage. This is accomplished without introducing RF instabilities and spurious outputs. The driver limiter 350 allows for easy adjustment of the output power of the driver stage 300 to compensate for part-to-part output power variations that may occur during part manufacturing. The driver limiter 350 limits the output power of the driver stage 300 without introducing any output power regulation loop control issues, i.e., its output power characteristic is monotonic, without introducing any driver stage or power amplifier gain or maximum saturated output power frequency variations, and without introducing large overshoot or undershoot in the output power when the input RF signal is modulated on and off with up to 100% pulse modulation.

[0048] 4 is a flow chart of a method 400 for optimizing the output power of the driver transistor 310 of the microwave generator 200 in accordance with an aspect of the present disclosure. In step 402, a resistor R1 is provided between a DC power supply (50V) and the driver transistor 310. A choke inductor L1 may also be provided between the output of the resistor R1 and the output of the driver transistor 310 to prevent RF leakage into the driver limiter 350.

[0049] In step 404, the value of resistor R1 is selected to set the output power of the driver transistor 310 to drive the power amplifier 232 of the output stage 230 to its maximum power output without exceeding the maximum input power of the power amplifier 232, i.e., to drive the power amplifier 232 to its maximum value without damaging the power amplifier 232. As explained above, setting R1 to about 13 ohms drops the DC control voltage applied to the base terminal of the driver transistor 310 from about 50V to about 43V, which causes the output power of the driver transistor 310 to be about 11W (+ / - 0.5W), which is enough input power to drive the power amplifier 232 to its maximum power output of 250V without causing damage. The output power of the driver transistor 310 may be fine-tuned by adjusting the value of resistor R1, which may be implemented as desired by multiple resistors in series.

[0050] In step 406, a capacitor C3 is coupled between the output of resistor R1 and ground, and in step 408, the value of capacitor C3 is set to minimize overshoot and undershoot of the pulsed RF signal while also providing sufficient RF filtering. As explained above, in one implementation, the value of capacitor C3 is set to be approximately 0.1 microfarads.

[0051] After setting the resistance and capacitance values ​​in the driver limiter 350 as described above, the driver limiter 350 and driver stage 300 were tested at the highest power amplifier input power and at all frequencies, including lower out-of-band frequencies. Despite applying an input overdrive level of more than 10 dB, the output stage 230 remained undamaged. The saturated output power of the power amplifier 232 was also confirmed to be at its maximum level. As described above, only a narrow range of resistance values ​​satisfies both to substantially limit the output power of the driver transistor 310 and prevent damage to the output stage 230 while providing maximum output power from the output stage 230. The output power of the amplifier 232 was confirmed to be stable without any measurable output power fluctuations. The stability and spurs of the power amplifier output RF were confirmed to be better than 55 dBc.

[0052] In essence, the driver limiter 350 limits and optimizes the output power of the driver stage 300 so that it is sufficient to drive the power amplifier 232 to its maximum output power while still not exceeding the maximum input power rating of the output stage power amplifier 232. The output power of the driver stage 300 can be adjusted in fine steps by adjusting the driver limiter resistor to find a narrow range of driver output power that still allows the output stage power amplifier to reach its maximum output power without damage. The driver limiter 350 has been demonstrated to work at high microwave frequencies (i.e., 2.45 GHz) and at high power levels (i.e., 15 W) and as part of an output power regulation loop in solid-state plasma generator applications that are subject to large changes in load impedance due to plasma ignition.

[0053] Those skilled in the art will understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, the data, instructions, commands, information, signals, bits, symbols, and chips referred to in this description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0054] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. The various illustrative logic blocks, modules, and circuits described herein may be implemented or performed using a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. A general purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0055] The steps of a method or algorithm described herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that such processor can read information from, and write information to, the storage medium. Alternatively, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. Alternatively, the processor and the storage medium may reside as discrete components in a user terminal.

[0056] FIG. 5 is a conceptual diagram of a computing system 500 that may be utilized in connection with the embodiments disclosed herein. A display 502 and a non-volatile memory 504 are coupled to a bus 506, which is also coupled to a random access memory (RAM) 508, a processor 510 including N processing components, a field programmable gate array (FPGA) 512, and a transceiver 514 including N transceivers. Although the components depicted in FIG. 5 represent physical components, FIG. 5 is not intended to be a detailed hardware diagram, and thus many of the components depicted in FIG. 5 may be realized by a common construct or distributed among additional physical components. It is also envisioned that other existing and yet to be developed physical components and architectures may be utilized to implement the functional components described with reference to FIG. 5.

[0057] The display 502 generally operates to provide a user interface and in some implementations is realized by a touch screen display. The non-volatile memory 504 is generally a non-transient memory that functions to persistently store data and machine-readable (e.g., processor-executable) code, including executable code, associated with performing the methods described herein. In some embodiments, the non-volatile memory 504 includes boot loader code, operating system code, file system code, and non-transient processor-executable code to facilitate the execution of the methods described herein, including method 400 of FIG. 4.

[0058] In some implementations, the non-volatile memory 504 is realized by a flash memory (e.g., NAND or ONENAND memory), although it is envisioned that other memory types may be utilized as well. Although execution of code from the non-volatile memory 504 may be conceivable, executable code in the non-volatile memory 504 is typically loaded into the RAM 508 and executed by one or more of the N processing components in the processor 510.

[0059] In operation, the processor 510, in association with the RAM 508, may generally operate to execute instructions stored in the non-volatile memory 504 to implement aspects of the present disclosure. For example, non-transient processor-executable instructions for performing aspects of the method 400 of FIG. 4 may be persistently stored in the non-volatile memory 504 and executed by the processor 510, in association with the RAM 508. As one skilled in the art would appreciate, the processor 510 may include a video processor, a digital signal processor (DSP), a graphics processing unit (GPU), and other processing components.

[0060] Additionally or alternatively, FPGA 512 may be configured to perform one or more aspects of the methods described herein (e.g., method 400 of FIG. 4). For example, non-transient FPGA configuration instructions may be persistently stored in non-volatile memory 504 and accessed by FPGA 512 (e.g., during boot-up) to configure FPGA 512 to implement aspects of method 400.

[0061] The input components 516 may operate to receive signals indicative of one or more aspects of power, such as, for example, voltage and current, etc. The output components 518 generally operate to provide one or more analog or digital signals to effectuate the operational aspects of the power controller systems disclosed herein.

[0062] The transceiver 514 includes N transceiver chains that can be used to communicate with external devices over wireless or wired networks, each of which can represent a transceiver associated with a particular communication scheme (e.g., WiFi, Ethernet, Profibus, etc.).

[0063] The disclosure is provided to enable any person skilled in the art to make or use the embodiments described herein. Various modifications will be readily apparent to those skilled in the art, and the principles disclosed herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Although certain embodiments are described herein, these embodiments are presented by way of example only and are not intended to limit the scope of the disclosure.

Claims

1. 1. A microwave power generator comprising: Equipped with an adjustment control loop, The adjustment control loop includes: a driver stage comprising a driver transistor, the driver stage configured to receive a source signal that varies based on a set point; an output stage comprising a power amplifier configured to receive an amplified representation of the source signal from the driver stage; a driver limiter configured to be coupled between the driver stage and a DC voltage source, the driver limiter comprising a resistor coupled between the DC voltage source and the driver transistor; Equipped with a resistor having a resistance value effective to reduce a DC voltage supplied by the DC voltage source to a control voltage applied to the driver transistor to set the output power of the driver transistor at a level effective to drive the power amplifier of the output stage to its maximum output power without exceeding a maximum input power rating of the power amplifier.

2. the resistance of the resistor is approximately 13 ohms; the DC voltage provided by the DC voltage supply is approximately 50 volts; the control voltage applied to the driver transistor is approximately 43 volts; 10. The microwave power generator of claim 1, wherein the output power of the driver transistor is about 11 Watts.

3. 3. The microwave power generator of claim 2, wherein the resistors consist of six resistors connected in series, each of the six resistors having a resistance of about 2.2 ohms.

4. The drive stage further comprises: a first capacitor coupled between an input node of the driver stage and the driver transistor; a second capacitor coupled between the driver transistor and an output node of the driver stage; Equipped with 2. The microwave power generator of claim 1, wherein the first and second capacitors have values ​​that keep the driver stage stable and spurious free without attenuating passband frequencies of the driver stage.

5. the driver limiter further comprises a third capacitor coupled between the output node of the resistor and ground; 5. The microwave power generator of claim 4, wherein the third capacitor has a capacitance value effective to minimize overshoot and undershoot of a pulsed RF signal while providing sufficient RF filtering.

6. 6. The microwave power generator of claim 5, wherein the capacitance value of the third capacitor is about 0.1 microfarads.

7. the driver limiter further comprises a choke inductor coupled between the output node of the resistor and the driver transistor; 6. The microwave power generator of claim 5, wherein the choke inductor prevents RF leakage from the driver stage into the driver limiter stage.

8. the driver limiter further comprises a fourth capacitor coupled between the input node of the resistor and ground; 8. The microwave power generator of claim 7, wherein the fourth capacitor has a bulk capacitance value that maintains a stable voltage level and smooths out any high frequency noise.

9. 10. The microwave power generator of claim 1, wherein the driver transistor is a gallium nitride transistor having a peak frequency of about 2.7 GHz and a peak output power level of about 15 W.

10. 1. A method for applying output power to a plasma load, the method comprising: receiving a set point for the output power; producing a source signal using an attenuation stage and a predriver stage, the source signal varying based on said set point; receiving the source signal at a driver stage and producing an amplified representation of the source signal; coupling a resistor between a DC power supply and a driver transistor of the driver stage; setting a resistance of the resistor to provide a control voltage at an output node of the resistor, the control voltage being reduced relative to an output voltage of the DC power supply; applying the control voltage to the driver transistor to set the output power of the driver transistor to a level effective to drive an output stage power amplifier coupled to the driver transistor to its maximum output power using the amplified representation of the source signal without exceeding a maximum input power rating of the power amplifier; A method comprising:

11. the output voltage of the DC power supply is approximately 50 volts; The resistance of the resistor is set to be approximately 13 ohms; 11. The method of claim 10, wherein the control voltage at the output node of the resistor is approximately 43 volts.

12. coupling a first capacitor to an input of the driver transistor; coupling a second capacitor to an output of the driver transistor; setting values ​​of the first and second capacitors to keep the output power of the driver transistor stable and spurious free without attenuating passband frequencies of the driver stage; The method of claim 10 further comprising:

13. coupling a third capacitor between the output node of the resistor and ground; setting a capacitance value of the third capacitor effective to minimize overshoot and undershoot of the pulsed RF signal while providing sufficient RF filtering; The method of claim 12 further comprising:

14. 14. The method of claim 13, further comprising: coupling a choke inductor between an output node of the resistor and the driver transistor to prevent RF leakage from the driver transistor into the resistor and the DC power supply.

15. 15. The method of claim 14, further comprising coupling a fourth capacitor between the input node of the resistor and ground, the fourth capacitor having a bulk capacitance value that maintains a stable voltage level and smooths out any high frequency noise.

16. 1. A driver limiter for a driver transistor of a microwave power generator, comprising: a power dissipation means configured to be coupled between a DC voltage source and the driver transistor; The power dissipation means is a driver limiter which reduces the DC voltage provided by the DC voltage supply source to a control voltage applied to the driver transistor to set the output power of the driver transistor at a level that is effective to drive a power amplifier of an output stage of the microwave generator to its maximum output power without exceeding the maximum input power rating of the power amplifier.

17. 17. The driver limiter of claim 16, wherein the power dissipation means comprises a resistor coupled between the DC power supply and the driver transistor, the resistor having a resistance of approximately 13 ohms.

18. 17. The driver limiter of claim 16, wherein the power dissipation means comprises six resistors coupled in series between the DC power supply and the driver transistors, each of the six resistors having a resistance of approximately 2.2 ohms.

19. further comprising RF filtering means coupled between the power dissipation means and the driver transistor; 17. The driver limiter of claim 16, wherein the RF filtering means minimizes overshoots and undershoots of a pulsed RF signal and prevents RF leakage from the driver transistor into the power dissipation means and the DC power supply.

20. The RF filtering means comprises: a capacitor coupled between the power dissipation means and ground; a choke inductor coupled between the power dissipation means and the driver transistor; 20. The drive limiter of claim 19 comprising:

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